Searched refs:CLK_ROOT_PRE_DIV (Results 1 – 6 of 6) sorted by relevance
87 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in enable_usboh3_clk()538 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in enable_i2c_clk()562 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_esdhc()567 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_esdhc()572 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_esdhc()597 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_uart()602 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_uart()607 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_uart()612 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_uart()617 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in init_clk_uart()[all …]
161 CLK_ROOT_PRE_DIV(config->alt_pre_div)); in dram_enable_bypass()164 CLK_ROOT_PRE_DIV(config->apb_pre_div)); in dram_enable_bypass()175 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV5)); in dram_disable_bypass()
354 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV8)); in mxs_set_lcdclk()506 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in set_clk_enet()511 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in set_clk_enet()517 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV1) | in set_clk_enet()562 CLK_ROOT_PRE_DIV(config->alt_pre_div)); in dram_enable_bypass()565 CLK_ROOT_PRE_DIV(config->apb_pre_div)); in dram_enable_bypass()576 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV5)); in dram_disable_bypass()
42 CLK_ROOT_PRE_DIV(CLK_ROOT_PRE_DIV4)); in ddr_init()
229 #define CLK_ROOT_PRE_DIV(n) (((n) << 16) & 0x00070000) macro
2109 #define CLK_ROOT_PRE_DIV(n) ((n << CLK_ROOT_PRE_DIV_SHIFT) & CLK_ROOT_PRE_DIV_MASK) macro