Home
last modified time | relevance | path

Searched refs:CONFIG_SYS_CLK (Results 1 – 25 of 27) sorted by relevance

12

/third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf52x2/
Dcpu.c131 cpu_model, prn, strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
135 pin, prn, strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
283 strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
369 strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
393 strmhz(buf, CONFIG_SYS_CLK)); in print_cpuinfo()
Dspeed.c68 gd->cpu_clk = CONFIG_SYS_CLK; in get_clocks()
/third_party/uboot/u-boot-2020.01/include/configs/
Damcore.h40 #define CONFIG_SYS_CLK 45000000 macro
41 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 2)
DM5235EVB.h94 #define CONFIG_SYS_CLK 75000000 macro
95 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
DM53017EVB.h99 #define CONFIG_SYS_CLK 80000000 macro
100 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
DM5329EVB.h91 #define CONFIG_SYS_CLK 80000000 macro
92 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
Dastro_mcf5373l.h75 #define CONFIG_SYS_CLK 80000000 macro
76 #define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3)
DM5253DEMO.h94 # define CONFIG_SYS_CLK 140000000 macro
97 # define CONFIG_SYS_CLK 70000000 macro
DM5373EVB.h91 #define CONFIG_SYS_CLK 80000000 macro
92 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 3
DM5485EVB.h116 #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK macro
117 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
DM5475EVB.h128 #define CONFIG_SYS_CLK CONFIG_SYS_BUSCLK macro
129 #define CONFIG_SYS_CPU_CLK CONFIG_SYS_CLK * 2
DM5249EVB.h51 #define CONFIG_SYS_CLK 132025600 /* MCF5249 can run at 140MHz */ macro
DM5275EVB.h101 #define CONFIG_SYS_CLK 150000000 macro
DM5272C3.h90 #define CONFIG_SYS_CLK 66000000 macro
DM5282EVB.h89 #define CONFIG_SYS_CLK 64000000 macro
DM5208EVBE.h82 #define CONFIG_SYS_CLK 166666666 /* CPU Core Clock */ macro
Dcobra5272.h32 #define CONFIG_SYS_CLK 66000000 macro
Deb_cpu5282.h65 #define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */ macro
/third_party/uboot/u-boot-2020.01/board/freescale/m5253demo/
Dm5253demo.c35 RC = (CONFIG_SYS_CLK / 1000000) >> 1; in dram_init()
117 period = 1000000000 / (CONFIG_SYS_CLK / 2); /* period in ns */ in ide_set_reset()
/third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf530x/
Dspeed.c17 gd->bus_clk = CONFIG_SYS_CLK; in get_clocks()
/third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf547x_8x/
Dspeed.c23 gd->bus_clk = CONFIG_SYS_CLK; in get_clocks()
/third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf523x/
Dspeed.c30 gd->bus_clk = CONFIG_SYS_CLK; in get_clocks()
Dcpu.c92 wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT); in watchdog_init()
/third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf532x/
Dcpu.c130 wdog_module = ((CONFIG_SYS_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT); in watchdog_init()
/third_party/uboot/u-boot-2020.01/board/BuS/eb_cpu5282/
Deb_cpu5282.c44 MCFSDRAMC_DCR_RC((15 * CONFIG_SYS_CLK / 1000000) >> 4); in dram_init()

12