Home
last modified time | relevance | path

Searched refs:clk_val (Results 1 – 4 of 4) sorted by relevance

/third_party/uboot/u-boot-2020.01/arch/arm/mach-omap2/omap5/
Dhwinit.c199 u32 srcomp_value, mul_factor, div_factor, clk_val, i; in srcomp_enable() local
219 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
220 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK; in srcomp_enable()
221 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
273 clk_val = readl((*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
274 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK; in srcomp_enable()
275 writel(clk_val, (*prcm)->cm_coreaon_io_srcomp_clkctrl); in srcomp_enable()
277 clk_val = readl((*prcm)->cm_wkupaon_io_srcomp_clkctrl); in srcomp_enable()
278 clk_val |= OPTFCLKEN_SRCOMP_FCLK_MASK; in srcomp_enable()
279 writel(clk_val, (*prcm)->cm_wkupaon_io_srcomp_clkctrl); in srcomp_enable()
/third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/imx8m/
Dclock_imx8mm.c142 void dram_enable_bypass(ulong clk_val) in dram_enable_bypass() argument
148 if (clk_val == imx8mm_dram_bypass_tbl[i].clk) in dram_enable_bypass()
153 printf("No matched freq table %lu\n", clk_val); in dram_enable_bypass()
Dclock_imx8mq.c543 void dram_enable_bypass(ulong clk_val) in dram_enable_bypass() argument
549 if (clk_val == imx8mq_dram_bypass_tbl[i].clk) in dram_enable_bypass()
554 printf("No matched freq table %lu\n", clk_val); in dram_enable_bypass()
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-imx8m/
Dclock.h252 void dram_enable_bypass(ulong clk_val);