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Searched refs:clkp (Results 1 – 18 of 18) sorted by relevance

/third_party/uboot/u-boot-2020.01/arch/arm/mach-imx/imx8m/
Dclock_imx8mm.c25 struct clk *clkp; in enable_ocotp_clk() local
28 ret = clk_get_by_id(IMX8MM_CLK_OCOTP_ROOT, &clkp); in enable_ocotp_clk()
34 enable ? clk_enable(clkp) : clk_disable(clkp); in enable_ocotp_clk()
39 struct clk *clkp; in enable_i2c_clk() local
42 ret = clk_get_by_id(IMX8MM_CLK_I2C1_ROOT + i2c_num, &clkp); in enable_i2c_clk()
48 return enable ? clk_enable(clkp) : clk_disable(clkp); in enable_i2c_clk()
287 struct clk *clkp; in mxc_get_clock() local
292 ret = clk_get_by_id(IMX8MM_CLK_IPG_ROOT, &clkp); in mxc_get_clock()
295 return clk_get_rate(clkp); in mxc_get_clock()
297 ret = clk_get_by_id(IMX8MM_CLK_A53_DIV, &clkp); in mxc_get_clock()
[all …]
/third_party/uboot/u-boot-2020.01/drivers/clk/
Dclk-uclass.c493 struct clk *clkp = NULL; in clk_enable() local
503 if (clk->id && !clk_get_by_id(clk->id, &clkp)) { in clk_enable()
504 if (clkp->enable_count) { in clk_enable()
505 clkp->enable_count++; in clk_enable()
508 if (clkp->dev->parent && in clk_enable()
509 device_get_uclass_id(clkp->dev) == UCLASS_CLK) { in clk_enable()
510 ret = clk_enable(dev_get_clk_ptr(clkp->dev->parent)); in clk_enable()
513 clkp->dev->parent->name); in clk_enable()
526 if (clkp) in clk_enable()
527 clkp->enable_count++; in clk_enable()
[all …]
Dclk_sandbox_ccf.c30 struct clk *clkp = NULL; in sandbox_clk_enable_count() local
33 ret = clk_get_by_id(clk->id, &clkp); in sandbox_clk_enable_count()
37 return clkp->enable_count; in sandbox_clk_enable_count()
/third_party/uboot/u-boot-2020.01/drivers/clk/imx/
Dclk-imx8mn.c367 struct clk *clkp, *clkp1; in imx8mn_clk_probe() local
369 clk_get_by_id(IMX8MN_CLK_WDOG1_ROOT, &clkp); in imx8mn_clk_probe()
370 clk_enable(clkp); in imx8mn_clk_probe()
371 clk_get_by_id(IMX8MN_CLK_WDOG2_ROOT, &clkp); in imx8mn_clk_probe()
372 clk_enable(clkp); in imx8mn_clk_probe()
373 clk_get_by_id(IMX8MN_CLK_WDOG3_ROOT, &clkp); in imx8mn_clk_probe()
374 clk_enable(clkp); in imx8mn_clk_probe()
377 clk_get_by_id(IMX8MN_SYS_PLL3, &clkp); in imx8mn_clk_probe()
378 clk_set_rate(clkp, 600000000UL); in imx8mn_clk_probe()
379 clk_enable(clkp); in imx8mn_clk_probe()
[all …]
Dclk-imx8mm.c413 struct clk *clkp, *clkp1; in imx8mm_clk_probe() local
415 clk_get_by_id(IMX8MM_CLK_WDOG1_ROOT, &clkp); in imx8mm_clk_probe()
416 clk_enable(clkp); in imx8mm_clk_probe()
417 clk_get_by_id(IMX8MM_CLK_WDOG2_ROOT, &clkp); in imx8mm_clk_probe()
418 clk_enable(clkp); in imx8mm_clk_probe()
419 clk_get_by_id(IMX8MM_CLK_WDOG3_ROOT, &clkp); in imx8mm_clk_probe()
420 clk_enable(clkp); in imx8mm_clk_probe()
423 clk_get_by_id(IMX8MM_SYS_PLL3, &clkp); in imx8mm_clk_probe()
424 clk_set_rate(clkp, 750000000UL); in imx8mm_clk_probe()
425 clk_enable(clkp); in imx8mm_clk_probe()
[all …]
/third_party/uboot/u-boot-2020.01/cmd/
Dclk.c21 struct clk *clkp; in show_clks() local
24 clkp = dev_get_clk_ptr(dev); in show_clks()
25 if (device_get_uclass_id(dev) == UCLASS_CLK && clkp) { in show_clks()
26 rate = clk_get_rate(clkp); in show_clks()
28 printf(" %-12u %8d ", rate, clkp->enable_count); in show_clks()
/third_party/uboot/u-boot-2020.01/doc/device-tree-bindings/video/
Dexynos-fb.txt25 samsung,vl-clkp: Clock polarity
84 samsung,vl-clkp;
/third_party/uboot/u-boot-2020.01/include/
Dclk.h418 int clk_get_by_id(ulong id, struct clk **clkp);
/third_party/uboot/u-boot-2020.01/arch/arm/dts/
Dexynos5420-smdk5420.dts62 samsung,vl-clkp;
Dexynos4210-universal_c210.dts42 samsung,vl-clkp = <0>;
Dexynos5800-peach-pi.dts149 samsung,vl-clkp;
Dexynos4210-trats.dts36 samsung,vl-clkp = <0>;
Dexynos5250-smdk5250.dts113 samsung,vl-clkp;
Dexynos5420-peach-pit.dts289 samsung,vl-clkp;
Dexynos5250-snow.dts352 samsung,vl-clkp;
Dexynos4412-trats2.dts55 samsung,vl-clkp = <0>;
Dexynos5250-spring.dts177 samsung,vl-clkp;
/third_party/python/Lib/test/
Dmime.types299 application/vnd.crick.clicker.palette clkp