| /third_party/uboot/u-boot-2020.01/arch/arm/dts/ |
| D | s5pc110-pinctrl.dtsi | 13 gpio-controller;
14 #gpio-cells = <2>;
18 gpio-controller;
19 #gpio-cells = <2>;
23 gpio-controller;
24 #gpio-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
33 gpio-controller;
34 #gpio-cells = <2>;
[all …]
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| D | s5pc100-pinctrl.dtsi | 11 gpio-controller;
12 #gpio-cells = <2>;
16 gpio-controller;
17 #gpio-cells = <2>;
21 gpio-controller;
22 #gpio-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
31 gpio-controller;
32 #gpio-cells = <2>;
[all …]
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| D | exynos4x12-pinctrl.dtsi | 18 gpio-controller;
19 #gpio-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
34 gpio-controller;
35 #gpio-cells = <2>;
42 gpio-controller;
43 #gpio-cells = <2>;
50 gpio-controller;
51 #gpio-cells = <2>;
[all …]
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| D | exynos5250-pinctrl.dtsi | 18 gpio-controller;
19 #gpio-cells = <2>;
26 gpio-controller;
27 #gpio-cells = <2>;
34 gpio-controller;
35 #gpio-cells = <2>;
42 gpio-controller;
43 #gpio-cells = <2>;
50 gpio-controller;
51 #gpio-cells = <2>;
[all …]
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| D | exynos4210-pinctrl.dtsi | 20 gpio-controller;
21 #gpio-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
36 gpio-controller;
37 #gpio-cells = <2>;
44 gpio-controller;
45 #gpio-cells = <2>;
52 gpio-controller;
53 #gpio-cells = <2>;
[all …]
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| D | exynos54xx-pinctrl.dtsi | 20 gpio-controller;
21 #gpio-cells = <2>;
28 gpio-controller;
29 #gpio-cells = <2>;
39 gpio-controller;
40 #gpio-cells = <2>;
50 gpio-controller;
51 #gpio-cells = <2>;
58 gpio-controller;
59 #gpio-cells = <2>;
[all …]
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| D | stm32f429-pinctrl.dtsi | 14 gpioa: gpio@40020000 {
15 gpio-ranges = <&pinctrl 0 0 16>;
18 gpiob: gpio@40020400 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@40020800 {
23 gpio-ranges = <&pinctrl 0 32 16>;
26 gpiod: gpio@40020c00 {
27 gpio-ranges = <&pinctrl 0 48 16>;
30 gpioe: gpio@40021000 {
31 gpio-ranges = <&pinctrl 0 64 16>;
[all …]
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| D | stm32f469-pinctrl.dtsi | 13 gpioa: gpio@40020000 {
14 gpio-ranges = <&pinctrl 0 0 16>;
17 gpiob: gpio@40020400 {
18 gpio-ranges = <&pinctrl 0 16 16>;
21 gpioc: gpio@40020800 {
22 gpio-ranges = <&pinctrl 0 32 16>;
25 gpiod: gpio@40020c00 {
26 gpio-ranges = <&pinctrl 0 48 16>;
29 gpioe: gpio@40021000 {
30 gpio-ranges = <&pinctrl 0 64 16>;
[all …]
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| D | keystone-k2hk.dtsi | 47 compatible = "ti,keystone-dsp-gpio";
48 gpio-controller;
49 #gpio-cells = <2>;
50 gpio,syscon-dev = <&devctrl 0x240>;
54 compatible = "ti,keystone-dsp-gpio";
55 gpio-controller;
56 #gpio-cells = <2>;
57 gpio,syscon-dev = <&devctrl 0x244>;
61 compatible = "ti,keystone-dsp-gpio";
62 gpio-controller;
[all …]
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| D | stm32mp157xaa-pinctrl.dtsi | 13 gpioa: gpio@50002000 {
16 gpio-ranges = <&pinctrl 0 0 16>;
19 gpiob: gpio@50003000 {
22 gpio-ranges = <&pinctrl 0 16 16>;
25 gpioc: gpio@50004000 {
28 gpio-ranges = <&pinctrl 0 32 16>;
31 gpiod: gpio@50005000 {
34 gpio-ranges = <&pinctrl 0 48 16>;
37 gpioe: gpio@50006000 {
40 gpio-ranges = <&pinctrl 0 64 16>;
[all …]
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| /third_party/uboot/u-boot-2020.01/drivers/gpio/ |
| D | adi_gpio2.c | 20 static void gpio_error(unsigned gpio) in gpio_error() argument
22 printf("adi_gpio2: GPIO %d wasn't requested!\n", gpio); in gpio_error()
56 static DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
59 inline int check_gpio(unsigned gpio) in check_gpio() argument
62 if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15 || in check_gpio()
63 gpio == GPIO_PH14 || gpio == GPIO_PH15 || in check_gpio()
64 gpio == GPIO_PJ14 || gpio == GPIO_PJ15) in check_gpio()
67 if (gpio >= MAX_GPIOS) in check_gpio()
72 static void port_setup(unsigned gpio, unsigned short usage) in port_setup() argument
76 gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio); in port_setup()
[all …]
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| D | tegra_gpio.c | 43 static int get_config(unsigned gpio) in get_config() argument
46 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in get_config()
50 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); in get_config()
51 type = (u >> GPIO_BIT(gpio)) & 1; in get_config()
54 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); in get_config()
60 static void set_config(unsigned gpio, int type) in set_config() argument
63 struct gpio_ctlr_bank *bank = &ctlr->gpio_bank[GPIO_BANK(gpio)]; in set_config()
67 GPIO_FULLPORT(gpio), GPIO_BIT(gpio), type ? "GPIO" : "SFPIO"); in set_config()
69 u = readl(&bank->gpio_config[GPIO_PORT(gpio)]); in set_config()
71 u |= 1 << GPIO_BIT(gpio); in set_config()
[all …]
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| D | mvgpio.c | 21 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
23 if (gpio >= MV_MAX_GPIO) { in gpio_request()
24 printf("%s: Invalid GPIO requested %d\n", __func__, gpio); in gpio_request()
30 int gpio_free(unsigned gpio) in gpio_free() argument
35 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
39 if (gpio >= MV_MAX_GPIO) { in gpio_direction_input()
40 printf("%s: Invalid GPIO %d\n", __func__, gpio); in gpio_direction_input()
44 gpio_reg_bank = get_gpio_base(GPIO_TO_REG(gpio)); in gpio_direction_input()
45 writel(GPIO_TO_BIT(gpio), &gpio_reg_bank->gcdr); in gpio_direction_input()
49 int gpio_direction_output(unsigned gpio, int value) in gpio_direction_output() argument
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| D | s5p_gpio.c | 21 #define CON_SFR(gpio, cfg) ((cfg) << ((gpio) << 2)) argument
22 #define CON_SFR_UNSHIFT(val, gpio) ((val) >> ((gpio) << 2)) argument
24 #define DAT_MASK(gpio) (0x1 << (gpio)) argument
25 #define DAT_SET(gpio) (0x1 << (gpio)) argument
27 #define PULL_MASK(gpio) (0x3 << ((gpio) << 1)) argument
28 #define PULL_MODE(gpio, pull) ((pull) << ((gpio) << 1)) argument
30 #define DRV_MASK(gpio) (0x3 << ((gpio) << 1)) argument
31 #define DRV_SET(gpio, mode) ((mode) << ((gpio) << 1)) argument
32 #define RATE_MASK(gpio) (0x1 << (gpio + 16)) argument
33 #define RATE_SET(gpio) (0x1 << (gpio + 16)) argument
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| D | mpc83xx_gpio.c | 36 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
38 if (gpio >= MAX_NUM_GPIOS) in gpio_request()
44 int gpio_free(unsigned gpio) in gpio_free() argument
51 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
59 ctrlr = gpio >> 5; in gpio_direction_input()
60 line = gpio & (0x1F); in gpio_direction_input()
65 clrbits_be32(&im->gpio[ctrlr].dir, line_mask); in gpio_direction_input()
71 int gpio_direction_output(unsigned gpio, int value) in gpio_direction_output() argument
83 gpio_set_value(gpio, value); in gpio_direction_output()
86 ctrlr = gpio >> 5; in gpio_direction_output()
[all …]
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| D | omap_gpio.c | 44 static inline int get_gpio_index(int gpio) in get_gpio_index() argument
46 return gpio & 0x1f; in get_gpio_index()
49 int gpio_is_valid(int gpio) in gpio_is_valid() argument
51 return (gpio >= 0) && (gpio < OMAP_MAX_GPIO); in gpio_is_valid()
54 static void _set_gpio_direction(const struct gpio_bank *bank, int gpio, in _set_gpio_direction() argument
64 l |= 1 << gpio; in _set_gpio_direction()
66 l &= ~(1 << gpio); in _set_gpio_direction()
74 static int _get_gpio_direction(const struct gpio_bank *bank, int gpio) in _get_gpio_direction() argument
83 if (v & (1 << gpio)) in _get_gpio_direction()
89 static void _set_gpio_dataout(const struct gpio_bank *bank, int gpio, in _set_gpio_dataout() argument
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| D | spear_gpio.c | 16 static int gpio_direction(unsigned gpio, in gpio_direction() argument
25 val |= 1 << gpio; in gpio_direction()
27 val &= ~(1 << gpio); in gpio_direction()
34 int gpio_set_value(unsigned gpio, int value) in gpio_set_value() argument
39 writel(1 << gpio, ®s->gpiodata[DATA_REG_ADDR(gpio)]); in gpio_set_value()
41 writel(0, ®s->gpiodata[DATA_REG_ADDR(gpio)]); in gpio_set_value()
46 int gpio_get_value(unsigned gpio) in gpio_get_value() argument
51 val = readl(®s->gpiodata[DATA_REG_ADDR(gpio)]); in gpio_get_value()
56 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
58 if (gpio >= SPEAR_GPIO_COUNT) in gpio_request()
[all …]
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| D | kona_gpio.c | 16 #define GPIO_BANK(gpio) ((gpio) >> 5) argument
17 #define GPIO_BITMASK(gpio) \ argument
18 (1UL << ((gpio) & (GPIO_PER_BANK - 1)))
45 int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
50 off = GPIO_PWD_STATUS(GPIO_BANK(gpio)); in gpio_request()
51 value = readl(GPIO_BASE + off) & ~GPIO_BITMASK(gpio); in gpio_request()
57 int gpio_free(unsigned gpio) in gpio_free() argument
62 off = GPIO_PWD_STATUS(GPIO_BANK(gpio)); in gpio_free()
63 value = readl(GPIO_BASE + off) | GPIO_BITMASK(gpio); in gpio_free()
69 int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
[all …]
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| /third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf5445x/ |
| D | cpu_init.c | 73 gpio_t *gpio = (gpio_t *)MMAP_GPIO; in cfspi_port_conf() local
76 out_8(&gpio->par_dspi, in cfspi_port_conf()
85 out_8(&gpio->par_dspi0, in cfspi_port_conf()
88 out_8(&gpio->srcr_dspiow, 3); in cfspi_port_conf()
105 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cpu_init_f() local
116 out_8(&gpio->par_fbctl, in cpu_init_f()
120 out_8(&gpio->par_be, in cpu_init_f()
169 out_8(&gpio->par_cani2c, 0xF0); in cpu_init_f()
171 out_be16(&gpio->pcr_b, 0x003C); in cpu_init_f()
173 out_8(&gpio->srcr_cani2c, 0x03); in cpu_init_f()
[all …]
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| D | dspi.c | 16 struct gpio *gpio = (struct gpio *)MMAP_GPIO; in dspi_chip_select() local
21 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in dspi_chip_select()
22 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS0_PCS0); in dspi_chip_select()
25 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in dspi_chip_select()
26 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS1_PCS1); in dspi_chip_select()
29 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in dspi_chip_select()
30 setbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS2_PCS2); in dspi_chip_select()
33 clrbits_8(&gpio->par_dma, ~GPIO_PAR_DMA_DACK0_UNMASK); in dspi_chip_select()
34 setbits_8(&gpio->par_dma, GPIO_PAR_DMA_DACK0_PCS3); in dspi_chip_select()
37 clrbits_8(&gpio->par_dspi, GPIO_PAR_DSPI_PCS5_PCS5); in dspi_chip_select()
[all …]
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| /third_party/uboot/u-boot-2020.01/board/renesas/sh7753evb/ |
| D | sh7753evb.c | 25 struct gpio_regs *gpio = GPIO_BASE; in init_gpio() local
29 writew(0x0000, &gpio->pacr); /* GETHER */ in init_gpio()
30 writew(0x0001, &gpio->pbcr); /* INTC */ in init_gpio()
31 writew(0x0000, &gpio->pccr); /* PWMU, INTC */ in init_gpio()
32 writew(0x0000, &gpio->pdcr); /* SPI0 */ in init_gpio()
33 writew(0xeaff, &gpio->pecr); /* GPIO */ in init_gpio()
34 writew(0x0000, &gpio->pfcr); /* WDT */ in init_gpio()
35 writew(0x0004, &gpio->pgcr); /* SPI0, GETHER MDIO gate(PTG1) */ in init_gpio()
36 writew(0x0000, &gpio->phcr); /* SPI1 */ in init_gpio()
37 writew(0x0000, &gpio->picr); /* SDHI */ in init_gpio()
[all …]
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| /third_party/uboot/u-boot-2020.01/arch/powerpc/include/asm/ |
| D | mpc85xx_gpio.h | 22 ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); in mpc85xx_gpio_set() local
29 dir |= (in_be32(&gpio->gpdir) & ~mask); in mpc85xx_gpio_set()
30 val |= (in_be32(&gpio->gpdat) & ~mask); in mpc85xx_gpio_set()
37 out_be32(&gpio->gpdat, val); in mpc85xx_gpio_set()
38 out_be32(&gpio->gpdir, dir); in mpc85xx_gpio_set()
58 ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR); in mpc85xx_gpio_get() local
61 return in_be32(&gpio->gpdat) & mask; in mpc85xx_gpio_get()
68 static inline int gpio_request(unsigned gpio, const char *label) in gpio_request() argument
74 static inline int gpio_free(unsigned gpio) in gpio_free() argument
80 static inline int gpio_direction_input(unsigned gpio) in gpio_direction_input() argument
[all …]
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| /third_party/uboot/u-boot-2020.01/board/renesas/sh7752evb/ |
| D | sh7752evb.c | 25 struct gpio_regs *gpio = GPIO_BASE; in init_gpio() local
29 writew(0x0000, &gpio->pacr); /* GETHER */ in init_gpio()
30 writew(0x0001, &gpio->pbcr); /* INTC */ in init_gpio()
31 writew(0x0000, &gpio->pccr); /* PWMU, INTC */ in init_gpio()
32 writew(0xeaff, &gpio->pecr); /* GPIO */ in init_gpio()
33 writew(0x0000, &gpio->pfcr); /* WDT */ in init_gpio()
34 writew(0x0000, &gpio->phcr); /* SPI1 */ in init_gpio()
35 writew(0x0000, &gpio->picr); /* SDHI */ in init_gpio()
36 writew(0x0003, &gpio->pkcr); /* SerMux */ in init_gpio()
37 writew(0x0000, &gpio->plcr); /* SerMux */ in init_gpio()
[all …]
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| /third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf532x/ |
| D | cpu_init.c | 27 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in cpu_init_f() local
41 setbits_8(&gpio->par_cs, GPIO_PAR_CS0_CS0); in cpu_init_f()
49 setbits_8(&gpio->par_cs, GPIO_PAR_CS1_CS1); in cpu_init_f()
71 setbits_8(&gpio->par_cs, GPIO_PAR_CS4); in cpu_init_f()
79 setbits_8(&gpio->par_cs, GPIO_PAR_CS5); in cpu_init_f()
86 out_8(&gpio->par_feci2c, in cpu_init_f()
119 gpio_t *gpio = (gpio_t *) MMAP_GPIO; in uart_port_conf() local
124 clrbits_8(&gpio->par_uart, in uart_port_conf()
126 setbits_8(&gpio->par_uart, in uart_port_conf()
131 clrbits_8(&gpio->par_simp1h, in uart_port_conf()
[all …]
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| /third_party/uboot/u-boot-2020.01/drivers/misc/ |
| D | smsc_sio1007.c | 67 void sio1007_gpio_config(int port, int gpio, int dir, int pol, int type) in sio1007_gpio_config() argument
71 if (gpio < 0 || gpio > SIO1007_GPIO_NUM) in sio1007_gpio_config()
73 if (gpio >= GPIO_NUM_PER_GROUP) { in sio1007_gpio_config()
75 gpio -= GPIO_NUM_PER_GROUP; in sio1007_gpio_config()
82 sio1007_clrsetbits(port, reg, 1 << gpio, dir << gpio); in sio1007_gpio_config()
83 sio1007_clrsetbits(port, reg + 1, 1 << gpio, pol << gpio); in sio1007_gpio_config()
84 sio1007_clrsetbits(port, reg + 2, 1 << gpio, type << gpio); in sio1007_gpio_config()
90 int sio1007_gpio_get_value(int port, int gpio) in sio1007_gpio_get_value() argument
95 if (gpio < 0 || gpio > SIO1007_GPIO_NUM) in sio1007_gpio_get_value()
97 if (gpio >= GPIO_NUM_PER_GROUP) { in sio1007_gpio_get_value()
[all …]
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