| /third_party/uboot/u-boot-2020.01/drivers/video/ |
| D | formike.c | 21 static int spi_write_tag_val(struct spi_slave *spi, unsigned char tag, in spi_write_tag_val() argument
29 ret = spi_xfer(spi, 8, buf, NULL, flags); in spi_write_tag_val()
32 ret = spi_xfer(spi, 8, buf, NULL, flags); in spi_write_tag_val()
44 static void spi_write_dat(struct spi_slave *spi, unsigned int val) in spi_write_dat() argument
46 spi_write_tag_val(spi, TAG_WRITE|TAG_DATA, val); in spi_write_dat()
49 static void spi_write_com(struct spi_slave *spi, unsigned int addr) in spi_write_com() argument
51 spi_write_tag_val(spi, TAG_WRITE|TAG_COMMAND|TAG_ADDR_H, in spi_write_com()
53 spi_write_tag_val(spi, TAG_WRITE|TAG_COMMAND|TAG_ADDR_L, in spi_write_com()
60 struct spi_slave *spi; in kwh043st20_f01_spi_startup() local
63 spi = spi_setup_slave(bus, cs, max_hz, spi_mode); in kwh043st20_f01_spi_startup()
[all …]
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| D | lg4573.c | 13 static int lb043wv_spi_write_u16(struct spi_slave *spi, u16 val) in lb043wv_spi_write_u16() argument
21 ret = spi_xfer(spi, 16, &buf16, NULL, flags); in lb043wv_spi_write_u16()
28 static void lb043wv_spi_write_u16_array(struct spi_slave *spi, u16 *buff, in lb043wv_spi_write_u16_array() argument
34 lb043wv_spi_write_u16(spi, buff[i]); in lb043wv_spi_write_u16_array()
37 static void lb043wv_display_mode_settings(struct spi_slave *spi) in lb043wv_display_mode_settings() argument
75 lb043wv_spi_write_u16_array(spi, display_mode_settings, in lb043wv_display_mode_settings()
79 static void lb043wv_power_settings(struct spi_slave *spi) in lb043wv_power_settings() argument
106 lb043wv_spi_write_u16_array(spi, power_settings, in lb043wv_power_settings()
110 static void lb043wv_gamma_settings(struct spi_slave *spi) in lb043wv_gamma_settings() argument
176 lb043wv_spi_write_u16_array(spi, gamma_settings, in lb043wv_gamma_settings()
[all …]
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| D | scf0403_lcd.c | 32 struct spi_slave *spi; member
150 static int scf0403_spi_read_rddid(struct spi_slave *spi, u32 *rddid) in scf0403_spi_read_rddid() argument
157 error = spi_set_wordlen(spi, 9); in scf0403_spi_read_rddid()
162 error = spi_xfer(spi, 9, &cmd, NULL, SPI_XFER_ONCE); in scf0403_spi_read_rddid()
171 error = spi_xfer(spi, 9, NULL, &dummy_buf, SPI_XFER_ONCE); in scf0403_spi_read_rddid()
175 error = spi_set_wordlen(spi, 8); in scf0403_spi_read_rddid()
180 error = spi_xfer(spi, 8, NULL, &ids_buf, SPI_XFER_ONCE); in scf0403_spi_read_rddid()
189 static int scf0403_spi_transfer(struct spi_slave *spi, struct scf0403_cmd *cmd) in scf0403_spi_transfer() argument
195 error = spi_set_wordlen(spi, 9); in scf0403_spi_transfer()
199 error = spi_xfer(spi, 9, &command, NULL, SPI_XFER_ONCE); in scf0403_spi_transfer()
[all …]
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| /third_party/uboot/u-boot-2020.01/drivers/spi/ |
| D | spi-sifive.c | 97 static void sifive_spi_prep_device(struct sifive_spi *spi, in sifive_spi_prep_device() argument
102 spi->cs_inactive &= ~BIT(slave->cs); in sifive_spi_prep_device()
104 spi->cs_inactive |= BIT(slave->cs); in sifive_spi_prep_device()
105 writel(spi->cs_inactive, spi->regs + SIFIVE_SPI_REG_CSDEF); in sifive_spi_prep_device()
108 writel(slave->cs, spi->regs + SIFIVE_SPI_REG_CSID); in sifive_spi_prep_device()
111 static int sifive_spi_set_cs(struct sifive_spi *spi, in sifive_spi_set_cs() argument
119 writel(cs_mode, spi->regs + SIFIVE_SPI_REG_CSMODE); in sifive_spi_set_cs()
124 static void sifive_spi_clear_cs(struct sifive_spi *spi) in sifive_spi_clear_cs() argument
126 writel(SIFIVE_SPI_CSMODE_MODE_AUTO, spi->regs + SIFIVE_SPI_REG_CSMODE); in sifive_spi_clear_cs()
129 static void sifive_spi_prep_transfer(struct sifive_spi *spi, in sifive_spi_prep_transfer() argument
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| D | mpc8xxx_spi.c | 36 spi8xxx_t *spi; member
46 static void set_char_len(spi8xxx_t *spi, u32 val) in set_char_len() argument
48 clrsetbits_be32(&spi->mode, SPI_MODE_LEN_MASK, (val << 20)); in set_char_len()
53 static int __spi_set_speed(spi8xxx_t *spi, uint speed) in __spi_set_speed() argument
58 clrsetbits_be32(&spi->mode, SPI_MODE_PM_MASK, to_prescale_mod(1)); in __spi_set_speed()
68 priv->spi = (spi8xxx_t *)dev_read_addr(dev); in mpc8xxx_spi_ofdata_to_platdata()
90 out_be32(&priv->spi->mode, SPI_MODE_REV | SPI_MODE_MS | SPI_MODE_EN); in mpc8xxx_spi_probe()
92 __spi_set_speed(priv->spi, 16666667); in mpc8xxx_spi_probe()
95 setbits_be32(&priv->spi->event, 0xffffffff); in mpc8xxx_spi_probe()
97 clrbits_be32(&priv->spi->mask, 0xffffffff); in mpc8xxx_spi_probe()
[all …]
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| D | mpc8xx_spi.c | 36 spi_t __iomem *spi = (spi_t __iomem *)&cp->cp_dparam[PROFF_SPI]; in mpc8xx_spi_probe() local
40 out_be16(&spi->spi_rpbase, 0); in mpc8xx_spi_probe()
79 out_be32(&spi->spi_rstate, 0); in mpc8xx_spi_probe()
80 out_be32(&spi->spi_rdp, 0); in mpc8xx_spi_probe()
81 out_be16(&spi->spi_rbptr, 0); in mpc8xx_spi_probe()
82 out_be16(&spi->spi_rbc, 0); in mpc8xx_spi_probe()
83 out_be32(&spi->spi_rxtmp, 0); in mpc8xx_spi_probe()
84 out_be32(&spi->spi_tstate, 0); in mpc8xx_spi_probe()
85 out_be32(&spi->spi_tdp, 0); in mpc8xx_spi_probe()
86 out_be16(&spi->spi_tbptr, 0); in mpc8xx_spi_probe()
[all …]
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| /third_party/uboot/u-boot-2020.01/drivers/mtd/spi/hifmc100/ |
| D | hifmc100.c | 60 static void hifmc100_dma_transfer(struct hifmc_spi *spi, in hifmc100_dma_transfer() argument
69 struct hifmc_host *host = spi->host; in hifmc100_dma_transfer()
83 if_type = spi->write->iftype; in hifmc100_dma_transfer()
84 dummy = spi->write->dummy; in hifmc100_dma_transfer()
85 w_cmd = spi->write->cmd; in hifmc100_dma_transfer()
87 if_type = spi->read->iftype; in hifmc100_dma_transfer()
88 dummy = spi->read->dummy; in hifmc100_dma_transfer()
89 r_cmd = spi->read->cmd; in hifmc100_dma_transfer()
92 regval = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN | in hifmc100_dma_transfer()
93 op_cfg_mem_if_type(if_type) | op_cfg_addr_num(spi->addrcycle) | in hifmc100_dma_transfer()
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| D | hifmc100_spi_mx25l25635e.c | 35 static void clear_dtr_mode(struct hifmc_spi *spi, unsigned char status) in clear_dtr_mode() argument
38 struct hifmc_host *host = (struct hifmc_host *)spi->host; in clear_dtr_mode()
42 config = spi_general_get_flash_register(spi, SPI_CMD_RDCR_MX); in clear_dtr_mode()
54 spi->driver->write_enable(spi); in clear_dtr_mode()
55 hifmc100_op_reg(spi, SPI_CMD_WRSR, sizeof(unsigned short), fmc_op_write_data_en(ENABLE)); in clear_dtr_mode()
60 static void spi_mx25l25635e_set_cmd(struct hifmc_spi *spi) in spi_mx25l25635e_set_cmd() argument
63 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_mx25l25635e_set_cmd()
69 regval = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in spi_mx25l25635e_set_cmd()
86 static int spi_mx25l25635e_qe_enable(struct hifmc_spi *spi) in spi_mx25l25635e_qe_enable() argument
91 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_mx25l25635e_qe_enable()
[all …]
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| D | hifmc100_spi_general.c | 26 unsigned char spi_general_get_flash_register(struct hifmc_spi *spi, u_char cmd) in spi_general_get_flash_register() argument
31 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_general_get_flash_register()
37 reg = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in spi_general_get_flash_register()
75 static int spi_general_wait_ready(struct hifmc_spi *spi) in spi_general_wait_ready() argument
82 status = spi_general_get_flash_register(spi, SPI_CMD_RDSR); in spi_general_wait_ready()
98 static int spi_general_write_enable(struct hifmc_spi *spi) in spi_general_write_enable() argument
102 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_general_write_enable()
108 status = spi_general_get_flash_register(spi, SPI_CMD_RDSR); in spi_general_write_enable()
129 reg = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in spi_general_write_enable()
139 spi->driver->wait_ready(spi); in spi_general_write_enable()
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| D | hifmc100_spi_w25q256fv.c | 33 static void spi_w25q256fv_set_cmd(struct hifmc_spi *spi, u8 cmd) in spi_w25q256fv_set_cmd() argument
36 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_w25q256fv_set_cmd()
42 regval = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in spi_w25q256fv_set_cmd()
53 static int spi_w25q256fv_entry_4addr(struct hifmc_spi *spi, int enable) in spi_w25q256fv_entry_4addr() argument
61 if (spi->addrcycle != SPI_NOR_4BYTE_ADDR_LEN) { in spi_w25q256fv_entry_4addr()
66 status = spi_general_get_flash_register(spi, SPI_CMD_RDSR3); in spi_w25q256fv_entry_4addr()
76 spi_w25q256fv_set_cmd(spi, SPI_CMD_EN4B); in spi_w25q256fv_entry_4addr()
78 spi->driver->wait_ready(spi); in spi_w25q256fv_entry_4addr()
80 status = spi_general_get_flash_register(spi, SPI_CMD_RDSR3); in spi_w25q256fv_entry_4addr()
91 spi_w25q256fv_set_cmd(spi, SPI_CMD_FIRST_RESET_4ADDR); in spi_w25q256fv_entry_4addr()
[all …]
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| D | hifmc100_spi_gd25qxxx.c | 30 static void set_cmd(struct hifmc_spi *spi, u8 cmd, u8 len) in set_cmd() argument
32 struct hifmc_host *host = (struct hifmc_host *)spi->host; in set_cmd()
39 regval = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in set_cmd()
55 spi->driver->wait_ready(spi); in set_cmd()
58 static int gd_16pin_qe_enable(struct hifmc_spi *spi, int op) in gd_16pin_qe_enable() argument
60 struct hifmc_host *host = (struct hifmc_host *)spi->host; in gd_16pin_qe_enable()
65 config = spi_general_get_flash_register(spi, GD_SPI_CMD_RDSR1); in gd_16pin_qe_enable()
77 status = spi_general_get_flash_register(spi, SPI_CMD_RDSR); in gd_16pin_qe_enable()
81 spi->driver->write_enable(spi); in gd_16pin_qe_enable()
92 set_cmd(spi, SPI_CMD_WRSR, SPI_NOR_SR_LEN + SPI_NOR_CR_LEN); in gd_16pin_qe_enable()
[all …]
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| D | hifmc100_spi_issi.c | 29 static void spi_issi_set_cmd(struct hifmc_spi *spi) in spi_issi_set_cmd() argument
32 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_issi_set_cmd()
38 reg = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in spi_issi_set_cmd()
55 static int spi_issi_qe_enable(struct hifmc_spi *spi) in spi_issi_qe_enable() argument
61 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_issi_qe_enable()
63 op = spi_is_quad(spi); in spi_issi_qe_enable()
67 config = spi_general_get_flash_register(spi, SPI_CMD_RDSR); in spi_issi_qe_enable()
76 spi->driver->write_enable(spi); in spi_issi_qe_enable()
78 config = spi_general_get_flash_register(spi, SPI_CMD_RDSR); in spi_issi_qe_enable()
89 spi_issi_set_cmd(spi); in spi_issi_qe_enable()
[all …]
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| D | hifmc100_spi_xtx.c | 28 static void spi_xtx_set_op(struct hifmc_spi *spi) in spi_xtx_set_op() argument
31 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_xtx_set_op()
37 regval = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in spi_xtx_set_op()
56 static int spi_xtx_qe_enable(struct hifmc_spi *spi) in spi_xtx_qe_enable() argument
63 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_xtx_qe_enable()
65 op = spi_is_quad(spi); in spi_xtx_qe_enable()
69 status_h = spi_general_get_flash_register(spi, XTX_READ_SR_H); in spi_xtx_qe_enable()
78 spi->driver->write_enable(spi); in spi_xtx_qe_enable()
79 status_l = spi_general_get_flash_register(spi, XTX_READ_SR_L); in spi_xtx_qe_enable()
91 spi_xtx_set_op(spi); in spi_xtx_qe_enable()
[all …]
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| D | hifmc_spi_nor_ids.c | 1864 static void hifmc_map_iftype_and_clock(struct hifmc_spi *spi) in hifmc_map_iftype_and_clock() argument
1890 if (spi->write->iftype == iftype_write[ix]) { in hifmc_map_iftype_and_clock()
1891 spi->write->iftype = iftype_write[ix + 1]; in hifmc_map_iftype_and_clock()
1895 hifmc_get_fmc_best_2x_clock(&spi->write->clock); in hifmc_map_iftype_and_clock()
1899 if (spi->read->iftype == iftype_read[ix]) { in hifmc_map_iftype_and_clock()
1900 spi->read->iftype = iftype_read[ix + 1]; in hifmc_map_iftype_and_clock()
1905 if (spi->dtr_mode_support) in hifmc_map_iftype_and_clock()
1907 hifmc_get_fmc_best_4x_clock(&spi->read->clock); in hifmc_map_iftype_and_clock()
1909 hifmc_get_fmc_best_2x_clock(&spi->read->clock); in hifmc_map_iftype_and_clock()
1911 hifmc_get_fmc_best_2x_clock(&spi->read->clock); in hifmc_map_iftype_and_clock()
[all …]
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| D | hifmc100_spi_puya.c | 24 static int spi_puya_entry_4addr(struct hifmc_spi *spi, int enable) in spi_puya_entry_4addr() argument
36 static int spi_puya_qe_enable(struct hifmc_spi *spi) in spi_puya_qe_enable() argument
42 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_puya_qe_enable()
44 op = spi_is_quad(spi); in spi_puya_qe_enable()
48 status = spi_general_get_flash_register(spi, SPI_CMD_RDSR2); in spi_puya_qe_enable()
56 spi->driver->write_enable(spi); in spi_puya_qe_enable()
71 regval = op_cfg_fm_cs(spi->chipselect); in spi_puya_qe_enable()
87 spi->driver->wait_ready(spi); in spi_puya_qe_enable()
89 status = spi_general_get_flash_register(spi, SPI_CMD_RDSR2); in spi_puya_qe_enable()
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| D | hifmc100_os.c | 40 struct hifmc_spi *spi = host->spi; in hifmc100_driver_shutdown() local
45 for (ix = 0; ix < spi_nor_info->numchips; ix++, spi++) { in hifmc100_driver_shutdown()
47 if (spi->addrcycle == 4) { in hifmc100_driver_shutdown()
48 spi->driver->wait_ready(spi); in hifmc100_driver_shutdown()
49 spi->driver->entry_4addr(spi, DISABLE); in hifmc100_driver_shutdown()
99 struct hifmc_spi *spi = host->spi; in hifmc100_probe_spi_size() local
105 for (ix = 0; ix < spi_nor_info->numchips; ix++, spi++) { in hifmc100_probe_spi_size()
107 (u_int)byte_to_mb(spi->chipsize)); in hifmc100_probe_spi_size()
108 total += spi->chipsize; in hifmc100_probe_spi_size()
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| D | hifmc100_spi_s25fl256s.c | 38 static void spi_s25fl256s_set_cmd(struct hifmc_spi *spi) in spi_s25fl256s_set_cmd() argument
41 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_s25fl256s_set_cmd()
47 regval = op_cfg_fm_cs(spi->chipselect); in spi_s25fl256s_set_cmd()
67 static int spi_s25fl256s_entry_4addr(struct hifmc_spi *spi, int enable) in spi_s25fl256s_entry_4addr() argument
71 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_s25fl256s_entry_4addr()
76 if (spi->addrcycle != SPI_NOR_4BYTE_ADDR_LEN) { in spi_s25fl256s_entry_4addr()
82 bank = spi_general_get_flash_register(spi, SS_SPI_CMD_BRRD); in spi_s25fl256s_entry_4addr()
100 spi_s25fl256s_set_cmd(spi); in spi_s25fl256s_entry_4addr()
102 spi->driver->wait_ready(spi); in spi_s25fl256s_entry_4addr()
105 bank = spi_general_get_flash_register(spi, SS_SPI_CMD_BRRD); in spi_s25fl256s_entry_4addr()
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| D | hifmc100_spi_micron.c | 38 static int spi_micron_entry_4addr(struct hifmc_spi *spi, int enable) in spi_micron_entry_4addr() argument
43 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_micron_entry_4addr()
48 if (spi->addrcycle != SPI_NOR_4BYTE_ADDR_LEN) { in spi_micron_entry_4addr()
53 status = spi_general_get_flash_register(spi, SPI_CMD_FLAG_SR_MICRON); in spi_micron_entry_4addr()
62 spi->driver->write_enable(spi); in spi_micron_entry_4addr()
71 reg = op_cfg_fm_cs(spi->chipselect) | OP_CFG_OEN_EN; in spi_micron_entry_4addr()
81 spi->driver->wait_ready(spi); in spi_micron_entry_4addr()
83 status = spi_general_get_flash_register(spi, in spi_micron_entry_4addr()
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| /third_party/boost/libs/config/test/ |
| D | boost_no_cxx11_atomic_sp.ipp | 19 std::shared_ptr<int> spi(new int), spi2(new int);
20 spi = std::static_pointer_cast<int>(spi);
22 atomic_is_lock_free(&spi);
23 atomic_load(&spi);
24 atomic_load_explicit(&spi, std::memory_order_relaxed);
25 atomic_store(&spi, spi2);
26 atomic_store_explicit(&spi, spi2, std::memory_order_relaxed);
27 atomic_exchange(&spi, spi2);
28 atomic_compare_exchange_weak(&spi, &spi2, spi);
29 atomic_compare_exchange_strong(&spi, &spi2, spi);
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| /third_party/uboot/u-boot-2020.01/drivers/mtd/nand/raw/hifmc100/ |
| D | hifmc100_spi_general.c | 66 unsigned char spi_nand_feature_op(struct hifmc_spi *spi, unsigned char op, in spi_nand_feature_op() argument
71 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_nand_feature_op()
115 static int spi_general_wait_ready(struct hifmc_spi *spi) in spi_general_wait_ready() argument
120 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_general_wait_ready()
123 status = spi_nand_feature_op(spi, GET_OP, STATUS_ADDR, 0); in spi_general_wait_ready()
148 static int spi_general_write_enable(struct hifmc_spi *spi) in spi_general_write_enable() argument
151 struct hifmc_host *host = (struct hifmc_host *)spi->host; in spi_general_write_enable()
157 reg = spi_nand_feature_op(spi, GET_OP, STATUS_ADDR, 0); in spi_general_write_enable()
188 spi->driver->wait_ready(spi); in spi_general_write_enable()
190 reg = spi_nand_feature_op(spi, GET_OP, STATUS_ADDR, 0); in spi_general_write_enable()
[all …]
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| /third_party/uboot/u-boot-2020.01/arch/arm/dts/ |
| D | fsl-ls1046a-qds.dtsi | 27 compatible = "jedec,spi-nor";
28 spi-max-frequency = <1000000>; /* input clock */
29 spi-cpol;
30 spi-cpha;
37 compatible = "jedec,spi-nor";
38 spi-max-frequency = <3500000>;
39 spi-cpol;
40 spi-cpha;
47 compatible = "jedec,spi-nor";
48 spi-max-frequency = <3500000>;
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| D | fsl-ls2080a-qds.dts | 48 compatible = "jedec,spi-nor";
49 spi-max-frequency = <3000000>;
50 spi-cpol;
51 spi-cpha;
57 compatible = "jedec,spi-nor";
58 spi-max-frequency = <3000000>;
59 spi-cpol;
60 spi-cpha;
66 compatible = "jedec,spi-nor";
67 spi-max-frequency = <3000000>;
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| D | fsl-ls1043a-qds.dtsi | 27 compatible = "jedec,spi-nor";
28 spi-max-frequency = <1000000>; /* input clock */
29 spi-cpol;
30 spi-cpha;
37 compatible = "jedec,spi-nor";
38 spi-max-frequency = <3500000>;
39 spi-cpol;
40 spi-cpha;
47 compatible = "jedec,spi-nor";
48 spi-max-frequency = <3500000>;
[all …]
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| /third_party/uboot/u-boot-2020.01/drivers/mtd/spi/ |
| D | sf_dataflash.c | 76 static inline int dataflash_status(struct spi_slave *spi) in dataflash_status() argument
86 ret = spi_write_then_read(spi, &opcode, 1, NULL, &status, 1); in dataflash_status()
95 static int dataflash_waitready(struct spi_slave *spi) in dataflash_waitready() argument
103 status = dataflash_status(spi); in dataflash_waitready()
121 struct spi_slave *spi; in spi_dataflash_erase() local
129 spi = spi_flash->spi; in spi_dataflash_erase()
151 status = spi_claim_bus(spi); in spi_dataflash_erase()
178 status = spi_write_then_read(spi, command, 4, NULL, NULL, 0); in spi_dataflash_erase()
184 status = dataflash_waitready(spi); in spi_dataflash_erase()
199 spi_release_bus(spi); in spi_dataflash_erase()
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| D | Makefile | 11 spi-nor-y := sf_probe.o spi-nor-ids.o
16 spi-nor-y += spi-nor-tiny.o
18 spi-nor-y += spi-nor-core.o
21 spi-nor-y += spi-nor-core.o
24 obj-$(CONFIG_SPI_FLASH) += spi-nor.o
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