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Searched refs:timing_cfg_4 (Results 1 – 21 of 21) sorted by relevance

/third_party/uboot/u-boot-2020.01/board/freescale/corenet_ds/
Dp4080ds_ddr.c101 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
133 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
165 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
197 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
229 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
261 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
293 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
325 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
/third_party/uboot/u-boot-2020.01/board/freescale/bsc9132qds/
Dspl_minimal.c38 __raw_writel(CONFIG_SYS_DDR_TIMING_4_800, &ddr->timing_cfg_4); in sdram_init()
58 __raw_writel(CONFIG_SYS_DDR_TIMING_4_1333, &ddr->timing_cfg_4); in sdram_init()
Dddr.c36 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
63 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
/third_party/uboot/u-boot-2020.01/board/freescale/p1010rdb/
Dddr.c39 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
66 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
/third_party/uboot/u-boot-2020.01/board/freescale/p1_twr/
Dddr.c45 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4, in fixed_sdram()
/third_party/uboot/u-boot-2020.01/board/freescale/ls1043ardb/
Dddr.h87 .timing_cfg_4 = 0x00000002,
/third_party/uboot/u-boot-2020.01/drivers/ddr/fsl/
Darm_ddr_gen3.c107 ddr_out32(&ddr->timing_cfg_4, regs->timing_cfg_4); in fsl_ddr_set_memctl_regs()
Dmpc85xx_ddr_gen3.c130 out_be32(&ddr->timing_cfg_4, regs->timing_cfg_4); in fsl_ddr_set_memctl_regs()
Dfsl_ddr_gen4.c160 ddr_out32(&ddr->timing_cfg_4, regs->timing_cfg_4); in fsl_ddr_set_memctl_regs()
Dctrl_regs.c1937 ddr->timing_cfg_4 = (0 in set_timing_cfg_4()
1945 debug("FSLDDR: timing_cfg_4 = 0x%08x\n", ddr->timing_cfg_4); in set_timing_cfg_4()
Dinteractive.c659 CFG_REGS(timing_cfg_4), in print_fsl_memctl_config_regs()
750 CFG_REGS(timing_cfg_4), in fsl_ddr_regs_edit()
/third_party/uboot/u-boot-2020.01/board/freescale/bsc9131rdb/
Dspl_minimal.c45 __raw_writel(CONFIG_SYS_DDR_TIMING_4, &ddr->timing_cfg_4); in sdram_init()
Dddr.c37 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4,
/third_party/uboot/u-boot-2020.01/board/Arcturus/ucp1020/
Dddr.c105 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4, in fixed_sdram()
/third_party/uboot/u-boot-2020.01/board/freescale/ls1021atsn/
Dls1021atsn.c38 out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4); in ddrmc_init()
/third_party/uboot/u-boot-2020.01/board/freescale/ls1021aiot/
Dls1021aiot.c60 out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4); in ddrmc_init()
/third_party/uboot/u-boot-2020.01/board/freescale/p1_p2_rdb_pc/
Dddr.c237 .timing_cfg_4 = CONFIG_SYS_DDR_TIMING_4, in fixed_sdram()
/third_party/uboot/u-boot-2020.01/include/
Dfsl_immap.h50 u32 timing_cfg_4; /* SDRAM Timing Configuration 4 */ member
Dfsl_ddr_sdram.h277 unsigned int timing_cfg_4; member
/third_party/uboot/u-boot-2020.01/board/freescale/mpc8569mds/
Dmpc8569mds.c252 out_be32(&ddr->timing_cfg_4, CONFIG_SYS_DDR_TIMING_4); in fixed_sdram()
/third_party/uboot/u-boot-2020.01/board/freescale/ls1021atwr/
Dls1021atwr.c152 out_be32(&ddr->timing_cfg_4, DDR_TIMING_CFG_4); in ddrmc_init()