/third_party/uboot/u-boot-2020.01/arch/m68k/cpu/mcf52x2/ |
D | cpu.c | 57 wdog_t *wdt = (wdog_t *)(MMAP_WDOG); in watchdog_reset() local 59 out_be16(&wdt->sr, 0x5555); in watchdog_reset() 60 out_be16(&wdt->sr, 0xaaaa); in watchdog_reset() 65 wdog_t *wdt = (wdog_t *)(MMAP_WDOG); in watchdog_disable() local 68 out_be16(&wdt->sr, 0x5555); in watchdog_disable() 69 out_be16(&wdt->sr, 0xaaaa); in watchdog_disable() 71 out_be16(&wdt->cr, 0); in watchdog_disable() 79 wdog_t *wdt = (wdog_t *)(MMAP_WDOG); in watchdog_init() local 82 out_be16(&wdt->cr, 0); in watchdog_init() 85 out_be16(&wdt->mr, in watchdog_init() [all …]
|
/third_party/uboot/u-boot-2020.01/drivers/watchdog/ |
D | omap_wdt.c | 57 struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; in hw_watchdog_reset() local 64 if ((readl(&wdt->wdtwwps)) & WDT_WWPS_PEND_WTGR) in hw_watchdog_reset() 68 writel(wdt_trgr_pattern, &wdt->wdtwtgr); in hw_watchdog_reset() 82 struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; in omap_wdt_set_timeout() local 86 while (readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WLDR) in omap_wdt_set_timeout() 89 writel(pre_margin, &wdt->wdtwldr); in omap_wdt_set_timeout() 90 while (readl(&wdt->wdtwwps) & WDT_WWPS_PEND_WLDR) in omap_wdt_set_timeout() 98 struct wd_timer *wdt = (struct wd_timer *)WDT_BASE; in hw_watchdog_disable() local 103 writel(0xAAAA, &wdt->wdtwspr); in hw_watchdog_disable() 104 while (readl(&wdt->wdtwwps) != 0x0) in hw_watchdog_disable() [all …]
|
D | s5p_wdt.c | 15 struct s5p_watchdog *wdt = in wdt_stop() local 19 wtcon = readl(&wdt->wtcon); in wdt_stop() 22 writel(wtcon, &wdt->wtcon); in wdt_stop() 27 struct s5p_watchdog *wdt = in wdt_start() local 33 wtcon = readl(&wdt->wtcon); in wdt_start() 39 writel(timeout, &wdt->wtdat); in wdt_start() 40 writel(timeout, &wdt->wtcnt); in wdt_start() 41 writel(wtcon, &wdt->wtcon); in wdt_start()
|
D | sandbox_wdt.c | 15 state->wdt.counter = timeout; in sandbox_wdt_start() 16 state->wdt.running = true; in sandbox_wdt_start() 25 state->wdt.running = false; in sandbox_wdt_stop() 34 state->wdt.reset_count++; in sandbox_wdt_reset()
|
/third_party/uboot/u-boot-2020.01/test/dm/ |
D | wdt.c | 23 ut_asserteq(0, state->wdt.counter); in dm_test_wdt_base() 24 ut_asserteq(false, state->wdt.running); in dm_test_wdt_base() 27 ut_asserteq(timeout, state->wdt.counter); in dm_test_wdt_base() 28 ut_asserteq(true, state->wdt.running); in dm_test_wdt_base() 30 uint reset_count = state->wdt.reset_count; in dm_test_wdt_base() 32 ut_asserteq(reset_count + 1, state->wdt.reset_count); in dm_test_wdt_base() 33 ut_asserteq(true, state->wdt.running); in dm_test_wdt_base() 36 ut_asserteq(false, state->wdt.running); in dm_test_wdt_base()
|
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/arm926ejs/lpc32xx/ |
D | cpu.c | 16 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; variable 28 writel(13000, &wdt->pulse); in reset_cpu() 32 | WDTIM_MCTRL_M_RES2, &wdt->mctrl); in reset_cpu() 35 writel(0x01, &wdt->emr); in reset_cpu() 38 writel(WDTIM_MCTRL_M_RES1, &wdt->mctrl); in reset_cpu()
|
/third_party/uboot/u-boot-2020.01/drivers/reset/ |
D | ast2500-reset.c | 18 struct udevice *wdt; member 28 &priv->wdt); in ast2500_ofdata_to_platdata() 57 ret = wdt_expire_now(priv->wdt, reset_ctl->id); in ast2500_reset_assert() 62 ret = wdt_expire_now(priv->wdt, reset_ctl->id); in ast2500_reset_assert()
|
/third_party/uboot/u-boot-2020.01/drivers/sysreset/ |
D | sysreset_ast.c | 17 struct udevice *wdt; in ast_sysreset_request() local 19 int ret = uclass_first_device(UCLASS_WDT, &wdt); in ast_sysreset_request() 35 ret = wdt_expire_now(wdt, reset_mode); in ast_sysreset_request()
|
D | sysreset_watchdog.c | 13 struct udevice *wdt; member 21 ret = wdt_expire_now(priv->wdt, 0); in wdt_reboot_request() 38 "wdt", &priv->wdt); in wdt_reboot_probe()
|
/third_party/uboot/u-boot-2020.01/board/work-microwave/work_92105/ |
D | work_92105.c | 24 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; variable 29 writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl); in reset_periph() 31 writel(0, &wdt->mctrl); in reset_periph()
|
/third_party/uboot/u-boot-2020.01/arch/mips/dts/ |
D | brcm,bcm3380.dtsi | 101 wdt: watchdog@14e000dc { label 102 compatible = "brcm,bcm6345-wdt"; 108 wdt-reboot { 109 compatible = "wdt-reboot"; 110 wdt = <&wdt>;
|
D | brcm,bcm6338.dtsi | 87 wdt: watchdog@fffe021c { label 88 compatible = "brcm,bcm6345-wdt"; 93 wdt-reboot { 94 compatible = "wdt-reboot"; 95 wdt = <&wdt>;
|
D | brcm,bcm6838.dtsi | 77 compatible = "brcm,bcm6345-wdt"; 83 compatible = "brcm,bcm6345-wdt"; 88 wdt-reboot { 89 compatible = "wdt-reboot"; 90 wdt = <&wdt0>;
|
D | brcm,bcm6348.dtsi | 87 wdt: watchdog@fffe021c { label 88 compatible = "brcm,bcm6345-wdt"; 93 wdt-reboot { 94 compatible = "wdt-reboot"; 95 wdt = <&wdt>;
|
D | brcm,bcm6318.dtsi | 78 wdt: watchdog@10000068 { label 79 compatible = "brcm,bcm6345-wdt"; 84 wdt-reboot { 85 compatible = "wdt-reboot"; 86 wdt = <&wdt>;
|
D | brcm,bcm6368.dtsi | 94 wdt: watchdog@1000005c { label 95 compatible = "brcm,bcm6345-wdt"; 100 wdt-reboot { 101 compatible = "wdt-reboot"; 102 wdt = <&wdt>;
|
D | brcm,bcm6328.dtsi | 91 wdt: watchdog@1000005c { label 92 compatible = "brcm,bcm6345-wdt"; 97 wdt-reboot { 98 compatible = "wdt-reboot"; 99 wdt = <&wdt>;
|
D | brcm,bcm6358.dtsi | 94 wdt: watchdog@fffe005c { label 95 compatible = "brcm,bcm6345-wdt"; 100 wdt-reboot { 101 compatible = "wdt-reboot"; 102 wdt = <&wdt>;
|
D | brcm,bcm63268.dtsi | 98 wdt: watchdog@1000009c { label 99 compatible = "brcm,bcm6345-wdt"; 104 wdt-reboot { 105 compatible = "wdt-reboot"; 106 wdt = <&wdt>;
|
D | brcm,bcm6362.dtsi | 92 wdt: watchdog@1000005c { label 93 compatible = "brcm,bcm6345-wdt"; 98 wdt-reboot { 99 compatible = "wdt-reboot"; 100 wdt = <&wdt>;
|
/third_party/uboot/u-boot-2020.01/arch/arm/dts/ |
D | imx53-m53menlo-u-boot.dtsi | 15 wdt-reboot { 16 compatible = "wdt-reboot"; 17 wdt = <&wdog1>;
|
D | imx6q-kp-u-boot.dtsi | 19 wdt-reboot { 20 compatible = "wdt-reboot"; 21 wdt = <&wdog1>;
|
D | imx6q-display5-u-boot.dtsi | 35 wdt-reboot { 36 compatible = "wdt-reboot"; 37 wdt = <&wdog1>;
|
/third_party/uboot/u-boot-2020.01/board/timll/devkit3250/ |
D | devkit3250.c | 20 static struct wdt_regs *wdt = (struct wdt_regs *)WDT_BASE; variable 26 writel(WDTIM_MCTRL_RESFRC1, &wdt->mctrl); in reset_periph() 29 writel(0, &wdt->mctrl); in reset_periph()
|
/third_party/uboot/u-boot-2020.01/arch/powerpc/cpu/mpc86xx/ |
D | cpu.c | 149 volatile ccsr_wdt_t *wdt = &immap->im_wdt; in watchdog_reset() local 154 wdt->swsrr = 0x556c; in watchdog_reset() 155 wdt->swsrr = 0xaa39; in watchdog_reset()
|