1 /* 2 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __RK_MPI_CMD_H__ 17 #define __RK_MPI_CMD_H__ 18 19 /* 20 * Command id bit usage is defined as follows: 21 * bit 20 - 23 - module id 22 * bit 16 - 19 - contex id 23 * bit 0 - 15 - command id 24 */ 25 #define CMD_MODULE_ID_MASK (0x00F00000) 26 #define CMD_MODULE_OSAL (0x00100000) 27 #define CMD_MODULE_MPP (0x00200000) 28 #define CMD_MODULE_CODEC (0x00300000) 29 #define CMD_MODULE_HAL (0x00400000) 30 31 #define CMD_CTX_ID_MASK (0x000F0000) 32 #define CMD_CTX_ID_DEC (0x00010000) 33 #define CMD_CTX_ID_ENC (0x00020000) 34 #define CMD_CTX_ID_ISP (0x00030000) 35 36 /* separate encoder / decoder control command to different segment */ 37 #define CMD_CFG_ID_MASK (0x0000FF00) 38 39 /* decoder control command */ 40 #define CMD_DEC_CFG_ALL (0x00000000) 41 #define CMD_DEC_QUERY (0x00000100) 42 #define CMD_DEC_CFG (0x00000200) 43 44 /* encoder control command */ 45 #define CMD_ENC_CFG_ALL (0x00000000) 46 #define CMD_ENC_CFG_RC_API (0x00000100) 47 48 #define CMD_ENC_CFG_MISC (0x00008000) 49 #define CMD_ENC_CFG_SPLIT (0x00008100) 50 #define CMD_ENC_CFG_REF (0x00008200) 51 #define CMD_ENC_CFG_ROI (0x00008300) 52 #define CMD_ENC_CFG_OSD (0x00008400) 53 54 typedef enum { 55 MPP_OSAL_CMD_BASE = CMD_MODULE_OSAL, 56 MPP_OSAL_CMD_END, 57 58 MPP_CMD_BASE = CMD_MODULE_MPP, 59 MPP_ENABLE_DEINTERLACE, 60 MPP_SET_INPUT_BLOCK, /* deprecated */ 61 MPP_SET_INTPUT_BLOCK_TIMEOUT, /* deprecated */ 62 MPP_SET_OUTPUT_BLOCK, /* deprecated */ 63 MPP_SET_OUTPUT_BLOCK_TIMEOUT, /* deprecated */ 64 /* 65 * timeout setup, refer to MPP_TIMEOUT_XXX 66 * zero - non block 67 * negative - block with no timeout 68 * positive - timeout in milisecond 69 */ 70 MPP_SET_INPUT_TIMEOUT, /* parameter type RK_S64 */ 71 MPP_SET_OUTPUT_TIMEOUT, /* parameter type RK_S64 */ 72 MPP_CMD_END, 73 74 MPP_CODEC_CMD_BASE = CMD_MODULE_CODEC, 75 MPP_CODEC_GET_FRAME_INFO, 76 MPP_CODEC_CMD_END, 77 78 MPP_DEC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_DEC, 79 MPP_DEC_SET_FRAME_INFO, /* vpu api legacy control for buffer slot dimension init */ 80 MPP_DEC_SET_EXT_BUF_GROUP, /* IMPORTANT: set external buffer group to mpp decoder */ 81 MPP_DEC_SET_INFO_CHANGE_READY, 82 MPP_DEC_SET_PRESENT_TIME_ORDER, /* use input time order for output */ 83 MPP_DEC_SET_PARSER_SPLIT_MODE, /* Need to setup before init */ 84 MPP_DEC_SET_PARSER_FAST_MODE, /* Need to setup before init */ 85 MPP_DEC_GET_STREAM_COUNT, 86 MPP_DEC_GET_VPUMEM_USED_COUNT, 87 MPP_DEC_SET_VC1_EXTRA_DATA, 88 MPP_DEC_SET_OUTPUT_FORMAT, 89 MPP_DEC_SET_DISABLE_ERROR, /* When set it will disable sw/hw error (H.264 / H.265) */ 90 MPP_DEC_SET_IMMEDIATE_OUT, 91 MPP_DEC_SET_ENABLE_DEINTERLACE, /* MPP enable deinterlace by default. Vpuapi can disable it */ 92 93 MPP_DEC_CMD_QUERY = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_QUERY, 94 /* query decoder runtime information for decode stage */ 95 MPP_DEC_QUERY, /* set and get MppDecQueryCfg structure */ 96 97 CMD_DEC_CMD_CFG = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_CFG, 98 MPP_DEC_SET_CFG, /* set MppDecCfg structure */ 99 MPP_DEC_GET_CFG, /* get MppDecCfg structure */ 100 101 MPP_DEC_CMD_END, 102 103 MPP_ENC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ENC, 104 /* basic encoder setup control */ 105 MPP_ENC_SET_CFG, /* set MppEncCfg structure */ 106 MPP_ENC_GET_CFG, /* get MppEncCfg structure */ 107 MPP_ENC_SET_PREP_CFG, /* deprecated set MppEncPrepCfg structure, use MPP_ENC_SET_CFG instead */ 108 MPP_ENC_GET_PREP_CFG, /* deprecated get MppEncPrepCfg structure, use MPP_ENC_GET_CFG instead */ 109 MPP_ENC_SET_RC_CFG, /* deprecated set MppEncRcCfg structure, use MPP_ENC_SET_CFG instead */ 110 MPP_ENC_GET_RC_CFG, /* deprecated get MppEncRcCfg structure, use MPP_ENC_GET_CFG instead */ 111 MPP_ENC_SET_CODEC_CFG, /* deprecated set MppEncCodecCfg structure, use MPP_ENC_SET_CFG instead */ 112 MPP_ENC_GET_CODEC_CFG, /* deprecated get MppEncCodecCfg structure, use MPP_ENC_GET_CFG instead */ 113 /* runtime encoder setup control */ 114 MPP_ENC_SET_IDR_FRAME, /* next frame will be encoded as intra frame */ 115 MPP_ENC_SET_OSD_LEGACY_0, /* deprecated */ 116 MPP_ENC_SET_OSD_LEGACY_1, /* deprecated */ 117 MPP_ENC_SET_OSD_LEGACY_2, /* deprecated */ 118 MPP_ENC_GET_HDR_SYNC, /* get vps / sps / pps which has better sync behavior parameter is MppPacket */ 119 MPP_ENC_GET_EXTRA_INFO, /* deprecated */ 120 MPP_ENC_SET_SEI_CFG, /* SEI: Supplement Enhancemant Information, parameter is MppSeiMode */ 121 MPP_ENC_GET_SEI_DATA, /* SEI: Supplement Enhancemant Information, parameter is MppPacket */ 122 MPP_ENC_PRE_ALLOC_BUFF, /* deprecated */ 123 MPP_ENC_SET_QP_RANGE, /* used for adjusting qp range, the parameter can be 1 or 2 */ 124 MPP_ENC_SET_ROI_CFG, /* set MppEncROICfg structure */ 125 MPP_ENC_SET_CTU_QP, /* for H265 Encoder,set CTU's size and QP */ 126 127 /* User define rate control stategy API control */ 128 MPP_ENC_CFG_RC_API = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_RC_API, 129 /* 130 * Get RcApiQueryAll structure 131 * Get all available rate control stategy string and count 132 */ 133 MPP_ENC_GET_RC_API_ALL = MPP_ENC_CFG_RC_API + 1, 134 /* 135 * Get RcApiQueryType structure 136 * Get available rate control stategy string with certain type 137 */ 138 MPP_ENC_GET_RC_API_BY_TYPE = MPP_ENC_CFG_RC_API + 2, 139 /* 140 * Set RcImplApi structure 141 * Add new or update rate control stategy function pointers 142 */ 143 MPP_ENC_SET_RC_API_CFG = MPP_ENC_CFG_RC_API + 3, 144 /* 145 * Get RcApiBrief structure 146 * Get current used rate control stategy brief information (type and name) 147 */ 148 MPP_ENC_GET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 4, 149 /* 150 * Set RcApiBrief structure 151 * Set current used rate control stategy brief information (type and name) 152 */ 153 MPP_ENC_SET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 5, 154 155 MPP_ENC_CFG_MISC = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_MISC, 156 /* set MppEncHeaderMode */ 157 MPP_ENC_SET_HEADER_MODE, 158 /* get MppEncHeaderMode */ 159 MPP_ENC_GET_HEADER_MODE, 160 161 MPP_ENC_CFG_SPLIT = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_SPLIT, 162 /* set MppEncSliceSplit structure */ 163 MPP_ENC_SET_SPLIT, 164 /* get MppEncSliceSplit structure */ 165 MPP_ENC_GET_SPLIT, 166 167 MPP_ENC_CFG_REF = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_REF, 168 /* set MppEncRefCfg structure */ 169 MPP_ENC_SET_REF_CFG, 170 171 MPP_ENC_CFG_OSD = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_OSD, 172 /* set OSD palette, parameter should be pointer to MppEncOSDPltCfg */ 173 MPP_ENC_SET_OSD_PLT_CFG, 174 /* get OSD palette, parameter should be pointer to MppEncOSDPltCfg */ 175 MPP_ENC_GET_OSD_PLT_CFG, 176 /* set OSD data with at most 8 regions, parameter should be pointer to MppEncOSDData */ 177 MPP_ENC_SET_OSD_DATA_CFG, 178 179 MPP_ENC_CMD_END, 180 181 MPP_ISP_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ISP, 182 MPP_ISP_CMD_END, 183 184 MPP_HAL_CMD_BASE = CMD_MODULE_HAL, 185 MPP_HAL_CMD_END, 186 187 MPI_CMD_BUTT, 188 } MpiCmd; 189 190 #include "rk_vdec_cmd.h" 191 #include "rk_vdec_cfg.h" 192 #include "rk_venc_cmd.h" 193 #include "rk_venc_cfg.h" 194 #include "rk_venc_ref.h" 195 196 #endif /* __RK_MPI_CMD_H__ */