• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Copyright (c) 2020-2021 Huawei Device Co., Ltd.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at
6  *
7  *     http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #include "uart.h"
17 
18 #include "los_arch_interrupt.h"
19 #include "los_interrupt.h"
20 
21 #ifdef __cplusplus
22 #if __cplusplus
23 extern "C" {
24 #endif
25 #endif
26 
UartPutc(INT32 c,VOID * file)27 INT32 UartPutc(INT32 c, VOID *file)
28 {
29     (VOID) file;
30     /* wait for Transmit Holding Empty to be set in LSR */
31     while ((ReadUartReg(UART_LSR_OFFSET) & UART_LSR_THRE) == 0) {
32         ;
33     }
34     WriteUartReg(UART_THR_OFFSET, (UINT8)c);
35     return c;
36 }
37 
UartGetc(VOID)38 INT32 UartGetc(VOID)
39 {
40     if (ReadUartReg(UART_LSR_OFFSET) & UART_LSR_DR) {
41         return ReadUartReg(UART_RHR_OFFSET);
42     } else {
43         return 0;
44     }
45 }
46 
UartOut(INT32 c,VOID * file)47 INT32 UartOut(INT32 c, VOID *file)
48 {
49     (VOID) file;
50     return UartGetc();
51 }
52 
UartInit(VOID)53 INT32 UartInit(VOID)
54 {
55     /* Disable all interrupts */
56     WriteUartReg(UART_IER_OFFSET, 0x00);
57 
58     /* special mode to set baud rate */
59     WriteUartReg(UART_LCR_OFFSET, UART_LCR_DLAB);
60 
61     /* Set divisor low byte, LSB for baud rate of 38.4K */
62     WriteUartReg(UART_DLL_OFFSET, 0x03);
63 
64     /* Set divisor high byte, LSB for baud rate of 38.4K */
65     WriteUartReg(UART_DLM_OFFSET, 0x00);
66 
67     /* leave set-baud mode, and set word length to 8 bits, no parity */
68     WriteUartReg(UART_LCR_OFFSET, UART_LCR_8N1);
69 
70     /* reset and enable FIFOs */
71     WriteUartReg(UART_FCR_OFFSET, UART_FCR_FIFO_EN | UART_FCR_RXSR | UART_FCR_TXSR);
72 }
73 
UartReciveHandler(VOID)74 VOID UartReciveHandler(VOID)
75 {
76     if (ReadUartReg(UART_LSR_OFFSET) & UART_LSR_DR) {
77         (void)LOS_EventWrite(&g_shellInputEvent, 0x1);
78     }
79     return;
80 }
81 
Uart0RxIrqRegister(VOID)82 VOID Uart0RxIrqRegister(VOID)
83 {
84     WriteUartReg(UART_IER_OFFSET, ReadUartReg(UART_IER_OFFSET) | UART_IER_RDI);
85     uint32_t ret = LOS_HwiCreate(RISCV_UART0_Rx_IRQn, OS_HWI_PRIO_HIGHEST, 0, (HWI_PROC_FUNC)UartReciveHandler, 0);
86     if (ret != LOS_OK) {
87         return;
88     }
89     HalIrqEnable(RISCV_UART0_Rx_IRQn);
90 }
91 
92 #ifdef __cplusplus
93 #if __cplusplus
94 }
95 #endif /* __cplusplus */
96 #endif /* __cplusplus */
97