• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1 /*
2  * Copyright (c) 2021 Huawei Device Co., Ltd.
3  *
4  * HDF is dual licensed: you can use it either under the terms of
5  * the GPL, or the BSD license, at your option.
6  * See the LICENSE file in the root of this repository for complete details.
7  */
8 
9 #ifndef HI3516_AIAO_IMPL_H
10 #define HI3516_AIAO_IMPL_H
11 
12 #include <linux/types.h>
13 #include "audio_platform_base.h"
14 
15 /* AIO  base addres */
16 #define AIAO_REG_BASE            0x113b0000
17 #define AIAO_MAX_REG_SIZE        0x10000
18 
19 #define AOP_BUFF_WPTR_REG        0x2088
20 #define AOP_BUFF_RPTR_REG        0x208C
21 #define AIP_BUFF_WPTR_REG        0x1088
22 #define OFFSET_MULTL  8
23 
24 typedef enum {
25     HI_FALSE = 0,
26     HI_TRUE  = 1,
27 } HiBool;
28 
29 typedef enum {
30     AUDIO_BIT_WIDTH_8   = 0,   /* 8bit width */
31     AUDIO_BIT_WIDTH_16  = 1,   /* 16bit width */
32     AUDIO_BIT_WIDTH_24  = 2,   /* 24bit width */
33     AUDIO_BIT_WIDTH_BUTT,
34 } AudioBitWidth;
35 
36 typedef struct {
37     bool clkSelect;
38     /* 256fs */
39     unsigned int mclkDiv48k256fs;
40     unsigned int mclkDiv441k256fs;
41     unsigned int mclkDiv32k256fs;
42     /* 320fs */
43     unsigned int mclkDiv48k320fs;
44     unsigned int mclkDiv441k320fs;
45     unsigned int mclkDiv32k320fs;
46 } AiaoClkInfo;
47 
48 // define the union u_rx_dsp_ctrl
49 typedef union {
50     struct {
51         unsigned int reserved0  : 28;      // [27..0]
52         unsigned int rxEnable   : 1;       // [28]
53         unsigned int rxDisableDone : 1;    // [29]
54         unsigned int reserved1  : 2;       // [31..30]
55     } Bits;
56     unsigned int u32;
57 } URxDspCtrl;
58 
59 typedef union {
60     struct {
61         unsigned int reserved0  : 8;       // [7..0]
62         unsigned int volume     : 7;       // [14..8]
63         unsigned int reserved1  : 13;      // [27..15]
64         unsigned int txEnable   : 1;       // [28]
65         unsigned int reserved2  : 3;       // [31..29]
66     } Bits;
67     unsigned int u32;
68 } UTxDspCtrl;
69 
70 // define the union u_tx_buff_rptr
71 typedef union {
72     struct {
73         unsigned int txBuffRptr : 24;  // [23..0]
74         unsigned int reserved0 : 8;     // [31..24]
75     } Bits;
76     unsigned int u32;
77 } UTxBuffRptr;
78 
79 typedef union {
80     struct {
81         unsigned int txBuffWptr : 24;  // [23..0]
82         unsigned int reserved0 : 8;     // [31..24]
83     } Bits;
84     unsigned int u32;
85 } UTxBuffWptr;
86 
87 typedef union {
88     struct {
89         unsigned int txBuffSize : 24;  // [23..0]
90         unsigned int reserved0 : 8;     // [31..24]
91     } Bits;
92     unsigned int u32;
93 } UTxBuffSize;
94 
95 typedef union {
96     struct {
97         unsigned int txTransSize : 24;  // [23..0]
98         unsigned int reserved0 : 8;      // [31..24]
99     } Bits;
100     unsigned int u32;
101 } UTxTransSize;
102 
103 uint32_t AiopRegCfg(const int reg, const int offset, uint32_t n);
104 int32_t AiaoHalSysInit(void);
105 int32_t AiaoClockReset(void);
106 uint32_t AiaoHalReadReg(unsigned int offset);
107 int32_t AopHalSetBuffRptr(unsigned int chnId, unsigned int value);
108 int32_t AopHalSetBuffWptr(unsigned int chnId, unsigned int value);
109 int32_t AipHalSetBuffWptr(unsigned int chnId, unsigned int value);
110 int32_t AipHalSetBuffRptr(unsigned int chnId, unsigned int value);
111 int32_t AopHalSetTxStart(unsigned int chnId, bool en);
112 int32_t AipHalSetRxStart(unsigned int chnId, bool en);
113 int32_t AopHalDevEnable(unsigned int chnId);
114 int32_t AiaoDeviceInit(unsigned int chnId);
115 int32_t AudioAoInit(const struct PlatformData *platformData);
116 int32_t AudioAiInit(const struct PlatformData *platformData);
117 int32_t AiaoSysPinMux(void);
118 int32_t AiaoRxIntClr(unsigned int chnId);
119 int32_t AiaoGetMclk(unsigned int rate, uint32_t *mclkSel);
120 int32_t AiaoSetSysCtlRegValue(uint32_t mclkSel, uint32_t bitWidth,
121     uint32_t rate, uint32_t *clkRegVal);
122 #endif // __HI3516_ACODEC_H__
123