1QCOM Secure Channel Manager (SCM) 2 3Qualcomm processors include an interface to communicate to the secure firmware. 4This interface allows for clients to request different types of actions. These 5can include CPU power up/down, HDCP requests, loading of firmware, and other 6assorted actions. 7 8Required properties: 9- compatible: must contain one of the following: 10 * "qcom,scm-apq8064" for APQ8064 platforms 11 * "qcom,scm-msm8660" for MSM8660 platforms 12 * "qcom,scm-msm8690" for MSM8690 platforms 13 * "qcom,scm-msm8996" for MSM8996 platforms 14 * "qcom,scm-ipq4019" for IPQ4019 platforms 15 * "qcom,scm" for later processors (MSM8916, APQ8084, MSM8974, etc) 16- clocks: One to three clocks may be required based on compatible. 17 * No clock required for "qcom,scm-msm8996", "qcom,scm-ipq4019" 18 * Only core clock required for "qcom,scm-apq8064", "qcom,scm-msm8660", and "qcom,scm-msm8960" 19 * Core, iface, and bus clocks required for "qcom,scm" 20- clock-names: Must contain "core" for the core clock, "iface" for the interface 21 clock and "bus" for the bus clock per the requirements of the compatible. 22- qcom,dload-mode: phandle to the TCSR hardware block and offset of the 23 download mode control register (optional) 24 25Example for MSM8916: 26 27 firmware { 28 scm { 29 compatible = "qcom,scm"; 30 clocks = <&gcc GCC_CRYPTO_CLK> , <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>; 31 clock-names = "core", "bus", "iface"; 32 }; 33 }; 34