1* Freescale VF610 PORT/GPIO module 2 3The Freescale PORT/GPIO modules are two adjacent modules providing GPIO 4functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of 5each, and each PORT module has its own interrupt. 6 7Required properties for GPIO node: 8- compatible : Should be "fsl,<soc>-gpio", below is supported list: 9 "fsl,vf610-gpio" 10 "fsl,imx7ulp-gpio" 11- reg : The first reg tuple represents the PORT module, the second tuple 12 the GPIO module. 13- interrupts : Should be the port interrupt shared by all 32 pins. 14- gpio-controller : Marks the device node as a gpio controller. 15- #gpio-cells : Should be two. The first cell is the pin number and 16 the second cell is used to specify the gpio polarity: 17 0 = active high 18 1 = active low 19- interrupt-controller: Marks the device node as an interrupt controller. 20- #interrupt-cells : Should be 2. The first cell is the GPIO number. 21 The second cell bits[3:0] is used to specify trigger type and level flags: 22 1 = low-to-high edge triggered. 23 2 = high-to-low edge triggered. 24 4 = active high level-sensitive. 25 8 = active low level-sensitive. 26 27Note: Each GPIO port should have an alias correctly numbered in "aliases" 28node. 29 30Examples: 31 32aliases { 33 gpio0 = &gpio1; 34 gpio1 = &gpio2; 35}; 36 37gpio1: gpio@40049000 { 38 compatible = "fsl,vf610-gpio"; 39 reg = <0x40049000 0x1000 0x400ff000 0x40>; 40 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; 41 gpio-controller; 42 #gpio-cells = <2>; 43 interrupt-controller; 44 #interrupt-cells = <2>; 45 gpio-ranges = <&iomuxc 0 0 32>; 46}; 47 48gpio2: gpio@4004a000 { 49 compatible = "fsl,vf610-gpio"; 50 reg = <0x4004a000 0x1000 0x400ff040 0x40>; 51 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; 52 gpio-controller; 53 #gpio-cells = <2>; 54 interrupt-controller; 55 #interrupt-cells = <2>; 56 gpio-ranges = <&iomuxc 0 32 32>; 57}; 58