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1Samsung Exynos Analog to Digital Converter bindings
2
3The devicetree bindings are for the new ADC driver written for
4Exynos4 and upward SoCs from Samsung.
5
6New driver handles the following
71. Supports ADC IF found on EXYNOS4412/EXYNOS5250
8   and future SoCs from Samsung
92. Add ADC driver under iio/adc framework
103. Also adds the Documentation for device tree bindings
11
12Required properties:
13- compatible:		Must be "samsung,exynos-adc-v1"
14				for Exynos5250 controllers.
15			Must be "samsung,exynos-adc-v2" for
16				future controllers.
17			Must be "samsung,exynos3250-adc" for
18				controllers compatible with ADC of Exynos3250.
19			Must be "samsung,exynos4212-adc" for
20				controllers compatible with ADC of Exynos4212 and Exynos4412.
21			Must be "samsung,exynos7-adc" for
22				the ADC in Exynos7 and compatibles
23			Must be "samsung,s3c2410-adc" for
24				the ADC in s3c2410 and compatibles
25			Must be "samsung,s3c2416-adc" for
26				the ADC in s3c2416 and compatibles
27			Must be "samsung,s3c2440-adc" for
28				the ADC in s3c2440 and compatibles
29			Must be "samsung,s3c2443-adc" for
30				the ADC in s3c2443 and compatibles
31			Must be "samsung,s3c6410-adc" for
32				the ADC in s3c6410 and compatibles
33			Must be "samsung,s5pv210-adc" for
34				the ADC in s5pv210 and compatibles
35- reg:			List of ADC register address range
36			- The base address and range of ADC register
37			- The base address and range of ADC_PHY register (every
38			  SoC except for s3c24xx/s3c64xx ADC)
39- interrupts: 		Contains the interrupt information for the timer. The
40			format is being dependent on which interrupt controller
41			the Samsung device uses.
42- #io-channel-cells = <1>; As ADC has multiple outputs
43- clocks		From common clock bindings: handles to clocks specified
44			in "clock-names" property, in the same order.
45- clock-names		From common clock bindings: list of clock input names
46			used by ADC block:
47			- "adc" : ADC bus clock
48			- "sclk" : ADC special clock (only for Exynos3250 and
49				   compatible ADC block)
50- vdd-supply		VDD input supply.
51
52- samsung,syscon-phandle Contains the PMU system controller node
53			(To access the ADC_PHY register on Exynos5250/5420/5800/3250)
54Optional properties:
55- has-touchscreen:	If present, indicates that a touchscreen is
56			connected an usable.
57
58Note: child nodes can be added for auto probing from device tree.
59
60Example: adding device info in dtsi file
61
62adc: adc@12d10000 {
63	compatible = "samsung,exynos-adc-v1";
64	reg = <0x12D10000 0x100>;
65	interrupts = <0 106 0>;
66	#io-channel-cells = <1>;
67	io-channel-ranges;
68
69	clocks = <&clock 303>;
70	clock-names = "adc";
71
72	vdd-supply = <&buck5_reg>;
73	samsung,syscon-phandle = <&pmu_system_controller>;
74};
75
76Example: adding device info in dtsi file for Exynos3250 with additional sclk
77
78adc: adc@126c0000 {
79	compatible = "samsung,exynos3250-adc", "samsung,exynos-adc-v2;
80	reg = <0x126C0000 0x100>;
81	interrupts = <0 137 0>;
82	#io-channel-cells = <1>;
83	io-channel-ranges;
84
85	clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
86	clock-names = "adc", "sclk";
87
88	vdd-supply = <&buck5_reg>;
89	samsung,syscon-phandle = <&pmu_system_controller>;
90};
91
92Example: Adding child nodes in dts file
93
94adc@12d10000 {
95
96	/* NTC thermistor is a hwmon device */
97	ncp15wb473@0 {
98		compatible = "murata,ncp15wb473";
99		pullup-uv = <1800000>;
100		pullup-ohm = <47000>;
101		pulldown-ohm = <0>;
102		io-channels = <&adc 4>;
103	};
104};
105
106Note: Does not apply to ADC driver under arch/arm/plat-samsung/
107Note: The child node can be added under the adc node or separately.
108