1== Amlogic Meson pinmux controller == 2 3Required properties for the root node: 4 - compatible: one of "amlogic,meson8-cbus-pinctrl" 5 "amlogic,meson8b-cbus-pinctrl" 6 "amlogic,meson8m2-cbus-pinctrl" 7 "amlogic,meson8-aobus-pinctrl" 8 "amlogic,meson8b-aobus-pinctrl" 9 "amlogic,meson8m2-aobus-pinctrl" 10 "amlogic,meson-gxbb-periphs-pinctrl" 11 "amlogic,meson-gxbb-aobus-pinctrl" 12 "amlogic,meson-gxl-periphs-pinctrl" 13 "amlogic,meson-gxl-aobus-pinctrl" 14 "amlogic,meson-axg-periphs-pinctrl" 15 "amlogic,meson-axg-aobus-pinctrl" 16 - reg: address and size of registers controlling irq functionality 17 18=== GPIO sub-nodes === 19 20The GPIO bank for the controller is represented as a sub-node and it acts as a 21GPIO controller. 22 23Required properties for sub-nodes are: 24 - reg: should contain address and size for mux, pull-enable, pull and 25 gpio register sets 26 - reg-names: an array of strings describing the "reg" entries. Must 27 contain "mux", "pull" and "gpio". "pull-enable" is optional and 28 when it is missing the "pull" registers are used instead 29 - gpio-controller: identifies the node as a gpio controller 30 - #gpio-cells: must be 2 31 32=== Other sub-nodes === 33 34Child nodes without the "gpio-controller" represent some desired 35configuration for a pin or a group. Those nodes can be pinmux nodes or 36configuration nodes. 37 38Required properties for pinmux nodes are: 39 - groups: a list of pinmux groups. The list of all available groups 40 depends on the SoC and can be found in driver sources. 41 - function: the name of a function to activate for the specified set 42 of groups. The list of all available functions depends on the SoC 43 and can be found in driver sources. 44 45Required properties for configuration nodes: 46 - pins: a list of pin names 47 48Configuration nodes support the generic properties "bias-disable", 49"bias-pull-up" and "bias-pull-down", described in file 50pinctrl-bindings.txt 51 52=== Example === 53 54 pinctrl: pinctrl@c1109880 { 55 compatible = "amlogic,meson8-cbus-pinctrl"; 56 reg = <0xc1109880 0x10>; 57 #address-cells = <1>; 58 #size-cells = <1>; 59 ranges; 60 61 gpio: banks@c11080b0 { 62 reg = <0xc11080b0 0x28>, 63 <0xc11080e8 0x18>, 64 <0xc1108120 0x18>, 65 <0xc1108030 0x30>; 66 reg-names = "mux", "pull", "pull-enable", "gpio"; 67 gpio-controller; 68 #gpio-cells = <2>; 69 }; 70 71 nand { 72 mux { 73 groups = "nand_io", "nand_io_ce0", "nand_io_ce1", 74 "nand_io_rb0", "nand_ale", "nand_cle", 75 "nand_wen_clk", "nand_ren_clk", "nand_dqs", 76 "nand_ce2", "nand_ce3"; 77 function = "nand"; 78 }; 79 }; 80 }; 81