1* Amlogic Audio FIFO controllers 2 3Required properties: 4- compatible: 'amlogic,axg-toddr' or 5 'amlogic,axg-frddr' 6- reg: physical base address of the controller and length of memory 7 mapped region. 8- interrupts: interrupt specifier for the fifo. 9- clocks: phandle to the fifo peripheral clock provided by the audio 10 clock controller. 11- resets: phandle to memory ARB line provided by the arb reset controller. 12- #sound-dai-cells: must be 0. 13 14Example of FRDDR A on the A113 SoC: 15 16frddr_a: audio-controller@1c0 { 17 compatible = "amlogic,axg-frddr"; 18 reg = <0x0 0x1c0 0x0 0x1c>; 19 #sound-dai-cells = <0>; 20 interrupts = <GIC_SPI 88 IRQ_TYPE_EDGE_RISING>; 21 clocks = <&clkc_audio AUD_CLKID_FRDDR_A>; 22 resets = <&arb AXG_ARB_FRDDR_A>; 23}; 24