1/* 2 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC 3 * 4 * Copyright (C) 2014 Microchip 5 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 6 * 7 * Licensed under GPLv2 or later. 8 */ 9 10#include "skeleton.dtsi" 11#include <dt-bindings/pinctrl/at91.h> 12#include <dt-bindings/clock/at91.h> 13#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/gpio/gpio.h> 15#include <dt-bindings/pwm/pwm.h> 16 17/ { 18 model = "Atmel AT91SAM9RL family SoC"; 19 compatible = "atmel,at91sam9rl", "atmel,at91sam9"; 20 interrupt-parent = <&aic>; 21 22 aliases { 23 serial0 = &dbgu; 24 serial1 = &usart0; 25 serial2 = &usart1; 26 serial3 = &usart2; 27 serial4 = &usart3; 28 gpio0 = &pioA; 29 gpio1 = &pioB; 30 gpio2 = &pioC; 31 gpio3 = &pioD; 32 tcb0 = &tcb0; 33 i2c0 = &i2c0; 34 i2c1 = &i2c1; 35 ssc0 = &ssc0; 36 ssc1 = &ssc1; 37 pwm0 = &pwm0; 38 }; 39 40 cpus { 41 #address-cells = <0>; 42 #size-cells = <0>; 43 44 cpu { 45 compatible = "arm,arm926ej-s"; 46 device_type = "cpu"; 47 }; 48 }; 49 50 memory { 51 reg = <0x20000000 0x04000000>; 52 }; 53 54 clocks { 55 slow_xtal: slow_xtal { 56 compatible = "fixed-clock"; 57 #clock-cells = <0>; 58 clock-frequency = <0>; 59 }; 60 61 main_xtal: main_xtal { 62 compatible = "fixed-clock"; 63 #clock-cells = <0>; 64 clock-frequency = <0>; 65 }; 66 67 adc_op_clk: adc_op_clk{ 68 compatible = "fixed-clock"; 69 #clock-cells = <0>; 70 clock-frequency = <1000000>; 71 }; 72 }; 73 74 sram: sram@300000 { 75 compatible = "mmio-sram"; 76 reg = <0x00300000 0x10000>; 77 }; 78 79 ahb { 80 compatible = "simple-bus"; 81 #address-cells = <1>; 82 #size-cells = <1>; 83 ranges; 84 85 fb0: fb@500000 { 86 compatible = "atmel,at91sam9rl-lcdc"; 87 reg = <0x00500000 0x1000>; 88 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>; 89 pinctrl-names = "default"; 90 pinctrl-0 = <&pinctrl_fb>; 91 clocks = <&lcd_clk>, <&lcd_clk>; 92 clock-names = "hclk", "lcdc_clk"; 93 status = "disabled"; 94 }; 95 96 ebi: ebi@10000000 { 97 compatible = "atmel,at91sam9rl-ebi"; 98 #address-cells = <2>; 99 #size-cells = <1>; 100 atmel,smc = <&smc>; 101 atmel,matrix = <&matrix>; 102 reg = <0x10000000 0x80000000>; 103 ranges = <0x0 0x0 0x10000000 0x10000000 104 0x1 0x0 0x20000000 0x10000000 105 0x2 0x0 0x30000000 0x10000000 106 0x3 0x0 0x40000000 0x10000000 107 0x4 0x0 0x50000000 0x10000000 108 0x5 0x0 0x60000000 0x10000000>; 109 clocks = <&mck>; 110 status = "disabled"; 111 112 nand_controller: nand-controller { 113 compatible = "atmel,at91sam9g45-nand-controller"; 114 #address-cells = <2>; 115 #size-cells = <1>; 116 ranges; 117 status = "disabled"; 118 }; 119 }; 120 121 apb { 122 compatible = "simple-bus"; 123 #address-cells = <1>; 124 #size-cells = <1>; 125 ranges; 126 127 tcb0: timer@fffa0000 { 128 compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon"; 129 #address-cells = <1>; 130 #size-cells = <0>; 131 reg = <0xfffa0000 0x100>; 132 interrupts = <16 IRQ_TYPE_LEVEL_HIGH 0>, 133 <17 IRQ_TYPE_LEVEL_HIGH 0>, 134 <18 IRQ_TYPE_LEVEL_HIGH 0>; 135 clocks = <&tc0_clk>, <&tc1_clk>, <&tc2_clk>, <&clk32k>; 136 clock-names = "t0_clk", "t1_clk", "t2_clk", "slow_clk"; 137 }; 138 139 mmc0: mmc@fffa4000 { 140 compatible = "atmel,hsmci"; 141 reg = <0xfffa4000 0x600>; 142 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>; 143 #address-cells = <1>; 144 #size-cells = <0>; 145 pinctrl-names = "default"; 146 clocks = <&mci0_clk>; 147 clock-names = "mci_clk"; 148 status = "disabled"; 149 }; 150 151 i2c0: i2c@fffa8000 { 152 compatible = "atmel,at91sam9260-i2c"; 153 reg = <0xfffa8000 0x100>; 154 interrupts = <11 IRQ_TYPE_LEVEL_HIGH 6>; 155 #address-cells = <1>; 156 #size-cells = <0>; 157 clocks = <&twi0_clk>; 158 status = "disabled"; 159 }; 160 161 i2c1: i2c@fffac000 { 162 compatible = "atmel,at91sam9260-i2c"; 163 reg = <0xfffac000 0x100>; 164 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 6>; 165 #address-cells = <1>; 166 #size-cells = <0>; 167 status = "disabled"; 168 }; 169 170 usart0: serial@fffb0000 { 171 compatible = "atmel,at91sam9260-usart"; 172 reg = <0xfffb0000 0x200>; 173 interrupts = <6 IRQ_TYPE_LEVEL_HIGH 5>; 174 atmel,use-dma-rx; 175 atmel,use-dma-tx; 176 pinctrl-names = "default"; 177 pinctrl-0 = <&pinctrl_usart0>; 178 clocks = <&usart0_clk>; 179 clock-names = "usart"; 180 status = "disabled"; 181 }; 182 183 usart1: serial@fffb4000 { 184 compatible = "atmel,at91sam9260-usart"; 185 reg = <0xfffb4000 0x200>; 186 interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>; 187 atmel,use-dma-rx; 188 atmel,use-dma-tx; 189 pinctrl-names = "default"; 190 pinctrl-0 = <&pinctrl_usart1>; 191 clocks = <&usart1_clk>; 192 clock-names = "usart"; 193 status = "disabled"; 194 }; 195 196 usart2: serial@fffb8000 { 197 compatible = "atmel,at91sam9260-usart"; 198 reg = <0xfffb8000 0x200>; 199 interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>; 200 atmel,use-dma-rx; 201 atmel,use-dma-tx; 202 pinctrl-names = "default"; 203 pinctrl-0 = <&pinctrl_usart2>; 204 clocks = <&usart2_clk>; 205 clock-names = "usart"; 206 status = "disabled"; 207 }; 208 209 usart3: serial@fffbc000 { 210 compatible = "atmel,at91sam9260-usart"; 211 reg = <0xfffbc000 0x200>; 212 interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>; 213 atmel,use-dma-rx; 214 atmel,use-dma-tx; 215 pinctrl-names = "default"; 216 pinctrl-0 = <&pinctrl_usart3>; 217 clocks = <&usart3_clk>; 218 clock-names = "usart"; 219 status = "disabled"; 220 }; 221 222 ssc0: ssc@fffc0000 { 223 compatible = "atmel,at91sam9rl-ssc"; 224 reg = <0xfffc0000 0x4000>; 225 interrupts = <14 IRQ_TYPE_LEVEL_HIGH 5>; 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>; 228 status = "disabled"; 229 }; 230 231 ssc1: ssc@fffc4000 { 232 compatible = "atmel,at91sam9rl-ssc"; 233 reg = <0xfffc4000 0x4000>; 234 interrupts = <15 IRQ_TYPE_LEVEL_HIGH 5>; 235 pinctrl-names = "default"; 236 pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>; 237 status = "disabled"; 238 }; 239 240 pwm0: pwm@fffc8000 { 241 compatible = "atmel,at91sam9rl-pwm"; 242 reg = <0xfffc8000 0x300>; 243 interrupts = <19 IRQ_TYPE_LEVEL_HIGH 4>; 244 #pwm-cells = <3>; 245 clocks = <&pwm_clk>; 246 clock-names = "pwm_clk"; 247 status = "disabled"; 248 }; 249 250 spi0: spi@fffcc000 { 251 #address-cells = <1>; 252 #size-cells = <0>; 253 compatible = "atmel,at91rm9200-spi"; 254 reg = <0xfffcc000 0x200>; 255 interrupts = <13 IRQ_TYPE_LEVEL_HIGH 3>; 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_spi0>; 258 clocks = <&spi0_clk>; 259 clock-names = "spi_clk"; 260 status = "disabled"; 261 }; 262 263 adc0: adc@fffd0000 { 264 #address-cells = <1>; 265 #size-cells = <0>; 266 compatible = "atmel,at91sam9rl-adc"; 267 reg = <0xfffd0000 0x100>; 268 interrupts = <20 IRQ_TYPE_LEVEL_HIGH 0>; 269 clocks = <&adc_clk>, <&adc_op_clk>; 270 clock-names = "adc_clk", "adc_op_clk"; 271 atmel,adc-use-external-triggers; 272 atmel,adc-channels-used = <0x3f>; 273 atmel,adc-vref = <3300>; 274 atmel,adc-startup-time = <40>; 275 atmel,adc-res = <8 10>; 276 atmel,adc-res-names = "lowres", "highres"; 277 atmel,adc-use-res = "highres"; 278 279 trigger0 { 280 trigger-name = "timer-counter-0"; 281 trigger-value = <0x1>; 282 }; 283 trigger1 { 284 trigger-name = "timer-counter-1"; 285 trigger-value = <0x3>; 286 }; 287 288 trigger2 { 289 trigger-name = "timer-counter-2"; 290 trigger-value = <0x5>; 291 }; 292 293 trigger3 { 294 trigger-name = "external"; 295 trigger-value = <0x13>; 296 trigger-external; 297 }; 298 }; 299 300 usb0: gadget@fffd4000 { 301 #address-cells = <1>; 302 #size-cells = <0>; 303 compatible = "atmel,at91sam9rl-udc"; 304 reg = <0x00600000 0x100000>, 305 <0xfffd4000 0x4000>; 306 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 307 clocks = <&udphs_clk>, <&utmi>; 308 clock-names = "pclk", "hclk"; 309 status = "disabled"; 310 311 ep@0 { 312 reg = <0>; 313 atmel,fifo-size = <64>; 314 atmel,nb-banks = <1>; 315 }; 316 317 ep@1 { 318 reg = <1>; 319 atmel,fifo-size = <1024>; 320 atmel,nb-banks = <2>; 321 atmel,can-dma; 322 atmel,can-isoc; 323 }; 324 325 ep@2 { 326 reg = <2>; 327 atmel,fifo-size = <1024>; 328 atmel,nb-banks = <2>; 329 atmel,can-dma; 330 atmel,can-isoc; 331 }; 332 333 ep@3 { 334 reg = <3>; 335 atmel,fifo-size = <1024>; 336 atmel,nb-banks = <3>; 337 atmel,can-dma; 338 }; 339 340 ep@4 { 341 reg = <4>; 342 atmel,fifo-size = <1024>; 343 atmel,nb-banks = <3>; 344 atmel,can-dma; 345 }; 346 347 ep@5 { 348 reg = <5>; 349 atmel,fifo-size = <1024>; 350 atmel,nb-banks = <3>; 351 atmel,can-dma; 352 atmel,can-isoc; 353 }; 354 355 ep@6 { 356 reg = <6>; 357 atmel,fifo-size = <1024>; 358 atmel,nb-banks = <3>; 359 atmel,can-dma; 360 atmel,can-isoc; 361 }; 362 }; 363 364 dma0: dma-controller@ffffe600 { 365 compatible = "atmel,at91sam9rl-dma"; 366 reg = <0xffffe600 0x200>; 367 interrupts = <21 IRQ_TYPE_LEVEL_HIGH 0>; 368 #dma-cells = <2>; 369 clocks = <&dma0_clk>; 370 clock-names = "dma_clk"; 371 }; 372 373 ramc0: ramc@ffffea00 { 374 compatible = "atmel,at91sam9260-sdramc"; 375 reg = <0xffffea00 0x200>; 376 }; 377 378 smc: smc@ffffec00 { 379 compatible = "atmel,at91sam9260-smc", "syscon"; 380 reg = <0xffffec00 0x200>; 381 }; 382 383 matrix: matrix@ffffee00 { 384 compatible = "atmel,at91sam9rl-matrix", "syscon"; 385 reg = <0xffffee00 0x200>; 386 }; 387 388 aic: interrupt-controller@fffff000 { 389 #interrupt-cells = <3>; 390 compatible = "atmel,at91rm9200-aic"; 391 interrupt-controller; 392 reg = <0xfffff000 0x200>; 393 atmel,external-irqs = <31>; 394 }; 395 396 dbgu: serial@fffff200 { 397 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 398 reg = <0xfffff200 0x200>; 399 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 400 pinctrl-names = "default"; 401 pinctrl-0 = <&pinctrl_dbgu>; 402 clocks = <&mck>; 403 clock-names = "usart"; 404 status = "disabled"; 405 }; 406 407 pinctrl@fffff400 { 408 #address-cells = <1>; 409 #size-cells = <1>; 410 compatible = "atmel,at91rm9200-pinctrl", "simple-bus"; 411 ranges = <0xfffff400 0xfffff400 0x800>; 412 413 atmel,mux-mask = 414 /* A B */ 415 <0xffffffff 0xe05c6738>, /* pioA */ 416 <0xffffffff 0x0000c780>, /* pioB */ 417 <0xffffffff 0xe3ffff0e>, /* pioC */ 418 <0x003fffff 0x0001ff3c>; /* pioD */ 419 420 /* shared pinctrl settings */ 421 adc0 { 422 pinctrl_adc0_ts: adc0_ts-0 { 423 atmel,pins = 424 <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>, 425 <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>, 426 <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>, 427 <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 428 }; 429 430 pinctrl_adc0_ad0: adc0_ad0-0 { 431 atmel,pins = <AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 432 }; 433 434 pinctrl_adc0_ad1: adc0_ad1-0 { 435 atmel,pins = <AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 436 }; 437 438 pinctrl_adc0_ad2: adc0_ad2-0 { 439 atmel,pins = <AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_NONE>; 440 }; 441 442 pinctrl_adc0_ad3: adc0_ad3-0 { 443 atmel,pins = <AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_NONE>; 444 }; 445 446 pinctrl_adc0_ad4: adc0_ad4-0 { 447 atmel,pins = <AT91_PIOD 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; 448 }; 449 450 pinctrl_adc0_ad5: adc0_ad5-0 { 451 atmel,pins = <AT91_PIOD 7 AT91_PERIPH_A AT91_PINCTRL_NONE>; 452 }; 453 454 pinctrl_adc0_adtrg: adc0_adtrg-0 { 455 atmel,pins = <AT91_PIOB 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 456 }; 457 }; 458 459 dbgu { 460 pinctrl_dbgu: dbgu-0 { 461 atmel,pins = 462 <AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 463 <AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_NONE>; 464 }; 465 }; 466 467 ebi { 468 pinctrl_ebi_addr_nand: ebi-addr-0 { 469 atmel,pins = 470 <AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE>, 471 <AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; 472 }; 473 }; 474 475 fb { 476 pinctrl_fb: fb-0 { 477 atmel,pins = 478 <AT91_PIOC 1 AT91_PERIPH_B AT91_PINCTRL_NONE>, 479 <AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE>, 480 <AT91_PIOC 5 AT91_PERIPH_A AT91_PINCTRL_NONE>, 481 <AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE>, 482 <AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE>, 483 <AT91_PIOC 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 484 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 485 <AT91_PIOC 11 AT91_PERIPH_B AT91_PINCTRL_NONE>, 486 <AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE>, 487 <AT91_PIOC 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 488 <AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>, 489 <AT91_PIOC 16 AT91_PERIPH_B AT91_PINCTRL_NONE>, 490 <AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE>, 491 <AT91_PIOC 18 AT91_PERIPH_B AT91_PINCTRL_NONE>, 492 <AT91_PIOC 19 AT91_PERIPH_B AT91_PINCTRL_NONE>, 493 <AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE>, 494 <AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE>, 495 <AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE>, 496 <AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE>, 497 <AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE>, 498 <AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE>; 499 }; 500 }; 501 502 i2c_gpio0 { 503 pinctrl_i2c_gpio0: i2c_gpio0-0 { 504 atmel,pins = 505 <AT91_PIOA 23 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 506 <AT91_PIOA 24 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 507 }; 508 }; 509 510 i2c_gpio1 { 511 pinctrl_i2c_gpio1: i2c_gpio1-0 { 512 atmel,pins = 513 <AT91_PIOD 10 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>, 514 <AT91_PIOD 11 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>; 515 }; 516 }; 517 518 mmc0 { 519 pinctrl_mmc0_clk: mmc0_clk-0 { 520 atmel,pins = 521 <AT91_PIOA 2 AT91_PERIPH_A AT91_PINCTRL_NONE>; 522 }; 523 524 pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 { 525 atmel,pins = 526 <AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 527 <AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 528 }; 529 530 pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 { 531 atmel,pins = 532 <AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 533 <AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 534 <AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 535 }; 536 }; 537 538 nand { 539 pinctrl_nand_rb: nand-rb-0 { 540 atmel,pins = 541 <AT91_PIOD 17 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 542 }; 543 544 pinctrl_nand_cs: nand-cs-0 { 545 atmel,pins = 546 <AT91_PIOB 6 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; 547 }; 548 549 pinctrl_nand_oe_we: nand-oe-we-0 { 550 atmel,pins = 551 <AT91_PIOB 4 AT91_PERIPH_A AT91_PINCTRL_NONE>, 552 <AT91_PIOB 5 AT91_PERIPH_A AT91_PINCTRL_NONE>; 553 }; 554 }; 555 556 pwm0 { 557 pinctrl_pwm0_pwm0_0: pwm0_pwm0-0 { 558 atmel,pins = <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 559 }; 560 561 pinctrl_pwm0_pwm0_1: pwm0_pwm0-1 { 562 atmel,pins = <AT91_PIOC 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 563 }; 564 565 pinctrl_pwm0_pwm0_2: pwm0_pwm0-2 { 566 atmel,pins = <AT91_PIOD 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 567 }; 568 569 pinctrl_pwm0_pwm1_0: pwm0_pwm1-0 { 570 atmel,pins = <AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE>; 571 }; 572 573 pinctrl_pwm0_pwm1_1: pwm0_pwm1-1 { 574 atmel,pins = <AT91_PIOC 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 575 }; 576 577 pinctrl_pwm0_pwm1_2: pwm0_pwm1-2 { 578 atmel,pins = <AT91_PIOD 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; 579 }; 580 581 pinctrl_pwm0_pwm2_0: pwm0_pwm2-0 { 582 atmel,pins = <AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 583 }; 584 585 pinctrl_pwm0_pwm2_1: pwm0_pwm2-1 { 586 atmel,pins = <AT91_PIOD 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; 587 }; 588 589 pinctrl_pwm0_pwm2_2: pwm0_pwm2-2 { 590 atmel,pins = <AT91_PIOD 16 AT91_PERIPH_B AT91_PINCTRL_NONE>; 591 }; 592 593 pinctrl_pwm0_pwm3_0: pwm0_pwm3-0 { 594 atmel,pins = <AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; 595 }; 596 597 pinctrl_pwm0_pwm3_1: pwm0_pwm3-1 { 598 atmel,pins = <AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_NONE>; 599 }; 600 }; 601 602 spi0 { 603 pinctrl_spi0: spi0-0 { 604 atmel,pins = 605 <AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_NONE>, 606 <AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_NONE>, 607 <AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; 608 }; 609 }; 610 611 ssc0 { 612 pinctrl_ssc0_tx: ssc0_tx-0 { 613 atmel,pins = 614 <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>, 615 <AT91_PIOC 0 AT91_PERIPH_A AT91_PINCTRL_NONE>, 616 <AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; 617 }; 618 619 pinctrl_ssc0_rx: ssc0_rx-0 { 620 atmel,pins = 621 <AT91_PIOA 10 AT91_PERIPH_B AT91_PINCTRL_NONE>, 622 <AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_NONE>, 623 <AT91_PIOA 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; 624 }; 625 }; 626 627 ssc1 { 628 pinctrl_ssc1_tx: ssc1_tx-0 { 629 atmel,pins = 630 <AT91_PIOA 13 AT91_PERIPH_B AT91_PINCTRL_NONE>, 631 <AT91_PIOA 29 AT91_PERIPH_B AT91_PINCTRL_NONE>, 632 <AT91_PIOA 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 633 }; 634 635 pinctrl_ssc1_rx: ssc1_rx-0 { 636 atmel,pins = 637 <AT91_PIOA 8 AT91_PERIPH_B AT91_PINCTRL_NONE>, 638 <AT91_PIOA 9 AT91_PERIPH_B AT91_PINCTRL_NONE>, 639 <AT91_PIOA 14 AT91_PERIPH_B AT91_PINCTRL_NONE>; 640 }; 641 }; 642 643 tcb0 { 644 pinctrl_tcb0_tclk0: tcb0_tclk0-0 { 645 atmel,pins = <AT91_PIOA 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 646 }; 647 648 pinctrl_tcb0_tclk1: tcb0_tclk1-0 { 649 atmel,pins = <AT91_PIOC 31 AT91_PERIPH_B AT91_PINCTRL_NONE>; 650 }; 651 652 pinctrl_tcb0_tclk2: tcb0_tclk2-0 { 653 atmel,pins = <AT91_PIOD 21 AT91_PERIPH_A AT91_PINCTRL_NONE>; 654 }; 655 656 pinctrl_tcb0_tioa0: tcb0_tioa0-0 { 657 atmel,pins = <AT91_PIOA 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 658 }; 659 660 pinctrl_tcb0_tioa1: tcb0_tioa1-0 { 661 atmel,pins = <AT91_PIOC 29 AT91_PERIPH_B AT91_PINCTRL_NONE>; 662 }; 663 664 pinctrl_tcb0_tioa2: tcb0_tioa2-0 { 665 atmel,pins = <AT91_PIOD 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; 666 }; 667 668 pinctrl_tcb0_tiob0: tcb0_tiob0-0 { 669 atmel,pins = <AT91_PIOA 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; 670 }; 671 672 pinctrl_tcb0_tiob1: tcb0_tiob1-0 { 673 atmel,pins = <AT91_PIOC 30 AT91_PERIPH_B AT91_PINCTRL_NONE>; 674 }; 675 676 pinctrl_tcb0_tiob2: tcb0_tiob2-0 { 677 atmel,pins = <AT91_PIOD 11 AT91_PERIPH_B AT91_PINCTRL_NONE>; 678 }; 679 }; 680 681 usart0 { 682 pinctrl_usart0: usart0-0 { 683 atmel,pins = 684 <AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 685 <AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 686 }; 687 688 pinctrl_usart0_rts: usart0_rts-0 { 689 atmel,pins = 690 <AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 691 }; 692 693 pinctrl_usart0_cts: usart0_cts-0 { 694 atmel,pins = 695 <AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_NONE>; 696 }; 697 698 pinctrl_usart0_dtr_dsr: usart0_dtr_dsr-0 { 699 atmel,pins = 700 <AT91_PIOD 14 AT91_PERIPH_A AT91_PINCTRL_NONE>, 701 <AT91_PIOD 15 AT91_PERIPH_A AT91_PINCTRL_NONE>; 702 }; 703 704 pinctrl_usart0_dcd: usart0_dcd-0 { 705 atmel,pins = 706 <AT91_PIOD 16 AT91_PERIPH_A AT91_PINCTRL_NONE>; 707 }; 708 709 pinctrl_usart0_ri: usart0_ri-0 { 710 atmel,pins = 711 <AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE>; 712 }; 713 714 pinctrl_usart0_sck: usart0_sck-0 { 715 atmel,pins = 716 <AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; 717 }; 718 }; 719 720 usart1 { 721 pinctrl_usart1: usart1-0 { 722 atmel,pins = 723 <AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 724 <AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 725 }; 726 727 pinctrl_usart1_rts: usart1_rts-0 { 728 atmel,pins = 729 <AT91_PIOA 18 AT91_PERIPH_B AT91_PINCTRL_NONE>; 730 }; 731 732 pinctrl_usart1_cts: usart1_cts-0 { 733 atmel,pins = 734 <AT91_PIOA 19 AT91_PERIPH_B AT91_PINCTRL_NONE>; 735 }; 736 737 pinctrl_usart1_sck: usart1_sck-0 { 738 atmel,pins = 739 <AT91_PIOD 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; 740 }; 741 }; 742 743 usart2 { 744 pinctrl_usart2: usart2-0 { 745 atmel,pins = 746 <AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 747 <AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 748 }; 749 750 pinctrl_usart2_rts: usart2_rts-0 { 751 atmel,pins = 752 <AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; 753 }; 754 755 pinctrl_usart2_cts: usart2_cts-0 { 756 atmel,pins = 757 <AT91_PIOA 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; 758 }; 759 760 pinctrl_usart2_sck: usart2_sck-0 { 761 atmel,pins = 762 <AT91_PIOD 9 AT91_PERIPH_A AT91_PINCTRL_NONE>; 763 }; 764 }; 765 766 usart3 { 767 pinctrl_usart3: usart3-0 { 768 atmel,pins = 769 <AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>, 770 <AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; 771 }; 772 773 pinctrl_usart3_rts: usart3_rts-0 { 774 atmel,pins = 775 <AT91_PIOD 4 AT91_PERIPH_B AT91_PINCTRL_NONE>; 776 }; 777 778 pinctrl_usart3_cts: usart3_cts-0 { 779 atmel,pins = 780 <AT91_PIOD 3 AT91_PERIPH_B AT91_PINCTRL_NONE>; 781 }; 782 783 pinctrl_usart3_sck: usart3_sck-0 { 784 atmel,pins = 785 <AT91_PIOA 20 AT91_PERIPH_B AT91_PINCTRL_NONE>; 786 }; 787 }; 788 789 pioA: gpio@fffff400 { 790 compatible = "atmel,at91rm9200-gpio"; 791 reg = <0xfffff400 0x200>; 792 interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>; 793 #gpio-cells = <2>; 794 gpio-controller; 795 interrupt-controller; 796 #interrupt-cells = <2>; 797 clocks = <&pioA_clk>; 798 }; 799 800 pioB: gpio@fffff600 { 801 compatible = "atmel,at91rm9200-gpio"; 802 reg = <0xfffff600 0x200>; 803 interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>; 804 #gpio-cells = <2>; 805 gpio-controller; 806 interrupt-controller; 807 #interrupt-cells = <2>; 808 clocks = <&pioB_clk>; 809 }; 810 811 pioC: gpio@fffff800 { 812 compatible = "atmel,at91rm9200-gpio"; 813 reg = <0xfffff800 0x200>; 814 interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>; 815 #gpio-cells = <2>; 816 gpio-controller; 817 interrupt-controller; 818 #interrupt-cells = <2>; 819 clocks = <&pioC_clk>; 820 }; 821 822 pioD: gpio@fffffa00 { 823 compatible = "atmel,at91rm9200-gpio"; 824 reg = <0xfffffa00 0x200>; 825 interrupts = <5 IRQ_TYPE_LEVEL_HIGH 1>; 826 #gpio-cells = <2>; 827 gpio-controller; 828 interrupt-controller; 829 #interrupt-cells = <2>; 830 clocks = <&pioD_clk>; 831 }; 832 }; 833 834 pmc: pmc@fffffc00 { 835 compatible = "atmel,at91sam9rl-pmc", "syscon"; 836 reg = <0xfffffc00 0x100>; 837 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 838 interrupt-controller; 839 #address-cells = <1>; 840 #size-cells = <0>; 841 #interrupt-cells = <1>; 842 843 main: mainck { 844 compatible = "atmel,at91rm9200-clk-main"; 845 #clock-cells = <0>; 846 interrupts-extended = <&pmc AT91_PMC_MOSCS>; 847 clocks = <&main_xtal>; 848 }; 849 850 plla: pllack { 851 compatible = "atmel,at91rm9200-clk-pll"; 852 #clock-cells = <0>; 853 interrupts-extended = <&pmc AT91_PMC_LOCKA>; 854 clocks = <&main>; 855 reg = <0>; 856 atmel,clk-input-range = <1000000 32000000>; 857 #atmel,pll-clk-output-range-cells = <3>; 858 atmel,pll-clk-output-ranges = <80000000 200000000 0>, 859 <190000000 240000000 2>; 860 }; 861 862 utmi: utmick { 863 compatible = "atmel,at91sam9x5-clk-utmi"; 864 #clock-cells = <0>; 865 interrupt-parent = <&pmc>; 866 interrupts = <AT91_PMC_LOCKU>; 867 clocks = <&main>; 868 }; 869 870 mck: masterck { 871 compatible = "atmel,at91rm9200-clk-master"; 872 #clock-cells = <0>; 873 interrupts-extended = <&pmc AT91_PMC_MCKRDY>; 874 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>; 875 atmel,clk-output-range = <0 94000000>; 876 atmel,clk-divisors = <1 2 4 0>; 877 }; 878 879 prog: progck { 880 compatible = "atmel,at91rm9200-clk-programmable"; 881 #address-cells = <1>; 882 #size-cells = <0>; 883 interrupt-parent = <&pmc>; 884 clocks = <&clk32k>, <&main>, <&plla>, <&utmi>, <&mck>; 885 886 prog0: prog0 { 887 #clock-cells = <0>; 888 reg = <0>; 889 interrupts = <AT91_PMC_PCKRDY(0)>; 890 }; 891 892 prog1: prog1 { 893 #clock-cells = <0>; 894 reg = <1>; 895 interrupts = <AT91_PMC_PCKRDY(1)>; 896 }; 897 }; 898 899 systemck { 900 compatible = "atmel,at91rm9200-clk-system"; 901 #address-cells = <1>; 902 #size-cells = <0>; 903 904 pck0: pck0 { 905 #clock-cells = <0>; 906 reg = <8>; 907 clocks = <&prog0>; 908 }; 909 910 pck1: pck1 { 911 #clock-cells = <0>; 912 reg = <9>; 913 clocks = <&prog1>; 914 }; 915 916 }; 917 918 periphck { 919 compatible = "atmel,at91rm9200-clk-peripheral"; 920 #address-cells = <1>; 921 #size-cells = <0>; 922 clocks = <&mck>; 923 924 pioA_clk: pioA_clk { 925 #clock-cells = <0>; 926 reg = <2>; 927 }; 928 929 pioB_clk: pioB_clk { 930 #clock-cells = <0>; 931 reg = <3>; 932 }; 933 934 pioC_clk: pioC_clk { 935 #clock-cells = <0>; 936 reg = <4>; 937 }; 938 939 pioD_clk: pioD_clk { 940 #clock-cells = <0>; 941 reg = <5>; 942 }; 943 944 usart0_clk: usart0_clk { 945 #clock-cells = <0>; 946 reg = <6>; 947 }; 948 949 usart1_clk: usart1_clk { 950 #clock-cells = <0>; 951 reg = <7>; 952 }; 953 954 usart2_clk: usart2_clk { 955 #clock-cells = <0>; 956 reg = <8>; 957 }; 958 959 usart3_clk: usart3_clk { 960 #clock-cells = <0>; 961 reg = <9>; 962 }; 963 964 mci0_clk: mci0_clk { 965 #clock-cells = <0>; 966 reg = <10>; 967 }; 968 969 twi0_clk: twi0_clk { 970 #clock-cells = <0>; 971 reg = <11>; 972 }; 973 974 twi1_clk: twi1_clk { 975 #clock-cells = <0>; 976 reg = <12>; 977 }; 978 979 spi0_clk: spi0_clk { 980 #clock-cells = <0>; 981 reg = <13>; 982 }; 983 984 ssc0_clk: ssc0_clk { 985 #clock-cells = <0>; 986 reg = <14>; 987 }; 988 989 ssc1_clk: ssc1_clk { 990 #clock-cells = <0>; 991 reg = <15>; 992 }; 993 994 tc0_clk: tc0_clk { 995 #clock-cells = <0>; 996 reg = <16>; 997 }; 998 999 tc1_clk: tc1_clk { 1000 #clock-cells = <0>; 1001 reg = <17>; 1002 }; 1003 1004 tc2_clk: tc2_clk { 1005 #clock-cells = <0>; 1006 reg = <18>; 1007 }; 1008 1009 pwm_clk: pwm_clk { 1010 #clock-cells = <0>; 1011 reg = <19>; 1012 }; 1013 1014 adc_clk: adc_clk { 1015 #clock-cells = <0>; 1016 reg = <20>; 1017 }; 1018 1019 dma0_clk: dma0_clk { 1020 #clock-cells = <0>; 1021 reg = <21>; 1022 }; 1023 1024 udphs_clk: udphs_clk { 1025 #clock-cells = <0>; 1026 reg = <22>; 1027 }; 1028 1029 lcd_clk: lcd_clk { 1030 #clock-cells = <0>; 1031 reg = <23>; 1032 }; 1033 }; 1034 }; 1035 1036 rstc@fffffd00 { 1037 compatible = "atmel,at91sam9260-rstc"; 1038 reg = <0xfffffd00 0x10>; 1039 clocks = <&clk32k>; 1040 }; 1041 1042 shdwc@fffffd10 { 1043 compatible = "atmel,at91sam9260-shdwc"; 1044 reg = <0xfffffd10 0x10>; 1045 clocks = <&clk32k>; 1046 }; 1047 1048 pit: timer@fffffd30 { 1049 compatible = "atmel,at91sam9260-pit"; 1050 reg = <0xfffffd30 0xf>; 1051 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1052 clocks = <&mck>; 1053 }; 1054 1055 watchdog@fffffd40 { 1056 compatible = "atmel,at91sam9260-wdt"; 1057 reg = <0xfffffd40 0x10>; 1058 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1059 clocks = <&clk32k>; 1060 status = "disabled"; 1061 }; 1062 1063 sckc@fffffd50 { 1064 compatible = "atmel,at91sam9x5-sckc"; 1065 reg = <0xfffffd50 0x4>; 1066 1067 slow_osc: slow_osc { 1068 compatible = "atmel,at91sam9x5-clk-slow-osc"; 1069 #clock-cells = <0>; 1070 atmel,startup-time-usec = <1200000>; 1071 clocks = <&slow_xtal>; 1072 }; 1073 1074 slow_rc_osc: slow_rc_osc { 1075 compatible = "atmel,at91sam9x5-clk-slow-rc-osc"; 1076 #clock-cells = <0>; 1077 atmel,startup-time-usec = <75>; 1078 clock-frequency = <32768>; 1079 clock-accuracy = <50000000>; 1080 }; 1081 1082 clk32k: slck { 1083 compatible = "atmel,at91sam9x5-clk-slow"; 1084 #clock-cells = <0>; 1085 clocks = <&slow_rc_osc &slow_osc>; 1086 }; 1087 }; 1088 1089 rtc@fffffd20 { 1090 compatible = "atmel,at91sam9260-rtt"; 1091 reg = <0xfffffd20 0x10>; 1092 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1093 clocks = <&clk32k>; 1094 status = "disabled"; 1095 }; 1096 1097 gpbr: syscon@fffffd60 { 1098 compatible = "atmel,at91sam9260-gpbr", "syscon"; 1099 reg = <0xfffffd60 0x10>; 1100 status = "disabled"; 1101 }; 1102 1103 rtc@fffffe00 { 1104 compatible = "atmel,at91rm9200-rtc"; 1105 reg = <0xfffffe00 0x40>; 1106 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 1107 clocks = <&clk32k>; 1108 status = "disabled"; 1109 }; 1110 1111 }; 1112 }; 1113 1114 i2c-gpio-0 { 1115 compatible = "i2c-gpio"; 1116 gpios = <&pioA 23 GPIO_ACTIVE_HIGH>, /* sda */ 1117 <&pioA 24 GPIO_ACTIVE_HIGH>; /* scl */ 1118 i2c-gpio,sda-open-drain; 1119 i2c-gpio,scl-open-drain; 1120 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 1121 #address-cells = <1>; 1122 #size-cells = <0>; 1123 pinctrl-names = "default"; 1124 pinctrl-0 = <&pinctrl_i2c_gpio0>; 1125 status = "disabled"; 1126 }; 1127 1128 i2c-gpio-1 { 1129 compatible = "i2c-gpio"; 1130 gpios = <&pioD 10 GPIO_ACTIVE_HIGH>, /* sda */ 1131 <&pioD 11 GPIO_ACTIVE_HIGH>; /* scl */ 1132 i2c-gpio,sda-open-drain; 1133 i2c-gpio,scl-open-drain; 1134 i2c-gpio,delay-us = <2>; /* ~100 kHz */ 1135 #address-cells = <1>; 1136 #size-cells = <0>; 1137 pinctrl-names = "default"; 1138 pinctrl-0 = <&pinctrl_i2c_gpio1>; 1139 status = "disabled"; 1140 }; 1141}; 1142