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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5*/
6
7#include <dt-bindings/sound/samsung-i2s.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/clock/maxim,max77686.h>
10#include "exynos4412.dtsi"
11#include "exynos4412-ppmu-common.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos-mfc-reserved-memory.dtsi"
14
15/ {
16	chosen {
17		stdout-path = &serial_1;
18	};
19
20	firmware@204f000 {
21		compatible = "samsung,secure-firmware";
22		reg = <0x0204F000 0x1000>;
23	};
24
25	gpio_keys {
26		compatible = "gpio-keys";
27		pinctrl-names = "default";
28		pinctrl-0 = <&gpio_power_key>;
29
30		power_key {
31			gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32			linux,code = <KEY_POWER>;
33			label = "power key";
34			debounce-interval = <10>;
35			wakeup-source;
36		};
37	};
38
39	sound: sound {
40		compatible = "hardkernel,odroid-xu4-audio";
41
42		cpu {
43			sound-dai = <&i2s0 0>;
44		};
45
46		codec {
47			sound-dai = <&hdmi>, <&max98090>;
48		};
49	};
50
51	emmc_pwrseq: pwrseq {
52		pinctrl-0 = <&emmc_rstn>;
53		pinctrl-names = "default";
54		compatible = "mmc-pwrseq-emmc";
55		reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
56	};
57
58	fixed-rate-clocks {
59		xxti {
60			compatible = "samsung,clock-xxti";
61			clock-frequency = <0>;
62		};
63
64		xusbxti {
65			compatible = "samsung,clock-xusbxti";
66			clock-frequency = <24000000>;
67		};
68	};
69
70	thermal-zones {
71		cpu_thermal: cpu-thermal {
72			cooling-maps {
73				cooling_map0: map0 {
74				     /* Corresponds to 800MHz at freq_table */
75				     cooling-device = <&cpu0 7 7>;
76				};
77				cooling_map1: map1 {
78				     /* Corresponds to 200MHz at freq_table */
79				     cooling-device = <&cpu0 13 13>;
80			       };
81		       };
82		};
83	};
84};
85
86&bus_dmc {
87	devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
88	vdd-supply = <&buck1_reg>;
89	status = "okay";
90};
91
92&bus_acp {
93	devfreq = <&bus_dmc>;
94	status = "okay";
95};
96
97&bus_c2c {
98	devfreq = <&bus_dmc>;
99	status = "okay";
100};
101
102&bus_leftbus {
103	devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
104	vdd-supply = <&buck3_reg>;
105	status = "okay";
106};
107
108&bus_rightbus {
109	devfreq = <&bus_leftbus>;
110	status = "okay";
111};
112
113&bus_display {
114	devfreq = <&bus_leftbus>;
115	status = "okay";
116};
117
118&bus_fsys {
119	devfreq = <&bus_leftbus>;
120	status = "okay";
121};
122
123&bus_peri {
124	devfreq = <&bus_leftbus>;
125	status = "okay";
126};
127
128&bus_mfc {
129	devfreq = <&bus_leftbus>;
130	status = "okay";
131};
132
133&camera {
134	status = "okay";
135	pinctrl-names = "default";
136	pinctrl-0 = <>;
137};
138
139&clock {
140	assigned-clocks = <&clock CLK_FOUT_EPLL>;
141	assigned-clock-rates = <45158401>;
142};
143
144&clock_audss {
145	assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
146			<&clock_audss EXYNOS_MOUT_I2S>,
147			<&clock_audss EXYNOS_DOUT_SRP>,
148			<&clock_audss EXYNOS_DOUT_AUD_BUS>,
149			<&clock_audss EXYNOS_DOUT_I2S>;
150
151	assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
152			  <&clock_audss EXYNOS_MOUT_AUDSS>;
153
154	assigned-clock-rates = <0>, <0>,
155			<196608001>,
156			<(196608001 / 2)>,
157			<(196608001 / 8)>;
158};
159
160&cpu0 {
161	cpu0-supply = <&buck2_reg>;
162};
163
164&pinctrl_1 {
165	gpio_power_key: power_key {
166		samsung,pins = "gpx1-3";
167		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
168	};
169
170	max77686_irq: max77686-irq {
171		samsung,pins = "gpx3-2";
172		samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
173		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
174		samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
175	};
176
177	hdmi_hpd: hdmi-hpd {
178		samsung,pins = "gpx3-7";
179		samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
180	};
181
182	emmc_rstn: emmc-rstn {
183		samsung,pins = "gpk1-2";
184		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
185	};
186};
187
188&ehci {
189	status = "okay";
190};
191
192&exynos_usbphy {
193	status = "okay";
194};
195
196&fimc_0 {
197	status = "okay";
198	assigned-clocks = <&clock CLK_MOUT_FIMC0>,
199			<&clock CLK_SCLK_FIMC0>;
200	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
201	assigned-clock-rates = <0>, <176000000>;
202};
203
204&fimc_1 {
205	status = "okay";
206	assigned-clocks = <&clock CLK_MOUT_FIMC1>,
207			<&clock CLK_SCLK_FIMC1>;
208	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
209	assigned-clock-rates = <0>, <176000000>;
210};
211
212&fimc_2 {
213	status = "okay";
214	assigned-clocks = <&clock CLK_MOUT_FIMC2>,
215			<&clock CLK_SCLK_FIMC2>;
216	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
217	assigned-clock-rates = <0>, <176000000>;
218};
219
220&fimc_3 {
221	status = "okay";
222	assigned-clocks = <&clock CLK_MOUT_FIMC3>,
223			<&clock CLK_SCLK_FIMC3>;
224	assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
225	assigned-clock-rates = <0>, <176000000>;
226};
227
228&hdmi {
229	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
230	pinctrl-names = "default";
231	pinctrl-0 = <&hdmi_hpd>;
232	vdd-supply = <&ldo8_reg>;
233	vdd_osc-supply = <&ldo10_reg>;
234	vdd_pll-supply = <&ldo8_reg>;
235	ddc = <&i2c_2>;
236	status = "okay";
237};
238
239&hdmicec {
240	status = "okay";
241};
242
243&hsotg {
244	dr_mode = "peripheral";
245	status = "okay";
246	vusb_d-supply = <&ldo15_reg>;
247	vusb_a-supply = <&ldo12_reg>;
248};
249
250&i2c_0 {
251	samsung,i2c-sda-delay = <100>;
252	samsung,i2c-max-bus-freq = <400000>;
253	status = "okay";
254
255	usb3503: usb3503@8 {
256		compatible = "smsc,usb3503";
257		reg = <0x08>;
258
259		intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
260		connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
261		reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
262		initial-mode = <1>;
263	};
264
265	max77686: pmic@9 {
266		compatible = "maxim,max77686";
267		interrupt-parent = <&gpx3>;
268		interrupts = <2 IRQ_TYPE_NONE>;
269		pinctrl-names = "default";
270		pinctrl-0 = <&max77686_irq>;
271		reg = <0x09>;
272		#clock-cells = <1>;
273
274		voltage-regulators {
275			ldo1_reg: LDO1 {
276				regulator-name = "VDD_ALIVE_1.0V";
277				regulator-min-microvolt = <1000000>;
278				regulator-max-microvolt = <1000000>;
279				regulator-always-on;
280			};
281
282			ldo2_reg: LDO2 {
283				regulator-name = "VDDQ_M1_2_1.8V";
284				regulator-min-microvolt = <1800000>;
285				regulator-max-microvolt = <1800000>;
286				regulator-always-on;
287			};
288
289			ldo3_reg: LDO3 {
290				regulator-name = "VDDQ_EXT_1.8V";
291				regulator-min-microvolt = <1800000>;
292				regulator-max-microvolt = <1800000>;
293				regulator-always-on;
294			};
295
296			ldo4_reg: LDO4 {
297				regulator-name = "VDDQ_MMC2_2.8V";
298				regulator-min-microvolt = <2800000>;
299				regulator-max-microvolt = <2800000>;
300				regulator-boot-on;
301			};
302
303			ldo5_reg: LDO5 {
304				regulator-name = "VDDQ_MMC1_3_1.8V";
305				regulator-min-microvolt = <1800000>;
306				regulator-max-microvolt = <1800000>;
307				regulator-always-on;
308				regulator-boot-on;
309			};
310
311			ldo6_reg: LDO6 {
312				regulator-name = "VDD10_MPLL_1.0V";
313				regulator-min-microvolt = <1000000>;
314				regulator-max-microvolt = <1000000>;
315				regulator-always-on;
316			};
317
318			ldo7_reg: LDO7 {
319				regulator-name = "VDD10_XPLL_1.0V";
320				regulator-min-microvolt = <1000000>;
321				regulator-max-microvolt = <1000000>;
322				regulator-always-on;
323			};
324
325			ldo8_reg: LDO8 {
326				regulator-name = "VDD10_HDMI_1.0V";
327				regulator-min-microvolt = <1000000>;
328				regulator-max-microvolt = <1000000>;
329			};
330
331			ldo10_reg: LDO10 {
332				regulator-name = "VDDQ_MIPIHSI_1.8V";
333				regulator-min-microvolt = <1800000>;
334				regulator-max-microvolt = <1800000>;
335			};
336
337			ldo11_reg: LDO11 {
338				regulator-name = "VDD18_ABB1_1.8V";
339				regulator-min-microvolt = <1800000>;
340				regulator-max-microvolt = <1800000>;
341				regulator-always-on;
342			};
343
344			ldo12_reg: LDO12 {
345				regulator-name = "VDD33_USB_3.3V";
346				regulator-min-microvolt = <3300000>;
347				regulator-max-microvolt = <3300000>;
348				regulator-always-on;
349				regulator-boot-on;
350			};
351
352			ldo13_reg: LDO13 {
353				regulator-name = "VDDQ_C2C_W_1.8V";
354				regulator-min-microvolt = <1800000>;
355				regulator-max-microvolt = <1800000>;
356				regulator-always-on;
357				regulator-boot-on;
358			};
359
360			ldo14_reg: LDO14 {
361				regulator-name = "VDD18_ABB0_2_1.8V";
362				regulator-min-microvolt = <1800000>;
363				regulator-max-microvolt = <1800000>;
364				regulator-always-on;
365				regulator-boot-on;
366			};
367
368			ldo15_reg: LDO15 {
369				regulator-name = "VDD10_HSIC_1.0V";
370				regulator-min-microvolt = <1000000>;
371				regulator-max-microvolt = <1000000>;
372				regulator-always-on;
373				regulator-boot-on;
374			};
375
376			ldo16_reg: LDO16 {
377				regulator-name = "VDD18_HSIC_1.8V";
378				regulator-min-microvolt = <1800000>;
379				regulator-max-microvolt = <1800000>;
380				regulator-always-on;
381				regulator-boot-on;
382			};
383
384			ldo20_reg: LDO20 {
385				regulator-name = "LDO20_1.8V";
386				regulator-min-microvolt = <1800000>;
387				regulator-max-microvolt = <1800000>;
388				regulator-boot-on;
389			};
390
391			ldo21_reg: LDO21 {
392				regulator-name = "TFLASH_2.8V";
393				regulator-min-microvolt = <2800000>;
394				regulator-max-microvolt = <2800000>;
395				regulator-boot-on;
396			};
397
398			ldo22_reg: LDO22 {
399				/*
400				 * Only U3 uses it, so let it define the
401				 * constraints
402				 */
403				regulator-name = "LDO22";
404				regulator-boot-on;
405			};
406
407			ldo25_reg: LDO25 {
408				regulator-name = "VDDQ_LCD_1.8V";
409				regulator-min-microvolt = <1800000>;
410				regulator-max-microvolt = <1800000>;
411				regulator-always-on;
412				regulator-boot-on;
413			};
414
415			buck1_reg: BUCK1 {
416				regulator-name = "vdd_mif";
417				regulator-min-microvolt = <900000>;
418				regulator-max-microvolt = <1100000>;
419				regulator-always-on;
420				regulator-boot-on;
421			};
422
423			buck2_reg: BUCK2 {
424				regulator-name = "vdd_arm";
425				regulator-min-microvolt = <900000>;
426				regulator-max-microvolt = <1350000>;
427				regulator-always-on;
428				regulator-boot-on;
429			};
430
431			buck3_reg: BUCK3 {
432				regulator-name = "vdd_int";
433				regulator-min-microvolt = <900000>;
434				regulator-max-microvolt = <1050000>;
435				regulator-always-on;
436				regulator-boot-on;
437			};
438
439			buck4_reg: BUCK4 {
440				regulator-name = "vdd_g3d";
441				regulator-min-microvolt = <900000>;
442				regulator-max-microvolt = <1100000>;
443				regulator-microvolt-offset = <50000>;
444			};
445
446			buck5_reg: BUCK5 {
447				regulator-name = "VDDQ_CKEM1_2_1.2V";
448				regulator-min-microvolt = <1200000>;
449				regulator-max-microvolt = <1200000>;
450				regulator-always-on;
451				regulator-boot-on;
452			};
453
454			buck6_reg: BUCK6 {
455				regulator-name = "BUCK6_1.35V";
456				regulator-min-microvolt = <1350000>;
457				regulator-max-microvolt = <1350000>;
458				regulator-always-on;
459				regulator-boot-on;
460			};
461
462			buck7_reg: BUCK7 {
463				regulator-name = "BUCK7_2.0V";
464				regulator-min-microvolt = <2000000>;
465				regulator-max-microvolt = <2000000>;
466				regulator-always-on;
467			};
468
469			buck8_reg: BUCK8 {
470				/*
471				 * Constraints set by specific board: X,
472				 * X2 and U3.
473				 */
474				regulator-name = "BUCK8_2.8V";
475			};
476		};
477	};
478};
479
480&i2c_1 {
481	status = "okay";
482	max98090: max98090@10 {
483		compatible = "maxim,max98090";
484		reg = <0x10>;
485		interrupt-parent = <&gpx0>;
486		interrupts = <0 IRQ_TYPE_NONE>;
487		clocks = <&i2s0 CLK_I2S_CDCLK>;
488		clock-names = "mclk";
489		#sound-dai-cells = <0>;
490	};
491};
492
493&i2c_2 {
494	status = "okay";
495};
496
497&i2c_8 {
498	status = "okay";
499};
500
501&i2s0 {
502	pinctrl-0 = <&i2s0_bus>;
503	pinctrl-names = "default";
504	status = "okay";
505	assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
506	assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
507};
508
509&mixer {
510	status = "okay";
511};
512
513&mshc_0 {
514	pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
515	pinctrl-names = "default";
516	vmmc-supply = <&ldo20_reg>;
517	mmc-pwrseq = <&emmc_pwrseq>;
518	status = "okay";
519
520	broken-cd;
521	card-detect-delay = <200>;
522	samsung,dw-mshc-ciu-div = <3>;
523	samsung,dw-mshc-sdr-timing = <2 3>;
524	samsung,dw-mshc-ddr-timing = <1 2>;
525	bus-width = <8>;
526	cap-mmc-highspeed;
527};
528
529&rtc {
530	status = "okay";
531	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
532	clock-names = "rtc", "rtc_src";
533};
534
535&sdhci_2 {
536	bus-width = <4>;
537	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
538	pinctrl-names = "default";
539	vmmc-supply = <&ldo21_reg>;
540	vqmmc-supply = <&ldo4_reg>;
541	cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
542	cd-inverted;
543	status = "okay";
544};
545
546&serial_0 {
547	status = "okay";
548};
549
550&serial_1 {
551	status = "okay";
552};
553
554&tmu {
555	vtmu-supply = <&ldo10_reg>;
556	status = "okay";
557};
558