1/* 2 * Copyright (C) 2013 Marek Vasut <marex@denx.de> 3 * 4 * The code contained herein is licensed under the GNU General Public 5 * License. You may obtain a copy of the GNU General Public License 6 * Version 2 or later at the following locations: 7 * 8 * http://www.opensource.org/licenses/gpl-license.html 9 * http://www.gnu.org/copyleft/gpl.html 10 */ 11 12/dts-v1/; 13#include "imx53-m53.dtsi" 14 15/ { 16 model = "Aries/DENX M53EVK"; 17 compatible = "aries,imx53-m53evk", "denx,imx53-m53evk", "fsl,imx53"; 18 19 display1: disp1 { 20 compatible = "fsl,imx-parallel-display"; 21 interface-pix-fmt = "bgr666"; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&pinctrl_ipu_disp1>; 24 25 display-timings { 26 800x480p60 { 27 native-mode; 28 clock-frequency = <31500000>; 29 hactive = <800>; 30 vactive = <480>; 31 hfront-porch = <40>; 32 hback-porch = <88>; 33 hsync-len = <128>; 34 vback-porch = <33>; 35 vfront-porch = <9>; 36 vsync-len = <3>; 37 vsync-active = <1>; 38 }; 39 }; 40 41 port { 42 display1_in: endpoint { 43 remote-endpoint = <&ipu_di1_disp1>; 44 }; 45 }; 46 }; 47 48 backlight { 49 compatible = "pwm-backlight"; 50 pwms = <&pwm1 0 3000>; 51 brightness-levels = <0 4 8 16 32 64 128 255>; 52 default-brightness-level = <6>; 53 power-supply = <®_backlight>; 54 }; 55 56 leds { 57 compatible = "gpio-leds"; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&led_pin_gpio>; 60 61 user1 { 62 label = "user1"; 63 gpios = <&gpio2 8 0>; 64 linux,default-trigger = "heartbeat"; 65 }; 66 67 user2 { 68 label = "user2"; 69 gpios = <&gpio2 9 0>; 70 linux,default-trigger = "heartbeat"; 71 }; 72 }; 73 74 regulators { 75 compatible = "simple-bus"; 76 #address-cells = <1>; 77 #size-cells = <0>; 78 79 reg_usbh1_vbus: regulator@3 { 80 compatible = "regulator-fixed"; 81 reg = <3>; 82 regulator-name = "vbus"; 83 regulator-min-microvolt = <5000000>; 84 regulator-max-microvolt = <5000000>; 85 gpio = <&gpio1 2 0>; 86 }; 87 88 reg_usb_otg_vbus: regulator@4 { 89 compatible = "regulator-fixed"; 90 reg = <4>; 91 regulator-name = "usb_otg_vbus"; 92 regulator-min-microvolt = <5000000>; 93 regulator-max-microvolt = <5000000>; 94 gpio = <&gpio1 4 0>; 95 }; 96 }; 97 98 sound { 99 compatible = "fsl,imx53-m53evk-sgtl5000", 100 "fsl,imx-audio-sgtl5000"; 101 model = "imx53-m53evk-sgtl5000"; 102 ssi-controller = <&ssi2>; 103 audio-codec = <&sgtl5000>; 104 audio-routing = 105 "MIC_IN", "Mic Jack", 106 "Mic Jack", "Mic Bias", 107 "LINE_IN", "Line In Jack", 108 "Headphone Jack", "HP_OUT", 109 "Ext Spk", "LINE_OUT"; 110 mux-int-port = <2>; 111 mux-ext-port = <4>; 112 }; 113}; 114 115&audmux { 116 pinctrl-names = "default"; 117 pinctrl-0 = <&pinctrl_audmux>; 118 status = "okay"; 119}; 120 121&can1 { 122 pinctrl-names = "default"; 123 pinctrl-0 = <&pinctrl_can1>; 124 status = "okay"; 125}; 126 127&can2 { 128 pinctrl-names = "default"; 129 pinctrl-0 = <&pinctrl_can2>; 130 status = "okay"; 131}; 132 133&esdhc1 { 134 pinctrl-names = "default"; 135 pinctrl-0 = <&pinctrl_esdhc1>; 136 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 137 wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 138 status = "okay"; 139}; 140 141&fec { 142 pinctrl-names = "default"; 143 pinctrl-0 = <&pinctrl_fec>; 144 phy-mode = "rmii"; 145 status = "okay"; 146}; 147 148&i2c1 { 149 pinctrl-names = "default"; 150 pinctrl-0 = <&pinctrl_i2c1>; 151 status = "okay"; 152 153 sgtl5000: codec@a { 154 compatible = "fsl,sgtl5000"; 155 reg = <0x0a>; 156 #sound-dai-cells = <0>; 157 VDDA-supply = <®_3p2v>; 158 VDDIO-supply = <®_3p2v>; 159 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>; 160 }; 161}; 162 163&i2c3 { 164 pinctrl-names = "default"; 165 pinctrl-0 = <&pinctrl_i2c3>; 166 status = "okay"; 167}; 168 169&iomuxc { 170 pinctrl-names = "default"; 171 pinctrl-0 = <&pinctrl_hog>; 172 173 imx53-m53evk { 174 pinctrl_usb: usbgrp { 175 fsl,pins = < 176 MX53_PAD_GPIO_2__GPIO1_2 0x80000000 177 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x80000000 178 >; 179 }; 180 181 pinctrl_usbotg: usbotggrp { 182 fsl,pins = < 183 MX53_PAD_GPIO_4__GPIO1_4 0x000b0 184 >; 185 }; 186 187 led_pin_gpio: led_gpio { 188 fsl,pins = < 189 MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000 190 MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000 191 >; 192 }; 193 194 pinctrl_audmux: audmuxgrp { 195 fsl,pins = < 196 MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000 197 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000 198 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000 199 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000 200 >; 201 }; 202 203 pinctrl_can1: can1grp { 204 fsl,pins = < 205 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000 206 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000 207 >; 208 }; 209 210 pinctrl_can2: can2grp { 211 fsl,pins = < 212 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000 213 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000 214 >; 215 }; 216 217 pinctrl_esdhc1: esdhc1grp { 218 fsl,pins = < 219 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5 220 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5 221 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5 222 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5 223 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5 224 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5 225 >; 226 }; 227 228 pinctrl_fec: fecgrp { 229 fsl,pins = < 230 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000 231 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000 232 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000 233 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000 234 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000 235 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000 236 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000 237 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 238 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000 239 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000 240 >; 241 }; 242 243 pinctrl_i2c1: i2c1grp { 244 fsl,pins = < 245 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000 246 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000 247 >; 248 }; 249 250 pinctrl_i2c3: i2c3grp { 251 fsl,pins = < 252 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000 253 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000 254 >; 255 }; 256 257 pinctrl_ipu_disp1: ipudisp1grp { 258 fsl,pins = < 259 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5 260 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5 261 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5 262 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5 263 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5 264 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5 265 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5 266 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5 267 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5 268 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5 269 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5 270 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5 271 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5 272 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5 273 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5 274 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5 275 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5 276 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5 277 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5 278 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5 279 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5 280 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5 281 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5 282 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5 283 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5 284 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5 285 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5 286 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5 287 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5 288 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5 289 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5 290 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5 291 >; 292 }; 293 294 pinctrl_pwm1: pwm1grp { 295 fsl,pins = < 296 MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5 297 >; 298 }; 299 300 pinctrl_uart1: uart1grp { 301 fsl,pins = < 302 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4 303 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4 304 >; 305 }; 306 307 pinctrl_uart2: uart2grp { 308 fsl,pins = < 309 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4 310 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4 311 >; 312 }; 313 314 pinctrl_uart3: uart3grp { 315 fsl,pins = < 316 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4 317 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4 318 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4 319 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4 320 >; 321 }; 322 }; 323}; 324 325&ipu_di1_disp1 { 326 remote-endpoint = <&display1_in>; 327}; 328 329&pwm1 { 330 pinctrl-names = "default"; 331 pinctrl-0 = <&pinctrl_pwm1>; 332 status = "okay"; 333}; 334 335&sata { 336 status = "okay"; 337}; 338 339&ssi2 { 340 status = "okay"; 341}; 342 343&uart1 { 344 pinctrl-names = "default"; 345 pinctrl-0 = <&pinctrl_uart1>; 346 status = "okay"; 347}; 348 349&uart2 { 350 pinctrl-names = "default"; 351 pinctrl-0 = <&pinctrl_uart2>; 352 status = "okay"; 353}; 354 355&uart3 { 356 pinctrl-names = "default"; 357 pinctrl-0 = <&pinctrl_uart3>; 358 status = "okay"; 359}; 360 361&usbh1 { 362 pinctrl-names = "default"; 363 pinctrl-0 = <&pinctrl_usb>; 364 vbus-supply = <®_usbh1_vbus>; 365 phy_type = "utmi"; 366 status = "okay"; 367}; 368 369&usbotg { 370 pinctrl-names = "default"; 371 pinctrl-0 = <&pinctrl_usbotg>; 372 dr_mode = "otg"; 373 vbus-supply = <®_usb_otg_vbus>; 374 disable-over-current; 375 status = "okay"; 376}; 377