1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Veyron Mickey Rev 0 board device tree source 4 * 5 * Copyright 2015 Google, Inc 6 */ 7 8/dts-v1/; 9#include "rk3288-veyron.dtsi" 10 11/ { 12 model = "Google Mickey"; 13 compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7", 14 "google,veyron-mickey-rev6", "google,veyron-mickey-rev5", 15 "google,veyron-mickey-rev4", "google,veyron-mickey-rev3", 16 "google,veyron-mickey-rev2", "google,veyron-mickey-rev1", 17 "google,veyron-mickey-rev0", "google,veyron-mickey", 18 "google,veyron", "rockchip,rk3288"; 19 20 vcc_5v: vcc-5v { 21 vin-supply = <&vcc33_sys>; 22 }; 23 24 vcc33_io: vcc33_io { 25 compatible = "regulator-fixed"; 26 regulator-name = "vcc33_io"; 27 regulator-always-on; 28 regulator-boot-on; 29 vin-supply = <&vcc33_sys>; 30 }; 31}; 32 33&cpu_thermal { 34 /delete-node/ trips; 35 /delete-node/ cooling-maps; 36 37 trips { 38 cpu_alert_almost_warm: cpu_alert_almost_warm { 39 temperature = <63000>; /* millicelsius */ 40 hysteresis = <2000>; /* millicelsius */ 41 type = "passive"; 42 }; 43 cpu_alert_warm: cpu_alert_warm { 44 temperature = <65000>; /* millicelsius */ 45 hysteresis = <2000>; /* millicelsius */ 46 type = "passive"; 47 }; 48 cpu_alert_almost_hot: cpu_alert_almost_hot { 49 temperature = <80000>; /* millicelsius */ 50 hysteresis = <2000>; /* millicelsius */ 51 type = "passive"; 52 }; 53 cpu_alert_hot: cpu_alert_hot { 54 temperature = <82000>; /* millicelsius */ 55 hysteresis = <2000>; /* millicelsius */ 56 type = "passive"; 57 }; 58 cpu_alert_hotter: cpu_alert_hotter { 59 temperature = <84000>; /* millicelsius */ 60 hysteresis = <2000>; /* millicelsius */ 61 type = "passive"; 62 }; 63 cpu_alert_very_hot: cpu_alert_very_hot { 64 temperature = <85000>; /* millicelsius */ 65 hysteresis = <2000>; /* millicelsius */ 66 type = "passive"; 67 }; 68 cpu_crit: cpu_crit { 69 temperature = <90000>; /* millicelsius */ 70 hysteresis = <2000>; /* millicelsius */ 71 type = "critical"; 72 }; 73 }; 74 75 cooling-maps { 76 /* 77 * After 1st level, throttle the CPU down to as low as 1.4 GHz 78 * and don't let the GPU go faster than 400 MHz. Note that we 79 * won't throttle the GPU lower than 400 MHz due to CPU 80 * heat--we'll let the GPU do the rest itself. 81 */ 82 cpu_warm_limit_cpu { 83 trip = <&cpu_alert_warm>; 84 cooling-device = 85 <&cpu0 THERMAL_NO_LIMIT 4>; 86 }; 87 88 /* 89 * Add some discrete steps to help throttling system deal 90 * with the fact that there are two passive cooling devices: 91 * the CPU and the GPU. 92 * 93 * - 1.2 GHz - 1.0 GHz (almost hot) 94 * - 800 MHz (hot) 95 * - 800 MHz - 696 MHz (hotter) 96 * - 696 MHz - min (very hot) 97 * 98 * Note: 99 * - 800 MHz appears to be a "sweet spot" for me. I can run 100 * some pretty serious workload here and be happy. 101 * - After 696 MHz we stop lowering voltage, so throttling 102 * past there is less effective. 103 */ 104 cpu_almost_hot_limit_cpu { 105 trip = <&cpu_alert_almost_hot>; 106 cooling-device = 107 <&cpu0 5 6>; 108 }; 109 cpu_hot_limit_cpu { 110 trip = <&cpu_alert_hot>; 111 cooling-device = 112 <&cpu0 7 7>; 113 }; 114 cpu_hotter_limit_cpu { 115 trip = <&cpu_alert_hotter>; 116 cooling-device = 117 <&cpu0 7 8>; 118 }; 119 cpu_very_hot_limit_cpu { 120 trip = <&cpu_alert_very_hot>; 121 cooling-device = 122 <&cpu0 8 THERMAL_NO_LIMIT>; 123 }; 124 }; 125}; 126 127&i2c2 { 128 status = "disabled"; 129}; 130 131&i2c4 { 132 status = "disabled"; 133}; 134 135&i2s { 136 status = "okay"; 137 clock-names = "i2s_hclk", "i2s_clk", "i2s_clk_out"; 138 clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>; 139}; 140 141&rk808 { 142 pinctrl-names = "default"; 143 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>; 144 dvs-gpios = <&gpio7 RK_PB4 GPIO_ACTIVE_HIGH>, 145 <&gpio7 RK_PB7 GPIO_ACTIVE_HIGH>; 146 147 /delete-property/ vcc6-supply; 148 /delete-property/ vcc12-supply; 149 150 vcc11-supply = <&vcc33_sys>; 151 152 regulators { 153 /* vcc33_io is sourced directly from vcc33_sys */ 154 /delete-node/ LDO_REG1; 155 /delete-node/ LDO_REG7; 156 157 /* This is not a pwren anymore, but the real power supply */ 158 vdd10_lcd: LDO_REG7 { 159 regulator-always-on; 160 regulator-boot-on; 161 regulator-min-microvolt = <1000000>; 162 regulator-max-microvolt = <1000000>; 163 regulator-name = "vdd10_lcd"; 164 regulator-suspend-mem-disabled; 165 }; 166 167 vcc18_lcd: LDO_REG8 { 168 regulator-always-on; 169 regulator-boot-on; 170 regulator-min-microvolt = <1800000>; 171 regulator-max-microvolt = <1800000>; 172 regulator-name = "vcc18_lcd"; 173 regulator-suspend-mem-disabled; 174 }; 175 }; 176}; 177 178&pinctrl { 179 hdmi { 180 power_hdmi_on: power-hdmi-on { 181 rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; 182 }; 183 }; 184 185 pmic { 186 dvs_1: dvs-1 { 187 rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; 188 }; 189 190 dvs_2: dvs-2 { 191 rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; 192 }; 193 }; 194}; 195 196&usb_host0_ehci { 197 status = "disabled"; 198}; 199 200&usb_host1 { 201 status = "disabled"; 202}; 203 204&vcc50_hdmi { 205 enable-active-high; 206 gpio = <&gpio7 RK_PB3 GPIO_ACTIVE_HIGH>; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&power_hdmi_on>; 209}; 210