1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a7796 SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a7796-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a7796-sysc.h> 11 12#define CPG_AUDIO_CLK_I R8A7796_CLK_S0D4 13 14/ { 15 compatible = "renesas,r8a7796"; 16 #address-cells = <2>; 17 #size-cells = <2>; 18 19 aliases { 20 i2c0 = &i2c0; 21 i2c1 = &i2c1; 22 i2c2 = &i2c2; 23 i2c3 = &i2c3; 24 i2c4 = &i2c4; 25 i2c5 = &i2c5; 26 i2c6 = &i2c6; 27 i2c7 = &i2c_dvfs; 28 }; 29 30 /* 31 * The external audio clocks are configured as 0 Hz fixed frequency 32 * clocks by default. 33 * Boards that provide audio clocks should override them. 34 */ 35 audio_clk_a: audio_clk_a { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 audio_clk_b: audio_clk_b { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 audio_clk_c: audio_clk_c { 48 compatible = "fixed-clock"; 49 #clock-cells = <0>; 50 clock-frequency = <0>; 51 }; 52 53 /* External CAN clock - to be overridden by boards that provide it */ 54 can_clk: can { 55 compatible = "fixed-clock"; 56 #clock-cells = <0>; 57 clock-frequency = <0>; 58 }; 59 60 cluster0_opp: opp_table0 { 61 compatible = "operating-points-v2"; 62 opp-shared; 63 64 opp-500000000 { 65 opp-hz = /bits/ 64 <500000000>; 66 opp-microvolt = <820000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1000000000 { 70 opp-hz = /bits/ 64 <1000000000>; 71 opp-microvolt = <820000>; 72 clock-latency-ns = <300000>; 73 }; 74 opp-1500000000 { 75 opp-hz = /bits/ 64 <1500000000>; 76 opp-microvolt = <820000>; 77 clock-latency-ns = <300000>; 78 }; 79 opp-1600000000 { 80 opp-hz = /bits/ 64 <1600000000>; 81 opp-microvolt = <900000>; 82 clock-latency-ns = <300000>; 83 turbo-mode; 84 }; 85 opp-1700000000 { 86 opp-hz = /bits/ 64 <1700000000>; 87 opp-microvolt = <900000>; 88 clock-latency-ns = <300000>; 89 turbo-mode; 90 }; 91 opp-1800000000 { 92 opp-hz = /bits/ 64 <1800000000>; 93 opp-microvolt = <960000>; 94 clock-latency-ns = <300000>; 95 turbo-mode; 96 }; 97 }; 98 99 cluster1_opp: opp_table1 { 100 compatible = "operating-points-v2"; 101 opp-shared; 102 103 opp-800000000 { 104 opp-hz = /bits/ 64 <800000000>; 105 opp-microvolt = <820000>; 106 clock-latency-ns = <300000>; 107 }; 108 opp-1000000000 { 109 opp-hz = /bits/ 64 <1000000000>; 110 opp-microvolt = <820000>; 111 clock-latency-ns = <300000>; 112 }; 113 opp-1200000000 { 114 opp-hz = /bits/ 64 <1200000000>; 115 opp-microvolt = <820000>; 116 clock-latency-ns = <300000>; 117 }; 118 opp-1300000000 { 119 opp-hz = /bits/ 64 <1300000000>; 120 opp-microvolt = <820000>; 121 clock-latency-ns = <300000>; 122 turbo-mode; 123 }; 124 }; 125 126 cpus { 127 #address-cells = <1>; 128 #size-cells = <0>; 129 130 a57_0: cpu@0 { 131 compatible = "arm,cortex-a57", "arm,armv8"; 132 reg = <0x0>; 133 device_type = "cpu"; 134 power-domains = <&sysc R8A7796_PD_CA57_CPU0>; 135 next-level-cache = <&L2_CA57>; 136 enable-method = "psci"; 137 clocks =<&cpg CPG_CORE R8A7796_CLK_Z>; 138 operating-points-v2 = <&cluster0_opp>; 139 #cooling-cells = <2>; 140 }; 141 142 a57_1: cpu@1 { 143 compatible = "arm,cortex-a57", "arm,armv8"; 144 reg = <0x1>; 145 device_type = "cpu"; 146 power-domains = <&sysc R8A7796_PD_CA57_CPU1>; 147 next-level-cache = <&L2_CA57>; 148 enable-method = "psci"; 149 clocks =<&cpg CPG_CORE R8A7796_CLK_Z>; 150 operating-points-v2 = <&cluster0_opp>; 151 #cooling-cells = <2>; 152 }; 153 154 a53_0: cpu@100 { 155 compatible = "arm,cortex-a53", "arm,armv8"; 156 reg = <0x100>; 157 device_type = "cpu"; 158 power-domains = <&sysc R8A7796_PD_CA53_CPU0>; 159 next-level-cache = <&L2_CA53>; 160 enable-method = "psci"; 161 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; 162 operating-points-v2 = <&cluster1_opp>; 163 }; 164 165 a53_1: cpu@101 { 166 compatible = "arm,cortex-a53", "arm,armv8"; 167 reg = <0x101>; 168 device_type = "cpu"; 169 power-domains = <&sysc R8A7796_PD_CA53_CPU1>; 170 next-level-cache = <&L2_CA53>; 171 enable-method = "psci"; 172 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; 173 operating-points-v2 = <&cluster1_opp>; 174 }; 175 176 a53_2: cpu@102 { 177 compatible = "arm,cortex-a53", "arm,armv8"; 178 reg = <0x102>; 179 device_type = "cpu"; 180 power-domains = <&sysc R8A7796_PD_CA53_CPU2>; 181 next-level-cache = <&L2_CA53>; 182 enable-method = "psci"; 183 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; 184 operating-points-v2 = <&cluster1_opp>; 185 }; 186 187 a53_3: cpu@103 { 188 compatible = "arm,cortex-a53", "arm,armv8"; 189 reg = <0x103>; 190 device_type = "cpu"; 191 power-domains = <&sysc R8A7796_PD_CA53_CPU3>; 192 next-level-cache = <&L2_CA53>; 193 enable-method = "psci"; 194 clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; 195 operating-points-v2 = <&cluster1_opp>; 196 }; 197 198 L2_CA57: cache-controller-0 { 199 compatible = "cache"; 200 power-domains = <&sysc R8A7796_PD_CA57_SCU>; 201 cache-unified; 202 cache-level = <2>; 203 }; 204 205 L2_CA53: cache-controller-1 { 206 compatible = "cache"; 207 power-domains = <&sysc R8A7796_PD_CA53_SCU>; 208 cache-unified; 209 cache-level = <2>; 210 }; 211 }; 212 213 extal_clk: extal { 214 compatible = "fixed-clock"; 215 #clock-cells = <0>; 216 /* This value must be overridden by the board */ 217 clock-frequency = <0>; 218 }; 219 220 extalr_clk: extalr { 221 compatible = "fixed-clock"; 222 #clock-cells = <0>; 223 /* This value must be overridden by the board */ 224 clock-frequency = <0>; 225 }; 226 227 /* External PCIe clock - can be overridden by the board */ 228 pcie_bus_clk: pcie_bus { 229 compatible = "fixed-clock"; 230 #clock-cells = <0>; 231 clock-frequency = <0>; 232 }; 233 234 pmu_a53 { 235 compatible = "arm,cortex-a53-pmu"; 236 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 237 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 238 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 239 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 240 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 241 }; 242 243 pmu_a57 { 244 compatible = "arm,cortex-a57-pmu"; 245 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 246 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 247 interrupt-affinity = <&a57_0>, <&a57_1>; 248 }; 249 250 psci { 251 compatible = "arm,psci-1.0", "arm,psci-0.2"; 252 method = "smc"; 253 }; 254 255 /* External SCIF clock - to be overridden by boards that provide it */ 256 scif_clk: scif { 257 compatible = "fixed-clock"; 258 #clock-cells = <0>; 259 clock-frequency = <0>; 260 }; 261 262 soc { 263 compatible = "simple-bus"; 264 interrupt-parent = <&gic>; 265 #address-cells = <2>; 266 #size-cells = <2>; 267 ranges; 268 269 rwdt: watchdog@e6020000 { 270 compatible = "renesas,r8a7796-wdt", 271 "renesas,rcar-gen3-wdt"; 272 reg = <0 0xe6020000 0 0x0c>; 273 clocks = <&cpg CPG_MOD 402>; 274 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 275 resets = <&cpg 402>; 276 status = "disabled"; 277 }; 278 279 gpio0: gpio@e6050000 { 280 compatible = "renesas,gpio-r8a7796", 281 "renesas,rcar-gen3-gpio"; 282 reg = <0 0xe6050000 0 0x50>; 283 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 284 #gpio-cells = <2>; 285 gpio-controller; 286 gpio-ranges = <&pfc 0 0 16>; 287 #interrupt-cells = <2>; 288 interrupt-controller; 289 clocks = <&cpg CPG_MOD 912>; 290 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 291 resets = <&cpg 912>; 292 }; 293 294 gpio1: gpio@e6051000 { 295 compatible = "renesas,gpio-r8a7796", 296 "renesas,rcar-gen3-gpio"; 297 reg = <0 0xe6051000 0 0x50>; 298 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 299 #gpio-cells = <2>; 300 gpio-controller; 301 gpio-ranges = <&pfc 0 32 29>; 302 #interrupt-cells = <2>; 303 interrupt-controller; 304 clocks = <&cpg CPG_MOD 911>; 305 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 306 resets = <&cpg 911>; 307 }; 308 309 gpio2: gpio@e6052000 { 310 compatible = "renesas,gpio-r8a7796", 311 "renesas,rcar-gen3-gpio"; 312 reg = <0 0xe6052000 0 0x50>; 313 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 314 #gpio-cells = <2>; 315 gpio-controller; 316 gpio-ranges = <&pfc 0 64 15>; 317 #interrupt-cells = <2>; 318 interrupt-controller; 319 clocks = <&cpg CPG_MOD 910>; 320 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 321 resets = <&cpg 910>; 322 }; 323 324 gpio3: gpio@e6053000 { 325 compatible = "renesas,gpio-r8a7796", 326 "renesas,rcar-gen3-gpio"; 327 reg = <0 0xe6053000 0 0x50>; 328 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 329 #gpio-cells = <2>; 330 gpio-controller; 331 gpio-ranges = <&pfc 0 96 16>; 332 #interrupt-cells = <2>; 333 interrupt-controller; 334 clocks = <&cpg CPG_MOD 909>; 335 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 336 resets = <&cpg 909>; 337 }; 338 339 gpio4: gpio@e6054000 { 340 compatible = "renesas,gpio-r8a7796", 341 "renesas,rcar-gen3-gpio"; 342 reg = <0 0xe6054000 0 0x50>; 343 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 344 #gpio-cells = <2>; 345 gpio-controller; 346 gpio-ranges = <&pfc 0 128 18>; 347 #interrupt-cells = <2>; 348 interrupt-controller; 349 clocks = <&cpg CPG_MOD 908>; 350 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 351 resets = <&cpg 908>; 352 }; 353 354 gpio5: gpio@e6055000 { 355 compatible = "renesas,gpio-r8a7796", 356 "renesas,rcar-gen3-gpio"; 357 reg = <0 0xe6055000 0 0x50>; 358 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 359 #gpio-cells = <2>; 360 gpio-controller; 361 gpio-ranges = <&pfc 0 160 26>; 362 #interrupt-cells = <2>; 363 interrupt-controller; 364 clocks = <&cpg CPG_MOD 907>; 365 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 366 resets = <&cpg 907>; 367 }; 368 369 gpio6: gpio@e6055400 { 370 compatible = "renesas,gpio-r8a7796", 371 "renesas,rcar-gen3-gpio"; 372 reg = <0 0xe6055400 0 0x50>; 373 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 374 #gpio-cells = <2>; 375 gpio-controller; 376 gpio-ranges = <&pfc 0 192 32>; 377 #interrupt-cells = <2>; 378 interrupt-controller; 379 clocks = <&cpg CPG_MOD 906>; 380 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 381 resets = <&cpg 906>; 382 }; 383 384 gpio7: gpio@e6055800 { 385 compatible = "renesas,gpio-r8a7796", 386 "renesas,rcar-gen3-gpio"; 387 reg = <0 0xe6055800 0 0x50>; 388 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 389 #gpio-cells = <2>; 390 gpio-controller; 391 gpio-ranges = <&pfc 0 224 4>; 392 #interrupt-cells = <2>; 393 interrupt-controller; 394 clocks = <&cpg CPG_MOD 905>; 395 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 396 resets = <&cpg 905>; 397 }; 398 399 pfc: pin-controller@e6060000 { 400 compatible = "renesas,pfc-r8a7796"; 401 reg = <0 0xe6060000 0 0x50c>; 402 }; 403 404 cpg: clock-controller@e6150000 { 405 compatible = "renesas,r8a7796-cpg-mssr"; 406 reg = <0 0xe6150000 0 0x1000>; 407 clocks = <&extal_clk>, <&extalr_clk>; 408 clock-names = "extal", "extalr"; 409 #clock-cells = <2>; 410 #power-domain-cells = <0>; 411 #reset-cells = <1>; 412 }; 413 414 rst: reset-controller@e6160000 { 415 compatible = "renesas,r8a7796-rst"; 416 reg = <0 0xe6160000 0 0x0200>; 417 }; 418 419 sysc: system-controller@e6180000 { 420 compatible = "renesas,r8a7796-sysc"; 421 reg = <0 0xe6180000 0 0x0400>; 422 #power-domain-cells = <1>; 423 }; 424 425 tsc: thermal@e6198000 { 426 compatible = "renesas,r8a7796-thermal"; 427 reg = <0 0xe6198000 0 0x100>, 428 <0 0xe61a0000 0 0x100>, 429 <0 0xe61a8000 0 0x100>; 430 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 431 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 432 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 433 clocks = <&cpg CPG_MOD 522>; 434 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 435 resets = <&cpg 522>; 436 #thermal-sensor-cells = <1>; 437 status = "okay"; 438 }; 439 440 intc_ex: interrupt-controller@e61c0000 { 441 compatible = "renesas,intc-ex-r8a7796", "renesas,irqc"; 442 #interrupt-cells = <2>; 443 interrupt-controller; 444 reg = <0 0xe61c0000 0 0x200>; 445 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 446 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 447 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 448 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 449 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 450 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 451 clocks = <&cpg CPG_MOD 407>; 452 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 453 resets = <&cpg 407>; 454 }; 455 456 i2c0: i2c@e6500000 { 457 #address-cells = <1>; 458 #size-cells = <0>; 459 compatible = "renesas,i2c-r8a7796", 460 "renesas,rcar-gen3-i2c"; 461 reg = <0 0xe6500000 0 0x40>; 462 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 463 clocks = <&cpg CPG_MOD 931>; 464 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 465 resets = <&cpg 931>; 466 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 467 <&dmac2 0x91>, <&dmac2 0x90>; 468 dma-names = "tx", "rx", "tx", "rx"; 469 i2c-scl-internal-delay-ns = <110>; 470 status = "disabled"; 471 }; 472 473 i2c1: i2c@e6508000 { 474 #address-cells = <1>; 475 #size-cells = <0>; 476 compatible = "renesas,i2c-r8a7796", 477 "renesas,rcar-gen3-i2c"; 478 reg = <0 0xe6508000 0 0x40>; 479 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 480 clocks = <&cpg CPG_MOD 930>; 481 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 482 resets = <&cpg 930>; 483 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 484 <&dmac2 0x93>, <&dmac2 0x92>; 485 dma-names = "tx", "rx", "tx", "rx"; 486 i2c-scl-internal-delay-ns = <6>; 487 status = "disabled"; 488 }; 489 490 i2c2: i2c@e6510000 { 491 #address-cells = <1>; 492 #size-cells = <0>; 493 compatible = "renesas,i2c-r8a7796", 494 "renesas,rcar-gen3-i2c"; 495 reg = <0 0xe6510000 0 0x40>; 496 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 497 clocks = <&cpg CPG_MOD 929>; 498 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 499 resets = <&cpg 929>; 500 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 501 <&dmac2 0x95>, <&dmac2 0x94>; 502 dma-names = "tx", "rx", "tx", "rx"; 503 i2c-scl-internal-delay-ns = <6>; 504 status = "disabled"; 505 }; 506 507 i2c3: i2c@e66d0000 { 508 #address-cells = <1>; 509 #size-cells = <0>; 510 compatible = "renesas,i2c-r8a7796", 511 "renesas,rcar-gen3-i2c"; 512 reg = <0 0xe66d0000 0 0x40>; 513 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 514 clocks = <&cpg CPG_MOD 928>; 515 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 516 resets = <&cpg 928>; 517 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 518 dma-names = "tx", "rx"; 519 i2c-scl-internal-delay-ns = <110>; 520 status = "disabled"; 521 }; 522 523 i2c4: i2c@e66d8000 { 524 #address-cells = <1>; 525 #size-cells = <0>; 526 compatible = "renesas,i2c-r8a7796", 527 "renesas,rcar-gen3-i2c"; 528 reg = <0 0xe66d8000 0 0x40>; 529 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 927>; 531 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 532 resets = <&cpg 927>; 533 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 534 dma-names = "tx", "rx"; 535 i2c-scl-internal-delay-ns = <110>; 536 status = "disabled"; 537 }; 538 539 i2c5: i2c@e66e0000 { 540 #address-cells = <1>; 541 #size-cells = <0>; 542 compatible = "renesas,i2c-r8a7796", 543 "renesas,rcar-gen3-i2c"; 544 reg = <0 0xe66e0000 0 0x40>; 545 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 546 clocks = <&cpg CPG_MOD 919>; 547 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 548 resets = <&cpg 919>; 549 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 550 dma-names = "tx", "rx"; 551 i2c-scl-internal-delay-ns = <110>; 552 status = "disabled"; 553 }; 554 555 i2c6: i2c@e66e8000 { 556 #address-cells = <1>; 557 #size-cells = <0>; 558 compatible = "renesas,i2c-r8a7796", 559 "renesas,rcar-gen3-i2c"; 560 reg = <0 0xe66e8000 0 0x40>; 561 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 562 clocks = <&cpg CPG_MOD 918>; 563 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 564 resets = <&cpg 918>; 565 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 566 dma-names = "tx", "rx"; 567 i2c-scl-internal-delay-ns = <6>; 568 status = "disabled"; 569 }; 570 571 i2c_dvfs: i2c@e60b0000 { 572 #address-cells = <1>; 573 #size-cells = <0>; 574 compatible = "renesas,iic-r8a7796", 575 "renesas,rcar-gen3-iic", 576 "renesas,rmobile-iic"; 577 reg = <0 0xe60b0000 0 0x425>; 578 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 926>; 580 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 581 resets = <&cpg 926>; 582 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 583 dma-names = "tx", "rx"; 584 status = "disabled"; 585 }; 586 587 hscif0: serial@e6540000 { 588 compatible = "renesas,hscif-r8a7796", 589 "renesas,rcar-gen3-hscif", 590 "renesas,hscif"; 591 reg = <0 0xe6540000 0 0x60>; 592 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 593 clocks = <&cpg CPG_MOD 520>, 594 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 595 <&scif_clk>; 596 clock-names = "fck", "brg_int", "scif_clk"; 597 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 598 <&dmac2 0x31>, <&dmac2 0x30>; 599 dma-names = "tx", "rx", "tx", "rx"; 600 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 601 resets = <&cpg 520>; 602 status = "disabled"; 603 }; 604 605 hscif1: serial@e6550000 { 606 compatible = "renesas,hscif-r8a7796", 607 "renesas,rcar-gen3-hscif", 608 "renesas,hscif"; 609 reg = <0 0xe6550000 0 0x60>; 610 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 611 clocks = <&cpg CPG_MOD 519>, 612 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 613 <&scif_clk>; 614 clock-names = "fck", "brg_int", "scif_clk"; 615 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 616 <&dmac2 0x33>, <&dmac2 0x32>; 617 dma-names = "tx", "rx", "tx", "rx"; 618 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 619 resets = <&cpg 519>; 620 status = "disabled"; 621 }; 622 623 hscif2: serial@e6560000 { 624 compatible = "renesas,hscif-r8a7796", 625 "renesas,rcar-gen3-hscif", 626 "renesas,hscif"; 627 reg = <0 0xe6560000 0 0x60>; 628 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 629 clocks = <&cpg CPG_MOD 518>, 630 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 631 <&scif_clk>; 632 clock-names = "fck", "brg_int", "scif_clk"; 633 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 634 <&dmac2 0x35>, <&dmac2 0x34>; 635 dma-names = "tx", "rx", "tx", "rx"; 636 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 637 resets = <&cpg 518>; 638 status = "disabled"; 639 }; 640 641 hscif3: serial@e66a0000 { 642 compatible = "renesas,hscif-r8a7796", 643 "renesas,rcar-gen3-hscif", 644 "renesas,hscif"; 645 reg = <0 0xe66a0000 0 0x60>; 646 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 647 clocks = <&cpg CPG_MOD 517>, 648 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 649 <&scif_clk>; 650 clock-names = "fck", "brg_int", "scif_clk"; 651 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 652 dma-names = "tx", "rx"; 653 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 654 resets = <&cpg 517>; 655 status = "disabled"; 656 }; 657 658 hscif4: serial@e66b0000 { 659 compatible = "renesas,hscif-r8a7796", 660 "renesas,rcar-gen3-hscif", 661 "renesas,hscif"; 662 reg = <0 0xe66b0000 0 0x60>; 663 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 664 clocks = <&cpg CPG_MOD 516>, 665 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 666 <&scif_clk>; 667 clock-names = "fck", "brg_int", "scif_clk"; 668 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 669 dma-names = "tx", "rx"; 670 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 671 resets = <&cpg 516>; 672 status = "disabled"; 673 }; 674 675 hsusb: usb@e6590000 { 676 compatible = "renesas,usbhs-r8a7796", 677 "renesas,rcar-gen3-usbhs"; 678 reg = <0 0xe6590000 0 0x100>; 679 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 680 clocks = <&cpg CPG_MOD 704>; 681 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 682 <&usb_dmac1 0>, <&usb_dmac1 1>; 683 dma-names = "ch0", "ch1", "ch2", "ch3"; 684 renesas,buswait = <11>; 685 phys = <&usb2_phy0>; 686 phy-names = "usb"; 687 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 688 resets = <&cpg 704>; 689 status = "disabled"; 690 }; 691 692 usb_dmac0: dma-controller@e65a0000 { 693 compatible = "renesas,r8a7796-usb-dmac", 694 "renesas,usb-dmac"; 695 reg = <0 0xe65a0000 0 0x100>; 696 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 697 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 698 interrupt-names = "ch0", "ch1"; 699 clocks = <&cpg CPG_MOD 330>; 700 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 701 resets = <&cpg 330>; 702 #dma-cells = <1>; 703 dma-channels = <2>; 704 }; 705 706 usb_dmac1: dma-controller@e65b0000 { 707 compatible = "renesas,r8a7796-usb-dmac", 708 "renesas,usb-dmac"; 709 reg = <0 0xe65b0000 0 0x100>; 710 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 711 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 712 interrupt-names = "ch0", "ch1"; 713 clocks = <&cpg CPG_MOD 331>; 714 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 715 resets = <&cpg 331>; 716 #dma-cells = <1>; 717 dma-channels = <2>; 718 }; 719 720 usb3_phy0: usb-phy@e65ee000 { 721 compatible = "renesas,r8a7796-usb3-phy", 722 "renesas,rcar-gen3-usb3-phy"; 723 reg = <0 0xe65ee000 0 0x90>; 724 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 725 <&usb_extal_clk>; 726 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 727 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 728 resets = <&cpg 328>; 729 #phy-cells = <0>; 730 status = "disabled"; 731 }; 732 733 dmac0: dma-controller@e6700000 { 734 compatible = "renesas,dmac-r8a7796", 735 "renesas,rcar-dmac"; 736 reg = <0 0xe6700000 0 0x10000>; 737 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 738 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 739 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 740 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 741 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 742 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 743 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 744 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 745 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 746 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 747 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 748 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 749 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 750 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 751 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 752 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 753 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 754 interrupt-names = "error", 755 "ch0", "ch1", "ch2", "ch3", 756 "ch4", "ch5", "ch6", "ch7", 757 "ch8", "ch9", "ch10", "ch11", 758 "ch12", "ch13", "ch14", "ch15"; 759 clocks = <&cpg CPG_MOD 219>; 760 clock-names = "fck"; 761 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 762 resets = <&cpg 219>; 763 #dma-cells = <1>; 764 dma-channels = <16>; 765 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 766 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 767 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 768 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 769 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 770 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 771 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 772 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 773 }; 774 775 dmac1: dma-controller@e7300000 { 776 compatible = "renesas,dmac-r8a7796", 777 "renesas,rcar-dmac"; 778 reg = <0 0xe7300000 0 0x10000>; 779 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 780 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 781 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 782 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 783 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 784 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 785 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 786 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 787 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 788 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 789 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 790 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 791 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 792 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 793 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 794 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 795 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 796 interrupt-names = "error", 797 "ch0", "ch1", "ch2", "ch3", 798 "ch4", "ch5", "ch6", "ch7", 799 "ch8", "ch9", "ch10", "ch11", 800 "ch12", "ch13", "ch14", "ch15"; 801 clocks = <&cpg CPG_MOD 218>; 802 clock-names = "fck"; 803 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 804 resets = <&cpg 218>; 805 #dma-cells = <1>; 806 dma-channels = <16>; 807 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 808 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 809 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 810 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 811 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 812 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 813 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 814 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 815 }; 816 817 dmac2: dma-controller@e7310000 { 818 compatible = "renesas,dmac-r8a7796", 819 "renesas,rcar-dmac"; 820 reg = <0 0xe7310000 0 0x10000>; 821 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 822 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 823 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 824 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 825 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 826 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 827 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 828 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 829 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 830 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 831 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 832 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 833 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 834 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 835 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 836 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 837 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 838 interrupt-names = "error", 839 "ch0", "ch1", "ch2", "ch3", 840 "ch4", "ch5", "ch6", "ch7", 841 "ch8", "ch9", "ch10", "ch11", 842 "ch12", "ch13", "ch14", "ch15"; 843 clocks = <&cpg CPG_MOD 217>; 844 clock-names = "fck"; 845 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 846 resets = <&cpg 217>; 847 #dma-cells = <1>; 848 dma-channels = <16>; 849 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 850 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 851 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 852 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 853 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 854 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 855 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 856 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 857 }; 858 859 ipmmu_ds0: mmu@e6740000 { 860 compatible = "renesas,ipmmu-r8a7796"; 861 reg = <0 0xe6740000 0 0x1000>; 862 renesas,ipmmu-main = <&ipmmu_mm 0>; 863 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 864 #iommu-cells = <1>; 865 }; 866 867 ipmmu_ds1: mmu@e7740000 { 868 compatible = "renesas,ipmmu-r8a7796"; 869 reg = <0 0xe7740000 0 0x1000>; 870 renesas,ipmmu-main = <&ipmmu_mm 1>; 871 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 872 #iommu-cells = <1>; 873 }; 874 875 ipmmu_hc: mmu@e6570000 { 876 compatible = "renesas,ipmmu-r8a7796"; 877 reg = <0 0xe6570000 0 0x1000>; 878 renesas,ipmmu-main = <&ipmmu_mm 2>; 879 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 880 #iommu-cells = <1>; 881 }; 882 883 ipmmu_ir: mmu@ff8b0000 { 884 compatible = "renesas,ipmmu-r8a7796"; 885 reg = <0 0xff8b0000 0 0x1000>; 886 renesas,ipmmu-main = <&ipmmu_mm 3>; 887 power-domains = <&sysc R8A7796_PD_A3IR>; 888 #iommu-cells = <1>; 889 }; 890 891 ipmmu_mm: mmu@e67b0000 { 892 compatible = "renesas,ipmmu-r8a7796"; 893 reg = <0 0xe67b0000 0 0x1000>; 894 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 896 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 897 #iommu-cells = <1>; 898 }; 899 900 ipmmu_mp: mmu@ec670000 { 901 compatible = "renesas,ipmmu-r8a7796"; 902 reg = <0 0xec670000 0 0x1000>; 903 renesas,ipmmu-main = <&ipmmu_mm 4>; 904 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 905 #iommu-cells = <1>; 906 }; 907 908 ipmmu_pv0: mmu@fd800000 { 909 compatible = "renesas,ipmmu-r8a7796"; 910 reg = <0 0xfd800000 0 0x1000>; 911 renesas,ipmmu-main = <&ipmmu_mm 5>; 912 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 913 #iommu-cells = <1>; 914 }; 915 916 ipmmu_pv1: mmu@fd950000 { 917 compatible = "renesas,ipmmu-r8a7796"; 918 reg = <0 0xfd950000 0 0x1000>; 919 renesas,ipmmu-main = <&ipmmu_mm 6>; 920 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 921 #iommu-cells = <1>; 922 }; 923 924 ipmmu_rt: mmu@ffc80000 { 925 compatible = "renesas,ipmmu-r8a7796"; 926 reg = <0 0xffc80000 0 0x1000>; 927 renesas,ipmmu-main = <&ipmmu_mm 7>; 928 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 929 #iommu-cells = <1>; 930 }; 931 932 ipmmu_vc0: mmu@fe6b0000 { 933 compatible = "renesas,ipmmu-r8a7796"; 934 reg = <0 0xfe6b0000 0 0x1000>; 935 renesas,ipmmu-main = <&ipmmu_mm 8>; 936 power-domains = <&sysc R8A7796_PD_A3VC>; 937 #iommu-cells = <1>; 938 }; 939 940 ipmmu_vi0: mmu@febd0000 { 941 compatible = "renesas,ipmmu-r8a7796"; 942 reg = <0 0xfebd0000 0 0x1000>; 943 renesas,ipmmu-main = <&ipmmu_mm 9>; 944 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 945 #iommu-cells = <1>; 946 }; 947 948 avb: ethernet@e6800000 { 949 compatible = "renesas,etheravb-r8a7796", 950 "renesas,etheravb-rcar-gen3"; 951 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 952 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 961 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 962 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 963 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 964 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 965 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 966 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 967 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 968 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 969 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 970 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 971 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 972 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 973 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 974 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 975 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 976 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 977 interrupt-names = "ch0", "ch1", "ch2", "ch3", 978 "ch4", "ch5", "ch6", "ch7", 979 "ch8", "ch9", "ch10", "ch11", 980 "ch12", "ch13", "ch14", "ch15", 981 "ch16", "ch17", "ch18", "ch19", 982 "ch20", "ch21", "ch22", "ch23", 983 "ch24"; 984 clocks = <&cpg CPG_MOD 812>; 985 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 986 resets = <&cpg 812>; 987 phy-mode = "rgmii"; 988 iommus = <&ipmmu_ds0 16>; 989 #address-cells = <1>; 990 #size-cells = <0>; 991 status = "disabled"; 992 }; 993 994 can0: can@e6c30000 { 995 compatible = "renesas,can-r8a7796", 996 "renesas,rcar-gen3-can"; 997 reg = <0 0xe6c30000 0 0x1000>; 998 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 999 clocks = <&cpg CPG_MOD 916>, 1000 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1001 <&can_clk>; 1002 clock-names = "clkp1", "clkp2", "can_clk"; 1003 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1004 assigned-clock-rates = <40000000>; 1005 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1006 resets = <&cpg 916>; 1007 status = "disabled"; 1008 }; 1009 1010 can1: can@e6c38000 { 1011 compatible = "renesas,can-r8a7796", 1012 "renesas,rcar-gen3-can"; 1013 reg = <0 0xe6c38000 0 0x1000>; 1014 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1015 clocks = <&cpg CPG_MOD 915>, 1016 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1017 <&can_clk>; 1018 clock-names = "clkp1", "clkp2", "can_clk"; 1019 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1020 assigned-clock-rates = <40000000>; 1021 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1022 resets = <&cpg 915>; 1023 status = "disabled"; 1024 }; 1025 1026 canfd: can@e66c0000 { 1027 compatible = "renesas,r8a7796-canfd", 1028 "renesas,rcar-gen3-canfd"; 1029 reg = <0 0xe66c0000 0 0x8000>; 1030 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1032 clocks = <&cpg CPG_MOD 914>, 1033 <&cpg CPG_CORE R8A7796_CLK_CANFD>, 1034 <&can_clk>; 1035 clock-names = "fck", "canfd", "can_clk"; 1036 assigned-clocks = <&cpg CPG_CORE R8A7796_CLK_CANFD>; 1037 assigned-clock-rates = <40000000>; 1038 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1039 resets = <&cpg 914>; 1040 status = "disabled"; 1041 1042 channel0 { 1043 status = "disabled"; 1044 }; 1045 1046 channel1 { 1047 status = "disabled"; 1048 }; 1049 }; 1050 1051 pwm0: pwm@e6e30000 { 1052 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1053 reg = <0 0xe6e30000 0 8>; 1054 #pwm-cells = <2>; 1055 clocks = <&cpg CPG_MOD 523>; 1056 resets = <&cpg 523>; 1057 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1058 status = "disabled"; 1059 }; 1060 1061 pwm1: pwm@e6e31000 { 1062 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1063 reg = <0 0xe6e31000 0 8>; 1064 #pwm-cells = <2>; 1065 clocks = <&cpg CPG_MOD 523>; 1066 resets = <&cpg 523>; 1067 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1068 status = "disabled"; 1069 }; 1070 1071 pwm2: pwm@e6e32000 { 1072 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1073 reg = <0 0xe6e32000 0 8>; 1074 #pwm-cells = <2>; 1075 clocks = <&cpg CPG_MOD 523>; 1076 resets = <&cpg 523>; 1077 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1078 status = "disabled"; 1079 }; 1080 1081 pwm3: pwm@e6e33000 { 1082 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1083 reg = <0 0xe6e33000 0 8>; 1084 #pwm-cells = <2>; 1085 clocks = <&cpg CPG_MOD 523>; 1086 resets = <&cpg 523>; 1087 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1088 status = "disabled"; 1089 }; 1090 1091 pwm4: pwm@e6e34000 { 1092 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1093 reg = <0 0xe6e34000 0 8>; 1094 #pwm-cells = <2>; 1095 clocks = <&cpg CPG_MOD 523>; 1096 resets = <&cpg 523>; 1097 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1098 status = "disabled"; 1099 }; 1100 1101 pwm5: pwm@e6e35000 { 1102 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1103 reg = <0 0xe6e35000 0 8>; 1104 #pwm-cells = <2>; 1105 clocks = <&cpg CPG_MOD 523>; 1106 resets = <&cpg 523>; 1107 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1108 status = "disabled"; 1109 }; 1110 1111 pwm6: pwm@e6e36000 { 1112 compatible = "renesas,pwm-r8a7796", "renesas,pwm-rcar"; 1113 reg = <0 0xe6e36000 0 8>; 1114 #pwm-cells = <2>; 1115 clocks = <&cpg CPG_MOD 523>; 1116 resets = <&cpg 523>; 1117 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1118 status = "disabled"; 1119 }; 1120 1121 scif0: serial@e6e60000 { 1122 compatible = "renesas,scif-r8a7796", 1123 "renesas,rcar-gen3-scif", "renesas,scif"; 1124 reg = <0 0xe6e60000 0 64>; 1125 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1126 clocks = <&cpg CPG_MOD 207>, 1127 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1128 <&scif_clk>; 1129 clock-names = "fck", "brg_int", "scif_clk"; 1130 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1131 <&dmac2 0x51>, <&dmac2 0x50>; 1132 dma-names = "tx", "rx", "tx", "rx"; 1133 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1134 resets = <&cpg 207>; 1135 status = "disabled"; 1136 }; 1137 1138 scif1: serial@e6e68000 { 1139 compatible = "renesas,scif-r8a7796", 1140 "renesas,rcar-gen3-scif", "renesas,scif"; 1141 reg = <0 0xe6e68000 0 64>; 1142 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1143 clocks = <&cpg CPG_MOD 206>, 1144 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1145 <&scif_clk>; 1146 clock-names = "fck", "brg_int", "scif_clk"; 1147 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1148 <&dmac2 0x53>, <&dmac2 0x52>; 1149 dma-names = "tx", "rx", "tx", "rx"; 1150 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1151 resets = <&cpg 206>; 1152 status = "disabled"; 1153 }; 1154 1155 scif2: serial@e6e88000 { 1156 compatible = "renesas,scif-r8a7796", 1157 "renesas,rcar-gen3-scif", "renesas,scif"; 1158 reg = <0 0xe6e88000 0 64>; 1159 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1160 clocks = <&cpg CPG_MOD 310>, 1161 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1162 <&scif_clk>; 1163 clock-names = "fck", "brg_int", "scif_clk"; 1164 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1165 <&dmac2 0x13>, <&dmac2 0x12>; 1166 dma-names = "tx", "rx", "tx", "rx"; 1167 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1168 resets = <&cpg 310>; 1169 status = "disabled"; 1170 }; 1171 1172 scif3: serial@e6c50000 { 1173 compatible = "renesas,scif-r8a7796", 1174 "renesas,rcar-gen3-scif", "renesas,scif"; 1175 reg = <0 0xe6c50000 0 64>; 1176 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1177 clocks = <&cpg CPG_MOD 204>, 1178 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1179 <&scif_clk>; 1180 clock-names = "fck", "brg_int", "scif_clk"; 1181 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1182 dma-names = "tx", "rx"; 1183 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1184 resets = <&cpg 204>; 1185 status = "disabled"; 1186 }; 1187 1188 scif4: serial@e6c40000 { 1189 compatible = "renesas,scif-r8a7796", 1190 "renesas,rcar-gen3-scif", "renesas,scif"; 1191 reg = <0 0xe6c40000 0 64>; 1192 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1193 clocks = <&cpg CPG_MOD 203>, 1194 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1195 <&scif_clk>; 1196 clock-names = "fck", "brg_int", "scif_clk"; 1197 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1198 dma-names = "tx", "rx"; 1199 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1200 resets = <&cpg 203>; 1201 status = "disabled"; 1202 }; 1203 1204 scif5: serial@e6f30000 { 1205 compatible = "renesas,scif-r8a7796", 1206 "renesas,rcar-gen3-scif", "renesas,scif"; 1207 reg = <0 0xe6f30000 0 64>; 1208 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1209 clocks = <&cpg CPG_MOD 202>, 1210 <&cpg CPG_CORE R8A7796_CLK_S3D1>, 1211 <&scif_clk>; 1212 clock-names = "fck", "brg_int", "scif_clk"; 1213 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1214 <&dmac2 0x5b>, <&dmac2 0x5a>; 1215 dma-names = "tx", "rx", "tx", "rx"; 1216 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1217 resets = <&cpg 202>; 1218 status = "disabled"; 1219 }; 1220 1221 msiof0: spi@e6e90000 { 1222 compatible = "renesas,msiof-r8a7796", 1223 "renesas,rcar-gen3-msiof"; 1224 reg = <0 0xe6e90000 0 0x0064>; 1225 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1226 clocks = <&cpg CPG_MOD 211>; 1227 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1228 <&dmac2 0x41>, <&dmac2 0x40>; 1229 dma-names = "tx", "rx", "tx", "rx"; 1230 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1231 resets = <&cpg 211>; 1232 #address-cells = <1>; 1233 #size-cells = <0>; 1234 status = "disabled"; 1235 }; 1236 1237 msiof1: spi@e6ea0000 { 1238 compatible = "renesas,msiof-r8a7796", 1239 "renesas,rcar-gen3-msiof"; 1240 reg = <0 0xe6ea0000 0 0x0064>; 1241 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1242 clocks = <&cpg CPG_MOD 210>; 1243 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1244 <&dmac2 0x43>, <&dmac2 0x42>; 1245 dma-names = "tx", "rx", "tx", "rx"; 1246 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1247 resets = <&cpg 210>; 1248 #address-cells = <1>; 1249 #size-cells = <0>; 1250 status = "disabled"; 1251 }; 1252 1253 msiof2: spi@e6c00000 { 1254 compatible = "renesas,msiof-r8a7796", 1255 "renesas,rcar-gen3-msiof"; 1256 reg = <0 0xe6c00000 0 0x0064>; 1257 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1258 clocks = <&cpg CPG_MOD 209>; 1259 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1260 dma-names = "tx", "rx"; 1261 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1262 resets = <&cpg 209>; 1263 #address-cells = <1>; 1264 #size-cells = <0>; 1265 status = "disabled"; 1266 }; 1267 1268 msiof3: spi@e6c10000 { 1269 compatible = "renesas,msiof-r8a7796", 1270 "renesas,rcar-gen3-msiof"; 1271 reg = <0 0xe6c10000 0 0x0064>; 1272 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1273 clocks = <&cpg CPG_MOD 208>; 1274 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1275 dma-names = "tx", "rx"; 1276 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1277 resets = <&cpg 208>; 1278 #address-cells = <1>; 1279 #size-cells = <0>; 1280 status = "disabled"; 1281 }; 1282 1283 vin0: video@e6ef0000 { 1284 compatible = "renesas,vin-r8a7796"; 1285 reg = <0 0xe6ef0000 0 0x1000>; 1286 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1287 clocks = <&cpg CPG_MOD 811>; 1288 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1289 resets = <&cpg 811>; 1290 renesas,id = <0>; 1291 status = "disabled"; 1292 1293 ports { 1294 #address-cells = <1>; 1295 #size-cells = <0>; 1296 1297 port@1 { 1298 #address-cells = <1>; 1299 #size-cells = <0>; 1300 1301 reg = <1>; 1302 1303 vin0csi20: endpoint@0 { 1304 reg = <0>; 1305 remote-endpoint= <&csi20vin0>; 1306 }; 1307 vin0csi40: endpoint@2 { 1308 reg = <2>; 1309 remote-endpoint= <&csi40vin0>; 1310 }; 1311 }; 1312 }; 1313 }; 1314 1315 vin1: video@e6ef1000 { 1316 compatible = "renesas,vin-r8a7796"; 1317 reg = <0 0xe6ef1000 0 0x1000>; 1318 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1319 clocks = <&cpg CPG_MOD 810>; 1320 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1321 resets = <&cpg 810>; 1322 renesas,id = <1>; 1323 status = "disabled"; 1324 1325 ports { 1326 #address-cells = <1>; 1327 #size-cells = <0>; 1328 1329 port@1 { 1330 #address-cells = <1>; 1331 #size-cells = <0>; 1332 1333 reg = <1>; 1334 1335 vin1csi20: endpoint@0 { 1336 reg = <0>; 1337 remote-endpoint= <&csi20vin1>; 1338 }; 1339 vin1csi40: endpoint@2 { 1340 reg = <2>; 1341 remote-endpoint= <&csi40vin1>; 1342 }; 1343 }; 1344 }; 1345 }; 1346 1347 vin2: video@e6ef2000 { 1348 compatible = "renesas,vin-r8a7796"; 1349 reg = <0 0xe6ef2000 0 0x1000>; 1350 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1351 clocks = <&cpg CPG_MOD 809>; 1352 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1353 resets = <&cpg 809>; 1354 renesas,id = <2>; 1355 status = "disabled"; 1356 1357 ports { 1358 #address-cells = <1>; 1359 #size-cells = <0>; 1360 1361 port@1 { 1362 #address-cells = <1>; 1363 #size-cells = <0>; 1364 1365 reg = <1>; 1366 1367 vin2csi20: endpoint@0 { 1368 reg = <0>; 1369 remote-endpoint= <&csi20vin2>; 1370 }; 1371 vin2csi40: endpoint@2 { 1372 reg = <2>; 1373 remote-endpoint= <&csi40vin2>; 1374 }; 1375 }; 1376 }; 1377 }; 1378 1379 vin3: video@e6ef3000 { 1380 compatible = "renesas,vin-r8a7796"; 1381 reg = <0 0xe6ef3000 0 0x1000>; 1382 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1383 clocks = <&cpg CPG_MOD 808>; 1384 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1385 resets = <&cpg 808>; 1386 renesas,id = <3>; 1387 status = "disabled"; 1388 1389 ports { 1390 #address-cells = <1>; 1391 #size-cells = <0>; 1392 1393 port@1 { 1394 #address-cells = <1>; 1395 #size-cells = <0>; 1396 1397 reg = <1>; 1398 1399 vin3csi20: endpoint@0 { 1400 reg = <0>; 1401 remote-endpoint= <&csi20vin3>; 1402 }; 1403 vin3csi40: endpoint@2 { 1404 reg = <2>; 1405 remote-endpoint= <&csi40vin3>; 1406 }; 1407 }; 1408 }; 1409 }; 1410 1411 vin4: video@e6ef4000 { 1412 compatible = "renesas,vin-r8a7796"; 1413 reg = <0 0xe6ef4000 0 0x1000>; 1414 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1415 clocks = <&cpg CPG_MOD 807>; 1416 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1417 resets = <&cpg 807>; 1418 renesas,id = <4>; 1419 status = "disabled"; 1420 1421 ports { 1422 #address-cells = <1>; 1423 #size-cells = <0>; 1424 1425 port@1 { 1426 #address-cells = <1>; 1427 #size-cells = <0>; 1428 1429 reg = <1>; 1430 1431 vin4csi20: endpoint@0 { 1432 reg = <0>; 1433 remote-endpoint= <&csi20vin4>; 1434 }; 1435 vin4csi40: endpoint@2 { 1436 reg = <2>; 1437 remote-endpoint= <&csi40vin4>; 1438 }; 1439 }; 1440 }; 1441 }; 1442 1443 vin5: video@e6ef5000 { 1444 compatible = "renesas,vin-r8a7796"; 1445 reg = <0 0xe6ef5000 0 0x1000>; 1446 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1447 clocks = <&cpg CPG_MOD 806>; 1448 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1449 resets = <&cpg 806>; 1450 renesas,id = <5>; 1451 status = "disabled"; 1452 1453 ports { 1454 #address-cells = <1>; 1455 #size-cells = <0>; 1456 1457 port@1 { 1458 #address-cells = <1>; 1459 #size-cells = <0>; 1460 1461 reg = <1>; 1462 1463 vin5csi20: endpoint@0 { 1464 reg = <0>; 1465 remote-endpoint= <&csi20vin5>; 1466 }; 1467 vin5csi40: endpoint@2 { 1468 reg = <2>; 1469 remote-endpoint= <&csi40vin5>; 1470 }; 1471 }; 1472 }; 1473 }; 1474 1475 vin6: video@e6ef6000 { 1476 compatible = "renesas,vin-r8a7796"; 1477 reg = <0 0xe6ef6000 0 0x1000>; 1478 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1479 clocks = <&cpg CPG_MOD 805>; 1480 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1481 resets = <&cpg 805>; 1482 renesas,id = <6>; 1483 status = "disabled"; 1484 1485 ports { 1486 #address-cells = <1>; 1487 #size-cells = <0>; 1488 1489 port@1 { 1490 #address-cells = <1>; 1491 #size-cells = <0>; 1492 1493 reg = <1>; 1494 1495 vin6csi20: endpoint@0 { 1496 reg = <0>; 1497 remote-endpoint= <&csi20vin6>; 1498 }; 1499 vin6csi40: endpoint@2 { 1500 reg = <2>; 1501 remote-endpoint= <&csi40vin6>; 1502 }; 1503 }; 1504 }; 1505 }; 1506 1507 vin7: video@e6ef7000 { 1508 compatible = "renesas,vin-r8a7796"; 1509 reg = <0 0xe6ef7000 0 0x1000>; 1510 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1511 clocks = <&cpg CPG_MOD 804>; 1512 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1513 resets = <&cpg 804>; 1514 renesas,id = <7>; 1515 status = "disabled"; 1516 1517 ports { 1518 #address-cells = <1>; 1519 #size-cells = <0>; 1520 1521 port@1 { 1522 #address-cells = <1>; 1523 #size-cells = <0>; 1524 1525 reg = <1>; 1526 1527 vin7csi20: endpoint@0 { 1528 reg = <0>; 1529 remote-endpoint= <&csi20vin7>; 1530 }; 1531 vin7csi40: endpoint@2 { 1532 reg = <2>; 1533 remote-endpoint= <&csi40vin7>; 1534 }; 1535 }; 1536 }; 1537 }; 1538 1539 drif00: rif@e6f40000 { 1540 compatible = "renesas,r8a7796-drif", 1541 "renesas,rcar-gen3-drif"; 1542 reg = <0 0xe6f40000 0 0x64>; 1543 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1544 clocks = <&cpg CPG_MOD 515>; 1545 clock-names = "fck"; 1546 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1547 dma-names = "rx", "rx"; 1548 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1549 resets = <&cpg 515>; 1550 renesas,bonding = <&drif01>; 1551 status = "disabled"; 1552 }; 1553 1554 drif01: rif@e6f50000 { 1555 compatible = "renesas,r8a7796-drif", 1556 "renesas,rcar-gen3-drif"; 1557 reg = <0 0xe6f50000 0 0x64>; 1558 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1559 clocks = <&cpg CPG_MOD 514>; 1560 clock-names = "fck"; 1561 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1562 dma-names = "rx", "rx"; 1563 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1564 resets = <&cpg 514>; 1565 renesas,bonding = <&drif00>; 1566 status = "disabled"; 1567 }; 1568 1569 drif10: rif@e6f60000 { 1570 compatible = "renesas,r8a7796-drif", 1571 "renesas,rcar-gen3-drif"; 1572 reg = <0 0xe6f60000 0 0x64>; 1573 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1574 clocks = <&cpg CPG_MOD 513>; 1575 clock-names = "fck"; 1576 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1577 dma-names = "rx", "rx"; 1578 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1579 resets = <&cpg 513>; 1580 renesas,bonding = <&drif11>; 1581 status = "disabled"; 1582 }; 1583 1584 drif11: rif@e6f70000 { 1585 compatible = "renesas,r8a7796-drif", 1586 "renesas,rcar-gen3-drif"; 1587 reg = <0 0xe6f70000 0 0x64>; 1588 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1589 clocks = <&cpg CPG_MOD 512>; 1590 clock-names = "fck"; 1591 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1592 dma-names = "rx", "rx"; 1593 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1594 resets = <&cpg 512>; 1595 renesas,bonding = <&drif10>; 1596 status = "disabled"; 1597 }; 1598 1599 drif20: rif@e6f80000 { 1600 compatible = "renesas,r8a7796-drif", 1601 "renesas,rcar-gen3-drif"; 1602 reg = <0 0xe6f80000 0 0x64>; 1603 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1604 clocks = <&cpg CPG_MOD 511>; 1605 clock-names = "fck"; 1606 dmas = <&dmac1 0x28>, <&dmac2 0x28>; 1607 dma-names = "rx", "rx"; 1608 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1609 resets = <&cpg 511>; 1610 renesas,bonding = <&drif21>; 1611 status = "disabled"; 1612 }; 1613 1614 drif21: rif@e6f90000 { 1615 compatible = "renesas,r8a7796-drif", 1616 "renesas,rcar-gen3-drif"; 1617 reg = <0 0xe6f90000 0 0x64>; 1618 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1619 clocks = <&cpg CPG_MOD 510>; 1620 clock-names = "fck"; 1621 dmas = <&dmac1 0x2a>, <&dmac2 0x2a>; 1622 dma-names = "rx", "rx"; 1623 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1624 resets = <&cpg 510>; 1625 renesas,bonding = <&drif20>; 1626 status = "disabled"; 1627 }; 1628 1629 drif30: rif@e6fa0000 { 1630 compatible = "renesas,r8a7796-drif", 1631 "renesas,rcar-gen3-drif"; 1632 reg = <0 0xe6fa0000 0 0x64>; 1633 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1634 clocks = <&cpg CPG_MOD 509>; 1635 clock-names = "fck"; 1636 dmas = <&dmac1 0x2c>, <&dmac2 0x2c>; 1637 dma-names = "rx", "rx"; 1638 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1639 resets = <&cpg 509>; 1640 renesas,bonding = <&drif31>; 1641 status = "disabled"; 1642 }; 1643 1644 drif31: rif@e6fb0000 { 1645 compatible = "renesas,r8a7796-drif", 1646 "renesas,rcar-gen3-drif"; 1647 reg = <0 0xe6fb0000 0 0x64>; 1648 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1649 clocks = <&cpg CPG_MOD 508>; 1650 clock-names = "fck"; 1651 dmas = <&dmac1 0x2e>, <&dmac2 0x2e>; 1652 dma-names = "rx", "rx"; 1653 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1654 resets = <&cpg 508>; 1655 renesas,bonding = <&drif30>; 1656 status = "disabled"; 1657 }; 1658 1659 rcar_sound: sound@ec500000 { 1660 /* 1661 * #sound-dai-cells is required 1662 * 1663 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1664 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1665 */ 1666 /* 1667 * #clock-cells is required for audio_clkout0/1/2/3 1668 * 1669 * clkout : #clock-cells = <0>; <&rcar_sound>; 1670 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1671 */ 1672 compatible = "renesas,rcar_sound-r8a7796", "renesas,rcar_sound-gen3"; 1673 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1674 <0 0xec5a0000 0 0x100>, /* ADG */ 1675 <0 0xec540000 0 0x1000>, /* SSIU */ 1676 <0 0xec541000 0 0x280>, /* SSI */ 1677 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1678 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1679 1680 clocks = <&cpg CPG_MOD 1005>, 1681 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1682 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1683 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1684 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1685 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1686 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1687 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1688 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1689 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1690 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1691 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1692 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1693 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1694 <&audio_clk_a>, <&audio_clk_b>, 1695 <&audio_clk_c>, 1696 <&cpg CPG_CORE R8A7796_CLK_S0D4>; 1697 clock-names = "ssi-all", 1698 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1699 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1700 "ssi.1", "ssi.0", 1701 "src.9", "src.8", "src.7", "src.6", 1702 "src.5", "src.4", "src.3", "src.2", 1703 "src.1", "src.0", 1704 "mix.1", "mix.0", 1705 "ctu.1", "ctu.0", 1706 "dvc.0", "dvc.1", 1707 "clk_a", "clk_b", "clk_c", "clk_i"; 1708 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1709 resets = <&cpg 1005>, 1710 <&cpg 1006>, <&cpg 1007>, 1711 <&cpg 1008>, <&cpg 1009>, 1712 <&cpg 1010>, <&cpg 1011>, 1713 <&cpg 1012>, <&cpg 1013>, 1714 <&cpg 1014>, <&cpg 1015>; 1715 reset-names = "ssi-all", 1716 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1717 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1718 "ssi.1", "ssi.0"; 1719 status = "disabled"; 1720 1721 rcar_sound,dvc { 1722 dvc0: dvc-0 { 1723 dmas = <&audma1 0xbc>; 1724 dma-names = "tx"; 1725 }; 1726 dvc1: dvc-1 { 1727 dmas = <&audma1 0xbe>; 1728 dma-names = "tx"; 1729 }; 1730 }; 1731 1732 rcar_sound,mix { 1733 mix0: mix-0 { }; 1734 mix1: mix-1 { }; 1735 }; 1736 1737 rcar_sound,ctu { 1738 ctu00: ctu-0 { }; 1739 ctu01: ctu-1 { }; 1740 ctu02: ctu-2 { }; 1741 ctu03: ctu-3 { }; 1742 ctu10: ctu-4 { }; 1743 ctu11: ctu-5 { }; 1744 ctu12: ctu-6 { }; 1745 ctu13: ctu-7 { }; 1746 }; 1747 1748 rcar_sound,src { 1749 src0: src-0 { 1750 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1751 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1752 dma-names = "rx", "tx"; 1753 }; 1754 src1: src-1 { 1755 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1756 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1757 dma-names = "rx", "tx"; 1758 }; 1759 src2: src-2 { 1760 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1761 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1762 dma-names = "rx", "tx"; 1763 }; 1764 src3: src-3 { 1765 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1766 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1767 dma-names = "rx", "tx"; 1768 }; 1769 src4: src-4 { 1770 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1771 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1772 dma-names = "rx", "tx"; 1773 }; 1774 src5: src-5 { 1775 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1776 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1777 dma-names = "rx", "tx"; 1778 }; 1779 src6: src-6 { 1780 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1781 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1782 dma-names = "rx", "tx"; 1783 }; 1784 src7: src-7 { 1785 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1786 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1787 dma-names = "rx", "tx"; 1788 }; 1789 src8: src-8 { 1790 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1791 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1792 dma-names = "rx", "tx"; 1793 }; 1794 src9: src-9 { 1795 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1796 dmas = <&audma0 0x97>, <&audma1 0xba>; 1797 dma-names = "rx", "tx"; 1798 }; 1799 }; 1800 1801 rcar_sound,ssi { 1802 ssi0: ssi-0 { 1803 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1804 dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>; 1805 dma-names = "rx", "tx", "rxu", "txu"; 1806 }; 1807 ssi1: ssi-1 { 1808 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1809 dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>; 1810 dma-names = "rx", "tx", "rxu", "txu"; 1811 }; 1812 ssi2: ssi-2 { 1813 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1814 dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>; 1815 dma-names = "rx", "tx", "rxu", "txu"; 1816 }; 1817 ssi3: ssi-3 { 1818 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1819 dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>; 1820 dma-names = "rx", "tx", "rxu", "txu"; 1821 }; 1822 ssi4: ssi-4 { 1823 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1824 dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>; 1825 dma-names = "rx", "tx", "rxu", "txu"; 1826 }; 1827 ssi5: ssi-5 { 1828 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1829 dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>; 1830 dma-names = "rx", "tx", "rxu", "txu"; 1831 }; 1832 ssi6: ssi-6 { 1833 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1834 dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>; 1835 dma-names = "rx", "tx", "rxu", "txu"; 1836 }; 1837 ssi7: ssi-7 { 1838 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1839 dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>; 1840 dma-names = "rx", "tx", "rxu", "txu"; 1841 }; 1842 ssi8: ssi-8 { 1843 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1844 dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>; 1845 dma-names = "rx", "tx", "rxu", "txu"; 1846 }; 1847 ssi9: ssi-9 { 1848 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1849 dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>; 1850 dma-names = "rx", "tx", "rxu", "txu"; 1851 }; 1852 }; 1853 1854 ports { 1855 #address-cells = <1>; 1856 #size-cells = <0>; 1857 port@0 { 1858 reg = <0>; 1859 }; 1860 port@1 { 1861 reg = <1>; 1862 }; 1863 }; 1864 }; 1865 1866 audma0: dma-controller@ec700000 { 1867 compatible = "renesas,dmac-r8a7796", 1868 "renesas,rcar-dmac"; 1869 reg = <0 0xec700000 0 0x10000>; 1870 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH 1871 GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH 1872 GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH 1873 GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH 1874 GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH 1875 GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH 1876 GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH 1877 GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH 1878 GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH 1879 GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH 1880 GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH 1881 GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH 1882 GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH 1883 GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH 1884 GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH 1885 GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH 1886 GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1887 interrupt-names = "error", 1888 "ch0", "ch1", "ch2", "ch3", 1889 "ch4", "ch5", "ch6", "ch7", 1890 "ch8", "ch9", "ch10", "ch11", 1891 "ch12", "ch13", "ch14", "ch15"; 1892 clocks = <&cpg CPG_MOD 502>; 1893 clock-names = "fck"; 1894 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1895 resets = <&cpg 502>; 1896 #dma-cells = <1>; 1897 dma-channels = <16>; 1898 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1899 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1900 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1901 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1902 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1903 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1904 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1905 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1906 }; 1907 1908 audma1: dma-controller@ec720000 { 1909 compatible = "renesas,dmac-r8a7796", 1910 "renesas,rcar-dmac"; 1911 reg = <0 0xec720000 0 0x10000>; 1912 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH 1913 GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH 1914 GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH 1915 GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH 1916 GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH 1917 GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH 1918 GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH 1919 GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH 1920 GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH 1921 GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH 1922 GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH 1923 GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH 1924 GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH 1925 GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH 1926 GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH 1927 GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH 1928 GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 1929 interrupt-names = "error", 1930 "ch0", "ch1", "ch2", "ch3", 1931 "ch4", "ch5", "ch6", "ch7", 1932 "ch8", "ch9", "ch10", "ch11", 1933 "ch12", "ch13", "ch14", "ch15"; 1934 clocks = <&cpg CPG_MOD 501>; 1935 clock-names = "fck"; 1936 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1937 resets = <&cpg 501>; 1938 #dma-cells = <1>; 1939 dma-channels = <16>; 1940 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 1941 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 1942 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 1943 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 1944 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 1945 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 1946 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 1947 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 1948 }; 1949 1950 xhci0: usb@ee000000 { 1951 compatible = "renesas,xhci-r8a7796", 1952 "renesas,rcar-gen3-xhci"; 1953 reg = <0 0xee000000 0 0xc00>; 1954 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1955 clocks = <&cpg CPG_MOD 328>; 1956 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1957 resets = <&cpg 328>; 1958 status = "disabled"; 1959 }; 1960 1961 usb3_peri0: usb@ee020000 { 1962 compatible = "renesas,r8a7796-usb3-peri", 1963 "renesas,rcar-gen3-usb3-peri"; 1964 reg = <0 0xee020000 0 0x400>; 1965 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1966 clocks = <&cpg CPG_MOD 328>; 1967 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1968 resets = <&cpg 328>; 1969 status = "disabled"; 1970 }; 1971 1972 ohci0: usb@ee080000 { 1973 compatible = "generic-ohci"; 1974 reg = <0 0xee080000 0 0x100>; 1975 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1976 clocks = <&cpg CPG_MOD 703>; 1977 phys = <&usb2_phy0>; 1978 phy-names = "usb"; 1979 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1980 resets = <&cpg 703>; 1981 status = "disabled"; 1982 }; 1983 1984 ohci1: usb@ee0a0000 { 1985 compatible = "generic-ohci"; 1986 reg = <0 0xee0a0000 0 0x100>; 1987 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1988 clocks = <&cpg CPG_MOD 702>; 1989 phys = <&usb2_phy1>; 1990 phy-names = "usb"; 1991 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 1992 resets = <&cpg 702>; 1993 status = "disabled"; 1994 }; 1995 1996 ehci0: usb@ee080100 { 1997 compatible = "generic-ehci"; 1998 reg = <0 0xee080100 0 0x100>; 1999 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2000 clocks = <&cpg CPG_MOD 703>; 2001 phys = <&usb2_phy0>; 2002 phy-names = "usb"; 2003 companion= <&ohci0>; 2004 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2005 resets = <&cpg 703>; 2006 status = "disabled"; 2007 }; 2008 2009 ehci1: usb@ee0a0100 { 2010 compatible = "generic-ehci"; 2011 reg = <0 0xee0a0100 0 0x100>; 2012 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2013 clocks = <&cpg CPG_MOD 702>; 2014 phys = <&usb2_phy1>; 2015 phy-names = "usb"; 2016 companion= <&ohci1>; 2017 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2018 resets = <&cpg 702>; 2019 status = "disabled"; 2020 }; 2021 2022 usb2_phy0: usb-phy@ee080200 { 2023 compatible = "renesas,usb2-phy-r8a7796", 2024 "renesas,rcar-gen3-usb2-phy"; 2025 reg = <0 0xee080200 0 0x700>; 2026 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2027 clocks = <&cpg CPG_MOD 703>; 2028 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2029 resets = <&cpg 703>; 2030 #phy-cells = <0>; 2031 status = "disabled"; 2032 }; 2033 2034 usb2_phy1: usb-phy@ee0a0200 { 2035 compatible = "renesas,usb2-phy-r8a7796", 2036 "renesas,rcar-gen3-usb2-phy"; 2037 reg = <0 0xee0a0200 0 0x700>; 2038 clocks = <&cpg CPG_MOD 702>; 2039 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2040 resets = <&cpg 702>; 2041 #phy-cells = <0>; 2042 status = "disabled"; 2043 }; 2044 2045 sdhi0: sd@ee100000 { 2046 compatible = "renesas,sdhi-r8a7796", 2047 "renesas,rcar-gen3-sdhi"; 2048 reg = <0 0xee100000 0 0x2000>; 2049 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2050 clocks = <&cpg CPG_MOD 314>; 2051 max-frequency = <200000000>; 2052 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2053 resets = <&cpg 314>; 2054 status = "disabled"; 2055 }; 2056 2057 sdhi1: sd@ee120000 { 2058 compatible = "renesas,sdhi-r8a7796", 2059 "renesas,rcar-gen3-sdhi"; 2060 reg = <0 0xee120000 0 0x2000>; 2061 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2062 clocks = <&cpg CPG_MOD 313>; 2063 max-frequency = <200000000>; 2064 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2065 resets = <&cpg 313>; 2066 status = "disabled"; 2067 }; 2068 2069 sdhi2: sd@ee140000 { 2070 compatible = "renesas,sdhi-r8a7796", 2071 "renesas,rcar-gen3-sdhi"; 2072 reg = <0 0xee140000 0 0x2000>; 2073 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2074 clocks = <&cpg CPG_MOD 312>; 2075 max-frequency = <200000000>; 2076 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2077 resets = <&cpg 312>; 2078 status = "disabled"; 2079 }; 2080 2081 sdhi3: sd@ee160000 { 2082 compatible = "renesas,sdhi-r8a7796", 2083 "renesas,rcar-gen3-sdhi"; 2084 reg = <0 0xee160000 0 0x2000>; 2085 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2086 clocks = <&cpg CPG_MOD 311>; 2087 max-frequency = <200000000>; 2088 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2089 resets = <&cpg 311>; 2090 status = "disabled"; 2091 }; 2092 2093 gic: interrupt-controller@f1010000 { 2094 compatible = "arm,gic-400"; 2095 #interrupt-cells = <3>; 2096 #address-cells = <0>; 2097 interrupt-controller; 2098 reg = <0x0 0xf1010000 0 0x1000>, 2099 <0x0 0xf1020000 0 0x20000>, 2100 <0x0 0xf1040000 0 0x20000>, 2101 <0x0 0xf1060000 0 0x20000>; 2102 interrupts = <GIC_PPI 9 2103 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2104 clocks = <&cpg CPG_MOD 408>; 2105 clock-names = "clk"; 2106 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2107 resets = <&cpg 408>; 2108 }; 2109 2110 pciec0: pcie@fe000000 { 2111 compatible = "renesas,pcie-r8a7796", 2112 "renesas,pcie-rcar-gen3"; 2113 reg = <0 0xfe000000 0 0x80000>; 2114 #address-cells = <3>; 2115 #size-cells = <2>; 2116 bus-range = <0x00 0xff>; 2117 device_type = "pci"; 2118 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 2119 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 2120 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 2121 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2122 /* Map all possible DDR as inbound ranges */ 2123 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2124 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2125 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2126 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2127 #interrupt-cells = <1>; 2128 interrupt-map-mask = <0 0 0 0>; 2129 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2130 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2131 clock-names = "pcie", "pcie_bus"; 2132 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2133 resets = <&cpg 319>; 2134 status = "disabled"; 2135 }; 2136 2137 pciec1: pcie@ee800000 { 2138 compatible = "renesas,pcie-r8a7796", 2139 "renesas,pcie-rcar-gen3"; 2140 reg = <0 0xee800000 0 0x80000>; 2141 #address-cells = <3>; 2142 #size-cells = <2>; 2143 bus-range = <0x00 0xff>; 2144 device_type = "pci"; 2145 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 2146 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 2147 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 2148 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2149 /* Map all possible DDR as inbound ranges */ 2150 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 2151 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2152 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2153 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2154 #interrupt-cells = <1>; 2155 interrupt-map-mask = <0 0 0 0>; 2156 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2157 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2158 clock-names = "pcie", "pcie_bus"; 2159 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2160 resets = <&cpg 318>; 2161 status = "disabled"; 2162 }; 2163 2164 imr-lx4@fe860000 { 2165 compatible = "renesas,r8a7796-imr-lx4", 2166 "renesas,imr-lx4"; 2167 reg = <0 0xfe860000 0 0x2000>; 2168 interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; 2169 clocks = <&cpg CPG_MOD 823>; 2170 power-domains = <&sysc R8A7796_PD_A3VC>; 2171 resets = <&cpg 823>; 2172 }; 2173 2174 imr-lx4@fe870000 { 2175 compatible = "renesas,r8a7796-imr-lx4", 2176 "renesas,imr-lx4"; 2177 reg = <0 0xfe870000 0 0x2000>; 2178 interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; 2179 clocks = <&cpg CPG_MOD 822>; 2180 power-domains = <&sysc R8A7796_PD_A3VC>; 2181 resets = <&cpg 822>; 2182 }; 2183 2184 fdp1@fe940000 { 2185 compatible = "renesas,fdp1"; 2186 reg = <0 0xfe940000 0 0x2400>; 2187 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2188 clocks = <&cpg CPG_MOD 119>; 2189 power-domains = <&sysc R8A7796_PD_A3VC>; 2190 resets = <&cpg 119>; 2191 renesas,fcp = <&fcpf0>; 2192 }; 2193 2194 fcpf0: fcp@fe950000 { 2195 compatible = "renesas,fcpf"; 2196 reg = <0 0xfe950000 0 0x200>; 2197 clocks = <&cpg CPG_MOD 615>; 2198 power-domains = <&sysc R8A7796_PD_A3VC>; 2199 resets = <&cpg 615>; 2200 }; 2201 2202 fcpvb0: fcp@fe96f000 { 2203 compatible = "renesas,fcpv"; 2204 reg = <0 0xfe96f000 0 0x200>; 2205 clocks = <&cpg CPG_MOD 607>; 2206 power-domains = <&sysc R8A7796_PD_A3VC>; 2207 resets = <&cpg 607>; 2208 }; 2209 2210 fcpvi0: fcp@fe9af000 { 2211 compatible = "renesas,fcpv"; 2212 reg = <0 0xfe9af000 0 0x200>; 2213 clocks = <&cpg CPG_MOD 611>; 2214 power-domains = <&sysc R8A7796_PD_A3VC>; 2215 resets = <&cpg 611>; 2216 iommus = <&ipmmu_vc0 19>; 2217 }; 2218 2219 fcpvd0: fcp@fea27000 { 2220 compatible = "renesas,fcpv"; 2221 reg = <0 0xfea27000 0 0x200>; 2222 clocks = <&cpg CPG_MOD 603>; 2223 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2224 resets = <&cpg 603>; 2225 iommus = <&ipmmu_vi0 8>; 2226 }; 2227 2228 fcpvd1: fcp@fea2f000 { 2229 compatible = "renesas,fcpv"; 2230 reg = <0 0xfea2f000 0 0x200>; 2231 clocks = <&cpg CPG_MOD 602>; 2232 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2233 resets = <&cpg 602>; 2234 iommus = <&ipmmu_vi0 9>; 2235 }; 2236 2237 fcpvd2: fcp@fea37000 { 2238 compatible = "renesas,fcpv"; 2239 reg = <0 0xfea37000 0 0x200>; 2240 clocks = <&cpg CPG_MOD 601>; 2241 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2242 resets = <&cpg 601>; 2243 iommus = <&ipmmu_vi0 10>; 2244 }; 2245 2246 vspb: vsp@fe960000 { 2247 compatible = "renesas,vsp2"; 2248 reg = <0 0xfe960000 0 0x8000>; 2249 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2250 clocks = <&cpg CPG_MOD 626>; 2251 power-domains = <&sysc R8A7796_PD_A3VC>; 2252 resets = <&cpg 626>; 2253 2254 renesas,fcp = <&fcpvb0>; 2255 }; 2256 2257 vspd0: vsp@fea20000 { 2258 compatible = "renesas,vsp2"; 2259 reg = <0 0xfea20000 0 0x5000>; 2260 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2261 clocks = <&cpg CPG_MOD 623>; 2262 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2263 resets = <&cpg 623>; 2264 2265 renesas,fcp = <&fcpvd0>; 2266 }; 2267 2268 vspd1: vsp@fea28000 { 2269 compatible = "renesas,vsp2"; 2270 reg = <0 0xfea28000 0 0x5000>; 2271 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2272 clocks = <&cpg CPG_MOD 622>; 2273 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2274 resets = <&cpg 622>; 2275 2276 renesas,fcp = <&fcpvd1>; 2277 }; 2278 2279 vspd2: vsp@fea30000 { 2280 compatible = "renesas,vsp2"; 2281 reg = <0 0xfea30000 0 0x5000>; 2282 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2283 clocks = <&cpg CPG_MOD 621>; 2284 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2285 resets = <&cpg 621>; 2286 2287 renesas,fcp = <&fcpvd2>; 2288 }; 2289 2290 vspi0: vsp@fe9a0000 { 2291 compatible = "renesas,vsp2"; 2292 reg = <0 0xfe9a0000 0 0x8000>; 2293 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2294 clocks = <&cpg CPG_MOD 631>; 2295 power-domains = <&sysc R8A7796_PD_A3VC>; 2296 resets = <&cpg 631>; 2297 2298 renesas,fcp = <&fcpvi0>; 2299 }; 2300 2301 csi20: csi2@fea80000 { 2302 compatible = "renesas,r8a7796-csi2"; 2303 reg = <0 0xfea80000 0 0x10000>; 2304 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2305 clocks = <&cpg CPG_MOD 714>; 2306 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2307 resets = <&cpg 714>; 2308 status = "disabled"; 2309 2310 ports { 2311 #address-cells = <1>; 2312 #size-cells = <0>; 2313 2314 port@1 { 2315 #address-cells = <1>; 2316 #size-cells = <0>; 2317 2318 reg = <1>; 2319 2320 csi20vin0: endpoint@0 { 2321 reg = <0>; 2322 remote-endpoint = <&vin0csi20>; 2323 }; 2324 csi20vin1: endpoint@1 { 2325 reg = <1>; 2326 remote-endpoint = <&vin1csi20>; 2327 }; 2328 csi20vin2: endpoint@2 { 2329 reg = <2>; 2330 remote-endpoint = <&vin2csi20>; 2331 }; 2332 csi20vin3: endpoint@3 { 2333 reg = <3>; 2334 remote-endpoint = <&vin3csi20>; 2335 }; 2336 csi20vin4: endpoint@4 { 2337 reg = <4>; 2338 remote-endpoint = <&vin4csi20>; 2339 }; 2340 csi20vin5: endpoint@5 { 2341 reg = <5>; 2342 remote-endpoint = <&vin5csi20>; 2343 }; 2344 csi20vin6: endpoint@6 { 2345 reg = <6>; 2346 remote-endpoint = <&vin6csi20>; 2347 }; 2348 csi20vin7: endpoint@7 { 2349 reg = <7>; 2350 remote-endpoint = <&vin7csi20>; 2351 }; 2352 }; 2353 }; 2354 }; 2355 2356 csi40: csi2@feaa0000 { 2357 compatible = "renesas,r8a7796-csi2"; 2358 reg = <0 0xfeaa0000 0 0x10000>; 2359 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2360 clocks = <&cpg CPG_MOD 716>; 2361 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2362 resets = <&cpg 716>; 2363 status = "disabled"; 2364 2365 ports { 2366 #address-cells = <1>; 2367 #size-cells = <0>; 2368 2369 port@1 { 2370 #address-cells = <1>; 2371 #size-cells = <0>; 2372 2373 reg = <1>; 2374 2375 csi40vin0: endpoint@0 { 2376 reg = <0>; 2377 remote-endpoint = <&vin0csi40>; 2378 }; 2379 csi40vin1: endpoint@1 { 2380 reg = <1>; 2381 remote-endpoint = <&vin1csi40>; 2382 }; 2383 csi40vin2: endpoint@2 { 2384 reg = <2>; 2385 remote-endpoint = <&vin2csi40>; 2386 }; 2387 csi40vin3: endpoint@3 { 2388 reg = <3>; 2389 remote-endpoint = <&vin3csi40>; 2390 }; 2391 csi40vin4: endpoint@4 { 2392 reg = <4>; 2393 remote-endpoint = <&vin4csi40>; 2394 }; 2395 csi40vin5: endpoint@5 { 2396 reg = <5>; 2397 remote-endpoint = <&vin5csi40>; 2398 }; 2399 csi40vin6: endpoint@6 { 2400 reg = <6>; 2401 remote-endpoint = <&vin6csi40>; 2402 }; 2403 csi40vin7: endpoint@7 { 2404 reg = <7>; 2405 remote-endpoint = <&vin7csi40>; 2406 }; 2407 }; 2408 2409 }; 2410 }; 2411 2412 hdmi0: hdmi@fead0000 { 2413 compatible = "renesas,r8a7796-hdmi", "renesas,rcar-gen3-hdmi"; 2414 reg = <0 0xfead0000 0 0x10000>; 2415 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2416 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A7796_CLK_HDMI>; 2417 clock-names = "iahb", "isfr"; 2418 power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; 2419 resets = <&cpg 729>; 2420 status = "disabled"; 2421 2422 ports { 2423 #address-cells = <1>; 2424 #size-cells = <0>; 2425 port@0 { 2426 reg = <0>; 2427 dw_hdmi0_in: endpoint { 2428 remote-endpoint = <&du_out_hdmi0>; 2429 }; 2430 }; 2431 port@1 { 2432 reg = <1>; 2433 }; 2434 port@2 { 2435 /* HDMI sound */ 2436 reg = <2>; 2437 }; 2438 }; 2439 }; 2440 2441 du: display@feb00000 { 2442 compatible = "renesas,du-r8a7796"; 2443 reg = <0 0xfeb00000 0 0x70000>, 2444 <0 0xfeb90000 0 0x14>; 2445 reg-names = "du", "lvds.0"; 2446 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2447 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2448 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2449 clocks = <&cpg CPG_MOD 724>, 2450 <&cpg CPG_MOD 723>, 2451 <&cpg CPG_MOD 722>, 2452 <&cpg CPG_MOD 727>; 2453 clock-names = "du.0", "du.1", "du.2", "lvds.0"; 2454 status = "disabled"; 2455 2456 vsps = <&vspd0 &vspd1 &vspd2>; 2457 2458 ports { 2459 #address-cells = <1>; 2460 #size-cells = <0>; 2461 2462 port@0 { 2463 reg = <0>; 2464 du_out_rgb: endpoint { 2465 }; 2466 }; 2467 port@1 { 2468 reg = <1>; 2469 du_out_hdmi0: endpoint { 2470 remote-endpoint = <&dw_hdmi0_in>; 2471 }; 2472 }; 2473 port@2 { 2474 reg = <2>; 2475 du_out_lvds0: endpoint { 2476 }; 2477 }; 2478 }; 2479 }; 2480 2481 prr: chipid@fff00044 { 2482 compatible = "renesas,prr"; 2483 reg = <0 0xfff00044 0 4>; 2484 }; 2485 }; 2486 2487 thermal-zones { 2488 sensor_thermal1: sensor-thermal1 { 2489 polling-delay-passive = <250>; 2490 polling-delay = <1000>; 2491 thermal-sensors = <&tsc 0>; 2492 2493 trips { 2494 sensor1_passive: sensor1-passive { 2495 temperature = <95000>; 2496 hysteresis = <1000>; 2497 type = "passive"; 2498 }; 2499 sensor1_crit: sensor1-crit { 2500 temperature = <120000>; 2501 hysteresis = <1000>; 2502 type = "critical"; 2503 }; 2504 }; 2505 2506 cooling-maps { 2507 map0 { 2508 trip = <&sensor1_passive>; 2509 cooling-device = <&a57_0 5 5>; 2510 }; 2511 }; 2512 }; 2513 2514 sensor_thermal2: sensor-thermal2 { 2515 polling-delay-passive = <250>; 2516 polling-delay = <1000>; 2517 thermal-sensors = <&tsc 1>; 2518 2519 trips { 2520 sensor2_passive: sensor2-passive { 2521 temperature = <95000>; 2522 hysteresis = <1000>; 2523 type = "passive"; 2524 }; 2525 sensor2_crit: sensor2-crit { 2526 temperature = <120000>; 2527 hysteresis = <1000>; 2528 type = "critical"; 2529 }; 2530 }; 2531 2532 cooling-maps { 2533 map0 { 2534 trip = <&sensor2_passive>; 2535 cooling-device = <&a57_0 5 5>; 2536 }; 2537 }; 2538 }; 2539 2540 sensor_thermal3: sensor-thermal3 { 2541 polling-delay-passive = <250>; 2542 polling-delay = <1000>; 2543 thermal-sensors = <&tsc 2>; 2544 2545 trips { 2546 sensor3_passive: sensor3-passive { 2547 temperature = <95000>; 2548 hysteresis = <1000>; 2549 type = "passive"; 2550 }; 2551 sensor3_crit: sensor3-crit { 2552 temperature = <120000>; 2553 hysteresis = <1000>; 2554 type = "critical"; 2555 }; 2556 }; 2557 2558 cooling-maps { 2559 map0 { 2560 trip = <&sensor3_passive>; 2561 cooling-device = <&a57_0 5 5>; 2562 }; 2563 }; 2564 }; 2565 }; 2566 2567 timer { 2568 compatible = "arm,armv8-timer"; 2569 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2570 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2571 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2572 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2573 }; 2574 2575 /* External USB clocks - can be overridden by the board */ 2576 usb3s0_clk: usb3s0 { 2577 compatible = "fixed-clock"; 2578 #clock-cells = <0>; 2579 clock-frequency = <0>; 2580 }; 2581 2582 usb_extal_clk: usb_extal { 2583 compatible = "fixed-clock"; 2584 #clock-cells = <0>; 2585 clock-frequency = <0>; 2586 }; 2587}; 2588