1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a77965 SoC 4 * 5 * Copyright (C) 2018 Jacopo Mondi <jacopo+renesas@jmondi.org> 6 * 7 * Based on r8a7796.dtsi 8 * Copyright (C) 2016 Renesas Electronics Corp. 9 */ 10 11#include <dt-bindings/clock/r8a77965-cpg-mssr.h> 12#include <dt-bindings/interrupt-controller/arm-gic.h> 13#include <dt-bindings/power/r8a77965-sysc.h> 14 15#define CPG_AUDIO_CLK_I 10 16 17/ { 18 compatible = "renesas,r8a77965"; 19 #address-cells = <2>; 20 #size-cells = <2>; 21 22 aliases { 23 i2c0 = &i2c0; 24 i2c1 = &i2c1; 25 i2c2 = &i2c2; 26 i2c3 = &i2c3; 27 i2c4 = &i2c4; 28 i2c5 = &i2c5; 29 i2c6 = &i2c6; 30 i2c7 = &i2c_dvfs; 31 }; 32 33 /* 34 * The external audio clocks are configured as 0 Hz fixed frequency 35 * clocks by default. 36 * Boards that provide audio clocks should override them. 37 */ 38 audio_clk_a: audio_clk_a { 39 compatible = "fixed-clock"; 40 #clock-cells = <0>; 41 clock-frequency = <0>; 42 }; 43 44 audio_clk_b: audio_clk_b { 45 compatible = "fixed-clock"; 46 #clock-cells = <0>; 47 clock-frequency = <0>; 48 }; 49 50 audio_clk_c: audio_clk_c { 51 compatible = "fixed-clock"; 52 #clock-cells = <0>; 53 clock-frequency = <0>; 54 }; 55 56 /* External CAN clock - to be overridden by boards that provide it */ 57 can_clk: can { 58 compatible = "fixed-clock"; 59 #clock-cells = <0>; 60 clock-frequency = <0>; 61 }; 62 63 cpus { 64 #address-cells = <1>; 65 #size-cells = <0>; 66 67 a57_0: cpu@0 { 68 compatible = "arm,cortex-a57", "arm,armv8"; 69 reg = <0x0>; 70 device_type = "cpu"; 71 power-domains = <&sysc R8A77965_PD_CA57_CPU0>; 72 next-level-cache = <&L2_CA57>; 73 enable-method = "psci"; 74 }; 75 76 a57_1: cpu@1 { 77 compatible = "arm,cortex-a57", "arm,armv8"; 78 reg = <0x1>; 79 device_type = "cpu"; 80 power-domains = <&sysc R8A77965_PD_CA57_CPU1>; 81 next-level-cache = <&L2_CA57>; 82 enable-method = "psci"; 83 }; 84 85 L2_CA57: cache-controller-0 { 86 compatible = "cache"; 87 power-domains = <&sysc R8A77965_PD_CA57_SCU>; 88 cache-unified; 89 cache-level = <2>; 90 }; 91 }; 92 93 extal_clk: extal { 94 compatible = "fixed-clock"; 95 #clock-cells = <0>; 96 /* This value must be overridden by the board */ 97 clock-frequency = <0>; 98 }; 99 100 extalr_clk: extalr { 101 compatible = "fixed-clock"; 102 #clock-cells = <0>; 103 /* This value must be overridden by the board */ 104 clock-frequency = <0>; 105 }; 106 107 /* External PCIe clock - can be overridden by the board */ 108 pcie_bus_clk: pcie_bus { 109 compatible = "fixed-clock"; 110 #clock-cells = <0>; 111 clock-frequency = <0>; 112 }; 113 114 pmu_a57 { 115 compatible = "arm,cortex-a57-pmu"; 116 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 117 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 118 interrupt-affinity = <&a57_0>, 119 <&a57_1>; 120 }; 121 122 psci { 123 compatible = "arm,psci-1.0", "arm,psci-0.2"; 124 method = "smc"; 125 }; 126 127 /* External SCIF clock - to be overridden by boards that provide it */ 128 scif_clk: scif { 129 compatible = "fixed-clock"; 130 #clock-cells = <0>; 131 clock-frequency = <0>; 132 }; 133 134 soc { 135 compatible = "simple-bus"; 136 interrupt-parent = <&gic>; 137 #address-cells = <2>; 138 #size-cells = <2>; 139 ranges; 140 141 rwdt: watchdog@e6020000 { 142 compatible = "renesas,r8a77965-wdt", 143 "renesas,rcar-gen3-wdt"; 144 reg = <0 0xe6020000 0 0x0c>; 145 clocks = <&cpg CPG_MOD 402>; 146 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 147 resets = <&cpg 402>; 148 status = "disabled"; 149 }; 150 151 gpio0: gpio@e6050000 { 152 compatible = "renesas,gpio-r8a77965", 153 "renesas,rcar-gen3-gpio"; 154 reg = <0 0xe6050000 0 0x50>; 155 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 156 #gpio-cells = <2>; 157 gpio-controller; 158 gpio-ranges = <&pfc 0 0 16>; 159 #interrupt-cells = <2>; 160 interrupt-controller; 161 clocks = <&cpg CPG_MOD 912>; 162 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 163 resets = <&cpg 912>; 164 }; 165 166 gpio1: gpio@e6051000 { 167 compatible = "renesas,gpio-r8a77965", 168 "renesas,rcar-gen3-gpio"; 169 reg = <0 0xe6051000 0 0x50>; 170 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 171 #gpio-cells = <2>; 172 gpio-controller; 173 gpio-ranges = <&pfc 0 32 29>; 174 #interrupt-cells = <2>; 175 interrupt-controller; 176 clocks = <&cpg CPG_MOD 911>; 177 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 178 resets = <&cpg 911>; 179 }; 180 181 gpio2: gpio@e6052000 { 182 compatible = "renesas,gpio-r8a77965", 183 "renesas,rcar-gen3-gpio"; 184 reg = <0 0xe6052000 0 0x50>; 185 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 186 #gpio-cells = <2>; 187 gpio-controller; 188 gpio-ranges = <&pfc 0 64 15>; 189 #interrupt-cells = <2>; 190 interrupt-controller; 191 clocks = <&cpg CPG_MOD 910>; 192 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 193 resets = <&cpg 910>; 194 }; 195 196 gpio3: gpio@e6053000 { 197 compatible = "renesas,gpio-r8a77965", 198 "renesas,rcar-gen3-gpio"; 199 reg = <0 0xe6053000 0 0x50>; 200 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 201 #gpio-cells = <2>; 202 gpio-controller; 203 gpio-ranges = <&pfc 0 96 16>; 204 #interrupt-cells = <2>; 205 interrupt-controller; 206 clocks = <&cpg CPG_MOD 909>; 207 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 208 resets = <&cpg 909>; 209 }; 210 211 gpio4: gpio@e6054000 { 212 compatible = "renesas,gpio-r8a77965", 213 "renesas,rcar-gen3-gpio"; 214 reg = <0 0xe6054000 0 0x50>; 215 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 216 #gpio-cells = <2>; 217 gpio-controller; 218 gpio-ranges = <&pfc 0 128 18>; 219 #interrupt-cells = <2>; 220 interrupt-controller; 221 clocks = <&cpg CPG_MOD 908>; 222 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 223 resets = <&cpg 908>; 224 }; 225 226 gpio5: gpio@e6055000 { 227 compatible = "renesas,gpio-r8a77965", 228 "renesas,rcar-gen3-gpio"; 229 reg = <0 0xe6055000 0 0x50>; 230 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 231 #gpio-cells = <2>; 232 gpio-controller; 233 gpio-ranges = <&pfc 0 160 26>; 234 #interrupt-cells = <2>; 235 interrupt-controller; 236 clocks = <&cpg CPG_MOD 907>; 237 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 238 resets = <&cpg 907>; 239 }; 240 241 gpio6: gpio@e6055400 { 242 compatible = "renesas,gpio-r8a77965", 243 "renesas,rcar-gen3-gpio"; 244 reg = <0 0xe6055400 0 0x50>; 245 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 246 #gpio-cells = <2>; 247 gpio-controller; 248 gpio-ranges = <&pfc 0 192 32>; 249 #interrupt-cells = <2>; 250 interrupt-controller; 251 clocks = <&cpg CPG_MOD 906>; 252 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 253 resets = <&cpg 906>; 254 }; 255 256 gpio7: gpio@e6055800 { 257 compatible = "renesas,gpio-r8a77965", 258 "renesas,rcar-gen3-gpio"; 259 reg = <0 0xe6055800 0 0x50>; 260 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 261 #gpio-cells = <2>; 262 gpio-controller; 263 gpio-ranges = <&pfc 0 224 4>; 264 #interrupt-cells = <2>; 265 interrupt-controller; 266 clocks = <&cpg CPG_MOD 905>; 267 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 268 resets = <&cpg 905>; 269 }; 270 271 pfc: pin-controller@e6060000 { 272 compatible = "renesas,pfc-r8a77965"; 273 reg = <0 0xe6060000 0 0x50c>; 274 }; 275 276 cpg: clock-controller@e6150000 { 277 compatible = "renesas,r8a77965-cpg-mssr"; 278 reg = <0 0xe6150000 0 0x1000>; 279 clocks = <&extal_clk>, <&extalr_clk>; 280 clock-names = "extal", "extalr"; 281 #clock-cells = <2>; 282 #power-domain-cells = <0>; 283 #reset-cells = <1>; 284 }; 285 286 rst: reset-controller@e6160000 { 287 compatible = "renesas,r8a77965-rst"; 288 reg = <0 0xe6160000 0 0x0200>; 289 }; 290 291 sysc: system-controller@e6180000 { 292 compatible = "renesas,r8a77965-sysc"; 293 reg = <0 0xe6180000 0 0x0400>; 294 #power-domain-cells = <1>; 295 }; 296 297 tsc: thermal@e6198000 { 298 compatible = "renesas,r8a77965-thermal"; 299 reg = <0 0xe6198000 0 0x100>, 300 <0 0xe61a0000 0 0x100>, 301 <0 0xe61a8000 0 0x100>; 302 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 303 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 304 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 305 clocks = <&cpg CPG_MOD 522>; 306 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 307 resets = <&cpg 522>; 308 #thermal-sensor-cells = <1>; 309 status = "okay"; 310 }; 311 312 intc_ex: interrupt-controller@e61c0000 { 313 compatible = "renesas,intc-ex-r8a77965", "renesas,irqc"; 314 #interrupt-cells = <2>; 315 interrupt-controller; 316 reg = <0 0xe61c0000 0 0x200>; 317 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 318 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH 319 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH 320 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH 321 GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH 322 GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 323 clocks = <&cpg CPG_MOD 407>; 324 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 325 resets = <&cpg 407>; 326 }; 327 328 i2c0: i2c@e6500000 { 329 #address-cells = <1>; 330 #size-cells = <0>; 331 compatible = "renesas,i2c-r8a77965", 332 "renesas,rcar-gen3-i2c"; 333 reg = <0 0xe6500000 0 0x40>; 334 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 335 clocks = <&cpg CPG_MOD 931>; 336 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 337 resets = <&cpg 931>; 338 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 339 <&dmac2 0x91>, <&dmac2 0x90>; 340 dma-names = "tx", "rx", "tx", "rx"; 341 i2c-scl-internal-delay-ns = <110>; 342 status = "disabled"; 343 }; 344 345 i2c1: i2c@e6508000 { 346 #address-cells = <1>; 347 #size-cells = <0>; 348 compatible = "renesas,i2c-r8a77965", 349 "renesas,rcar-gen3-i2c"; 350 reg = <0 0xe6508000 0 0x40>; 351 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 352 clocks = <&cpg CPG_MOD 930>; 353 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 354 resets = <&cpg 930>; 355 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 356 <&dmac2 0x93>, <&dmac2 0x92>; 357 dma-names = "tx", "rx", "tx", "rx"; 358 i2c-scl-internal-delay-ns = <6>; 359 status = "disabled"; 360 }; 361 362 i2c2: i2c@e6510000 { 363 #address-cells = <1>; 364 #size-cells = <0>; 365 compatible = "renesas,i2c-r8a77965", 366 "renesas,rcar-gen3-i2c"; 367 reg = <0 0xe6510000 0 0x40>; 368 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 369 clocks = <&cpg CPG_MOD 929>; 370 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 371 resets = <&cpg 929>; 372 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 373 <&dmac2 0x95>, <&dmac2 0x94>; 374 dma-names = "tx", "rx", "tx", "rx"; 375 i2c-scl-internal-delay-ns = <6>; 376 status = "disabled"; 377 }; 378 379 i2c3: i2c@e66d0000 { 380 #address-cells = <1>; 381 #size-cells = <0>; 382 compatible = "renesas,i2c-r8a77965", 383 "renesas,rcar-gen3-i2c"; 384 reg = <0 0xe66d0000 0 0x40>; 385 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 386 clocks = <&cpg CPG_MOD 928>; 387 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 388 resets = <&cpg 928>; 389 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 390 dma-names = "tx", "rx"; 391 i2c-scl-internal-delay-ns = <110>; 392 status = "disabled"; 393 }; 394 395 i2c4: i2c@e66d8000 { 396 #address-cells = <1>; 397 #size-cells = <0>; 398 compatible = "renesas,i2c-r8a77965", 399 "renesas,rcar-gen3-i2c"; 400 reg = <0 0xe66d8000 0 0x40>; 401 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 402 clocks = <&cpg CPG_MOD 927>; 403 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 404 resets = <&cpg 927>; 405 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 406 dma-names = "tx", "rx"; 407 i2c-scl-internal-delay-ns = <110>; 408 status = "disabled"; 409 }; 410 411 i2c5: i2c@e66e0000 { 412 #address-cells = <1>; 413 #size-cells = <0>; 414 compatible = "renesas,i2c-r8a77965", 415 "renesas,rcar-gen3-i2c"; 416 reg = <0 0xe66e0000 0 0x40>; 417 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 418 clocks = <&cpg CPG_MOD 919>; 419 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 420 resets = <&cpg 919>; 421 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 422 dma-names = "tx", "rx"; 423 i2c-scl-internal-delay-ns = <110>; 424 status = "disabled"; 425 }; 426 427 i2c6: i2c@e66e8000 { 428 #address-cells = <1>; 429 #size-cells = <0>; 430 compatible = "renesas,i2c-r8a77965", 431 "renesas,rcar-gen3-i2c"; 432 reg = <0 0xe66e8000 0 0x40>; 433 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 434 clocks = <&cpg CPG_MOD 918>; 435 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 436 resets = <&cpg 918>; 437 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 438 dma-names = "tx", "rx"; 439 i2c-scl-internal-delay-ns = <6>; 440 status = "disabled"; 441 }; 442 443 i2c_dvfs: i2c@e60b0000 { 444 #address-cells = <1>; 445 #size-cells = <0>; 446 compatible = "renesas,iic-r8a77965", 447 "renesas,rcar-gen3-iic", 448 "renesas,rmobile-iic"; 449 reg = <0 0xe60b0000 0 0x425>; 450 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 451 clocks = <&cpg CPG_MOD 926>; 452 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 453 resets = <&cpg 926>; 454 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 455 dma-names = "tx", "rx"; 456 status = "disabled"; 457 }; 458 459 hscif0: serial@e6540000 { 460 compatible = "renesas,hscif-r8a77965", 461 "renesas,rcar-gen3-hscif", 462 "renesas,hscif"; 463 reg = <0 0xe6540000 0 0x60>; 464 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 465 clocks = <&cpg CPG_MOD 520>, 466 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 467 <&scif_clk>; 468 clock-names = "fck", "brg_int", "scif_clk"; 469 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 470 <&dmac2 0x31>, <&dmac2 0x30>; 471 dma-names = "tx", "rx", "tx", "rx"; 472 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 473 resets = <&cpg 520>; 474 status = "disabled"; 475 }; 476 477 hscif1: serial@e6550000 { 478 compatible = "renesas,hscif-r8a77965", 479 "renesas,rcar-gen3-hscif", 480 "renesas,hscif"; 481 reg = <0 0xe6550000 0 0x60>; 482 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 483 clocks = <&cpg CPG_MOD 519>, 484 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 485 <&scif_clk>; 486 clock-names = "fck", "brg_int", "scif_clk"; 487 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 488 <&dmac2 0x33>, <&dmac2 0x32>; 489 dma-names = "tx", "rx", "tx", "rx"; 490 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 491 resets = <&cpg 519>; 492 status = "disabled"; 493 }; 494 495 hscif2: serial@e6560000 { 496 compatible = "renesas,hscif-r8a77965", 497 "renesas,rcar-gen3-hscif", 498 "renesas,hscif"; 499 reg = <0 0xe6560000 0 0x60>; 500 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 501 clocks = <&cpg CPG_MOD 518>, 502 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 503 <&scif_clk>; 504 clock-names = "fck", "brg_int", "scif_clk"; 505 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 506 <&dmac2 0x35>, <&dmac2 0x34>; 507 dma-names = "tx", "rx", "tx", "rx"; 508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 509 resets = <&cpg 518>; 510 status = "disabled"; 511 }; 512 513 hscif3: serial@e66a0000 { 514 compatible = "renesas,hscif-r8a77965", 515 "renesas,rcar-gen3-hscif", 516 "renesas,hscif"; 517 reg = <0 0xe66a0000 0 0x60>; 518 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 519 clocks = <&cpg CPG_MOD 517>, 520 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 521 <&scif_clk>; 522 clock-names = "fck", "brg_int", "scif_clk"; 523 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 524 dma-names = "tx", "rx"; 525 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 526 resets = <&cpg 517>; 527 status = "disabled"; 528 }; 529 530 hscif4: serial@e66b0000 { 531 compatible = "renesas,hscif-r8a77965", 532 "renesas,rcar-gen3-hscif", 533 "renesas,hscif"; 534 reg = <0 0xe66b0000 0 0x60>; 535 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 536 clocks = <&cpg CPG_MOD 516>, 537 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 538 <&scif_clk>; 539 clock-names = "fck", "brg_int", "scif_clk"; 540 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 541 dma-names = "tx", "rx"; 542 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 543 resets = <&cpg 516>; 544 status = "disabled"; 545 }; 546 547 hsusb: usb@e6590000 { 548 compatible = "renesas,usbhs-r8a77965", 549 "renesas,rcar-gen3-usbhs"; 550 reg = <0 0xe6590000 0 0x100>; 551 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 552 clocks = <&cpg CPG_MOD 704>; 553 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 554 <&usb_dmac1 0>, <&usb_dmac1 1>; 555 dma-names = "ch0", "ch1", "ch2", "ch3"; 556 renesas,buswait = <11>; 557 phys = <&usb2_phy0>; 558 phy-names = "usb"; 559 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 560 resets = <&cpg 704>; 561 status = "disabled"; 562 }; 563 564 usb_dmac0: dma-controller@e65a0000 { 565 compatible = "renesas,r8a77965-usb-dmac", 566 "renesas,usb-dmac"; 567 reg = <0 0xe65a0000 0 0x100>; 568 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH 569 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 570 interrupt-names = "ch0", "ch1"; 571 clocks = <&cpg CPG_MOD 330>; 572 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 573 resets = <&cpg 330>; 574 #dma-cells = <1>; 575 dma-channels = <2>; 576 }; 577 578 usb_dmac1: dma-controller@e65b0000 { 579 compatible = "renesas,r8a77965-usb-dmac", 580 "renesas,usb-dmac"; 581 reg = <0 0xe65b0000 0 0x100>; 582 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH 583 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 584 interrupt-names = "ch0", "ch1"; 585 clocks = <&cpg CPG_MOD 331>; 586 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 587 resets = <&cpg 331>; 588 #dma-cells = <1>; 589 dma-channels = <2>; 590 }; 591 592 usb3_phy0: usb-phy@e65ee000 { 593 compatible = "renesas,r8a77965-usb3-phy", 594 "renesas,rcar-gen3-usb3-phy"; 595 reg = <0 0xe65ee000 0 0x90>; 596 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 597 <&usb_extal_clk>; 598 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 599 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 600 resets = <&cpg 328>; 601 #phy-cells = <0>; 602 status = "disabled"; 603 }; 604 605 dmac0: dma-controller@e6700000 { 606 compatible = "renesas,dmac-r8a77965", 607 "renesas,rcar-dmac"; 608 reg = <0 0xe6700000 0 0x10000>; 609 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH 610 GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH 611 GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH 612 GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH 613 GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH 614 GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH 615 GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH 616 GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH 617 GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH 618 GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH 619 GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH 620 GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH 621 GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH 622 GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 623 GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH 624 GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH 625 GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 626 interrupt-names = "error", 627 "ch0", "ch1", "ch2", "ch3", 628 "ch4", "ch5", "ch6", "ch7", 629 "ch8", "ch9", "ch10", "ch11", 630 "ch12", "ch13", "ch14", "ch15"; 631 clocks = <&cpg CPG_MOD 219>; 632 clock-names = "fck"; 633 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 634 resets = <&cpg 219>; 635 #dma-cells = <1>; 636 dma-channels = <16>; 637 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 638 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 639 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 640 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 641 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 642 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 643 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 644 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 645 }; 646 647 dmac1: dma-controller@e7300000 { 648 compatible = "renesas,dmac-r8a77965", 649 "renesas,rcar-dmac"; 650 reg = <0 0xe7300000 0 0x10000>; 651 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH 652 GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH 653 GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH 654 GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH 655 GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH 656 GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH 657 GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH 658 GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH 659 GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH 660 GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH 661 GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH 662 GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH 663 GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH 664 GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH 665 GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH 666 GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH 667 GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 668 interrupt-names = "error", 669 "ch0", "ch1", "ch2", "ch3", 670 "ch4", "ch5", "ch6", "ch7", 671 "ch8", "ch9", "ch10", "ch11", 672 "ch12", "ch13", "ch14", "ch15"; 673 clocks = <&cpg CPG_MOD 218>; 674 clock-names = "fck"; 675 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 676 resets = <&cpg 218>; 677 #dma-cells = <1>; 678 dma-channels = <16>; 679 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 680 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 681 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 682 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 683 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 684 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 685 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 686 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 687 }; 688 689 dmac2: dma-controller@e7310000 { 690 compatible = "renesas,dmac-r8a77965", 691 "renesas,rcar-dmac"; 692 reg = <0 0xe7310000 0 0x10000>; 693 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH 694 GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH 695 GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH 696 GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH 697 GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH 698 GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH 699 GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH 700 GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH 701 GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH 702 GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 703 GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 704 GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH 705 GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH 706 GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH 707 GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH 708 GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 709 GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 710 interrupt-names = "error", 711 "ch0", "ch1", "ch2", "ch3", 712 "ch4", "ch5", "ch6", "ch7", 713 "ch8", "ch9", "ch10", "ch11", 714 "ch12", "ch13", "ch14", "ch15"; 715 clocks = <&cpg CPG_MOD 217>; 716 clock-names = "fck"; 717 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 718 resets = <&cpg 217>; 719 #dma-cells = <1>; 720 dma-channels = <16>; 721 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 722 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 723 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 724 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 725 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 726 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 727 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 728 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 729 }; 730 731 ipmmu_ds0: mmu@e6740000 { 732 compatible = "renesas,ipmmu-r8a77965"; 733 reg = <0 0xe6740000 0 0x1000>; 734 renesas,ipmmu-main = <&ipmmu_mm 0>; 735 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 736 #iommu-cells = <1>; 737 }; 738 739 ipmmu_ds1: mmu@e7740000 { 740 compatible = "renesas,ipmmu-r8a77965"; 741 reg = <0 0xe7740000 0 0x1000>; 742 renesas,ipmmu-main = <&ipmmu_mm 1>; 743 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 744 #iommu-cells = <1>; 745 }; 746 747 ipmmu_hc: mmu@e6570000 { 748 compatible = "renesas,ipmmu-r8a77965"; 749 reg = <0 0xe6570000 0 0x1000>; 750 renesas,ipmmu-main = <&ipmmu_mm 2>; 751 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 752 #iommu-cells = <1>; 753 }; 754 755 ipmmu_ir: mmu@ff8b0000 { 756 compatible = "renesas,ipmmu-r8a77965"; 757 reg = <0 0xff8b0000 0 0x1000>; 758 renesas,ipmmu-main = <&ipmmu_mm 3>; 759 power-domains = <&sysc R8A77965_PD_A3IR>; 760 #iommu-cells = <1>; 761 }; 762 763 ipmmu_mm: mmu@e67b0000 { 764 compatible = "renesas,ipmmu-r8a77965"; 765 reg = <0 0xe67b0000 0 0x1000>; 766 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 767 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 768 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 769 #iommu-cells = <1>; 770 }; 771 772 ipmmu_mp: mmu@ec670000 { 773 compatible = "renesas,ipmmu-r8a77965"; 774 reg = <0 0xec670000 0 0x1000>; 775 renesas,ipmmu-main = <&ipmmu_mm 4>; 776 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 777 #iommu-cells = <1>; 778 }; 779 780 ipmmu_pv0: mmu@fd800000 { 781 compatible = "renesas,ipmmu-r8a77965"; 782 reg = <0 0xfd800000 0 0x1000>; 783 renesas,ipmmu-main = <&ipmmu_mm 6>; 784 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 785 #iommu-cells = <1>; 786 }; 787 788 ipmmu_rt: mmu@ffc80000 { 789 compatible = "renesas,ipmmu-r8a77965"; 790 reg = <0 0xffc80000 0 0x1000>; 791 renesas,ipmmu-main = <&ipmmu_mm 10>; 792 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 793 #iommu-cells = <1>; 794 }; 795 796 ipmmu_vc0: mmu@fe6b0000 { 797 compatible = "renesas,ipmmu-r8a77965"; 798 reg = <0 0xfe6b0000 0 0x1000>; 799 renesas,ipmmu-main = <&ipmmu_mm 12>; 800 power-domains = <&sysc R8A77965_PD_A3VC>; 801 #iommu-cells = <1>; 802 }; 803 804 ipmmu_vi0: mmu@febd0000 { 805 compatible = "renesas,ipmmu-r8a77965"; 806 reg = <0 0xfebd0000 0 0x1000>; 807 renesas,ipmmu-main = <&ipmmu_mm 14>; 808 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 809 #iommu-cells = <1>; 810 }; 811 812 ipmmu_vp0: mmu@fe990000 { 813 compatible = "renesas,ipmmu-r8a77965"; 814 reg = <0 0xfe990000 0 0x1000>; 815 renesas,ipmmu-main = <&ipmmu_mm 16>; 816 power-domains = <&sysc R8A77965_PD_A3VP>; 817 #iommu-cells = <1>; 818 }; 819 820 avb: ethernet@e6800000 { 821 compatible = "renesas,etheravb-r8a77965", 822 "renesas,etheravb-rcar-gen3"; 823 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 824 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 825 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 826 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 827 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 840 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 842 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 844 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 845 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 846 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 847 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 848 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 849 interrupt-names = "ch0", "ch1", "ch2", "ch3", 850 "ch4", "ch5", "ch6", "ch7", 851 "ch8", "ch9", "ch10", "ch11", 852 "ch12", "ch13", "ch14", "ch15", 853 "ch16", "ch17", "ch18", "ch19", 854 "ch20", "ch21", "ch22", "ch23", 855 "ch24"; 856 clocks = <&cpg CPG_MOD 812>; 857 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 858 resets = <&cpg 812>; 859 phy-mode = "rgmii"; 860 #address-cells = <1>; 861 #size-cells = <0>; 862 status = "disabled"; 863 }; 864 865 pwm0: pwm@e6e30000 { 866 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 867 reg = <0 0xe6e30000 0 8>; 868 #pwm-cells = <2>; 869 clocks = <&cpg CPG_MOD 523>; 870 resets = <&cpg 523>; 871 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 872 status = "disabled"; 873 }; 874 875 pwm1: pwm@e6e31000 { 876 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 877 reg = <0 0xe6e31000 0 8>; 878 #pwm-cells = <2>; 879 clocks = <&cpg CPG_MOD 523>; 880 resets = <&cpg 523>; 881 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 882 status = "disabled"; 883 }; 884 885 pwm2: pwm@e6e32000 { 886 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 887 reg = <0 0xe6e32000 0 8>; 888 #pwm-cells = <2>; 889 clocks = <&cpg CPG_MOD 523>; 890 resets = <&cpg 523>; 891 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 892 status = "disabled"; 893 }; 894 895 pwm3: pwm@e6e33000 { 896 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 897 reg = <0 0xe6e33000 0 8>; 898 #pwm-cells = <2>; 899 clocks = <&cpg CPG_MOD 523>; 900 resets = <&cpg 523>; 901 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 902 status = "disabled"; 903 }; 904 905 pwm4: pwm@e6e34000 { 906 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 907 reg = <0 0xe6e34000 0 8>; 908 #pwm-cells = <2>; 909 clocks = <&cpg CPG_MOD 523>; 910 resets = <&cpg 523>; 911 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 912 status = "disabled"; 913 }; 914 915 pwm5: pwm@e6e35000 { 916 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 917 reg = <0 0xe6e35000 0 8>; 918 #pwm-cells = <2>; 919 clocks = <&cpg CPG_MOD 523>; 920 resets = <&cpg 523>; 921 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 922 status = "disabled"; 923 }; 924 925 pwm6: pwm@e6e36000 { 926 compatible = "renesas,pwm-r8a77965", "renesas,pwm-rcar"; 927 reg = <0 0xe6e36000 0 8>; 928 #pwm-cells = <2>; 929 clocks = <&cpg CPG_MOD 523>; 930 resets = <&cpg 523>; 931 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 932 status = "disabled"; 933 }; 934 935 scif0: serial@e6e60000 { 936 compatible = "renesas,scif-r8a77965", 937 "renesas,rcar-gen3-scif", "renesas,scif"; 938 reg = <0 0xe6e60000 0 64>; 939 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 940 clocks = <&cpg CPG_MOD 207>, 941 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 942 <&scif_clk>; 943 clock-names = "fck", "brg_int", "scif_clk"; 944 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 945 <&dmac2 0x51>, <&dmac2 0x50>; 946 dma-names = "tx", "rx", "tx", "rx"; 947 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 948 resets = <&cpg 207>; 949 status = "disabled"; 950 }; 951 952 scif1: serial@e6e68000 { 953 compatible = "renesas,scif-r8a77965", 954 "renesas,rcar-gen3-scif", "renesas,scif"; 955 reg = <0 0xe6e68000 0 64>; 956 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 957 clocks = <&cpg CPG_MOD 206>, 958 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 959 <&scif_clk>; 960 clock-names = "fck", "brg_int", "scif_clk"; 961 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 962 <&dmac2 0x53>, <&dmac2 0x52>; 963 dma-names = "tx", "rx", "tx", "rx"; 964 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 965 resets = <&cpg 206>; 966 status = "disabled"; 967 }; 968 969 scif2: serial@e6e88000 { 970 compatible = "renesas,scif-r8a77965", 971 "renesas,rcar-gen3-scif", "renesas,scif"; 972 reg = <0 0xe6e88000 0 64>; 973 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 974 clocks = <&cpg CPG_MOD 310>, 975 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 976 <&scif_clk>; 977 clock-names = "fck", "brg_int", "scif_clk"; 978 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 979 <&dmac2 0x13>, <&dmac2 0x12>; 980 dma-names = "tx", "rx", "tx", "rx"; 981 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 982 resets = <&cpg 310>; 983 status = "disabled"; 984 }; 985 986 scif3: serial@e6c50000 { 987 compatible = "renesas,scif-r8a77965", 988 "renesas,rcar-gen3-scif", "renesas,scif"; 989 reg = <0 0xe6c50000 0 64>; 990 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 991 clocks = <&cpg CPG_MOD 204>, 992 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 993 <&scif_clk>; 994 clock-names = "fck", "brg_int", "scif_clk"; 995 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 996 dma-names = "tx", "rx"; 997 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 998 resets = <&cpg 204>; 999 status = "disabled"; 1000 }; 1001 1002 scif4: serial@e6c40000 { 1003 compatible = "renesas,scif-r8a77965", 1004 "renesas,rcar-gen3-scif", "renesas,scif"; 1005 reg = <0 0xe6c40000 0 64>; 1006 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1007 clocks = <&cpg CPG_MOD 203>, 1008 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1009 <&scif_clk>; 1010 clock-names = "fck", "brg_int", "scif_clk"; 1011 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1012 dma-names = "tx", "rx"; 1013 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1014 resets = <&cpg 203>; 1015 status = "disabled"; 1016 }; 1017 1018 scif5: serial@e6f30000 { 1019 compatible = "renesas,scif-r8a77965", 1020 "renesas,rcar-gen3-scif", "renesas,scif"; 1021 reg = <0 0xe6f30000 0 64>; 1022 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1023 clocks = <&cpg CPG_MOD 202>, 1024 <&cpg CPG_CORE R8A77965_CLK_S3D1>, 1025 <&scif_clk>; 1026 clock-names = "fck", "brg_int", "scif_clk"; 1027 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1028 <&dmac2 0x5b>, <&dmac2 0x5a>; 1029 dma-names = "tx", "rx", "tx", "rx"; 1030 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1031 resets = <&cpg 202>; 1032 status = "disabled"; 1033 }; 1034 1035 msiof0: spi@e6e90000 { 1036 compatible = "renesas,msiof-r8a77965", 1037 "renesas,rcar-gen3-msiof"; 1038 reg = <0 0xe6e90000 0 0x0064>; 1039 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1040 clocks = <&cpg CPG_MOD 211>; 1041 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1042 <&dmac2 0x41>, <&dmac2 0x40>; 1043 dma-names = "tx", "rx", "tx", "rx"; 1044 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1045 resets = <&cpg 211>; 1046 #address-cells = <1>; 1047 #size-cells = <0>; 1048 status = "disabled"; 1049 }; 1050 1051 msiof1: spi@e6ea0000 { 1052 compatible = "renesas,msiof-r8a77965", 1053 "renesas,rcar-gen3-msiof"; 1054 reg = <0 0xe6ea0000 0 0x0064>; 1055 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1056 clocks = <&cpg CPG_MOD 210>; 1057 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1058 <&dmac2 0x43>, <&dmac2 0x42>; 1059 dma-names = "tx", "rx", "tx", "rx"; 1060 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1061 resets = <&cpg 210>; 1062 #address-cells = <1>; 1063 #size-cells = <0>; 1064 status = "disabled"; 1065 }; 1066 1067 msiof2: spi@e6c00000 { 1068 compatible = "renesas,msiof-r8a77965", 1069 "renesas,rcar-gen3-msiof"; 1070 reg = <0 0xe6c00000 0 0x0064>; 1071 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1072 clocks = <&cpg CPG_MOD 209>; 1073 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1074 dma-names = "tx", "rx"; 1075 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1076 resets = <&cpg 209>; 1077 #address-cells = <1>; 1078 #size-cells = <0>; 1079 status = "disabled"; 1080 }; 1081 1082 msiof3: spi@e6c10000 { 1083 compatible = "renesas,msiof-r8a77965", 1084 "renesas,rcar-gen3-msiof"; 1085 reg = <0 0xe6c10000 0 0x0064>; 1086 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1087 clocks = <&cpg CPG_MOD 208>; 1088 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1089 dma-names = "tx", "rx"; 1090 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1091 resets = <&cpg 208>; 1092 #address-cells = <1>; 1093 #size-cells = <0>; 1094 status = "disabled"; 1095 }; 1096 1097 vin0: video@e6ef0000 { 1098 compatible = "renesas,vin-r8a77965"; 1099 reg = <0 0xe6ef0000 0 0x1000>; 1100 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1101 clocks = <&cpg CPG_MOD 811>; 1102 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1103 resets = <&cpg 811>; 1104 renesas,id = <0>; 1105 status = "disabled"; 1106 1107 ports { 1108 #address-cells = <1>; 1109 #size-cells = <0>; 1110 1111 port@1 { 1112 #address-cells = <1>; 1113 #size-cells = <0>; 1114 1115 reg = <1>; 1116 1117 vin0csi20: endpoint@0 { 1118 reg = <0>; 1119 remote-endpoint= <&csi20vin0>; 1120 }; 1121 vin0csi40: endpoint@2 { 1122 reg = <2>; 1123 remote-endpoint= <&csi40vin0>; 1124 }; 1125 }; 1126 }; 1127 }; 1128 1129 vin1: video@e6ef1000 { 1130 compatible = "renesas,vin-r8a77965"; 1131 reg = <0 0xe6ef1000 0 0x1000>; 1132 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1133 clocks = <&cpg CPG_MOD 810>; 1134 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1135 resets = <&cpg 810>; 1136 renesas,id = <1>; 1137 status = "disabled"; 1138 1139 ports { 1140 #address-cells = <1>; 1141 #size-cells = <0>; 1142 1143 port@1 { 1144 #address-cells = <1>; 1145 #size-cells = <0>; 1146 1147 reg = <1>; 1148 1149 vin1csi20: endpoint@0 { 1150 reg = <0>; 1151 remote-endpoint= <&csi20vin1>; 1152 }; 1153 vin1csi40: endpoint@2 { 1154 reg = <2>; 1155 remote-endpoint= <&csi40vin1>; 1156 }; 1157 }; 1158 }; 1159 }; 1160 1161 vin2: video@e6ef2000 { 1162 compatible = "renesas,vin-r8a77965"; 1163 reg = <0 0xe6ef2000 0 0x1000>; 1164 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1165 clocks = <&cpg CPG_MOD 809>; 1166 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1167 resets = <&cpg 809>; 1168 renesas,id = <2>; 1169 status = "disabled"; 1170 1171 ports { 1172 #address-cells = <1>; 1173 #size-cells = <0>; 1174 1175 port@1 { 1176 #address-cells = <1>; 1177 #size-cells = <0>; 1178 1179 reg = <1>; 1180 1181 vin2csi20: endpoint@0 { 1182 reg = <0>; 1183 remote-endpoint= <&csi20vin2>; 1184 }; 1185 vin2csi40: endpoint@2 { 1186 reg = <2>; 1187 remote-endpoint= <&csi40vin2>; 1188 }; 1189 }; 1190 }; 1191 }; 1192 1193 vin3: video@e6ef3000 { 1194 compatible = "renesas,vin-r8a77965"; 1195 reg = <0 0xe6ef3000 0 0x1000>; 1196 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1197 clocks = <&cpg CPG_MOD 808>; 1198 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1199 resets = <&cpg 808>; 1200 renesas,id = <3>; 1201 status = "disabled"; 1202 1203 ports { 1204 #address-cells = <1>; 1205 #size-cells = <0>; 1206 1207 port@1 { 1208 #address-cells = <1>; 1209 #size-cells = <0>; 1210 1211 reg = <1>; 1212 1213 vin3csi20: endpoint@0 { 1214 reg = <0>; 1215 remote-endpoint= <&csi20vin3>; 1216 }; 1217 vin3csi40: endpoint@2 { 1218 reg = <2>; 1219 remote-endpoint= <&csi40vin3>; 1220 }; 1221 }; 1222 }; 1223 }; 1224 1225 vin4: video@e6ef4000 { 1226 compatible = "renesas,vin-r8a77965"; 1227 reg = <0 0xe6ef4000 0 0x1000>; 1228 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1229 clocks = <&cpg CPG_MOD 807>; 1230 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1231 resets = <&cpg 807>; 1232 renesas,id = <4>; 1233 status = "disabled"; 1234 1235 ports { 1236 #address-cells = <1>; 1237 #size-cells = <0>; 1238 1239 port@1 { 1240 #address-cells = <1>; 1241 #size-cells = <0>; 1242 1243 reg = <1>; 1244 1245 vin4csi20: endpoint@0 { 1246 reg = <0>; 1247 remote-endpoint= <&csi20vin4>; 1248 }; 1249 vin4csi40: endpoint@2 { 1250 reg = <2>; 1251 remote-endpoint= <&csi40vin4>; 1252 }; 1253 }; 1254 }; 1255 }; 1256 1257 vin5: video@e6ef5000 { 1258 compatible = "renesas,vin-r8a77965"; 1259 reg = <0 0xe6ef5000 0 0x1000>; 1260 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1261 clocks = <&cpg CPG_MOD 806>; 1262 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1263 resets = <&cpg 806>; 1264 renesas,id = <5>; 1265 status = "disabled"; 1266 1267 ports { 1268 #address-cells = <1>; 1269 #size-cells = <0>; 1270 1271 port@1 { 1272 #address-cells = <1>; 1273 #size-cells = <0>; 1274 1275 reg = <1>; 1276 1277 vin5csi20: endpoint@0 { 1278 reg = <0>; 1279 remote-endpoint= <&csi20vin5>; 1280 }; 1281 vin5csi40: endpoint@2 { 1282 reg = <2>; 1283 remote-endpoint= <&csi40vin5>; 1284 }; 1285 }; 1286 }; 1287 }; 1288 1289 vin6: video@e6ef6000 { 1290 compatible = "renesas,vin-r8a77965"; 1291 reg = <0 0xe6ef6000 0 0x1000>; 1292 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1293 clocks = <&cpg CPG_MOD 805>; 1294 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1295 resets = <&cpg 805>; 1296 renesas,id = <6>; 1297 status = "disabled"; 1298 1299 ports { 1300 #address-cells = <1>; 1301 #size-cells = <0>; 1302 1303 port@1 { 1304 #address-cells = <1>; 1305 #size-cells = <0>; 1306 1307 reg = <1>; 1308 1309 vin6csi20: endpoint@0 { 1310 reg = <0>; 1311 remote-endpoint= <&csi20vin6>; 1312 }; 1313 vin6csi40: endpoint@2 { 1314 reg = <2>; 1315 remote-endpoint= <&csi40vin6>; 1316 }; 1317 }; 1318 }; 1319 }; 1320 1321 vin7: video@e6ef7000 { 1322 compatible = "renesas,vin-r8a77965"; 1323 reg = <0 0xe6ef7000 0 0x1000>; 1324 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1325 clocks = <&cpg CPG_MOD 804>; 1326 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1327 resets = <&cpg 804>; 1328 renesas,id = <7>; 1329 status = "disabled"; 1330 1331 ports { 1332 #address-cells = <1>; 1333 #size-cells = <0>; 1334 1335 port@1 { 1336 #address-cells = <1>; 1337 #size-cells = <0>; 1338 1339 reg = <1>; 1340 1341 vin7csi20: endpoint@0 { 1342 reg = <0>; 1343 remote-endpoint= <&csi20vin7>; 1344 }; 1345 vin7csi40: endpoint@2 { 1346 reg = <2>; 1347 remote-endpoint= <&csi40vin7>; 1348 }; 1349 }; 1350 }; 1351 }; 1352 1353 rcar_sound: sound@ec500000 { 1354 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1355 <0 0xec5a0000 0 0x100>, /* ADG */ 1356 <0 0xec540000 0 0x1000>, /* SSIU */ 1357 <0 0xec541000 0 0x280>, /* SSI */ 1358 <0 0xec740000 0 0x200>; /* Audio DMAC peri peri*/ 1359 /* placeholder */ 1360 1361 rcar_sound,dvc { 1362 dvc0: dvc-0 { 1363 }; 1364 dvc1: dvc-1 { 1365 }; 1366 }; 1367 1368 rcar_sound,src { 1369 src0: src-0 { 1370 }; 1371 src1: src-1 { 1372 }; 1373 }; 1374 1375 rcar_sound,ssi { 1376 ssi0: ssi-0 { 1377 }; 1378 ssi1: ssi-1 { 1379 }; 1380 }; 1381 1382 ports { 1383 #address-cells = <1>; 1384 #size-cells = <0>; 1385 port@0 { 1386 reg = <0>; 1387 }; 1388 port@1 { 1389 reg = <1>; 1390 }; 1391 }; 1392 }; 1393 1394 xhci0: usb@ee000000 { 1395 compatible = "renesas,xhci-r8a77965", 1396 "renesas,rcar-gen3-xhci"; 1397 reg = <0 0xee000000 0 0xc00>; 1398 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1399 clocks = <&cpg CPG_MOD 328>; 1400 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1401 resets = <&cpg 328>; 1402 status = "disabled"; 1403 }; 1404 1405 usb3_peri0: usb@ee020000 { 1406 compatible = "renesas,r8a77965-usb3-peri", 1407 "renesas,rcar-gen3-usb3-peri"; 1408 reg = <0 0xee020000 0 0x400>; 1409 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1410 clocks = <&cpg CPG_MOD 328>; 1411 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1412 resets = <&cpg 328>; 1413 status = "disabled"; 1414 }; 1415 1416 ohci0: usb@ee080000 { 1417 compatible = "generic-ohci"; 1418 reg = <0 0xee080000 0 0x100>; 1419 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1420 clocks = <&cpg CPG_MOD 703>; 1421 phys = <&usb2_phy0>; 1422 phy-names = "usb"; 1423 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1424 resets = <&cpg 703>; 1425 status = "disabled"; 1426 }; 1427 1428 ohci1: usb@ee0a0000 { 1429 compatible = "generic-ohci"; 1430 reg = <0 0xee0a0000 0 0x100>; 1431 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1432 clocks = <&cpg CPG_MOD 702>; 1433 phys = <&usb2_phy1>; 1434 phy-names = "usb"; 1435 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1436 resets = <&cpg 702>; 1437 status = "disabled"; 1438 }; 1439 1440 ehci0: usb@ee080100 { 1441 compatible = "generic-ehci"; 1442 reg = <0 0xee080100 0 0x100>; 1443 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1444 clocks = <&cpg CPG_MOD 703>; 1445 phys = <&usb2_phy0>; 1446 phy-names = "usb"; 1447 companion = <&ohci0>; 1448 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1449 resets = <&cpg 703>; 1450 status = "disabled"; 1451 }; 1452 1453 ehci1: usb@ee0a0100 { 1454 compatible = "generic-ehci"; 1455 reg = <0 0xee0a0100 0 0x100>; 1456 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 1457 clocks = <&cpg CPG_MOD 702>; 1458 phys = <&usb2_phy1>; 1459 phy-names = "usb"; 1460 companion = <&ohci1>; 1461 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1462 resets = <&cpg 702>; 1463 status = "disabled"; 1464 }; 1465 1466 usb2_phy0: usb-phy@ee080200 { 1467 compatible = "renesas,usb2-phy-r8a77965", 1468 "renesas,rcar-gen3-usb2-phy"; 1469 reg = <0 0xee080200 0 0x700>; 1470 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1471 clocks = <&cpg CPG_MOD 703>; 1472 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1473 resets = <&cpg 703>; 1474 #phy-cells = <0>; 1475 status = "disabled"; 1476 }; 1477 1478 usb2_phy1: usb-phy@ee0a0200 { 1479 compatible = "renesas,usb2-phy-r8a77965", 1480 "renesas,rcar-gen3-usb2-phy"; 1481 reg = <0 0xee0a0200 0 0x700>; 1482 clocks = <&cpg CPG_MOD 702>; 1483 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1484 resets = <&cpg 702>; 1485 #phy-cells = <0>; 1486 status = "disabled"; 1487 }; 1488 1489 sdhi0: sd@ee100000 { 1490 compatible = "renesas,sdhi-r8a77965", 1491 "renesas,rcar-gen3-sdhi"; 1492 reg = <0 0xee100000 0 0x2000>; 1493 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1494 clocks = <&cpg CPG_MOD 314>; 1495 max-frequency = <200000000>; 1496 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1497 resets = <&cpg 314>; 1498 status = "disabled"; 1499 }; 1500 1501 sdhi1: sd@ee120000 { 1502 compatible = "renesas,sdhi-r8a77965", 1503 "renesas,rcar-gen3-sdhi"; 1504 reg = <0 0xee120000 0 0x2000>; 1505 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1506 clocks = <&cpg CPG_MOD 313>; 1507 max-frequency = <200000000>; 1508 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1509 resets = <&cpg 313>; 1510 status = "disabled"; 1511 }; 1512 1513 sdhi2: sd@ee140000 { 1514 compatible = "renesas,sdhi-r8a77965", 1515 "renesas,rcar-gen3-sdhi"; 1516 reg = <0 0xee140000 0 0x2000>; 1517 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 1518 clocks = <&cpg CPG_MOD 312>; 1519 max-frequency = <200000000>; 1520 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1521 resets = <&cpg 312>; 1522 status = "disabled"; 1523 }; 1524 1525 sdhi3: sd@ee160000 { 1526 compatible = "renesas,sdhi-r8a77965", 1527 "renesas,rcar-gen3-sdhi"; 1528 reg = <0 0xee160000 0 0x2000>; 1529 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1530 clocks = <&cpg CPG_MOD 311>; 1531 max-frequency = <200000000>; 1532 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1533 resets = <&cpg 311>; 1534 status = "disabled"; 1535 }; 1536 1537 gic: interrupt-controller@f1010000 { 1538 compatible = "arm,gic-400"; 1539 #interrupt-cells = <3>; 1540 #address-cells = <0>; 1541 interrupt-controller; 1542 reg = <0x0 0xf1010000 0 0x1000>, 1543 <0x0 0xf1020000 0 0x20000>, 1544 <0x0 0xf1040000 0 0x20000>, 1545 <0x0 0xf1060000 0 0x20000>; 1546 interrupts = <GIC_PPI 9 1547 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1548 clocks = <&cpg CPG_MOD 408>; 1549 clock-names = "clk"; 1550 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1551 resets = <&cpg 408>; 1552 }; 1553 1554 pciec0: pcie@fe000000 { 1555 compatible = "renesas,pcie-r8a77965", 1556 "renesas,pcie-rcar-gen3"; 1557 reg = <0 0xfe000000 0 0x80000>; 1558 #address-cells = <3>; 1559 #size-cells = <2>; 1560 bus-range = <0x00 0xff>; 1561 device_type = "pci"; 1562 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 1563 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 1564 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 1565 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1566 /* Map all possible DDR as inbound ranges */ 1567 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1568 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1569 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1570 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1571 #interrupt-cells = <1>; 1572 interrupt-map-mask = <0 0 0 0>; 1573 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1574 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1575 clock-names = "pcie", "pcie_bus"; 1576 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1577 resets = <&cpg 319>; 1578 status = "disabled"; 1579 }; 1580 1581 pciec1: pcie@ee800000 { 1582 compatible = "renesas,pcie-r8a77965", 1583 "renesas,pcie-rcar-gen3"; 1584 reg = <0 0xee800000 0 0x80000>; 1585 #address-cells = <3>; 1586 #size-cells = <2>; 1587 bus-range = <0x00 0xff>; 1588 device_type = "pci"; 1589 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000 1590 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000 1591 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000 1592 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 1593 /* Map all possible DDR as inbound ranges */ 1594 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x80000000>; 1595 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 1596 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 1597 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 1598 #interrupt-cells = <1>; 1599 interrupt-map-mask = <0 0 0 0>; 1600 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 1601 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 1602 clock-names = "pcie", "pcie_bus"; 1603 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1604 resets = <&cpg 318>; 1605 status = "disabled"; 1606 }; 1607 1608 fcpf0: fcp@fe950000 { 1609 compatible = "renesas,fcpf"; 1610 reg = <0 0xfe950000 0 0x200>; 1611 clocks = <&cpg CPG_MOD 615>; 1612 power-domains = <&sysc R8A77965_PD_A3VP>; 1613 resets = <&cpg 615>; 1614 }; 1615 1616 vspb: vsp@fe960000 { 1617 compatible = "renesas,vsp2"; 1618 reg = <0 0xfe960000 0 0x8000>; 1619 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1620 clocks = <&cpg CPG_MOD 626>; 1621 power-domains = <&sysc R8A77965_PD_A3VP>; 1622 resets = <&cpg 626>; 1623 1624 renesas,fcp = <&fcpvb0>; 1625 }; 1626 1627 fcpvb0: fcp@fe96f000 { 1628 compatible = "renesas,fcpv"; 1629 reg = <0 0xfe96f000 0 0x200>; 1630 clocks = <&cpg CPG_MOD 607>; 1631 power-domains = <&sysc R8A77965_PD_A3VP>; 1632 resets = <&cpg 607>; 1633 }; 1634 1635 vspi0: vsp@fe9a0000 { 1636 compatible = "renesas,vsp2"; 1637 reg = <0 0xfe9a0000 0 0x8000>; 1638 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1639 clocks = <&cpg CPG_MOD 631>; 1640 power-domains = <&sysc R8A77965_PD_A3VP>; 1641 resets = <&cpg 631>; 1642 1643 renesas,fcp = <&fcpvi0>; 1644 }; 1645 1646 fcpvi0: fcp@fe9af000 { 1647 compatible = "renesas,fcpv"; 1648 reg = <0 0xfe9af000 0 0x200>; 1649 clocks = <&cpg CPG_MOD 611>; 1650 power-domains = <&sysc R8A77965_PD_A3VP>; 1651 resets = <&cpg 611>; 1652 }; 1653 1654 vspd0: vsp@fea20000 { 1655 compatible = "renesas,vsp2"; 1656 reg = <0 0xfea20000 0 0x5000>; 1657 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1658 clocks = <&cpg CPG_MOD 623>; 1659 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1660 resets = <&cpg 623>; 1661 1662 renesas,fcp = <&fcpvd0>; 1663 }; 1664 1665 fcpvd0: fcp@fea27000 { 1666 compatible = "renesas,fcpv"; 1667 reg = <0 0xfea27000 0 0x200>; 1668 clocks = <&cpg CPG_MOD 603>; 1669 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1670 resets = <&cpg 603>; 1671 }; 1672 1673 vspd1: vsp@fea28000 { 1674 compatible = "renesas,vsp2"; 1675 reg = <0 0xfea28000 0 0x5000>; 1676 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1677 clocks = <&cpg CPG_MOD 622>; 1678 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1679 resets = <&cpg 622>; 1680 1681 renesas,fcp = <&fcpvd1>; 1682 }; 1683 1684 fcpvd1: fcp@fea2f000 { 1685 compatible = "renesas,fcpv"; 1686 reg = <0 0xfea2f000 0 0x200>; 1687 clocks = <&cpg CPG_MOD 602>; 1688 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1689 resets = <&cpg 602>; 1690 }; 1691 1692 csi20: csi2@fea80000 { 1693 compatible = "renesas,r8a77965-csi2"; 1694 reg = <0 0xfea80000 0 0x10000>; 1695 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 1696 clocks = <&cpg CPG_MOD 714>; 1697 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1698 resets = <&cpg 714>; 1699 status = "disabled"; 1700 1701 ports { 1702 #address-cells = <1>; 1703 #size-cells = <0>; 1704 1705 port@1 { 1706 #address-cells = <1>; 1707 #size-cells = <0>; 1708 1709 reg = <1>; 1710 1711 csi20vin0: endpoint@0 { 1712 reg = <0>; 1713 remote-endpoint = <&vin0csi20>; 1714 }; 1715 csi20vin1: endpoint@1 { 1716 reg = <1>; 1717 remote-endpoint = <&vin1csi20>; 1718 }; 1719 csi20vin2: endpoint@2 { 1720 reg = <2>; 1721 remote-endpoint = <&vin2csi20>; 1722 }; 1723 csi20vin3: endpoint@3 { 1724 reg = <3>; 1725 remote-endpoint = <&vin3csi20>; 1726 }; 1727 csi20vin4: endpoint@4 { 1728 reg = <4>; 1729 remote-endpoint = <&vin4csi20>; 1730 }; 1731 csi20vin5: endpoint@5 { 1732 reg = <5>; 1733 remote-endpoint = <&vin5csi20>; 1734 }; 1735 csi20vin6: endpoint@6 { 1736 reg = <6>; 1737 remote-endpoint = <&vin6csi20>; 1738 }; 1739 csi20vin7: endpoint@7 { 1740 reg = <7>; 1741 remote-endpoint = <&vin7csi20>; 1742 }; 1743 }; 1744 }; 1745 }; 1746 1747 csi40: csi2@feaa0000 { 1748 compatible = "renesas,r8a77965-csi2"; 1749 reg = <0 0xfeaa0000 0 0x10000>; 1750 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1751 clocks = <&cpg CPG_MOD 716>; 1752 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1753 resets = <&cpg 716>; 1754 status = "disabled"; 1755 1756 ports { 1757 #address-cells = <1>; 1758 #size-cells = <0>; 1759 1760 port@1 { 1761 #address-cells = <1>; 1762 #size-cells = <0>; 1763 1764 reg = <1>; 1765 1766 csi40vin0: endpoint@0 { 1767 reg = <0>; 1768 remote-endpoint = <&vin0csi40>; 1769 }; 1770 csi40vin1: endpoint@1 { 1771 reg = <1>; 1772 remote-endpoint = <&vin1csi40>; 1773 }; 1774 csi40vin2: endpoint@2 { 1775 reg = <2>; 1776 remote-endpoint = <&vin2csi40>; 1777 }; 1778 csi40vin3: endpoint@3 { 1779 reg = <3>; 1780 remote-endpoint = <&vin3csi40>; 1781 }; 1782 csi40vin4: endpoint@4 { 1783 reg = <4>; 1784 remote-endpoint = <&vin4csi40>; 1785 }; 1786 csi40vin5: endpoint@5 { 1787 reg = <5>; 1788 remote-endpoint = <&vin5csi40>; 1789 }; 1790 csi40vin6: endpoint@6 { 1791 reg = <6>; 1792 remote-endpoint = <&vin6csi40>; 1793 }; 1794 csi40vin7: endpoint@7 { 1795 reg = <7>; 1796 remote-endpoint = <&vin7csi40>; 1797 }; 1798 }; 1799 }; 1800 }; 1801 1802 hdmi0: hdmi@fead0000 { 1803 compatible = "renesas,r8a77965-hdmi", 1804 "renesas,rcar-gen3-hdmi"; 1805 reg = <0 0xfead0000 0 0x10000>; 1806 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 1807 clocks = <&cpg CPG_MOD 729>, 1808 <&cpg CPG_CORE R8A77965_CLK_HDMI>; 1809 clock-names = "iahb", "isfr"; 1810 power-domains = <&sysc R8A77965_PD_ALWAYS_ON>; 1811 resets = <&cpg 729>; 1812 status = "disabled"; 1813 1814 ports { 1815 #address-cells = <1>; 1816 #size-cells = <0>; 1817 port@0 { 1818 reg = <0>; 1819 dw_hdmi0_in: endpoint { 1820 remote-endpoint = <&du_out_hdmi0>; 1821 }; 1822 }; 1823 port@1 { 1824 reg = <1>; 1825 }; 1826 }; 1827 }; 1828 1829 du: display@feb00000 { 1830 compatible = "renesas,du-r8a77965"; 1831 reg = <0 0xfeb00000 0 0x80000>; 1832 reg-names = "du"; 1833 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1834 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 1835 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 1836 clocks = <&cpg CPG_MOD 724>, 1837 <&cpg CPG_MOD 723>, 1838 <&cpg CPG_MOD 721>; 1839 clock-names = "du.0", "du.1", "du.3"; 1840 status = "disabled"; 1841 1842 vsps = <&vspd0 0 &vspd1 0 &vspd0 1>; 1843 1844 ports { 1845 #address-cells = <1>; 1846 #size-cells = <0>; 1847 1848 port@0 { 1849 reg = <0>; 1850 du_out_rgb: endpoint { 1851 }; 1852 }; 1853 port@1 { 1854 reg = <1>; 1855 du_out_hdmi0: endpoint { 1856 remote-endpoint = <&dw_hdmi0_in>; 1857 }; 1858 }; 1859 port@2 { 1860 reg = <2>; 1861 du_out_lvds0: endpoint { 1862 }; 1863 }; 1864 }; 1865 }; 1866 1867 prr: chipid@fff00044 { 1868 compatible = "renesas,prr"; 1869 reg = <0 0xfff00044 0 4>; 1870 }; 1871 }; 1872 1873 timer { 1874 compatible = "arm,armv8-timer"; 1875 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1876 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1877 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 1878 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 1879 }; 1880 1881 thermal-zones { 1882 sensor_thermal1: sensor-thermal1 { 1883 polling-delay-passive = <250>; 1884 polling-delay = <1000>; 1885 thermal-sensors = <&tsc 0>; 1886 1887 trips { 1888 sensor1_crit: sensor1-crit { 1889 temperature = <120000>; 1890 hysteresis = <1000>; 1891 type = "critical"; 1892 }; 1893 }; 1894 }; 1895 1896 sensor_thermal2: sensor-thermal2 { 1897 polling-delay-passive = <250>; 1898 polling-delay = <1000>; 1899 thermal-sensors = <&tsc 1>; 1900 1901 trips { 1902 sensor2_crit: sensor2-crit { 1903 temperature = <120000>; 1904 hysteresis = <1000>; 1905 type = "critical"; 1906 }; 1907 }; 1908 }; 1909 1910 sensor_thermal3: sensor-thermal3 { 1911 polling-delay-passive = <250>; 1912 polling-delay = <1000>; 1913 thermal-sensors = <&tsc 2>; 1914 1915 trips { 1916 sensor3_crit: sensor3-crit { 1917 temperature = <120000>; 1918 hysteresis = <1000>; 1919 type = "critical"; 1920 }; 1921 }; 1922 }; 1923 }; 1924 1925 /* External USB clocks - can be overridden by the board */ 1926 usb3s0_clk: usb3s0 { 1927 compatible = "fixed-clock"; 1928 #clock-cells = <0>; 1929 clock-frequency = <0>; 1930 }; 1931 1932 usb_extal_clk: usb_extal { 1933 compatible = "fixed-clock"; 1934 #clock-cells = <0>; 1935 clock-frequency = <0>; 1936 }; 1937}; 1938