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1 /*
2  * Based on arch/arm/kernel/sys_arm.c
3  *
4  * Copyright (C) People who wrote linux/arch/i386/kernel/sys_i386.c
5  * Copyright (C) 1995, 1996 Russell King.
6  * Copyright (C) 2012 ARM Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19  */
20 
21 #include <linux/compat.h>
22 #include <linux/cpufeature.h>
23 #include <linux/personality.h>
24 #include <linux/sched.h>
25 #include <linux/sched/signal.h>
26 #include <linux/slab.h>
27 #include <linux/syscalls.h>
28 #include <linux/uaccess.h>
29 
30 #include <asm/cacheflush.h>
31 #include <asm/system_misc.h>
32 #include <asm/tlbflush.h>
33 #include <asm/unistd.h>
34 
35 static long
__do_compat_cache_op(unsigned long start,unsigned long end)36 __do_compat_cache_op(unsigned long start, unsigned long end)
37 {
38 	long ret;
39 
40 	do {
41 		unsigned long chunk = min(PAGE_SIZE, end - start);
42 
43 		if (fatal_signal_pending(current))
44 			return 0;
45 
46 		if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) {
47 			/*
48 			 * The workaround requires an inner-shareable tlbi.
49 			 * We pick the reserved-ASID to minimise the impact.
50 			 */
51 			__tlbi(aside1is, __TLBI_VADDR(0, 0));
52 			dsb(ish);
53 		}
54 
55 		ret = __flush_cache_user_range(start, start + chunk);
56 		if (ret)
57 			return ret;
58 
59 		cond_resched();
60 		start += chunk;
61 	} while (start < end);
62 
63 	return 0;
64 }
65 
66 static inline long
do_compat_cache_op(unsigned long start,unsigned long end,int flags)67 do_compat_cache_op(unsigned long start, unsigned long end, int flags)
68 {
69 	if (end < start || flags)
70 		return -EINVAL;
71 
72 	if (!access_ok(VERIFY_READ, (const void __user *)start, end - start))
73 		return -EFAULT;
74 
75 	return __do_compat_cache_op(start, end);
76 }
77 /*
78  * Handle all unrecognised system calls.
79  */
compat_arm_syscall(struct pt_regs * regs,int scno)80 long compat_arm_syscall(struct pt_regs *regs, int scno)
81 {
82 	siginfo_t info;
83 
84 	switch (scno) {
85 	/*
86 	 * Flush a region from virtual address 'r0' to virtual address 'r1'
87 	 * _exclusive_.  There is no alignment requirement on either address;
88 	 * user space does not need to know the hardware cache layout.
89 	 *
90 	 * r2 contains flags.  It should ALWAYS be passed as ZERO until it
91 	 * is defined to be something else.  For now we ignore it, but may
92 	 * the fires of hell burn in your belly if you break this rule. ;)
93 	 *
94 	 * (at a later date, we may want to allow this call to not flush
95 	 * various aspects of the cache.  Passing '0' will guarantee that
96 	 * everything necessary gets flushed to maintain consistency in
97 	 * the specified region).
98 	 */
99 	case __ARM_NR_compat_cacheflush:
100 		return do_compat_cache_op(regs->regs[0], regs->regs[1], regs->regs[2]);
101 
102 	case __ARM_NR_compat_set_tls:
103 		current->thread.uw.tp_value = regs->regs[0];
104 
105 		/*
106 		 * Protect against register corruption from context switch.
107 		 * See comment in tls_thread_flush.
108 		 */
109 		barrier();
110 		write_sysreg(regs->regs[0], tpidrro_el0);
111 		return 0;
112 
113 	default:
114 		/*
115 		 * Calls 0xf0xxx..0xf07ff are defined to return -ENOSYS
116 		 * if not implemented, rather than raising SIGILL. This
117 		 * way the calling program can gracefully determine whether
118 		 * a feature is supported.
119 		 */
120 		if (scno < __ARM_NR_COMPAT_END)
121 			return -ENOSYS;
122 		break;
123 	}
124 
125 	clear_siginfo(&info);
126 	info.si_signo = SIGILL;
127 	info.si_errno = 0;
128 	info.si_code  = ILL_ILLTRP;
129 	info.si_addr  = (void __user *)instruction_pointer(regs) -
130 			 (compat_thumb_mode(regs) ? 2 : 4);
131 
132 	arm64_notify_die("Oops - bad compat syscall(2)", regs, &info, scno);
133 	return 0;
134 }
135