1 /*
2 * Copyright (C) 2015 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18 #include <linux/irqflags.h>
19
20 #include <asm/kvm_hyp.h>
21 #include <asm/kvm_mmu.h>
22 #include <asm/tlbflush.h>
23
__tlb_switch_to_guest_vhe(struct kvm * kvm,unsigned long * flags)24 static void __hyp_text __tlb_switch_to_guest_vhe(struct kvm *kvm,
25 unsigned long *flags)
26 {
27 u64 val;
28
29 local_irq_save(*flags);
30
31 /*
32 * With VHE enabled, we have HCR_EL2.{E2H,TGE} = {1,1}, and
33 * most TLB operations target EL2/EL0. In order to affect the
34 * guest TLBs (EL1/EL0), we need to change one of these two
35 * bits. Changing E2H is impossible (goodbye TTBR1_EL2), so
36 * let's flip TGE before executing the TLB operation.
37 */
38 write_sysreg(kvm->arch.vttbr, vttbr_el2);
39 val = read_sysreg(hcr_el2);
40 val &= ~HCR_TGE;
41 write_sysreg(val, hcr_el2);
42 isb();
43 }
44
__tlb_switch_to_guest_nvhe(struct kvm * kvm,unsigned long * flags)45 static void __hyp_text __tlb_switch_to_guest_nvhe(struct kvm *kvm,
46 unsigned long *flags)
47 {
48 write_sysreg(kvm->arch.vttbr, vttbr_el2);
49 isb();
50 }
51
52 static hyp_alternate_select(__tlb_switch_to_guest,
53 __tlb_switch_to_guest_nvhe,
54 __tlb_switch_to_guest_vhe,
55 ARM64_HAS_VIRT_HOST_EXTN);
56
__tlb_switch_to_host_vhe(struct kvm * kvm,unsigned long flags)57 static void __hyp_text __tlb_switch_to_host_vhe(struct kvm *kvm,
58 unsigned long flags)
59 {
60 /*
61 * We're done with the TLB operation, let's restore the host's
62 * view of HCR_EL2.
63 */
64 write_sysreg(0, vttbr_el2);
65 write_sysreg(HCR_HOST_VHE_FLAGS, hcr_el2);
66 isb();
67 local_irq_restore(flags);
68 }
69
__tlb_switch_to_host_nvhe(struct kvm * kvm,unsigned long flags)70 static void __hyp_text __tlb_switch_to_host_nvhe(struct kvm *kvm,
71 unsigned long flags)
72 {
73 write_sysreg(0, vttbr_el2);
74 }
75
76 static hyp_alternate_select(__tlb_switch_to_host,
77 __tlb_switch_to_host_nvhe,
78 __tlb_switch_to_host_vhe,
79 ARM64_HAS_VIRT_HOST_EXTN);
80
__kvm_tlb_flush_vmid_ipa(struct kvm * kvm,phys_addr_t ipa)81 void __hyp_text __kvm_tlb_flush_vmid_ipa(struct kvm *kvm, phys_addr_t ipa)
82 {
83 unsigned long flags;
84
85 dsb(ishst);
86
87 /* Switch to requested VMID */
88 kvm = kern_hyp_va(kvm);
89 __tlb_switch_to_guest()(kvm, &flags);
90
91 /*
92 * We could do so much better if we had the VA as well.
93 * Instead, we invalidate Stage-2 for this IPA, and the
94 * whole of Stage-1. Weep...
95 */
96 ipa >>= 12;
97 __tlbi(ipas2e1is, ipa);
98
99 /*
100 * We have to ensure completion of the invalidation at Stage-2,
101 * since a table walk on another CPU could refill a TLB with a
102 * complete (S1 + S2) walk based on the old Stage-2 mapping if
103 * the Stage-1 invalidation happened first.
104 */
105 dsb(ish);
106 __tlbi(vmalle1is);
107 dsb(ish);
108 isb();
109
110 /*
111 * If the host is running at EL1 and we have a VPIPT I-cache,
112 * then we must perform I-cache maintenance at EL2 in order for
113 * it to have an effect on the guest. Since the guest cannot hit
114 * I-cache lines allocated with a different VMID, we don't need
115 * to worry about junk out of guest reset (we nuke the I-cache on
116 * VMID rollover), but we do need to be careful when remapping
117 * executable pages for the same guest. This can happen when KSM
118 * takes a CoW fault on an executable page, copies the page into
119 * a page that was previously mapped in the guest and then needs
120 * to invalidate the guest view of the I-cache for that page
121 * from EL1. To solve this, we invalidate the entire I-cache when
122 * unmapping a page from a guest if we have a VPIPT I-cache but
123 * the host is running at EL1. As above, we could do better if
124 * we had the VA.
125 *
126 * The moral of this story is: if you have a VPIPT I-cache, then
127 * you should be running with VHE enabled.
128 */
129 if (!has_vhe() && icache_is_vpipt())
130 __flush_icache_all();
131
132 __tlb_switch_to_host()(kvm, flags);
133 }
134
__kvm_tlb_flush_vmid(struct kvm * kvm)135 void __hyp_text __kvm_tlb_flush_vmid(struct kvm *kvm)
136 {
137 unsigned long flags;
138
139 dsb(ishst);
140
141 /* Switch to requested VMID */
142 kvm = kern_hyp_va(kvm);
143 __tlb_switch_to_guest()(kvm, &flags);
144
145 __tlbi(vmalls12e1is);
146 dsb(ish);
147 isb();
148
149 __tlb_switch_to_host()(kvm, flags);
150 }
151
__kvm_tlb_flush_local_vmid(struct kvm_vcpu * vcpu)152 void __hyp_text __kvm_tlb_flush_local_vmid(struct kvm_vcpu *vcpu)
153 {
154 struct kvm *kvm = kern_hyp_va(kern_hyp_va(vcpu)->kvm);
155 unsigned long flags;
156
157 /* Switch to requested VMID */
158 __tlb_switch_to_guest()(kvm, &flags);
159
160 __tlbi(vmalle1);
161 dsb(nsh);
162 isb();
163
164 __tlb_switch_to_host()(kvm, flags);
165 }
166
__kvm_flush_vm_context(void)167 void __hyp_text __kvm_flush_vm_context(void)
168 {
169 dsb(ishst);
170 __tlbi(alle1is);
171 asm volatile("ic ialluis" : : );
172 dsb(ish);
173 }
174