1# SPDX-License-Identifier: GPL-2.0 2config PPC_CELL 3 bool 4 default n 5 6config PPC_CELL_COMMON 7 bool 8 select PPC_CELL 9 select PPC_DCR_MMIO 10 select PPC_INDIRECT_PIO 11 select PPC_INDIRECT_MMIO 12 select PPC_NATIVE 13 select PPC_RTAS 14 select IRQ_EDGE_EOI_HANDLER 15 16config PPC_CELL_NATIVE 17 bool 18 select PPC_CELL_COMMON 19 select MPIC 20 select PPC_IO_WORKAROUNDS 21 select IBM_EMAC_EMAC4 if IBM_EMAC 22 select IBM_EMAC_RGMII if IBM_EMAC 23 select IBM_EMAC_ZMII if IBM_EMAC #test only 24 select IBM_EMAC_TAH if IBM_EMAC #test only 25 default n 26 27config PPC_IBM_CELL_BLADE 28 bool "IBM Cell Blade" 29 depends on PPC64 && PPC_BOOK3S && CPU_BIG_ENDIAN 30 select PPC_CELL_NATIVE 31 select PPC_OF_PLATFORM_PCI 32 select PCI 33 select MMIO_NVRAM 34 select PPC_UDBG_16550 35 select UDBG_RTAS_CONSOLE 36 37config AXON_MSI 38 bool 39 depends on PPC_IBM_CELL_BLADE && PCI_MSI 40 default y 41 42menu "Cell Broadband Engine options" 43 depends on PPC_CELL 44 45config SPU_FS 46 tristate "SPU file system" 47 default m 48 depends on PPC_CELL 49 depends on COREDUMP 50 select SPU_BASE 51 help 52 The SPU file system is used to access Synergistic Processing 53 Units on machines implementing the Broadband Processor 54 Architecture. 55 56config SPU_BASE 57 bool 58 default n 59 select PPC_COPRO_BASE 60 61config CBE_RAS 62 bool "RAS features for bare metal Cell BE" 63 depends on PPC_CELL_NATIVE 64 default y 65 66config PPC_IBM_CELL_RESETBUTTON 67 bool "IBM Cell Blade Pinhole reset button" 68 depends on CBE_RAS && PPC_IBM_CELL_BLADE 69 default y 70 help 71 Support Pinhole Resetbutton on IBM Cell blades. 72 This adds a method to trigger system reset via front panel pinhole button. 73 74config PPC_IBM_CELL_POWERBUTTON 75 tristate "IBM Cell Blade power button" 76 depends on PPC_IBM_CELL_BLADE && INPUT_EVDEV 77 default y 78 help 79 Support Powerbutton on IBM Cell blades. 80 This will enable the powerbutton as an input device. 81 82config CBE_THERM 83 tristate "CBE thermal support" 84 default m 85 depends on CBE_RAS && SPU_BASE 86 87config PPC_PMI 88 tristate 89 default y 90 depends on CPU_FREQ_CBE_PMI || PPC_IBM_CELL_POWERBUTTON 91 help 92 PMI (Platform Management Interrupt) is a way to 93 communicate with the BMC (Baseboard Management Controller). 94 It is used in some IBM Cell blades. 95 96config CBE_CPUFREQ_SPU_GOVERNOR 97 tristate "CBE frequency scaling based on SPU usage" 98 depends on SPU_FS && CPU_FREQ 99 default m 100 help 101 This governor checks for spu usage to adjust the cpu frequency. 102 If no spu is running on a given cpu, that cpu will be throttled to 103 the minimal possible frequency. 104 105endmenu 106 107config OPROFILE_CELL 108 def_bool y 109 depends on PPC_CELL_NATIVE && (OPROFILE = m || OPROFILE = y) && SPU_BASE 110 111