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1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Core of Xen paravirt_ops implementation.
4  *
5  * This file contains the xen_paravirt_ops structure itself, and the
6  * implementations for:
7  * - privileged instructions
8  * - interrupt flags
9  * - segment operations
10  * - booting and setup
11  *
12  * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
13  */
14 
15 #include <linux/cpu.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/smp.h>
19 #include <linux/preempt.h>
20 #include <linux/hardirq.h>
21 #include <linux/percpu.h>
22 #include <linux/delay.h>
23 #include <linux/start_kernel.h>
24 #include <linux/sched.h>
25 #include <linux/kprobes.h>
26 #include <linux/bootmem.h>
27 #include <linux/export.h>
28 #include <linux/mm.h>
29 #include <linux/page-flags.h>
30 #include <linux/highmem.h>
31 #include <linux/console.h>
32 #include <linux/pci.h>
33 #include <linux/gfp.h>
34 #include <linux/memblock.h>
35 #include <linux/edd.h>
36 #include <linux/frame.h>
37 
38 #include <xen/xen.h>
39 #include <xen/events.h>
40 #include <xen/interface/xen.h>
41 #include <xen/interface/version.h>
42 #include <xen/interface/physdev.h>
43 #include <xen/interface/vcpu.h>
44 #include <xen/interface/memory.h>
45 #include <xen/interface/nmi.h>
46 #include <xen/interface/xen-mca.h>
47 #include <xen/features.h>
48 #include <xen/page.h>
49 #include <xen/hvc-console.h>
50 #include <xen/acpi.h>
51 
52 #include <asm/paravirt.h>
53 #include <asm/apic.h>
54 #include <asm/page.h>
55 #include <asm/xen/pci.h>
56 #include <asm/xen/hypercall.h>
57 #include <asm/xen/hypervisor.h>
58 #include <asm/xen/cpuid.h>
59 #include <asm/fixmap.h>
60 #include <asm/processor.h>
61 #include <asm/proto.h>
62 #include <asm/msr-index.h>
63 #include <asm/traps.h>
64 #include <asm/setup.h>
65 #include <asm/desc.h>
66 #include <asm/pgalloc.h>
67 #include <asm/pgtable.h>
68 #include <asm/tlbflush.h>
69 #include <asm/reboot.h>
70 #include <asm/stackprotector.h>
71 #include <asm/hypervisor.h>
72 #include <asm/mach_traps.h>
73 #include <asm/mwait.h>
74 #include <asm/pci_x86.h>
75 #include <asm/cpu.h>
76 
77 #ifdef CONFIG_ACPI
78 #include <linux/acpi.h>
79 #include <asm/acpi.h>
80 #include <acpi/pdc_intel.h>
81 #include <acpi/processor.h>
82 #include <xen/interface/platform.h>
83 #endif
84 
85 #include "xen-ops.h"
86 #include "mmu.h"
87 #include "smp.h"
88 #include "multicalls.h"
89 #include "pmu.h"
90 
91 #include "../kernel/cpu/cpu.h" /* get_cpu_cap() */
92 
93 void *xen_initial_gdt;
94 
95 static int xen_cpu_up_prepare_pv(unsigned int cpu);
96 static int xen_cpu_dead_pv(unsigned int cpu);
97 
98 struct tls_descs {
99 	struct desc_struct desc[3];
100 };
101 
102 /*
103  * Updating the 3 TLS descriptors in the GDT on every task switch is
104  * surprisingly expensive so we avoid updating them if they haven't
105  * changed.  Since Xen writes different descriptors than the one
106  * passed in the update_descriptor hypercall we keep shadow copies to
107  * compare against.
108  */
109 static DEFINE_PER_CPU(struct tls_descs, shadow_tls_desc);
110 
xen_banner(void)111 static void __init xen_banner(void)
112 {
113 	unsigned version = HYPERVISOR_xen_version(XENVER_version, NULL);
114 	struct xen_extraversion extra;
115 	HYPERVISOR_xen_version(XENVER_extraversion, &extra);
116 
117 	pr_info("Booting paravirtualized kernel on %s\n", pv_info.name);
118 	printk(KERN_INFO "Xen version: %d.%d%s%s\n",
119 	       version >> 16, version & 0xffff, extra.extraversion,
120 	       xen_feature(XENFEAT_mmu_pt_update_preserve_ad) ? " (preserve-AD)" : "");
121 }
122 
xen_pv_init_platform(void)123 static void __init xen_pv_init_platform(void)
124 {
125 	populate_extra_pte(fix_to_virt(FIX_PARAVIRT_BOOTMAP));
126 
127 	set_fixmap(FIX_PARAVIRT_BOOTMAP, xen_start_info->shared_info);
128 	HYPERVISOR_shared_info = (void *)fix_to_virt(FIX_PARAVIRT_BOOTMAP);
129 
130 	/* xen clock uses per-cpu vcpu_info, need to init it for boot cpu */
131 	xen_vcpu_info_reset(0);
132 
133 	/* pvclock is in shared info area */
134 	xen_init_time_ops();
135 }
136 
xen_pv_guest_late_init(void)137 static void __init xen_pv_guest_late_init(void)
138 {
139 #ifndef CONFIG_SMP
140 	/* Setup shared vcpu info for non-smp configurations */
141 	xen_setup_vcpu_info_placement();
142 #endif
143 }
144 
145 /* Check if running on Xen version (major, minor) or later */
146 bool
xen_running_on_version_or_later(unsigned int major,unsigned int minor)147 xen_running_on_version_or_later(unsigned int major, unsigned int minor)
148 {
149 	unsigned int version;
150 
151 	if (!xen_domain())
152 		return false;
153 
154 	version = HYPERVISOR_xen_version(XENVER_version, NULL);
155 	if ((((version >> 16) == major) && ((version & 0xffff) >= minor)) ||
156 		((version >> 16) > major))
157 		return true;
158 	return false;
159 }
160 
161 static __read_mostly unsigned int cpuid_leaf5_ecx_val;
162 static __read_mostly unsigned int cpuid_leaf5_edx_val;
163 
xen_cpuid(unsigned int * ax,unsigned int * bx,unsigned int * cx,unsigned int * dx)164 static void xen_cpuid(unsigned int *ax, unsigned int *bx,
165 		      unsigned int *cx, unsigned int *dx)
166 {
167 	unsigned maskebx = ~0;
168 
169 	/*
170 	 * Mask out inconvenient features, to try and disable as many
171 	 * unsupported kernel subsystems as possible.
172 	 */
173 	switch (*ax) {
174 	case CPUID_MWAIT_LEAF:
175 		/* Synthesize the values.. */
176 		*ax = 0;
177 		*bx = 0;
178 		*cx = cpuid_leaf5_ecx_val;
179 		*dx = cpuid_leaf5_edx_val;
180 		return;
181 
182 	case 0xb:
183 		/* Suppress extended topology stuff */
184 		maskebx = 0;
185 		break;
186 	}
187 
188 	asm(XEN_EMULATE_PREFIX "cpuid"
189 		: "=a" (*ax),
190 		  "=b" (*bx),
191 		  "=c" (*cx),
192 		  "=d" (*dx)
193 		: "0" (*ax), "2" (*cx));
194 
195 	*bx &= maskebx;
196 }
197 STACK_FRAME_NON_STANDARD(xen_cpuid); /* XEN_EMULATE_PREFIX */
198 
xen_check_mwait(void)199 static bool __init xen_check_mwait(void)
200 {
201 #ifdef CONFIG_ACPI
202 	struct xen_platform_op op = {
203 		.cmd			= XENPF_set_processor_pminfo,
204 		.u.set_pminfo.id	= -1,
205 		.u.set_pminfo.type	= XEN_PM_PDC,
206 	};
207 	uint32_t buf[3];
208 	unsigned int ax, bx, cx, dx;
209 	unsigned int mwait_mask;
210 
211 	/* We need to determine whether it is OK to expose the MWAIT
212 	 * capability to the kernel to harvest deeper than C3 states from ACPI
213 	 * _CST using the processor_harvest_xen.c module. For this to work, we
214 	 * need to gather the MWAIT_LEAF values (which the cstate.c code
215 	 * checks against). The hypervisor won't expose the MWAIT flag because
216 	 * it would break backwards compatibility; so we will find out directly
217 	 * from the hardware and hypercall.
218 	 */
219 	if (!xen_initial_domain())
220 		return false;
221 
222 	/*
223 	 * When running under platform earlier than Xen4.2, do not expose
224 	 * mwait, to avoid the risk of loading native acpi pad driver
225 	 */
226 	if (!xen_running_on_version_or_later(4, 2))
227 		return false;
228 
229 	ax = 1;
230 	cx = 0;
231 
232 	native_cpuid(&ax, &bx, &cx, &dx);
233 
234 	mwait_mask = (1 << (X86_FEATURE_EST % 32)) |
235 		     (1 << (X86_FEATURE_MWAIT % 32));
236 
237 	if ((cx & mwait_mask) != mwait_mask)
238 		return false;
239 
240 	/* We need to emulate the MWAIT_LEAF and for that we need both
241 	 * ecx and edx. The hypercall provides only partial information.
242 	 */
243 
244 	ax = CPUID_MWAIT_LEAF;
245 	bx = 0;
246 	cx = 0;
247 	dx = 0;
248 
249 	native_cpuid(&ax, &bx, &cx, &dx);
250 
251 	/* Ask the Hypervisor whether to clear ACPI_PDC_C_C2C3_FFH. If so,
252 	 * don't expose MWAIT_LEAF and let ACPI pick the IOPORT version of C3.
253 	 */
254 	buf[0] = ACPI_PDC_REVISION_ID;
255 	buf[1] = 1;
256 	buf[2] = (ACPI_PDC_C_CAPABILITY_SMP | ACPI_PDC_EST_CAPABILITY_SWSMP);
257 
258 	set_xen_guest_handle(op.u.set_pminfo.pdc, buf);
259 
260 	if ((HYPERVISOR_platform_op(&op) == 0) &&
261 	    (buf[2] & (ACPI_PDC_C_C1_FFH | ACPI_PDC_C_C2C3_FFH))) {
262 		cpuid_leaf5_ecx_val = cx;
263 		cpuid_leaf5_edx_val = dx;
264 	}
265 	return true;
266 #else
267 	return false;
268 #endif
269 }
270 
xen_check_xsave(void)271 static bool __init xen_check_xsave(void)
272 {
273 	unsigned int cx, xsave_mask;
274 
275 	cx = cpuid_ecx(1);
276 
277 	xsave_mask = (1 << (X86_FEATURE_XSAVE % 32)) |
278 		     (1 << (X86_FEATURE_OSXSAVE % 32));
279 
280 	/* Xen will set CR4.OSXSAVE if supported and not disabled by force */
281 	return (cx & xsave_mask) == xsave_mask;
282 }
283 
xen_init_capabilities(void)284 static void __init xen_init_capabilities(void)
285 {
286 	setup_force_cpu_cap(X86_FEATURE_XENPV);
287 	setup_clear_cpu_cap(X86_FEATURE_DCA);
288 	setup_clear_cpu_cap(X86_FEATURE_APERFMPERF);
289 	setup_clear_cpu_cap(X86_FEATURE_MTRR);
290 	setup_clear_cpu_cap(X86_FEATURE_ACC);
291 	setup_clear_cpu_cap(X86_FEATURE_X2APIC);
292 	setup_clear_cpu_cap(X86_FEATURE_SME);
293 
294 	/*
295 	 * Xen PV would need some work to support PCID: CR3 handling as well
296 	 * as xen_flush_tlb_others() would need updating.
297 	 */
298 	setup_clear_cpu_cap(X86_FEATURE_PCID);
299 
300 	if (!xen_initial_domain())
301 		setup_clear_cpu_cap(X86_FEATURE_ACPI);
302 
303 	if (xen_check_mwait())
304 		setup_force_cpu_cap(X86_FEATURE_MWAIT);
305 	else
306 		setup_clear_cpu_cap(X86_FEATURE_MWAIT);
307 
308 	if (!xen_check_xsave()) {
309 		setup_clear_cpu_cap(X86_FEATURE_XSAVE);
310 		setup_clear_cpu_cap(X86_FEATURE_OSXSAVE);
311 	}
312 }
313 
xen_set_debugreg(int reg,unsigned long val)314 static void xen_set_debugreg(int reg, unsigned long val)
315 {
316 	HYPERVISOR_set_debugreg(reg, val);
317 }
318 
xen_get_debugreg(int reg)319 static unsigned long xen_get_debugreg(int reg)
320 {
321 	return HYPERVISOR_get_debugreg(reg);
322 }
323 
xen_end_context_switch(struct task_struct * next)324 static void xen_end_context_switch(struct task_struct *next)
325 {
326 	xen_mc_flush();
327 	paravirt_end_context_switch(next);
328 }
329 
xen_store_tr(void)330 static unsigned long xen_store_tr(void)
331 {
332 	return 0;
333 }
334 
335 /*
336  * Set the page permissions for a particular virtual address.  If the
337  * address is a vmalloc mapping (or other non-linear mapping), then
338  * find the linear mapping of the page and also set its protections to
339  * match.
340  */
set_aliased_prot(void * v,pgprot_t prot)341 static void set_aliased_prot(void *v, pgprot_t prot)
342 {
343 	int level;
344 	pte_t *ptep;
345 	pte_t pte;
346 	unsigned long pfn;
347 	struct page *page;
348 	unsigned char dummy;
349 
350 	ptep = lookup_address((unsigned long)v, &level);
351 	BUG_ON(ptep == NULL);
352 
353 	pfn = pte_pfn(*ptep);
354 	page = pfn_to_page(pfn);
355 
356 	pte = pfn_pte(pfn, prot);
357 
358 	/*
359 	 * Careful: update_va_mapping() will fail if the virtual address
360 	 * we're poking isn't populated in the page tables.  We don't
361 	 * need to worry about the direct map (that's always in the page
362 	 * tables), but we need to be careful about vmap space.  In
363 	 * particular, the top level page table can lazily propagate
364 	 * entries between processes, so if we've switched mms since we
365 	 * vmapped the target in the first place, we might not have the
366 	 * top-level page table entry populated.
367 	 *
368 	 * We disable preemption because we want the same mm active when
369 	 * we probe the target and when we issue the hypercall.  We'll
370 	 * have the same nominal mm, but if we're a kernel thread, lazy
371 	 * mm dropping could change our pgd.
372 	 *
373 	 * Out of an abundance of caution, this uses __get_user() to fault
374 	 * in the target address just in case there's some obscure case
375 	 * in which the target address isn't readable.
376 	 */
377 
378 	preempt_disable();
379 
380 	probe_kernel_read(&dummy, v, 1);
381 
382 	if (HYPERVISOR_update_va_mapping((unsigned long)v, pte, 0))
383 		BUG();
384 
385 	if (!PageHighMem(page)) {
386 		void *av = __va(PFN_PHYS(pfn));
387 
388 		if (av != v)
389 			if (HYPERVISOR_update_va_mapping((unsigned long)av, pte, 0))
390 				BUG();
391 	} else
392 		kmap_flush_unused();
393 
394 	preempt_enable();
395 }
396 
xen_alloc_ldt(struct desc_struct * ldt,unsigned entries)397 static void xen_alloc_ldt(struct desc_struct *ldt, unsigned entries)
398 {
399 	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
400 	int i;
401 
402 	/*
403 	 * We need to mark the all aliases of the LDT pages RO.  We
404 	 * don't need to call vm_flush_aliases(), though, since that's
405 	 * only responsible for flushing aliases out the TLBs, not the
406 	 * page tables, and Xen will flush the TLB for us if needed.
407 	 *
408 	 * To avoid confusing future readers: none of this is necessary
409 	 * to load the LDT.  The hypervisor only checks this when the
410 	 * LDT is faulted in due to subsequent descriptor access.
411 	 */
412 
413 	for (i = 0; i < entries; i += entries_per_page)
414 		set_aliased_prot(ldt + i, PAGE_KERNEL_RO);
415 }
416 
xen_free_ldt(struct desc_struct * ldt,unsigned entries)417 static void xen_free_ldt(struct desc_struct *ldt, unsigned entries)
418 {
419 	const unsigned entries_per_page = PAGE_SIZE / LDT_ENTRY_SIZE;
420 	int i;
421 
422 	for (i = 0; i < entries; i += entries_per_page)
423 		set_aliased_prot(ldt + i, PAGE_KERNEL);
424 }
425 
xen_set_ldt(const void * addr,unsigned entries)426 static void xen_set_ldt(const void *addr, unsigned entries)
427 {
428 	struct mmuext_op *op;
429 	struct multicall_space mcs = xen_mc_entry(sizeof(*op));
430 
431 	trace_xen_cpu_set_ldt(addr, entries);
432 
433 	op = mcs.args;
434 	op->cmd = MMUEXT_SET_LDT;
435 	op->arg1.linear_addr = (unsigned long)addr;
436 	op->arg2.nr_ents = entries;
437 
438 	MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
439 
440 	xen_mc_issue(PARAVIRT_LAZY_CPU);
441 }
442 
xen_load_gdt(const struct desc_ptr * dtr)443 static void xen_load_gdt(const struct desc_ptr *dtr)
444 {
445 	unsigned long va = dtr->address;
446 	unsigned int size = dtr->size + 1;
447 	unsigned long pfn, mfn;
448 	int level;
449 	pte_t *ptep;
450 	void *virt;
451 
452 	/* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
453 	BUG_ON(size > PAGE_SIZE);
454 	BUG_ON(va & ~PAGE_MASK);
455 
456 	/*
457 	 * The GDT is per-cpu and is in the percpu data area.
458 	 * That can be virtually mapped, so we need to do a
459 	 * page-walk to get the underlying MFN for the
460 	 * hypercall.  The page can also be in the kernel's
461 	 * linear range, so we need to RO that mapping too.
462 	 */
463 	ptep = lookup_address(va, &level);
464 	BUG_ON(ptep == NULL);
465 
466 	pfn = pte_pfn(*ptep);
467 	mfn = pfn_to_mfn(pfn);
468 	virt = __va(PFN_PHYS(pfn));
469 
470 	make_lowmem_page_readonly((void *)va);
471 	make_lowmem_page_readonly(virt);
472 
473 	if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
474 		BUG();
475 }
476 
477 /*
478  * load_gdt for early boot, when the gdt is only mapped once
479  */
xen_load_gdt_boot(const struct desc_ptr * dtr)480 static void __init xen_load_gdt_boot(const struct desc_ptr *dtr)
481 {
482 	unsigned long va = dtr->address;
483 	unsigned int size = dtr->size + 1;
484 	unsigned long pfn, mfn;
485 	pte_t pte;
486 
487 	/* @size should be at most GDT_SIZE which is smaller than PAGE_SIZE. */
488 	BUG_ON(size > PAGE_SIZE);
489 	BUG_ON(va & ~PAGE_MASK);
490 
491 	pfn = virt_to_pfn(va);
492 	mfn = pfn_to_mfn(pfn);
493 
494 	pte = pfn_pte(pfn, PAGE_KERNEL_RO);
495 
496 	if (HYPERVISOR_update_va_mapping((unsigned long)va, pte, 0))
497 		BUG();
498 
499 	if (HYPERVISOR_set_gdt(&mfn, size / sizeof(struct desc_struct)))
500 		BUG();
501 }
502 
desc_equal(const struct desc_struct * d1,const struct desc_struct * d2)503 static inline bool desc_equal(const struct desc_struct *d1,
504 			      const struct desc_struct *d2)
505 {
506 	return !memcmp(d1, d2, sizeof(*d1));
507 }
508 
load_TLS_descriptor(struct thread_struct * t,unsigned int cpu,unsigned int i)509 static void load_TLS_descriptor(struct thread_struct *t,
510 				unsigned int cpu, unsigned int i)
511 {
512 	struct desc_struct *shadow = &per_cpu(shadow_tls_desc, cpu).desc[i];
513 	struct desc_struct *gdt;
514 	xmaddr_t maddr;
515 	struct multicall_space mc;
516 
517 	if (desc_equal(shadow, &t->tls_array[i]))
518 		return;
519 
520 	*shadow = t->tls_array[i];
521 
522 	gdt = get_cpu_gdt_rw(cpu);
523 	maddr = arbitrary_virt_to_machine(&gdt[GDT_ENTRY_TLS_MIN+i]);
524 	mc = __xen_mc_entry(0);
525 
526 	MULTI_update_descriptor(mc.mc, maddr.maddr, t->tls_array[i]);
527 }
528 
xen_load_tls(struct thread_struct * t,unsigned int cpu)529 static void xen_load_tls(struct thread_struct *t, unsigned int cpu)
530 {
531 	/*
532 	 * XXX sleazy hack: If we're being called in a lazy-cpu zone
533 	 * and lazy gs handling is enabled, it means we're in a
534 	 * context switch, and %gs has just been saved.  This means we
535 	 * can zero it out to prevent faults on exit from the
536 	 * hypervisor if the next process has no %gs.  Either way, it
537 	 * has been saved, and the new value will get loaded properly.
538 	 * This will go away as soon as Xen has been modified to not
539 	 * save/restore %gs for normal hypercalls.
540 	 *
541 	 * On x86_64, this hack is not used for %gs, because gs points
542 	 * to KERNEL_GS_BASE (and uses it for PDA references), so we
543 	 * must not zero %gs on x86_64
544 	 *
545 	 * For x86_64, we need to zero %fs, otherwise we may get an
546 	 * exception between the new %fs descriptor being loaded and
547 	 * %fs being effectively cleared at __switch_to().
548 	 */
549 	if (paravirt_get_lazy_mode() == PARAVIRT_LAZY_CPU) {
550 #ifdef CONFIG_X86_32
551 		lazy_load_gs(0);
552 #else
553 		loadsegment(fs, 0);
554 #endif
555 	}
556 
557 	xen_mc_batch();
558 
559 	load_TLS_descriptor(t, cpu, 0);
560 	load_TLS_descriptor(t, cpu, 1);
561 	load_TLS_descriptor(t, cpu, 2);
562 
563 	xen_mc_issue(PARAVIRT_LAZY_CPU);
564 }
565 
566 #ifdef CONFIG_X86_64
xen_load_gs_index(unsigned int idx)567 static void xen_load_gs_index(unsigned int idx)
568 {
569 	if (HYPERVISOR_set_segment_base(SEGBASE_GS_USER_SEL, idx))
570 		BUG();
571 }
572 #endif
573 
xen_write_ldt_entry(struct desc_struct * dt,int entrynum,const void * ptr)574 static void xen_write_ldt_entry(struct desc_struct *dt, int entrynum,
575 				const void *ptr)
576 {
577 	xmaddr_t mach_lp = arbitrary_virt_to_machine(&dt[entrynum]);
578 	u64 entry = *(u64 *)ptr;
579 
580 	trace_xen_cpu_write_ldt_entry(dt, entrynum, entry);
581 
582 	preempt_disable();
583 
584 	xen_mc_flush();
585 	if (HYPERVISOR_update_descriptor(mach_lp.maddr, entry))
586 		BUG();
587 
588 	preempt_enable();
589 }
590 
591 #ifdef CONFIG_X86_64
592 struct trap_array_entry {
593 	void (*orig)(void);
594 	void (*xen)(void);
595 	bool ist_okay;
596 };
597 
598 static struct trap_array_entry trap_array[] = {
599 	{ debug,                       xen_xendebug,                    true },
600 	{ double_fault,                xen_double_fault,                true },
601 #ifdef CONFIG_X86_MCE
602 	{ machine_check,               xen_machine_check,               true },
603 #endif
604 	{ nmi,                         xen_xennmi,                      true },
605 	{ int3,                        xen_int3,                        false },
606 	{ overflow,                    xen_overflow,                    false },
607 #ifdef CONFIG_IA32_EMULATION
608 	{ entry_INT80_compat,          xen_entry_INT80_compat,          false },
609 #endif
610 	{ page_fault,                  xen_page_fault,                  false },
611 	{ divide_error,                xen_divide_error,                false },
612 	{ bounds,                      xen_bounds,                      false },
613 	{ invalid_op,                  xen_invalid_op,                  false },
614 	{ device_not_available,        xen_device_not_available,        false },
615 	{ coprocessor_segment_overrun, xen_coprocessor_segment_overrun, false },
616 	{ invalid_TSS,                 xen_invalid_TSS,                 false },
617 	{ segment_not_present,         xen_segment_not_present,         false },
618 	{ stack_segment,               xen_stack_segment,               false },
619 	{ general_protection,          xen_general_protection,          false },
620 	{ spurious_interrupt_bug,      xen_spurious_interrupt_bug,      false },
621 	{ coprocessor_error,           xen_coprocessor_error,           false },
622 	{ alignment_check,             xen_alignment_check,             false },
623 	{ simd_coprocessor_error,      xen_simd_coprocessor_error,      false },
624 };
625 
get_trap_addr(void ** addr,unsigned int ist)626 static bool __ref get_trap_addr(void **addr, unsigned int ist)
627 {
628 	unsigned int nr;
629 	bool ist_okay = false;
630 
631 	/*
632 	 * Replace trap handler addresses by Xen specific ones.
633 	 * Check for known traps using IST and whitelist them.
634 	 * The debugger ones are the only ones we care about.
635 	 * Xen will handle faults like double_fault, * so we should never see
636 	 * them.  Warn if there's an unexpected IST-using fault handler.
637 	 */
638 	for (nr = 0; nr < ARRAY_SIZE(trap_array); nr++) {
639 		struct trap_array_entry *entry = trap_array + nr;
640 
641 		if (*addr == entry->orig) {
642 			*addr = entry->xen;
643 			ist_okay = entry->ist_okay;
644 			break;
645 		}
646 	}
647 
648 	if (nr == ARRAY_SIZE(trap_array) &&
649 	    *addr >= (void *)early_idt_handler_array[0] &&
650 	    *addr < (void *)early_idt_handler_array[NUM_EXCEPTION_VECTORS]) {
651 		nr = (*addr - (void *)early_idt_handler_array[0]) /
652 		     EARLY_IDT_HANDLER_SIZE;
653 		*addr = (void *)xen_early_idt_handler_array[nr];
654 	}
655 
656 	if (WARN_ON(ist != 0 && !ist_okay))
657 		return false;
658 
659 	return true;
660 }
661 #endif
662 
cvt_gate_to_trap(int vector,const gate_desc * val,struct trap_info * info)663 static int cvt_gate_to_trap(int vector, const gate_desc *val,
664 			    struct trap_info *info)
665 {
666 	unsigned long addr;
667 
668 	if (val->bits.type != GATE_TRAP && val->bits.type != GATE_INTERRUPT)
669 		return 0;
670 
671 	info->vector = vector;
672 
673 	addr = gate_offset(val);
674 #ifdef CONFIG_X86_64
675 	if (!get_trap_addr((void **)&addr, val->bits.ist))
676 		return 0;
677 #endif	/* CONFIG_X86_64 */
678 	info->address = addr;
679 
680 	info->cs = gate_segment(val);
681 	info->flags = val->bits.dpl;
682 	/* interrupt gates clear IF */
683 	if (val->bits.type == GATE_INTERRUPT)
684 		info->flags |= 1 << 2;
685 
686 	return 1;
687 }
688 
689 /* Locations of each CPU's IDT */
690 static DEFINE_PER_CPU(struct desc_ptr, idt_desc);
691 
692 /* Set an IDT entry.  If the entry is part of the current IDT, then
693    also update Xen. */
xen_write_idt_entry(gate_desc * dt,int entrynum,const gate_desc * g)694 static void xen_write_idt_entry(gate_desc *dt, int entrynum, const gate_desc *g)
695 {
696 	unsigned long p = (unsigned long)&dt[entrynum];
697 	unsigned long start, end;
698 
699 	trace_xen_cpu_write_idt_entry(dt, entrynum, g);
700 
701 	preempt_disable();
702 
703 	start = __this_cpu_read(idt_desc.address);
704 	end = start + __this_cpu_read(idt_desc.size) + 1;
705 
706 	xen_mc_flush();
707 
708 	native_write_idt_entry(dt, entrynum, g);
709 
710 	if (p >= start && (p + 8) <= end) {
711 		struct trap_info info[2];
712 
713 		info[1].address = 0;
714 
715 		if (cvt_gate_to_trap(entrynum, g, &info[0]))
716 			if (HYPERVISOR_set_trap_table(info))
717 				BUG();
718 	}
719 
720 	preempt_enable();
721 }
722 
xen_convert_trap_info(const struct desc_ptr * desc,struct trap_info * traps)723 static void xen_convert_trap_info(const struct desc_ptr *desc,
724 				  struct trap_info *traps)
725 {
726 	unsigned in, out, count;
727 
728 	count = (desc->size+1) / sizeof(gate_desc);
729 	BUG_ON(count > 256);
730 
731 	for (in = out = 0; in < count; in++) {
732 		gate_desc *entry = (gate_desc *)(desc->address) + in;
733 
734 		if (cvt_gate_to_trap(in, entry, &traps[out]))
735 			out++;
736 	}
737 	traps[out].address = 0;
738 }
739 
xen_copy_trap_info(struct trap_info * traps)740 void xen_copy_trap_info(struct trap_info *traps)
741 {
742 	const struct desc_ptr *desc = this_cpu_ptr(&idt_desc);
743 
744 	xen_convert_trap_info(desc, traps);
745 }
746 
747 /* Load a new IDT into Xen.  In principle this can be per-CPU, so we
748    hold a spinlock to protect the static traps[] array (static because
749    it avoids allocation, and saves stack space). */
xen_load_idt(const struct desc_ptr * desc)750 static void xen_load_idt(const struct desc_ptr *desc)
751 {
752 	static DEFINE_SPINLOCK(lock);
753 	static struct trap_info traps[257];
754 
755 	trace_xen_cpu_load_idt(desc);
756 
757 	spin_lock(&lock);
758 
759 	memcpy(this_cpu_ptr(&idt_desc), desc, sizeof(idt_desc));
760 
761 	xen_convert_trap_info(desc, traps);
762 
763 	xen_mc_flush();
764 	if (HYPERVISOR_set_trap_table(traps))
765 		BUG();
766 
767 	spin_unlock(&lock);
768 }
769 
770 /* Write a GDT descriptor entry.  Ignore LDT descriptors, since
771    they're handled differently. */
xen_write_gdt_entry(struct desc_struct * dt,int entry,const void * desc,int type)772 static void xen_write_gdt_entry(struct desc_struct *dt, int entry,
773 				const void *desc, int type)
774 {
775 	trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
776 
777 	preempt_disable();
778 
779 	switch (type) {
780 	case DESC_LDT:
781 	case DESC_TSS:
782 		/* ignore */
783 		break;
784 
785 	default: {
786 		xmaddr_t maddr = arbitrary_virt_to_machine(&dt[entry]);
787 
788 		xen_mc_flush();
789 		if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
790 			BUG();
791 	}
792 
793 	}
794 
795 	preempt_enable();
796 }
797 
798 /*
799  * Version of write_gdt_entry for use at early boot-time needed to
800  * update an entry as simply as possible.
801  */
xen_write_gdt_entry_boot(struct desc_struct * dt,int entry,const void * desc,int type)802 static void __init xen_write_gdt_entry_boot(struct desc_struct *dt, int entry,
803 					    const void *desc, int type)
804 {
805 	trace_xen_cpu_write_gdt_entry(dt, entry, desc, type);
806 
807 	switch (type) {
808 	case DESC_LDT:
809 	case DESC_TSS:
810 		/* ignore */
811 		break;
812 
813 	default: {
814 		xmaddr_t maddr = virt_to_machine(&dt[entry]);
815 
816 		if (HYPERVISOR_update_descriptor(maddr.maddr, *(u64 *)desc))
817 			dt[entry] = *(struct desc_struct *)desc;
818 	}
819 
820 	}
821 }
822 
xen_load_sp0(unsigned long sp0)823 static void xen_load_sp0(unsigned long sp0)
824 {
825 	struct multicall_space mcs;
826 
827 	mcs = xen_mc_entry(0);
828 	MULTI_stack_switch(mcs.mc, __KERNEL_DS, sp0);
829 	xen_mc_issue(PARAVIRT_LAZY_CPU);
830 	this_cpu_write(cpu_tss_rw.x86_tss.sp0, sp0);
831 }
832 
xen_set_iopl_mask(unsigned mask)833 void xen_set_iopl_mask(unsigned mask)
834 {
835 	struct physdev_set_iopl set_iopl;
836 
837 	/* Force the change at ring 0. */
838 	set_iopl.iopl = (mask == 0) ? 1 : (mask >> 12) & 3;
839 	HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
840 }
841 
xen_io_delay(void)842 static void xen_io_delay(void)
843 {
844 }
845 
846 static DEFINE_PER_CPU(unsigned long, xen_cr0_value);
847 
xen_read_cr0(void)848 static unsigned long xen_read_cr0(void)
849 {
850 	unsigned long cr0 = this_cpu_read(xen_cr0_value);
851 
852 	if (unlikely(cr0 == 0)) {
853 		cr0 = native_read_cr0();
854 		this_cpu_write(xen_cr0_value, cr0);
855 	}
856 
857 	return cr0;
858 }
859 
xen_write_cr0(unsigned long cr0)860 static void xen_write_cr0(unsigned long cr0)
861 {
862 	struct multicall_space mcs;
863 
864 	this_cpu_write(xen_cr0_value, cr0);
865 
866 	/* Only pay attention to cr0.TS; everything else is
867 	   ignored. */
868 	mcs = xen_mc_entry(0);
869 
870 	MULTI_fpu_taskswitch(mcs.mc, (cr0 & X86_CR0_TS) != 0);
871 
872 	xen_mc_issue(PARAVIRT_LAZY_CPU);
873 }
874 
xen_write_cr4(unsigned long cr4)875 static void xen_write_cr4(unsigned long cr4)
876 {
877 	cr4 &= ~(X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PCE);
878 
879 	native_write_cr4(cr4);
880 }
881 #ifdef CONFIG_X86_64
xen_read_cr8(void)882 static inline unsigned long xen_read_cr8(void)
883 {
884 	return 0;
885 }
xen_write_cr8(unsigned long val)886 static inline void xen_write_cr8(unsigned long val)
887 {
888 	BUG_ON(val);
889 }
890 #endif
891 
xen_read_msr_safe(unsigned int msr,int * err)892 static u64 xen_read_msr_safe(unsigned int msr, int *err)
893 {
894 	u64 val;
895 
896 	if (pmu_msr_read(msr, &val, err))
897 		return val;
898 
899 	val = native_read_msr_safe(msr, err);
900 	switch (msr) {
901 	case MSR_IA32_APICBASE:
902 		val &= ~X2APIC_ENABLE;
903 		break;
904 	}
905 	return val;
906 }
907 
xen_write_msr_safe(unsigned int msr,unsigned low,unsigned high)908 static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
909 {
910 	int ret;
911 #ifdef CONFIG_X86_64
912 	unsigned int which;
913 	u64 base;
914 #endif
915 
916 	ret = 0;
917 
918 	switch (msr) {
919 #ifdef CONFIG_X86_64
920 	case MSR_FS_BASE:		which = SEGBASE_FS; goto set;
921 	case MSR_KERNEL_GS_BASE:	which = SEGBASE_GS_USER; goto set;
922 	case MSR_GS_BASE:		which = SEGBASE_GS_KERNEL; goto set;
923 
924 	set:
925 		base = ((u64)high << 32) | low;
926 		if (HYPERVISOR_set_segment_base(which, base) != 0)
927 			ret = -EIO;
928 		break;
929 #endif
930 
931 	case MSR_STAR:
932 	case MSR_CSTAR:
933 	case MSR_LSTAR:
934 	case MSR_SYSCALL_MASK:
935 	case MSR_IA32_SYSENTER_CS:
936 	case MSR_IA32_SYSENTER_ESP:
937 	case MSR_IA32_SYSENTER_EIP:
938 		/* Fast syscall setup is all done in hypercalls, so
939 		   these are all ignored.  Stub them out here to stop
940 		   Xen console noise. */
941 		break;
942 
943 	default:
944 		if (!pmu_msr_write(msr, low, high, &ret))
945 			ret = native_write_msr_safe(msr, low, high);
946 	}
947 
948 	return ret;
949 }
950 
xen_read_msr(unsigned int msr)951 static u64 xen_read_msr(unsigned int msr)
952 {
953 	/*
954 	 * This will silently swallow a #GP from RDMSR.  It may be worth
955 	 * changing that.
956 	 */
957 	int err;
958 
959 	return xen_read_msr_safe(msr, &err);
960 }
961 
xen_write_msr(unsigned int msr,unsigned low,unsigned high)962 static void xen_write_msr(unsigned int msr, unsigned low, unsigned high)
963 {
964 	/*
965 	 * This will silently swallow a #GP from WRMSR.  It may be worth
966 	 * changing that.
967 	 */
968 	xen_write_msr_safe(msr, low, high);
969 }
970 
971 /* This is called once we have the cpu_possible_mask */
xen_setup_vcpu_info_placement(void)972 void __init xen_setup_vcpu_info_placement(void)
973 {
974 	int cpu;
975 
976 	for_each_possible_cpu(cpu) {
977 		/* Set up direct vCPU id mapping for PV guests. */
978 		per_cpu(xen_vcpu_id, cpu) = cpu;
979 
980 		/*
981 		 * xen_vcpu_setup(cpu) can fail  -- in which case it
982 		 * falls back to the shared_info version for cpus
983 		 * where xen_vcpu_nr(cpu) < MAX_VIRT_CPUS.
984 		 *
985 		 * xen_cpu_up_prepare_pv() handles the rest by failing
986 		 * them in hotplug.
987 		 */
988 		(void) xen_vcpu_setup(cpu);
989 	}
990 
991 	/*
992 	 * xen_vcpu_setup managed to place the vcpu_info within the
993 	 * percpu area for all cpus, so make use of it.
994 	 */
995 	if (xen_have_vcpu_info_placement) {
996 		pv_irq_ops.save_fl = __PV_IS_CALLEE_SAVE(xen_save_fl_direct);
997 		pv_irq_ops.restore_fl = __PV_IS_CALLEE_SAVE(xen_restore_fl_direct);
998 		pv_irq_ops.irq_disable = __PV_IS_CALLEE_SAVE(xen_irq_disable_direct);
999 		pv_irq_ops.irq_enable = __PV_IS_CALLEE_SAVE(xen_irq_enable_direct);
1000 		pv_mmu_ops.read_cr2 = xen_read_cr2_direct;
1001 	}
1002 }
1003 
1004 static const struct pv_info xen_info __initconst = {
1005 	.shared_kernel_pmd = 0,
1006 
1007 #ifdef CONFIG_X86_64
1008 	.extra_user_64bit_cs = FLAT_USER_CS64,
1009 #endif
1010 	.name = "Xen",
1011 };
1012 
1013 static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1014 	.cpuid = xen_cpuid,
1015 
1016 	.set_debugreg = xen_set_debugreg,
1017 	.get_debugreg = xen_get_debugreg,
1018 
1019 	.read_cr0 = xen_read_cr0,
1020 	.write_cr0 = xen_write_cr0,
1021 
1022 	.write_cr4 = xen_write_cr4,
1023 
1024 #ifdef CONFIG_X86_64
1025 	.read_cr8 = xen_read_cr8,
1026 	.write_cr8 = xen_write_cr8,
1027 #endif
1028 
1029 	.wbinvd = native_wbinvd,
1030 
1031 	.read_msr = xen_read_msr,
1032 	.write_msr = xen_write_msr,
1033 
1034 	.read_msr_safe = xen_read_msr_safe,
1035 	.write_msr_safe = xen_write_msr_safe,
1036 
1037 	.read_pmc = xen_read_pmc,
1038 
1039 	.iret = xen_iret,
1040 #ifdef CONFIG_X86_64
1041 	.usergs_sysret64 = xen_sysret64,
1042 #endif
1043 
1044 	.load_tr_desc = paravirt_nop,
1045 	.set_ldt = xen_set_ldt,
1046 	.load_gdt = xen_load_gdt,
1047 	.load_idt = xen_load_idt,
1048 	.load_tls = xen_load_tls,
1049 #ifdef CONFIG_X86_64
1050 	.load_gs_index = xen_load_gs_index,
1051 #endif
1052 
1053 	.alloc_ldt = xen_alloc_ldt,
1054 	.free_ldt = xen_free_ldt,
1055 
1056 	.store_tr = xen_store_tr,
1057 
1058 	.write_ldt_entry = xen_write_ldt_entry,
1059 	.write_gdt_entry = xen_write_gdt_entry,
1060 	.write_idt_entry = xen_write_idt_entry,
1061 	.load_sp0 = xen_load_sp0,
1062 
1063 	.set_iopl_mask = xen_set_iopl_mask,
1064 	.io_delay = xen_io_delay,
1065 
1066 	/* Xen takes care of %gs when switching to usermode for us */
1067 	.swapgs = paravirt_nop,
1068 
1069 	.start_context_switch = paravirt_start_context_switch,
1070 	.end_context_switch = xen_end_context_switch,
1071 };
1072 
xen_restart(char * msg)1073 static void xen_restart(char *msg)
1074 {
1075 	xen_reboot(SHUTDOWN_reboot);
1076 }
1077 
xen_machine_halt(void)1078 static void xen_machine_halt(void)
1079 {
1080 	xen_reboot(SHUTDOWN_poweroff);
1081 }
1082 
xen_machine_power_off(void)1083 static void xen_machine_power_off(void)
1084 {
1085 	if (pm_power_off)
1086 		pm_power_off();
1087 	xen_reboot(SHUTDOWN_poweroff);
1088 }
1089 
xen_crash_shutdown(struct pt_regs * regs)1090 static void xen_crash_shutdown(struct pt_regs *regs)
1091 {
1092 	xen_reboot(SHUTDOWN_crash);
1093 }
1094 
1095 static const struct machine_ops xen_machine_ops __initconst = {
1096 	.restart = xen_restart,
1097 	.halt = xen_machine_halt,
1098 	.power_off = xen_machine_power_off,
1099 	.shutdown = xen_machine_halt,
1100 	.crash_shutdown = xen_crash_shutdown,
1101 	.emergency_restart = xen_emergency_restart,
1102 };
1103 
xen_get_nmi_reason(void)1104 static unsigned char xen_get_nmi_reason(void)
1105 {
1106 	unsigned char reason = 0;
1107 
1108 	/* Construct a value which looks like it came from port 0x61. */
1109 	if (test_bit(_XEN_NMIREASON_io_error,
1110 		     &HYPERVISOR_shared_info->arch.nmi_reason))
1111 		reason |= NMI_REASON_IOCHK;
1112 	if (test_bit(_XEN_NMIREASON_pci_serr,
1113 		     &HYPERVISOR_shared_info->arch.nmi_reason))
1114 		reason |= NMI_REASON_SERR;
1115 
1116 	return reason;
1117 }
1118 
xen_boot_params_init_edd(void)1119 static void __init xen_boot_params_init_edd(void)
1120 {
1121 #if IS_ENABLED(CONFIG_EDD)
1122 	struct xen_platform_op op;
1123 	struct edd_info *edd_info;
1124 	u32 *mbr_signature;
1125 	unsigned nr;
1126 	int ret;
1127 
1128 	edd_info = boot_params.eddbuf;
1129 	mbr_signature = boot_params.edd_mbr_sig_buffer;
1130 
1131 	op.cmd = XENPF_firmware_info;
1132 
1133 	op.u.firmware_info.type = XEN_FW_DISK_INFO;
1134 	for (nr = 0; nr < EDDMAXNR; nr++) {
1135 		struct edd_info *info = edd_info + nr;
1136 
1137 		op.u.firmware_info.index = nr;
1138 		info->params.length = sizeof(info->params);
1139 		set_xen_guest_handle(op.u.firmware_info.u.disk_info.edd_params,
1140 				     &info->params);
1141 		ret = HYPERVISOR_platform_op(&op);
1142 		if (ret)
1143 			break;
1144 
1145 #define C(x) info->x = op.u.firmware_info.u.disk_info.x
1146 		C(device);
1147 		C(version);
1148 		C(interface_support);
1149 		C(legacy_max_cylinder);
1150 		C(legacy_max_head);
1151 		C(legacy_sectors_per_track);
1152 #undef C
1153 	}
1154 	boot_params.eddbuf_entries = nr;
1155 
1156 	op.u.firmware_info.type = XEN_FW_DISK_MBR_SIGNATURE;
1157 	for (nr = 0; nr < EDD_MBR_SIG_MAX; nr++) {
1158 		op.u.firmware_info.index = nr;
1159 		ret = HYPERVISOR_platform_op(&op);
1160 		if (ret)
1161 			break;
1162 		mbr_signature[nr] = op.u.firmware_info.u.disk_mbr_signature.mbr_signature;
1163 	}
1164 	boot_params.edd_mbr_sig_buf_entries = nr;
1165 #endif
1166 }
1167 
1168 /*
1169  * Set up the GDT and segment registers for -fstack-protector.  Until
1170  * we do this, we have to be careful not to call any stack-protected
1171  * function, which is most of the kernel.
1172  */
xen_setup_gdt(int cpu)1173 static void __init xen_setup_gdt(int cpu)
1174 {
1175 	pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry_boot;
1176 	pv_cpu_ops.load_gdt = xen_load_gdt_boot;
1177 
1178 	setup_stack_canary_segment(cpu);
1179 	switch_to_new_gdt(cpu);
1180 
1181 	pv_cpu_ops.write_gdt_entry = xen_write_gdt_entry;
1182 	pv_cpu_ops.load_gdt = xen_load_gdt;
1183 }
1184 
xen_dom0_set_legacy_features(void)1185 static void __init xen_dom0_set_legacy_features(void)
1186 {
1187 	x86_platform.legacy.rtc = 1;
1188 }
1189 
1190 /* First C function to be called on Xen boot */
xen_start_kernel(void)1191 asmlinkage __visible void __init xen_start_kernel(void)
1192 {
1193 	struct physdev_set_iopl set_iopl;
1194 	unsigned long initrd_start = 0;
1195 	int rc;
1196 
1197 	if (!xen_start_info)
1198 		return;
1199 
1200 	xen_domain_type = XEN_PV_DOMAIN;
1201 	xen_start_flags = xen_start_info->flags;
1202 
1203 	xen_setup_features();
1204 
1205 	/* Install Xen paravirt ops */
1206 	pv_info = xen_info;
1207 	pv_init_ops.patch = paravirt_patch_default;
1208 	pv_cpu_ops = xen_cpu_ops;
1209 	xen_init_irq_ops();
1210 
1211 	/*
1212 	 * Setup xen_vcpu early because it is needed for
1213 	 * local_irq_disable(), irqs_disabled(), e.g. in printk().
1214 	 *
1215 	 * Don't do the full vcpu_info placement stuff until we have
1216 	 * the cpu_possible_mask and a non-dummy shared_info.
1217 	 */
1218 	xen_vcpu_info_reset(0);
1219 
1220 	x86_platform.get_nmi_reason = xen_get_nmi_reason;
1221 
1222 	x86_init.resources.memory_setup = xen_memory_setup;
1223 	x86_init.irqs.intr_mode_init	= x86_init_noop;
1224 	x86_init.oem.arch_setup = xen_arch_setup;
1225 	x86_init.oem.banner = xen_banner;
1226 	x86_init.hyper.init_platform = xen_pv_init_platform;
1227 	x86_init.hyper.guest_late_init = xen_pv_guest_late_init;
1228 
1229 	/*
1230 	 * Set up some pagetable state before starting to set any ptes.
1231 	 */
1232 
1233 	xen_setup_machphys_mapping();
1234 	xen_init_mmu_ops();
1235 
1236 	/* Prevent unwanted bits from being set in PTEs. */
1237 	__supported_pte_mask &= ~_PAGE_GLOBAL;
1238 	__default_kernel_pte_mask &= ~_PAGE_GLOBAL;
1239 
1240 	/*
1241 	 * Prevent page tables from being allocated in highmem, even
1242 	 * if CONFIG_HIGHPTE is enabled.
1243 	 */
1244 	__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
1245 
1246 	/* Get mfn list */
1247 	xen_build_dynamic_phys_to_machine();
1248 
1249 	/*
1250 	 * Set up kernel GDT and segment registers, mainly so that
1251 	 * -fstack-protector code can be executed.
1252 	 */
1253 	xen_setup_gdt(0);
1254 
1255 	/* Work out if we support NX */
1256 	get_cpu_cap(&boot_cpu_data);
1257 	x86_configure_nx();
1258 
1259 	/* Determine virtual and physical address sizes */
1260 	get_cpu_address_sizes(&boot_cpu_data);
1261 
1262 	/* Let's presume PV guests always boot on vCPU with id 0. */
1263 	per_cpu(xen_vcpu_id, 0) = 0;
1264 
1265 	idt_setup_early_handler();
1266 
1267 	xen_init_capabilities();
1268 
1269 #ifdef CONFIG_X86_LOCAL_APIC
1270 	/*
1271 	 * set up the basic apic ops.
1272 	 */
1273 	xen_init_apic();
1274 #endif
1275 
1276 	if (xen_feature(XENFEAT_mmu_pt_update_preserve_ad)) {
1277 		pv_mmu_ops.ptep_modify_prot_start = xen_ptep_modify_prot_start;
1278 		pv_mmu_ops.ptep_modify_prot_commit = xen_ptep_modify_prot_commit;
1279 	}
1280 
1281 	machine_ops = xen_machine_ops;
1282 
1283 	/*
1284 	 * The only reliable way to retain the initial address of the
1285 	 * percpu gdt_page is to remember it here, so we can go and
1286 	 * mark it RW later, when the initial percpu area is freed.
1287 	 */
1288 	xen_initial_gdt = &per_cpu(gdt_page, 0);
1289 
1290 	xen_smp_init();
1291 
1292 #ifdef CONFIG_ACPI_NUMA
1293 	/*
1294 	 * The pages we from Xen are not related to machine pages, so
1295 	 * any NUMA information the kernel tries to get from ACPI will
1296 	 * be meaningless.  Prevent it from trying.
1297 	 */
1298 	acpi_numa = -1;
1299 #endif
1300 	WARN_ON(xen_cpuhp_setup(xen_cpu_up_prepare_pv, xen_cpu_dead_pv));
1301 
1302 	local_irq_disable();
1303 	early_boot_irqs_disabled = true;
1304 
1305 	xen_raw_console_write("mapping kernel into physical memory\n");
1306 	xen_setup_kernel_pagetable((pgd_t *)xen_start_info->pt_base,
1307 				   xen_start_info->nr_pages);
1308 	xen_reserve_special_pages();
1309 
1310 	/* keep using Xen gdt for now; no urgent need to change it */
1311 
1312 #ifdef CONFIG_X86_32
1313 	pv_info.kernel_rpl = 1;
1314 	if (xen_feature(XENFEAT_supervisor_mode_kernel))
1315 		pv_info.kernel_rpl = 0;
1316 #else
1317 	pv_info.kernel_rpl = 0;
1318 #endif
1319 	/* set the limit of our address space */
1320 	xen_reserve_top();
1321 
1322 	/*
1323 	 * We used to do this in xen_arch_setup, but that is too late
1324 	 * on AMD were early_cpu_init (run before ->arch_setup()) calls
1325 	 * early_amd_init which pokes 0xcf8 port.
1326 	 */
1327 	set_iopl.iopl = 1;
1328 	rc = HYPERVISOR_physdev_op(PHYSDEVOP_set_iopl, &set_iopl);
1329 	if (rc != 0)
1330 		xen_raw_printk("physdev_op failed %d\n", rc);
1331 
1332 #ifdef CONFIG_X86_32
1333 	/* set up basic CPUID stuff */
1334 	cpu_detect(&new_cpu_data);
1335 	set_cpu_cap(&new_cpu_data, X86_FEATURE_FPU);
1336 	new_cpu_data.x86_capability[CPUID_1_EDX] = cpuid_edx(1);
1337 #endif
1338 
1339 	if (xen_start_info->mod_start) {
1340 	    if (xen_start_info->flags & SIF_MOD_START_PFN)
1341 		initrd_start = PFN_PHYS(xen_start_info->mod_start);
1342 	    else
1343 		initrd_start = __pa(xen_start_info->mod_start);
1344 	}
1345 
1346 	/* Poke various useful things into boot_params */
1347 	boot_params.hdr.type_of_loader = (9 << 4) | 0;
1348 	boot_params.hdr.ramdisk_image = initrd_start;
1349 	boot_params.hdr.ramdisk_size = xen_start_info->mod_len;
1350 	boot_params.hdr.cmd_line_ptr = __pa(xen_start_info->cmd_line);
1351 	boot_params.hdr.hardware_subarch = X86_SUBARCH_XEN;
1352 
1353 	if (!xen_initial_domain()) {
1354 		add_preferred_console("xenboot", 0, NULL);
1355 		if (pci_xen)
1356 			x86_init.pci.arch_init = pci_xen_init;
1357 	} else {
1358 		const struct dom0_vga_console_info *info =
1359 			(void *)((char *)xen_start_info +
1360 				 xen_start_info->console.dom0.info_off);
1361 		struct xen_platform_op op = {
1362 			.cmd = XENPF_firmware_info,
1363 			.interface_version = XENPF_INTERFACE_VERSION,
1364 			.u.firmware_info.type = XEN_FW_KBD_SHIFT_FLAGS,
1365 		};
1366 
1367 		x86_platform.set_legacy_features =
1368 				xen_dom0_set_legacy_features;
1369 		xen_init_vga(info, xen_start_info->console.dom0.info_size);
1370 		xen_start_info->console.domU.mfn = 0;
1371 		xen_start_info->console.domU.evtchn = 0;
1372 
1373 		if (HYPERVISOR_platform_op(&op) == 0)
1374 			boot_params.kbd_status = op.u.firmware_info.u.kbd_shift_flags;
1375 
1376 		/* Make sure ACS will be enabled */
1377 		pci_request_acs();
1378 
1379 		xen_acpi_sleep_register();
1380 
1381 		/* Avoid searching for BIOS MP tables */
1382 		x86_init.mpparse.find_smp_config = x86_init_noop;
1383 		x86_init.mpparse.get_smp_config = x86_init_uint_noop;
1384 
1385 		xen_boot_params_init_edd();
1386 
1387 #ifdef CONFIG_ACPI
1388 		/*
1389 		 * Disable selecting "Firmware First mode" for correctable
1390 		 * memory errors, as this is the duty of the hypervisor to
1391 		 * decide.
1392 		 */
1393 		acpi_disable_cmcff = 1;
1394 #endif
1395 	}
1396 
1397 	if (!boot_params.screen_info.orig_video_isVGA)
1398 		add_preferred_console("tty", 0, NULL);
1399 	add_preferred_console("hvc", 0, NULL);
1400 	if (boot_params.screen_info.orig_video_isVGA)
1401 		add_preferred_console("tty", 0, NULL);
1402 
1403 #ifdef CONFIG_PCI
1404 	/* PCI BIOS service won't work from a PV guest. */
1405 	pci_probe &= ~PCI_PROBE_BIOS;
1406 #endif
1407 	xen_raw_console_write("about to get started...\n");
1408 
1409 	/* We need this for printk timestamps */
1410 	xen_setup_runstate_info(0);
1411 
1412 	xen_efi_init();
1413 
1414 	/* Start the world */
1415 #ifdef CONFIG_X86_32
1416 	i386_start_kernel();
1417 #else
1418 	cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1419 	x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1420 #endif
1421 }
1422 
xen_cpu_up_prepare_pv(unsigned int cpu)1423 static int xen_cpu_up_prepare_pv(unsigned int cpu)
1424 {
1425 	int rc;
1426 
1427 	if (per_cpu(xen_vcpu, cpu) == NULL)
1428 		return -ENODEV;
1429 
1430 	xen_setup_timer(cpu);
1431 
1432 	rc = xen_smp_intr_init(cpu);
1433 	if (rc) {
1434 		WARN(1, "xen_smp_intr_init() for CPU %d failed: %d\n",
1435 		     cpu, rc);
1436 		return rc;
1437 	}
1438 
1439 	rc = xen_smp_intr_init_pv(cpu);
1440 	if (rc) {
1441 		WARN(1, "xen_smp_intr_init_pv() for CPU %d failed: %d\n",
1442 		     cpu, rc);
1443 		return rc;
1444 	}
1445 
1446 	return 0;
1447 }
1448 
xen_cpu_dead_pv(unsigned int cpu)1449 static int xen_cpu_dead_pv(unsigned int cpu)
1450 {
1451 	xen_smp_intr_free(cpu);
1452 	xen_smp_intr_free_pv(cpu);
1453 
1454 	xen_teardown_timer(cpu);
1455 
1456 	return 0;
1457 }
1458 
xen_platform_pv(void)1459 static uint32_t __init xen_platform_pv(void)
1460 {
1461 	if (xen_pv_domain())
1462 		return xen_cpuid_base();
1463 
1464 	return 0;
1465 }
1466 
1467 const __initconst struct hypervisor_x86 x86_hyper_xen_pv = {
1468 	.name                   = "Xen PV",
1469 	.detect                 = xen_platform_pv,
1470 	.type			= X86_HYPER_XEN_PV,
1471 	.runtime.pin_vcpu       = xen_pin_vcpu,
1472 };
1473