1 /*
2 * Xen mmu operations
3 *
4 * This file contains the various mmu fetch and update operations.
5 * The most important job they must perform is the mapping between the
6 * domain's pfn and the overall machine mfns.
7 *
8 * Xen allows guests to directly update the pagetable, in a controlled
9 * fashion. In other words, the guest modifies the same pagetable
10 * that the CPU actually uses, which eliminates the overhead of having
11 * a separate shadow pagetable.
12 *
13 * In order to allow this, it falls on the guest domain to map its
14 * notion of a "physical" pfn - which is just a domain-local linear
15 * address - into a real "machine address" which the CPU's MMU can
16 * use.
17 *
18 * A pgd_t/pmd_t/pte_t will typically contain an mfn, and so can be
19 * inserted directly into the pagetable. When creating a new
20 * pte/pmd/pgd, it converts the passed pfn into an mfn. Conversely,
21 * when reading the content back with __(pgd|pmd|pte)_val, it converts
22 * the mfn back into a pfn.
23 *
24 * The other constraint is that all pages which make up a pagetable
25 * must be mapped read-only in the guest. This prevents uncontrolled
26 * guest updates to the pagetable. Xen strictly enforces this, and
27 * will disallow any pagetable update which will end up mapping a
28 * pagetable page RW, and will disallow using any writable page as a
29 * pagetable.
30 *
31 * Naively, when loading %cr3 with the base of a new pagetable, Xen
32 * would need to validate the whole pagetable before going on.
33 * Naturally, this is quite slow. The solution is to "pin" a
34 * pagetable, which enforces all the constraints on the pagetable even
35 * when it is not actively in use. This menas that Xen can be assured
36 * that it is still valid when you do load it into %cr3, and doesn't
37 * need to revalidate it.
38 *
39 * Jeremy Fitzhardinge <jeremy@xensource.com>, XenSource Inc, 2007
40 */
41 #include <linux/sched/mm.h>
42 #include <linux/highmem.h>
43 #include <linux/debugfs.h>
44 #include <linux/bug.h>
45 #include <linux/vmalloc.h>
46 #include <linux/export.h>
47 #include <linux/init.h>
48 #include <linux/gfp.h>
49 #include <linux/memblock.h>
50 #include <linux/seq_file.h>
51 #include <linux/crash_dump.h>
52 #ifdef CONFIG_KEXEC_CORE
53 #include <linux/kexec.h>
54 #endif
55
56 #include <trace/events/xen.h>
57
58 #include <asm/pgtable.h>
59 #include <asm/tlbflush.h>
60 #include <asm/fixmap.h>
61 #include <asm/mmu_context.h>
62 #include <asm/setup.h>
63 #include <asm/paravirt.h>
64 #include <asm/e820/api.h>
65 #include <asm/linkage.h>
66 #include <asm/page.h>
67 #include <asm/init.h>
68 #include <asm/pat.h>
69 #include <asm/smp.h>
70 #include <asm/tlb.h>
71
72 #include <asm/xen/hypercall.h>
73 #include <asm/xen/hypervisor.h>
74
75 #include <xen/xen.h>
76 #include <xen/page.h>
77 #include <xen/interface/xen.h>
78 #include <xen/interface/hvm/hvm_op.h>
79 #include <xen/interface/version.h>
80 #include <xen/interface/memory.h>
81 #include <xen/hvc-console.h>
82
83 #include "multicalls.h"
84 #include "mmu.h"
85 #include "debugfs.h"
86
87 #ifdef CONFIG_X86_32
88 /*
89 * Identity map, in addition to plain kernel map. This needs to be
90 * large enough to allocate page table pages to allocate the rest.
91 * Each page can map 2MB.
92 */
93 #define LEVEL1_IDENT_ENTRIES (PTRS_PER_PTE * 4)
94 static RESERVE_BRK_ARRAY(pte_t, level1_ident_pgt, LEVEL1_IDENT_ENTRIES);
95 #endif
96 #ifdef CONFIG_X86_64
97 /* l3 pud for userspace vsyscall mapping */
98 static pud_t level3_user_vsyscall[PTRS_PER_PUD] __page_aligned_bss;
99 #endif /* CONFIG_X86_64 */
100
101 /*
102 * Note about cr3 (pagetable base) values:
103 *
104 * xen_cr3 contains the current logical cr3 value; it contains the
105 * last set cr3. This may not be the current effective cr3, because
106 * its update may be being lazily deferred. However, a vcpu looking
107 * at its own cr3 can use this value knowing that it everything will
108 * be self-consistent.
109 *
110 * xen_current_cr3 contains the actual vcpu cr3; it is set once the
111 * hypercall to set the vcpu cr3 is complete (so it may be a little
112 * out of date, but it will never be set early). If one vcpu is
113 * looking at another vcpu's cr3 value, it should use this variable.
114 */
115 DEFINE_PER_CPU(unsigned long, xen_cr3); /* cr3 stored as physaddr */
116 DEFINE_PER_CPU(unsigned long, xen_current_cr3); /* actual vcpu cr3 */
117
118 static phys_addr_t xen_pt_base, xen_pt_size __initdata;
119
120 static DEFINE_STATIC_KEY_FALSE(xen_struct_pages_ready);
121
122 /*
123 * Just beyond the highest usermode address. STACK_TOP_MAX has a
124 * redzone above it, so round it up to a PGD boundary.
125 */
126 #define USER_LIMIT ((STACK_TOP_MAX + PGDIR_SIZE - 1) & PGDIR_MASK)
127
make_lowmem_page_readonly(void * vaddr)128 void make_lowmem_page_readonly(void *vaddr)
129 {
130 pte_t *pte, ptev;
131 unsigned long address = (unsigned long)vaddr;
132 unsigned int level;
133
134 pte = lookup_address(address, &level);
135 if (pte == NULL)
136 return; /* vaddr missing */
137
138 ptev = pte_wrprotect(*pte);
139
140 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
141 BUG();
142 }
143
make_lowmem_page_readwrite(void * vaddr)144 void make_lowmem_page_readwrite(void *vaddr)
145 {
146 pte_t *pte, ptev;
147 unsigned long address = (unsigned long)vaddr;
148 unsigned int level;
149
150 pte = lookup_address(address, &level);
151 if (pte == NULL)
152 return; /* vaddr missing */
153
154 ptev = pte_mkwrite(*pte);
155
156 if (HYPERVISOR_update_va_mapping(address, ptev, 0))
157 BUG();
158 }
159
160
161 /*
162 * During early boot all page table pages are pinned, but we do not have struct
163 * pages, so return true until struct pages are ready.
164 */
xen_page_pinned(void * ptr)165 static bool xen_page_pinned(void *ptr)
166 {
167 if (static_branch_likely(&xen_struct_pages_ready)) {
168 struct page *page = virt_to_page(ptr);
169
170 return PagePinned(page);
171 }
172 return true;
173 }
174
xen_extend_mmu_update(const struct mmu_update * update)175 static void xen_extend_mmu_update(const struct mmu_update *update)
176 {
177 struct multicall_space mcs;
178 struct mmu_update *u;
179
180 mcs = xen_mc_extend_args(__HYPERVISOR_mmu_update, sizeof(*u));
181
182 if (mcs.mc != NULL) {
183 mcs.mc->args[1]++;
184 } else {
185 mcs = __xen_mc_entry(sizeof(*u));
186 MULTI_mmu_update(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
187 }
188
189 u = mcs.args;
190 *u = *update;
191 }
192
xen_extend_mmuext_op(const struct mmuext_op * op)193 static void xen_extend_mmuext_op(const struct mmuext_op *op)
194 {
195 struct multicall_space mcs;
196 struct mmuext_op *u;
197
198 mcs = xen_mc_extend_args(__HYPERVISOR_mmuext_op, sizeof(*u));
199
200 if (mcs.mc != NULL) {
201 mcs.mc->args[1]++;
202 } else {
203 mcs = __xen_mc_entry(sizeof(*u));
204 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
205 }
206
207 u = mcs.args;
208 *u = *op;
209 }
210
xen_set_pmd_hyper(pmd_t * ptr,pmd_t val)211 static void xen_set_pmd_hyper(pmd_t *ptr, pmd_t val)
212 {
213 struct mmu_update u;
214
215 preempt_disable();
216
217 xen_mc_batch();
218
219 /* ptr may be ioremapped for 64-bit pagetable setup */
220 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
221 u.val = pmd_val_ma(val);
222 xen_extend_mmu_update(&u);
223
224 xen_mc_issue(PARAVIRT_LAZY_MMU);
225
226 preempt_enable();
227 }
228
xen_set_pmd(pmd_t * ptr,pmd_t val)229 static void xen_set_pmd(pmd_t *ptr, pmd_t val)
230 {
231 trace_xen_mmu_set_pmd(ptr, val);
232
233 /* If page is not pinned, we can just update the entry
234 directly */
235 if (!xen_page_pinned(ptr)) {
236 *ptr = val;
237 return;
238 }
239
240 xen_set_pmd_hyper(ptr, val);
241 }
242
243 /*
244 * Associate a virtual page frame with a given physical page frame
245 * and protection flags for that frame.
246 */
set_pte_mfn(unsigned long vaddr,unsigned long mfn,pgprot_t flags)247 void set_pte_mfn(unsigned long vaddr, unsigned long mfn, pgprot_t flags)
248 {
249 set_pte_vaddr(vaddr, mfn_pte(mfn, flags));
250 }
251
xen_batched_set_pte(pte_t * ptep,pte_t pteval)252 static bool xen_batched_set_pte(pte_t *ptep, pte_t pteval)
253 {
254 struct mmu_update u;
255
256 if (paravirt_get_lazy_mode() != PARAVIRT_LAZY_MMU)
257 return false;
258
259 xen_mc_batch();
260
261 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
262 u.val = pte_val_ma(pteval);
263 xen_extend_mmu_update(&u);
264
265 xen_mc_issue(PARAVIRT_LAZY_MMU);
266
267 return true;
268 }
269
__xen_set_pte(pte_t * ptep,pte_t pteval)270 static inline void __xen_set_pte(pte_t *ptep, pte_t pteval)
271 {
272 if (!xen_batched_set_pte(ptep, pteval)) {
273 /*
274 * Could call native_set_pte() here and trap and
275 * emulate the PTE write but with 32-bit guests this
276 * needs two traps (one for each of the two 32-bit
277 * words in the PTE) so do one hypercall directly
278 * instead.
279 */
280 struct mmu_update u;
281
282 u.ptr = virt_to_machine(ptep).maddr | MMU_NORMAL_PT_UPDATE;
283 u.val = pte_val_ma(pteval);
284 HYPERVISOR_mmu_update(&u, 1, NULL, DOMID_SELF);
285 }
286 }
287
xen_set_pte(pte_t * ptep,pte_t pteval)288 static void xen_set_pte(pte_t *ptep, pte_t pteval)
289 {
290 trace_xen_mmu_set_pte(ptep, pteval);
291 __xen_set_pte(ptep, pteval);
292 }
293
xen_set_pte_at(struct mm_struct * mm,unsigned long addr,pte_t * ptep,pte_t pteval)294 static void xen_set_pte_at(struct mm_struct *mm, unsigned long addr,
295 pte_t *ptep, pte_t pteval)
296 {
297 trace_xen_mmu_set_pte_at(mm, addr, ptep, pteval);
298 __xen_set_pte(ptep, pteval);
299 }
300
xen_ptep_modify_prot_start(struct mm_struct * mm,unsigned long addr,pte_t * ptep)301 pte_t xen_ptep_modify_prot_start(struct mm_struct *mm,
302 unsigned long addr, pte_t *ptep)
303 {
304 /* Just return the pte as-is. We preserve the bits on commit */
305 trace_xen_mmu_ptep_modify_prot_start(mm, addr, ptep, *ptep);
306 return *ptep;
307 }
308
xen_ptep_modify_prot_commit(struct mm_struct * mm,unsigned long addr,pte_t * ptep,pte_t pte)309 void xen_ptep_modify_prot_commit(struct mm_struct *mm, unsigned long addr,
310 pte_t *ptep, pte_t pte)
311 {
312 struct mmu_update u;
313
314 trace_xen_mmu_ptep_modify_prot_commit(mm, addr, ptep, pte);
315 xen_mc_batch();
316
317 u.ptr = virt_to_machine(ptep).maddr | MMU_PT_UPDATE_PRESERVE_AD;
318 u.val = pte_val_ma(pte);
319 xen_extend_mmu_update(&u);
320
321 xen_mc_issue(PARAVIRT_LAZY_MMU);
322 }
323
324 /* Assume pteval_t is equivalent to all the other *val_t types. */
pte_mfn_to_pfn(pteval_t val)325 static pteval_t pte_mfn_to_pfn(pteval_t val)
326 {
327 if (val & _PAGE_PRESENT) {
328 unsigned long mfn = (val & XEN_PTE_MFN_MASK) >> PAGE_SHIFT;
329 unsigned long pfn = mfn_to_pfn(mfn);
330
331 pteval_t flags = val & PTE_FLAGS_MASK;
332 if (unlikely(pfn == ~0))
333 val = flags & ~_PAGE_PRESENT;
334 else
335 val = ((pteval_t)pfn << PAGE_SHIFT) | flags;
336 }
337
338 return val;
339 }
340
pte_pfn_to_mfn(pteval_t val)341 static pteval_t pte_pfn_to_mfn(pteval_t val)
342 {
343 if (val & _PAGE_PRESENT) {
344 unsigned long pfn = (val & PTE_PFN_MASK) >> PAGE_SHIFT;
345 pteval_t flags = val & PTE_FLAGS_MASK;
346 unsigned long mfn;
347
348 mfn = __pfn_to_mfn(pfn);
349
350 /*
351 * If there's no mfn for the pfn, then just create an
352 * empty non-present pte. Unfortunately this loses
353 * information about the original pfn, so
354 * pte_mfn_to_pfn is asymmetric.
355 */
356 if (unlikely(mfn == INVALID_P2M_ENTRY)) {
357 mfn = 0;
358 flags = 0;
359 } else
360 mfn &= ~(FOREIGN_FRAME_BIT | IDENTITY_FRAME_BIT);
361 val = ((pteval_t)mfn << PAGE_SHIFT) | flags;
362 }
363
364 return val;
365 }
366
xen_pte_val(pte_t pte)367 __visible pteval_t xen_pte_val(pte_t pte)
368 {
369 pteval_t pteval = pte.pte;
370
371 return pte_mfn_to_pfn(pteval);
372 }
373 PV_CALLEE_SAVE_REGS_THUNK(xen_pte_val);
374
xen_pgd_val(pgd_t pgd)375 __visible pgdval_t xen_pgd_val(pgd_t pgd)
376 {
377 return pte_mfn_to_pfn(pgd.pgd);
378 }
379 PV_CALLEE_SAVE_REGS_THUNK(xen_pgd_val);
380
xen_make_pte(pteval_t pte)381 __visible pte_t xen_make_pte(pteval_t pte)
382 {
383 pte = pte_pfn_to_mfn(pte);
384
385 return native_make_pte(pte);
386 }
387 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte);
388
xen_make_pgd(pgdval_t pgd)389 __visible pgd_t xen_make_pgd(pgdval_t pgd)
390 {
391 pgd = pte_pfn_to_mfn(pgd);
392 return native_make_pgd(pgd);
393 }
394 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pgd);
395
xen_pmd_val(pmd_t pmd)396 __visible pmdval_t xen_pmd_val(pmd_t pmd)
397 {
398 return pte_mfn_to_pfn(pmd.pmd);
399 }
400 PV_CALLEE_SAVE_REGS_THUNK(xen_pmd_val);
401
xen_set_pud_hyper(pud_t * ptr,pud_t val)402 static void xen_set_pud_hyper(pud_t *ptr, pud_t val)
403 {
404 struct mmu_update u;
405
406 preempt_disable();
407
408 xen_mc_batch();
409
410 /* ptr may be ioremapped for 64-bit pagetable setup */
411 u.ptr = arbitrary_virt_to_machine(ptr).maddr;
412 u.val = pud_val_ma(val);
413 xen_extend_mmu_update(&u);
414
415 xen_mc_issue(PARAVIRT_LAZY_MMU);
416
417 preempt_enable();
418 }
419
xen_set_pud(pud_t * ptr,pud_t val)420 static void xen_set_pud(pud_t *ptr, pud_t val)
421 {
422 trace_xen_mmu_set_pud(ptr, val);
423
424 /* If page is not pinned, we can just update the entry
425 directly */
426 if (!xen_page_pinned(ptr)) {
427 *ptr = val;
428 return;
429 }
430
431 xen_set_pud_hyper(ptr, val);
432 }
433
434 #ifdef CONFIG_X86_PAE
xen_set_pte_atomic(pte_t * ptep,pte_t pte)435 static void xen_set_pte_atomic(pte_t *ptep, pte_t pte)
436 {
437 trace_xen_mmu_set_pte_atomic(ptep, pte);
438 __xen_set_pte(ptep, pte);
439 }
440
xen_pte_clear(struct mm_struct * mm,unsigned long addr,pte_t * ptep)441 static void xen_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
442 {
443 trace_xen_mmu_pte_clear(mm, addr, ptep);
444 __xen_set_pte(ptep, native_make_pte(0));
445 }
446
xen_pmd_clear(pmd_t * pmdp)447 static void xen_pmd_clear(pmd_t *pmdp)
448 {
449 trace_xen_mmu_pmd_clear(pmdp);
450 set_pmd(pmdp, __pmd(0));
451 }
452 #endif /* CONFIG_X86_PAE */
453
xen_make_pmd(pmdval_t pmd)454 __visible pmd_t xen_make_pmd(pmdval_t pmd)
455 {
456 pmd = pte_pfn_to_mfn(pmd);
457 return native_make_pmd(pmd);
458 }
459 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pmd);
460
461 #ifdef CONFIG_X86_64
xen_pud_val(pud_t pud)462 __visible pudval_t xen_pud_val(pud_t pud)
463 {
464 return pte_mfn_to_pfn(pud.pud);
465 }
466 PV_CALLEE_SAVE_REGS_THUNK(xen_pud_val);
467
xen_make_pud(pudval_t pud)468 __visible pud_t xen_make_pud(pudval_t pud)
469 {
470 pud = pte_pfn_to_mfn(pud);
471
472 return native_make_pud(pud);
473 }
474 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pud);
475
xen_get_user_pgd(pgd_t * pgd)476 static pgd_t *xen_get_user_pgd(pgd_t *pgd)
477 {
478 pgd_t *pgd_page = (pgd_t *)(((unsigned long)pgd) & PAGE_MASK);
479 unsigned offset = pgd - pgd_page;
480 pgd_t *user_ptr = NULL;
481
482 if (offset < pgd_index(USER_LIMIT)) {
483 struct page *page = virt_to_page(pgd_page);
484 user_ptr = (pgd_t *)page->private;
485 if (user_ptr)
486 user_ptr += offset;
487 }
488
489 return user_ptr;
490 }
491
__xen_set_p4d_hyper(p4d_t * ptr,p4d_t val)492 static void __xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
493 {
494 struct mmu_update u;
495
496 u.ptr = virt_to_machine(ptr).maddr;
497 u.val = p4d_val_ma(val);
498 xen_extend_mmu_update(&u);
499 }
500
501 /*
502 * Raw hypercall-based set_p4d, intended for in early boot before
503 * there's a page structure. This implies:
504 * 1. The only existing pagetable is the kernel's
505 * 2. It is always pinned
506 * 3. It has no user pagetable attached to it
507 */
xen_set_p4d_hyper(p4d_t * ptr,p4d_t val)508 static void __init xen_set_p4d_hyper(p4d_t *ptr, p4d_t val)
509 {
510 preempt_disable();
511
512 xen_mc_batch();
513
514 __xen_set_p4d_hyper(ptr, val);
515
516 xen_mc_issue(PARAVIRT_LAZY_MMU);
517
518 preempt_enable();
519 }
520
xen_set_p4d(p4d_t * ptr,p4d_t val)521 static void xen_set_p4d(p4d_t *ptr, p4d_t val)
522 {
523 pgd_t *user_ptr = xen_get_user_pgd((pgd_t *)ptr);
524 pgd_t pgd_val;
525
526 trace_xen_mmu_set_p4d(ptr, (p4d_t *)user_ptr, val);
527
528 /* If page is not pinned, we can just update the entry
529 directly */
530 if (!xen_page_pinned(ptr)) {
531 *ptr = val;
532 if (user_ptr) {
533 WARN_ON(xen_page_pinned(user_ptr));
534 pgd_val.pgd = p4d_val_ma(val);
535 *user_ptr = pgd_val;
536 }
537 return;
538 }
539
540 /* If it's pinned, then we can at least batch the kernel and
541 user updates together. */
542 xen_mc_batch();
543
544 __xen_set_p4d_hyper(ptr, val);
545 if (user_ptr)
546 __xen_set_p4d_hyper((p4d_t *)user_ptr, val);
547
548 xen_mc_issue(PARAVIRT_LAZY_MMU);
549 }
550
551 #if CONFIG_PGTABLE_LEVELS >= 5
xen_p4d_val(p4d_t p4d)552 __visible p4dval_t xen_p4d_val(p4d_t p4d)
553 {
554 return pte_mfn_to_pfn(p4d.p4d);
555 }
556 PV_CALLEE_SAVE_REGS_THUNK(xen_p4d_val);
557
xen_make_p4d(p4dval_t p4d)558 __visible p4d_t xen_make_p4d(p4dval_t p4d)
559 {
560 p4d = pte_pfn_to_mfn(p4d);
561
562 return native_make_p4d(p4d);
563 }
564 PV_CALLEE_SAVE_REGS_THUNK(xen_make_p4d);
565 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */
566 #endif /* CONFIG_X86_64 */
567
xen_pmd_walk(struct mm_struct * mm,pmd_t * pmd,int (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)568 static int xen_pmd_walk(struct mm_struct *mm, pmd_t *pmd,
569 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
570 bool last, unsigned long limit)
571 {
572 int i, nr, flush = 0;
573
574 nr = last ? pmd_index(limit) + 1 : PTRS_PER_PMD;
575 for (i = 0; i < nr; i++) {
576 if (!pmd_none(pmd[i]))
577 flush |= (*func)(mm, pmd_page(pmd[i]), PT_PTE);
578 }
579 return flush;
580 }
581
xen_pud_walk(struct mm_struct * mm,pud_t * pud,int (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)582 static int xen_pud_walk(struct mm_struct *mm, pud_t *pud,
583 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
584 bool last, unsigned long limit)
585 {
586 int i, nr, flush = 0;
587
588 nr = last ? pud_index(limit) + 1 : PTRS_PER_PUD;
589 for (i = 0; i < nr; i++) {
590 pmd_t *pmd;
591
592 if (pud_none(pud[i]))
593 continue;
594
595 pmd = pmd_offset(&pud[i], 0);
596 if (PTRS_PER_PMD > 1)
597 flush |= (*func)(mm, virt_to_page(pmd), PT_PMD);
598 flush |= xen_pmd_walk(mm, pmd, func,
599 last && i == nr - 1, limit);
600 }
601 return flush;
602 }
603
xen_p4d_walk(struct mm_struct * mm,p4d_t * p4d,int (* func)(struct mm_struct * mm,struct page *,enum pt_level),bool last,unsigned long limit)604 static int xen_p4d_walk(struct mm_struct *mm, p4d_t *p4d,
605 int (*func)(struct mm_struct *mm, struct page *, enum pt_level),
606 bool last, unsigned long limit)
607 {
608 int flush = 0;
609 pud_t *pud;
610
611
612 if (p4d_none(*p4d))
613 return flush;
614
615 pud = pud_offset(p4d, 0);
616 if (PTRS_PER_PUD > 1)
617 flush |= (*func)(mm, virt_to_page(pud), PT_PUD);
618 flush |= xen_pud_walk(mm, pud, func, last, limit);
619 return flush;
620 }
621
622 /*
623 * (Yet another) pagetable walker. This one is intended for pinning a
624 * pagetable. This means that it walks a pagetable and calls the
625 * callback function on each page it finds making up the page table,
626 * at every level. It walks the entire pagetable, but it only bothers
627 * pinning pte pages which are below limit. In the normal case this
628 * will be STACK_TOP_MAX, but at boot we need to pin up to
629 * FIXADDR_TOP.
630 *
631 * For 32-bit the important bit is that we don't pin beyond there,
632 * because then we start getting into Xen's ptes.
633 *
634 * For 64-bit, we must skip the Xen hole in the middle of the address
635 * space, just after the big x86-64 virtual hole.
636 */
__xen_pgd_walk(struct mm_struct * mm,pgd_t * pgd,int (* func)(struct mm_struct * mm,struct page *,enum pt_level),unsigned long limit)637 static int __xen_pgd_walk(struct mm_struct *mm, pgd_t *pgd,
638 int (*func)(struct mm_struct *mm, struct page *,
639 enum pt_level),
640 unsigned long limit)
641 {
642 int i, nr, flush = 0;
643 unsigned hole_low = 0, hole_high = 0;
644
645 /* The limit is the last byte to be touched */
646 limit--;
647 BUG_ON(limit >= FIXADDR_TOP);
648
649 #ifdef CONFIG_X86_64
650 /*
651 * 64-bit has a great big hole in the middle of the address
652 * space, which contains the Xen mappings.
653 */
654 hole_low = pgd_index(GUARD_HOLE_BASE_ADDR);
655 hole_high = pgd_index(GUARD_HOLE_END_ADDR);
656 #endif
657
658 nr = pgd_index(limit) + 1;
659 for (i = 0; i < nr; i++) {
660 p4d_t *p4d;
661
662 if (i >= hole_low && i < hole_high)
663 continue;
664
665 if (pgd_none(pgd[i]))
666 continue;
667
668 p4d = p4d_offset(&pgd[i], 0);
669 flush |= xen_p4d_walk(mm, p4d, func, i == nr - 1, limit);
670 }
671
672 /* Do the top level last, so that the callbacks can use it as
673 a cue to do final things like tlb flushes. */
674 flush |= (*func)(mm, virt_to_page(pgd), PT_PGD);
675
676 return flush;
677 }
678
xen_pgd_walk(struct mm_struct * mm,int (* func)(struct mm_struct * mm,struct page *,enum pt_level),unsigned long limit)679 static int xen_pgd_walk(struct mm_struct *mm,
680 int (*func)(struct mm_struct *mm, struct page *,
681 enum pt_level),
682 unsigned long limit)
683 {
684 return __xen_pgd_walk(mm, mm->pgd, func, limit);
685 }
686
687 /* If we're using split pte locks, then take the page's lock and
688 return a pointer to it. Otherwise return NULL. */
xen_pte_lock(struct page * page,struct mm_struct * mm)689 static spinlock_t *xen_pte_lock(struct page *page, struct mm_struct *mm)
690 {
691 spinlock_t *ptl = NULL;
692
693 #if USE_SPLIT_PTE_PTLOCKS
694 ptl = ptlock_ptr(page);
695 spin_lock_nest_lock(ptl, &mm->page_table_lock);
696 #endif
697
698 return ptl;
699 }
700
xen_pte_unlock(void * v)701 static void xen_pte_unlock(void *v)
702 {
703 spinlock_t *ptl = v;
704 spin_unlock(ptl);
705 }
706
xen_do_pin(unsigned level,unsigned long pfn)707 static void xen_do_pin(unsigned level, unsigned long pfn)
708 {
709 struct mmuext_op op;
710
711 op.cmd = level;
712 op.arg1.mfn = pfn_to_mfn(pfn);
713
714 xen_extend_mmuext_op(&op);
715 }
716
xen_pin_page(struct mm_struct * mm,struct page * page,enum pt_level level)717 static int xen_pin_page(struct mm_struct *mm, struct page *page,
718 enum pt_level level)
719 {
720 unsigned pgfl = TestSetPagePinned(page);
721 int flush;
722
723 if (pgfl)
724 flush = 0; /* already pinned */
725 else if (PageHighMem(page))
726 /* kmaps need flushing if we found an unpinned
727 highpage */
728 flush = 1;
729 else {
730 void *pt = lowmem_page_address(page);
731 unsigned long pfn = page_to_pfn(page);
732 struct multicall_space mcs = __xen_mc_entry(0);
733 spinlock_t *ptl;
734
735 flush = 0;
736
737 /*
738 * We need to hold the pagetable lock between the time
739 * we make the pagetable RO and when we actually pin
740 * it. If we don't, then other users may come in and
741 * attempt to update the pagetable by writing it,
742 * which will fail because the memory is RO but not
743 * pinned, so Xen won't do the trap'n'emulate.
744 *
745 * If we're using split pte locks, we can't hold the
746 * entire pagetable's worth of locks during the
747 * traverse, because we may wrap the preempt count (8
748 * bits). The solution is to mark RO and pin each PTE
749 * page while holding the lock. This means the number
750 * of locks we end up holding is never more than a
751 * batch size (~32 entries, at present).
752 *
753 * If we're not using split pte locks, we needn't pin
754 * the PTE pages independently, because we're
755 * protected by the overall pagetable lock.
756 */
757 ptl = NULL;
758 if (level == PT_PTE)
759 ptl = xen_pte_lock(page, mm);
760
761 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
762 pfn_pte(pfn, PAGE_KERNEL_RO),
763 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
764
765 if (ptl) {
766 xen_do_pin(MMUEXT_PIN_L1_TABLE, pfn);
767
768 /* Queue a deferred unlock for when this batch
769 is completed. */
770 xen_mc_callback(xen_pte_unlock, ptl);
771 }
772 }
773
774 return flush;
775 }
776
777 /* This is called just after a mm has been created, but it has not
778 been used yet. We need to make sure that its pagetable is all
779 read-only, and can be pinned. */
__xen_pgd_pin(struct mm_struct * mm,pgd_t * pgd)780 static void __xen_pgd_pin(struct mm_struct *mm, pgd_t *pgd)
781 {
782 trace_xen_mmu_pgd_pin(mm, pgd);
783
784 xen_mc_batch();
785
786 if (__xen_pgd_walk(mm, pgd, xen_pin_page, USER_LIMIT)) {
787 /* re-enable interrupts for flushing */
788 xen_mc_issue(0);
789
790 kmap_flush_unused();
791
792 xen_mc_batch();
793 }
794
795 #ifdef CONFIG_X86_64
796 {
797 pgd_t *user_pgd = xen_get_user_pgd(pgd);
798
799 xen_do_pin(MMUEXT_PIN_L4_TABLE, PFN_DOWN(__pa(pgd)));
800
801 if (user_pgd) {
802 xen_pin_page(mm, virt_to_page(user_pgd), PT_PGD);
803 xen_do_pin(MMUEXT_PIN_L4_TABLE,
804 PFN_DOWN(__pa(user_pgd)));
805 }
806 }
807 #else /* CONFIG_X86_32 */
808 #ifdef CONFIG_X86_PAE
809 /* Need to make sure unshared kernel PMD is pinnable */
810 xen_pin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
811 PT_PMD);
812 #endif
813 xen_do_pin(MMUEXT_PIN_L3_TABLE, PFN_DOWN(__pa(pgd)));
814 #endif /* CONFIG_X86_64 */
815 xen_mc_issue(0);
816 }
817
xen_pgd_pin(struct mm_struct * mm)818 static void xen_pgd_pin(struct mm_struct *mm)
819 {
820 __xen_pgd_pin(mm, mm->pgd);
821 }
822
823 /*
824 * On save, we need to pin all pagetables to make sure they get their
825 * mfns turned into pfns. Search the list for any unpinned pgds and pin
826 * them (unpinned pgds are not currently in use, probably because the
827 * process is under construction or destruction).
828 *
829 * Expected to be called in stop_machine() ("equivalent to taking
830 * every spinlock in the system"), so the locking doesn't really
831 * matter all that much.
832 */
xen_mm_pin_all(void)833 void xen_mm_pin_all(void)
834 {
835 struct page *page;
836
837 spin_lock(&pgd_lock);
838
839 list_for_each_entry(page, &pgd_list, lru) {
840 if (!PagePinned(page)) {
841 __xen_pgd_pin(&init_mm, (pgd_t *)page_address(page));
842 SetPageSavePinned(page);
843 }
844 }
845
846 spin_unlock(&pgd_lock);
847 }
848
xen_mark_pinned(struct mm_struct * mm,struct page * page,enum pt_level level)849 static int __init xen_mark_pinned(struct mm_struct *mm, struct page *page,
850 enum pt_level level)
851 {
852 SetPagePinned(page);
853 return 0;
854 }
855
856 /*
857 * The init_mm pagetable is really pinned as soon as its created, but
858 * that's before we have page structures to store the bits. So do all
859 * the book-keeping now once struct pages for allocated pages are
860 * initialized. This happens only after free_all_bootmem() is called.
861 */
xen_after_bootmem(void)862 static void __init xen_after_bootmem(void)
863 {
864 static_branch_enable(&xen_struct_pages_ready);
865 #ifdef CONFIG_X86_64
866 SetPagePinned(virt_to_page(level3_user_vsyscall));
867 #endif
868 xen_pgd_walk(&init_mm, xen_mark_pinned, FIXADDR_TOP);
869 }
870
xen_unpin_page(struct mm_struct * mm,struct page * page,enum pt_level level)871 static int xen_unpin_page(struct mm_struct *mm, struct page *page,
872 enum pt_level level)
873 {
874 unsigned pgfl = TestClearPagePinned(page);
875
876 if (pgfl && !PageHighMem(page)) {
877 void *pt = lowmem_page_address(page);
878 unsigned long pfn = page_to_pfn(page);
879 spinlock_t *ptl = NULL;
880 struct multicall_space mcs;
881
882 /*
883 * Do the converse to pin_page. If we're using split
884 * pte locks, we must be holding the lock for while
885 * the pte page is unpinned but still RO to prevent
886 * concurrent updates from seeing it in this
887 * partially-pinned state.
888 */
889 if (level == PT_PTE) {
890 ptl = xen_pte_lock(page, mm);
891
892 if (ptl)
893 xen_do_pin(MMUEXT_UNPIN_TABLE, pfn);
894 }
895
896 mcs = __xen_mc_entry(0);
897
898 MULTI_update_va_mapping(mcs.mc, (unsigned long)pt,
899 pfn_pte(pfn, PAGE_KERNEL),
900 level == PT_PGD ? UVMF_TLB_FLUSH : 0);
901
902 if (ptl) {
903 /* unlock when batch completed */
904 xen_mc_callback(xen_pte_unlock, ptl);
905 }
906 }
907
908 return 0; /* never need to flush on unpin */
909 }
910
911 /* Release a pagetables pages back as normal RW */
__xen_pgd_unpin(struct mm_struct * mm,pgd_t * pgd)912 static void __xen_pgd_unpin(struct mm_struct *mm, pgd_t *pgd)
913 {
914 trace_xen_mmu_pgd_unpin(mm, pgd);
915
916 xen_mc_batch();
917
918 xen_do_pin(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
919
920 #ifdef CONFIG_X86_64
921 {
922 pgd_t *user_pgd = xen_get_user_pgd(pgd);
923
924 if (user_pgd) {
925 xen_do_pin(MMUEXT_UNPIN_TABLE,
926 PFN_DOWN(__pa(user_pgd)));
927 xen_unpin_page(mm, virt_to_page(user_pgd), PT_PGD);
928 }
929 }
930 #endif
931
932 #ifdef CONFIG_X86_PAE
933 /* Need to make sure unshared kernel PMD is unpinned */
934 xen_unpin_page(mm, pgd_page(pgd[pgd_index(TASK_SIZE)]),
935 PT_PMD);
936 #endif
937
938 __xen_pgd_walk(mm, pgd, xen_unpin_page, USER_LIMIT);
939
940 xen_mc_issue(0);
941 }
942
xen_pgd_unpin(struct mm_struct * mm)943 static void xen_pgd_unpin(struct mm_struct *mm)
944 {
945 __xen_pgd_unpin(mm, mm->pgd);
946 }
947
948 /*
949 * On resume, undo any pinning done at save, so that the rest of the
950 * kernel doesn't see any unexpected pinned pagetables.
951 */
xen_mm_unpin_all(void)952 void xen_mm_unpin_all(void)
953 {
954 struct page *page;
955
956 spin_lock(&pgd_lock);
957
958 list_for_each_entry(page, &pgd_list, lru) {
959 if (PageSavePinned(page)) {
960 BUG_ON(!PagePinned(page));
961 __xen_pgd_unpin(&init_mm, (pgd_t *)page_address(page));
962 ClearPageSavePinned(page);
963 }
964 }
965
966 spin_unlock(&pgd_lock);
967 }
968
xen_activate_mm(struct mm_struct * prev,struct mm_struct * next)969 static void xen_activate_mm(struct mm_struct *prev, struct mm_struct *next)
970 {
971 spin_lock(&next->page_table_lock);
972 xen_pgd_pin(next);
973 spin_unlock(&next->page_table_lock);
974 }
975
xen_dup_mmap(struct mm_struct * oldmm,struct mm_struct * mm)976 static void xen_dup_mmap(struct mm_struct *oldmm, struct mm_struct *mm)
977 {
978 spin_lock(&mm->page_table_lock);
979 xen_pgd_pin(mm);
980 spin_unlock(&mm->page_table_lock);
981 }
982
drop_mm_ref_this_cpu(void * info)983 static void drop_mm_ref_this_cpu(void *info)
984 {
985 struct mm_struct *mm = info;
986
987 if (this_cpu_read(cpu_tlbstate.loaded_mm) == mm)
988 leave_mm(smp_processor_id());
989
990 /*
991 * If this cpu still has a stale cr3 reference, then make sure
992 * it has been flushed.
993 */
994 if (this_cpu_read(xen_current_cr3) == __pa(mm->pgd))
995 xen_mc_flush();
996 }
997
998 #ifdef CONFIG_SMP
999 /*
1000 * Another cpu may still have their %cr3 pointing at the pagetable, so
1001 * we need to repoint it somewhere else before we can unpin it.
1002 */
xen_drop_mm_ref(struct mm_struct * mm)1003 static void xen_drop_mm_ref(struct mm_struct *mm)
1004 {
1005 cpumask_var_t mask;
1006 unsigned cpu;
1007
1008 drop_mm_ref_this_cpu(mm);
1009
1010 /* Get the "official" set of cpus referring to our pagetable. */
1011 if (!alloc_cpumask_var(&mask, GFP_ATOMIC)) {
1012 for_each_online_cpu(cpu) {
1013 if (per_cpu(xen_current_cr3, cpu) != __pa(mm->pgd))
1014 continue;
1015 smp_call_function_single(cpu, drop_mm_ref_this_cpu, mm, 1);
1016 }
1017 return;
1018 }
1019
1020 /*
1021 * It's possible that a vcpu may have a stale reference to our
1022 * cr3, because its in lazy mode, and it hasn't yet flushed
1023 * its set of pending hypercalls yet. In this case, we can
1024 * look at its actual current cr3 value, and force it to flush
1025 * if needed.
1026 */
1027 cpumask_clear(mask);
1028 for_each_online_cpu(cpu) {
1029 if (per_cpu(xen_current_cr3, cpu) == __pa(mm->pgd))
1030 cpumask_set_cpu(cpu, mask);
1031 }
1032
1033 smp_call_function_many(mask, drop_mm_ref_this_cpu, mm, 1);
1034 free_cpumask_var(mask);
1035 }
1036 #else
xen_drop_mm_ref(struct mm_struct * mm)1037 static void xen_drop_mm_ref(struct mm_struct *mm)
1038 {
1039 drop_mm_ref_this_cpu(mm);
1040 }
1041 #endif
1042
1043 /*
1044 * While a process runs, Xen pins its pagetables, which means that the
1045 * hypervisor forces it to be read-only, and it controls all updates
1046 * to it. This means that all pagetable updates have to go via the
1047 * hypervisor, which is moderately expensive.
1048 *
1049 * Since we're pulling the pagetable down, we switch to use init_mm,
1050 * unpin old process pagetable and mark it all read-write, which
1051 * allows further operations on it to be simple memory accesses.
1052 *
1053 * The only subtle point is that another CPU may be still using the
1054 * pagetable because of lazy tlb flushing. This means we need need to
1055 * switch all CPUs off this pagetable before we can unpin it.
1056 */
xen_exit_mmap(struct mm_struct * mm)1057 static void xen_exit_mmap(struct mm_struct *mm)
1058 {
1059 get_cpu(); /* make sure we don't move around */
1060 xen_drop_mm_ref(mm);
1061 put_cpu();
1062
1063 spin_lock(&mm->page_table_lock);
1064
1065 /* pgd may not be pinned in the error exit path of execve */
1066 if (xen_page_pinned(mm->pgd))
1067 xen_pgd_unpin(mm);
1068
1069 spin_unlock(&mm->page_table_lock);
1070 }
1071
1072 static void xen_post_allocator_init(void);
1073
pin_pagetable_pfn(unsigned cmd,unsigned long pfn)1074 static void __init pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1075 {
1076 struct mmuext_op op;
1077
1078 op.cmd = cmd;
1079 op.arg1.mfn = pfn_to_mfn(pfn);
1080 if (HYPERVISOR_mmuext_op(&op, 1, NULL, DOMID_SELF))
1081 BUG();
1082 }
1083
1084 #ifdef CONFIG_X86_64
xen_cleanhighmap(unsigned long vaddr,unsigned long vaddr_end)1085 static void __init xen_cleanhighmap(unsigned long vaddr,
1086 unsigned long vaddr_end)
1087 {
1088 unsigned long kernel_end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
1089 pmd_t *pmd = level2_kernel_pgt + pmd_index(vaddr);
1090
1091 /* NOTE: The loop is more greedy than the cleanup_highmap variant.
1092 * We include the PMD passed in on _both_ boundaries. */
1093 for (; vaddr <= vaddr_end && (pmd < (level2_kernel_pgt + PTRS_PER_PMD));
1094 pmd++, vaddr += PMD_SIZE) {
1095 if (pmd_none(*pmd))
1096 continue;
1097 if (vaddr < (unsigned long) _text || vaddr > kernel_end)
1098 set_pmd(pmd, __pmd(0));
1099 }
1100 /* In case we did something silly, we should crash in this function
1101 * instead of somewhere later and be confusing. */
1102 xen_mc_flush();
1103 }
1104
1105 /*
1106 * Make a page range writeable and free it.
1107 */
xen_free_ro_pages(unsigned long paddr,unsigned long size)1108 static void __init xen_free_ro_pages(unsigned long paddr, unsigned long size)
1109 {
1110 void *vaddr = __va(paddr);
1111 void *vaddr_end = vaddr + size;
1112
1113 for (; vaddr < vaddr_end; vaddr += PAGE_SIZE)
1114 make_lowmem_page_readwrite(vaddr);
1115
1116 memblock_free(paddr, size);
1117 }
1118
xen_cleanmfnmap_free_pgtbl(void * pgtbl,bool unpin)1119 static void __init xen_cleanmfnmap_free_pgtbl(void *pgtbl, bool unpin)
1120 {
1121 unsigned long pa = __pa(pgtbl) & PHYSICAL_PAGE_MASK;
1122
1123 if (unpin)
1124 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(pa));
1125 ClearPagePinned(virt_to_page(__va(pa)));
1126 xen_free_ro_pages(pa, PAGE_SIZE);
1127 }
1128
xen_cleanmfnmap_pmd(pmd_t * pmd,bool unpin)1129 static void __init xen_cleanmfnmap_pmd(pmd_t *pmd, bool unpin)
1130 {
1131 unsigned long pa;
1132 pte_t *pte_tbl;
1133 int i;
1134
1135 if (pmd_large(*pmd)) {
1136 pa = pmd_val(*pmd) & PHYSICAL_PAGE_MASK;
1137 xen_free_ro_pages(pa, PMD_SIZE);
1138 return;
1139 }
1140
1141 pte_tbl = pte_offset_kernel(pmd, 0);
1142 for (i = 0; i < PTRS_PER_PTE; i++) {
1143 if (pte_none(pte_tbl[i]))
1144 continue;
1145 pa = pte_pfn(pte_tbl[i]) << PAGE_SHIFT;
1146 xen_free_ro_pages(pa, PAGE_SIZE);
1147 }
1148 set_pmd(pmd, __pmd(0));
1149 xen_cleanmfnmap_free_pgtbl(pte_tbl, unpin);
1150 }
1151
xen_cleanmfnmap_pud(pud_t * pud,bool unpin)1152 static void __init xen_cleanmfnmap_pud(pud_t *pud, bool unpin)
1153 {
1154 unsigned long pa;
1155 pmd_t *pmd_tbl;
1156 int i;
1157
1158 if (pud_large(*pud)) {
1159 pa = pud_val(*pud) & PHYSICAL_PAGE_MASK;
1160 xen_free_ro_pages(pa, PUD_SIZE);
1161 return;
1162 }
1163
1164 pmd_tbl = pmd_offset(pud, 0);
1165 for (i = 0; i < PTRS_PER_PMD; i++) {
1166 if (pmd_none(pmd_tbl[i]))
1167 continue;
1168 xen_cleanmfnmap_pmd(pmd_tbl + i, unpin);
1169 }
1170 set_pud(pud, __pud(0));
1171 xen_cleanmfnmap_free_pgtbl(pmd_tbl, unpin);
1172 }
1173
xen_cleanmfnmap_p4d(p4d_t * p4d,bool unpin)1174 static void __init xen_cleanmfnmap_p4d(p4d_t *p4d, bool unpin)
1175 {
1176 unsigned long pa;
1177 pud_t *pud_tbl;
1178 int i;
1179
1180 if (p4d_large(*p4d)) {
1181 pa = p4d_val(*p4d) & PHYSICAL_PAGE_MASK;
1182 xen_free_ro_pages(pa, P4D_SIZE);
1183 return;
1184 }
1185
1186 pud_tbl = pud_offset(p4d, 0);
1187 for (i = 0; i < PTRS_PER_PUD; i++) {
1188 if (pud_none(pud_tbl[i]))
1189 continue;
1190 xen_cleanmfnmap_pud(pud_tbl + i, unpin);
1191 }
1192 set_p4d(p4d, __p4d(0));
1193 xen_cleanmfnmap_free_pgtbl(pud_tbl, unpin);
1194 }
1195
1196 /*
1197 * Since it is well isolated we can (and since it is perhaps large we should)
1198 * also free the page tables mapping the initial P->M table.
1199 */
xen_cleanmfnmap(unsigned long vaddr)1200 static void __init xen_cleanmfnmap(unsigned long vaddr)
1201 {
1202 pgd_t *pgd;
1203 p4d_t *p4d;
1204 bool unpin;
1205
1206 unpin = (vaddr == 2 * PGDIR_SIZE);
1207 vaddr &= PMD_MASK;
1208 pgd = pgd_offset_k(vaddr);
1209 p4d = p4d_offset(pgd, 0);
1210 if (!p4d_none(*p4d))
1211 xen_cleanmfnmap_p4d(p4d, unpin);
1212 }
1213
xen_pagetable_p2m_free(void)1214 static void __init xen_pagetable_p2m_free(void)
1215 {
1216 unsigned long size;
1217 unsigned long addr;
1218
1219 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
1220
1221 /* No memory or already called. */
1222 if ((unsigned long)xen_p2m_addr == xen_start_info->mfn_list)
1223 return;
1224
1225 /* using __ka address and sticking INVALID_P2M_ENTRY! */
1226 memset((void *)xen_start_info->mfn_list, 0xff, size);
1227
1228 addr = xen_start_info->mfn_list;
1229 /*
1230 * We could be in __ka space.
1231 * We roundup to the PMD, which means that if anybody at this stage is
1232 * using the __ka address of xen_start_info or
1233 * xen_start_info->shared_info they are in going to crash. Fortunatly
1234 * we have already revectored in xen_setup_kernel_pagetable.
1235 */
1236 size = roundup(size, PMD_SIZE);
1237
1238 if (addr >= __START_KERNEL_map) {
1239 xen_cleanhighmap(addr, addr + size);
1240 size = PAGE_ALIGN(xen_start_info->nr_pages *
1241 sizeof(unsigned long));
1242 memblock_free(__pa(addr), size);
1243 } else {
1244 xen_cleanmfnmap(addr);
1245 }
1246 }
1247
xen_pagetable_cleanhighmap(void)1248 static void __init xen_pagetable_cleanhighmap(void)
1249 {
1250 unsigned long size;
1251 unsigned long addr;
1252
1253 /* At this stage, cleanup_highmap has already cleaned __ka space
1254 * from _brk_limit way up to the max_pfn_mapped (which is the end of
1255 * the ramdisk). We continue on, erasing PMD entries that point to page
1256 * tables - do note that they are accessible at this stage via __va.
1257 * As Xen is aligning the memory end to a 4MB boundary, for good
1258 * measure we also round up to PMD_SIZE * 2 - which means that if
1259 * anybody is using __ka address to the initial boot-stack - and try
1260 * to use it - they are going to crash. The xen_start_info has been
1261 * taken care of already in xen_setup_kernel_pagetable. */
1262 addr = xen_start_info->pt_base;
1263 size = xen_start_info->nr_pt_frames * PAGE_SIZE;
1264
1265 xen_cleanhighmap(addr, roundup(addr + size, PMD_SIZE * 2));
1266 xen_start_info->pt_base = (unsigned long)__va(__pa(xen_start_info->pt_base));
1267 }
1268 #endif
1269
xen_pagetable_p2m_setup(void)1270 static void __init xen_pagetable_p2m_setup(void)
1271 {
1272 xen_vmalloc_p2m_tree();
1273
1274 #ifdef CONFIG_X86_64
1275 xen_pagetable_p2m_free();
1276
1277 xen_pagetable_cleanhighmap();
1278 #endif
1279 /* And revector! Bye bye old array */
1280 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
1281 }
1282
xen_pagetable_init(void)1283 static void __init xen_pagetable_init(void)
1284 {
1285 paging_init();
1286 xen_post_allocator_init();
1287
1288 xen_pagetable_p2m_setup();
1289
1290 /* Allocate and initialize top and mid mfn levels for p2m structure */
1291 xen_build_mfn_list_list();
1292
1293 /* Remap memory freed due to conflicts with E820 map */
1294 xen_remap_memory();
1295 xen_setup_mfn_list_list();
1296 }
xen_write_cr2(unsigned long cr2)1297 static void xen_write_cr2(unsigned long cr2)
1298 {
1299 this_cpu_read(xen_vcpu)->arch.cr2 = cr2;
1300 }
1301
xen_read_cr2(void)1302 static unsigned long xen_read_cr2(void)
1303 {
1304 return this_cpu_read(xen_vcpu)->arch.cr2;
1305 }
1306
xen_read_cr2_direct(void)1307 unsigned long xen_read_cr2_direct(void)
1308 {
1309 return this_cpu_read(xen_vcpu_info.arch.cr2);
1310 }
1311
xen_flush_tlb(void)1312 static noinline void xen_flush_tlb(void)
1313 {
1314 struct mmuext_op *op;
1315 struct multicall_space mcs;
1316
1317 preempt_disable();
1318
1319 mcs = xen_mc_entry(sizeof(*op));
1320
1321 op = mcs.args;
1322 op->cmd = MMUEXT_TLB_FLUSH_LOCAL;
1323 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1324
1325 xen_mc_issue(PARAVIRT_LAZY_MMU);
1326
1327 preempt_enable();
1328 }
1329
xen_flush_tlb_one_user(unsigned long addr)1330 static void xen_flush_tlb_one_user(unsigned long addr)
1331 {
1332 struct mmuext_op *op;
1333 struct multicall_space mcs;
1334
1335 trace_xen_mmu_flush_tlb_one_user(addr);
1336
1337 preempt_disable();
1338
1339 mcs = xen_mc_entry(sizeof(*op));
1340 op = mcs.args;
1341 op->cmd = MMUEXT_INVLPG_LOCAL;
1342 op->arg1.linear_addr = addr & PAGE_MASK;
1343 MULTI_mmuext_op(mcs.mc, op, 1, NULL, DOMID_SELF);
1344
1345 xen_mc_issue(PARAVIRT_LAZY_MMU);
1346
1347 preempt_enable();
1348 }
1349
xen_flush_tlb_others(const struct cpumask * cpus,const struct flush_tlb_info * info)1350 static void xen_flush_tlb_others(const struct cpumask *cpus,
1351 const struct flush_tlb_info *info)
1352 {
1353 struct {
1354 struct mmuext_op op;
1355 DECLARE_BITMAP(mask, NR_CPUS);
1356 } *args;
1357 struct multicall_space mcs;
1358 const size_t mc_entry_size = sizeof(args->op) +
1359 sizeof(args->mask[0]) * BITS_TO_LONGS(num_possible_cpus());
1360
1361 trace_xen_mmu_flush_tlb_others(cpus, info->mm, info->start, info->end);
1362
1363 if (cpumask_empty(cpus))
1364 return; /* nothing to do */
1365
1366 mcs = xen_mc_entry(mc_entry_size);
1367 args = mcs.args;
1368 args->op.arg2.vcpumask = to_cpumask(args->mask);
1369
1370 /* Remove us, and any offline CPUS. */
1371 cpumask_and(to_cpumask(args->mask), cpus, cpu_online_mask);
1372 cpumask_clear_cpu(smp_processor_id(), to_cpumask(args->mask));
1373
1374 args->op.cmd = MMUEXT_TLB_FLUSH_MULTI;
1375 if (info->end != TLB_FLUSH_ALL &&
1376 (info->end - info->start) <= PAGE_SIZE) {
1377 args->op.cmd = MMUEXT_INVLPG_MULTI;
1378 args->op.arg1.linear_addr = info->start;
1379 }
1380
1381 MULTI_mmuext_op(mcs.mc, &args->op, 1, NULL, DOMID_SELF);
1382
1383 xen_mc_issue(PARAVIRT_LAZY_MMU);
1384 }
1385
xen_read_cr3(void)1386 static unsigned long xen_read_cr3(void)
1387 {
1388 return this_cpu_read(xen_cr3);
1389 }
1390
set_current_cr3(void * v)1391 static void set_current_cr3(void *v)
1392 {
1393 this_cpu_write(xen_current_cr3, (unsigned long)v);
1394 }
1395
__xen_write_cr3(bool kernel,unsigned long cr3)1396 static void __xen_write_cr3(bool kernel, unsigned long cr3)
1397 {
1398 struct mmuext_op op;
1399 unsigned long mfn;
1400
1401 trace_xen_mmu_write_cr3(kernel, cr3);
1402
1403 if (cr3)
1404 mfn = pfn_to_mfn(PFN_DOWN(cr3));
1405 else
1406 mfn = 0;
1407
1408 WARN_ON(mfn == 0 && kernel);
1409
1410 op.cmd = kernel ? MMUEXT_NEW_BASEPTR : MMUEXT_NEW_USER_BASEPTR;
1411 op.arg1.mfn = mfn;
1412
1413 xen_extend_mmuext_op(&op);
1414
1415 if (kernel) {
1416 this_cpu_write(xen_cr3, cr3);
1417
1418 /* Update xen_current_cr3 once the batch has actually
1419 been submitted. */
1420 xen_mc_callback(set_current_cr3, (void *)cr3);
1421 }
1422 }
xen_write_cr3(unsigned long cr3)1423 static void xen_write_cr3(unsigned long cr3)
1424 {
1425 BUG_ON(preemptible());
1426
1427 xen_mc_batch(); /* disables interrupts */
1428
1429 /* Update while interrupts are disabled, so its atomic with
1430 respect to ipis */
1431 this_cpu_write(xen_cr3, cr3);
1432
1433 __xen_write_cr3(true, cr3);
1434
1435 #ifdef CONFIG_X86_64
1436 {
1437 pgd_t *user_pgd = xen_get_user_pgd(__va(cr3));
1438 if (user_pgd)
1439 __xen_write_cr3(false, __pa(user_pgd));
1440 else
1441 __xen_write_cr3(false, 0);
1442 }
1443 #endif
1444
1445 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1446 }
1447
1448 #ifdef CONFIG_X86_64
1449 /*
1450 * At the start of the day - when Xen launches a guest, it has already
1451 * built pagetables for the guest. We diligently look over them
1452 * in xen_setup_kernel_pagetable and graft as appropriate them in the
1453 * init_top_pgt and its friends. Then when we are happy we load
1454 * the new init_top_pgt - and continue on.
1455 *
1456 * The generic code starts (start_kernel) and 'init_mem_mapping' sets
1457 * up the rest of the pagetables. When it has completed it loads the cr3.
1458 * N.B. that baremetal would start at 'start_kernel' (and the early
1459 * #PF handler would create bootstrap pagetables) - so we are running
1460 * with the same assumptions as what to do when write_cr3 is executed
1461 * at this point.
1462 *
1463 * Since there are no user-page tables at all, we have two variants
1464 * of xen_write_cr3 - the early bootup (this one), and the late one
1465 * (xen_write_cr3). The reason we have to do that is that in 64-bit
1466 * the Linux kernel and user-space are both in ring 3 while the
1467 * hypervisor is in ring 0.
1468 */
xen_write_cr3_init(unsigned long cr3)1469 static void __init xen_write_cr3_init(unsigned long cr3)
1470 {
1471 BUG_ON(preemptible());
1472
1473 xen_mc_batch(); /* disables interrupts */
1474
1475 /* Update while interrupts are disabled, so its atomic with
1476 respect to ipis */
1477 this_cpu_write(xen_cr3, cr3);
1478
1479 __xen_write_cr3(true, cr3);
1480
1481 xen_mc_issue(PARAVIRT_LAZY_CPU); /* interrupts restored */
1482 }
1483 #endif
1484
xen_pgd_alloc(struct mm_struct * mm)1485 static int xen_pgd_alloc(struct mm_struct *mm)
1486 {
1487 pgd_t *pgd = mm->pgd;
1488 int ret = 0;
1489
1490 BUG_ON(PagePinned(virt_to_page(pgd)));
1491
1492 #ifdef CONFIG_X86_64
1493 {
1494 struct page *page = virt_to_page(pgd);
1495 pgd_t *user_pgd;
1496
1497 BUG_ON(page->private != 0);
1498
1499 ret = -ENOMEM;
1500
1501 user_pgd = (pgd_t *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
1502 page->private = (unsigned long)user_pgd;
1503
1504 if (user_pgd != NULL) {
1505 #ifdef CONFIG_X86_VSYSCALL_EMULATION
1506 user_pgd[pgd_index(VSYSCALL_ADDR)] =
1507 __pgd(__pa(level3_user_vsyscall) | _PAGE_TABLE);
1508 #endif
1509 ret = 0;
1510 }
1511
1512 BUG_ON(PagePinned(virt_to_page(xen_get_user_pgd(pgd))));
1513 }
1514 #endif
1515 return ret;
1516 }
1517
xen_pgd_free(struct mm_struct * mm,pgd_t * pgd)1518 static void xen_pgd_free(struct mm_struct *mm, pgd_t *pgd)
1519 {
1520 #ifdef CONFIG_X86_64
1521 pgd_t *user_pgd = xen_get_user_pgd(pgd);
1522
1523 if (user_pgd)
1524 free_page((unsigned long)user_pgd);
1525 #endif
1526 }
1527
1528 /*
1529 * Init-time set_pte while constructing initial pagetables, which
1530 * doesn't allow RO page table pages to be remapped RW.
1531 *
1532 * If there is no MFN for this PFN then this page is initially
1533 * ballooned out so clear the PTE (as in decrease_reservation() in
1534 * drivers/xen/balloon.c).
1535 *
1536 * Many of these PTE updates are done on unpinned and writable pages
1537 * and doing a hypercall for these is unnecessary and expensive. At
1538 * this point it is not possible to tell if a page is pinned or not,
1539 * so always write the PTE directly and rely on Xen trapping and
1540 * emulating any updates as necessary.
1541 */
xen_make_pte_init(pteval_t pte)1542 __visible pte_t xen_make_pte_init(pteval_t pte)
1543 {
1544 #ifdef CONFIG_X86_64
1545 unsigned long pfn;
1546
1547 /*
1548 * Pages belonging to the initial p2m list mapped outside the default
1549 * address range must be mapped read-only. This region contains the
1550 * page tables for mapping the p2m list, too, and page tables MUST be
1551 * mapped read-only.
1552 */
1553 pfn = (pte & PTE_PFN_MASK) >> PAGE_SHIFT;
1554 if (xen_start_info->mfn_list < __START_KERNEL_map &&
1555 pfn >= xen_start_info->first_p2m_pfn &&
1556 pfn < xen_start_info->first_p2m_pfn + xen_start_info->nr_p2m_frames)
1557 pte &= ~_PAGE_RW;
1558 #endif
1559 pte = pte_pfn_to_mfn(pte);
1560 return native_make_pte(pte);
1561 }
1562 PV_CALLEE_SAVE_REGS_THUNK(xen_make_pte_init);
1563
xen_set_pte_init(pte_t * ptep,pte_t pte)1564 static void __init xen_set_pte_init(pte_t *ptep, pte_t pte)
1565 {
1566 #ifdef CONFIG_X86_32
1567 /* If there's an existing pte, then don't allow _PAGE_RW to be set */
1568 if (pte_mfn(pte) != INVALID_P2M_ENTRY
1569 && pte_val_ma(*ptep) & _PAGE_PRESENT)
1570 pte = __pte_ma(((pte_val_ma(*ptep) & _PAGE_RW) | ~_PAGE_RW) &
1571 pte_val_ma(pte));
1572 #endif
1573 __xen_set_pte(ptep, pte);
1574 }
1575
1576 /* Early in boot, while setting up the initial pagetable, assume
1577 everything is pinned. */
xen_alloc_pte_init(struct mm_struct * mm,unsigned long pfn)1578 static void __init xen_alloc_pte_init(struct mm_struct *mm, unsigned long pfn)
1579 {
1580 #ifdef CONFIG_FLATMEM
1581 BUG_ON(mem_map); /* should only be used early */
1582 #endif
1583 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1584 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1585 }
1586
1587 /* Used for pmd and pud */
xen_alloc_pmd_init(struct mm_struct * mm,unsigned long pfn)1588 static void __init xen_alloc_pmd_init(struct mm_struct *mm, unsigned long pfn)
1589 {
1590 #ifdef CONFIG_FLATMEM
1591 BUG_ON(mem_map); /* should only be used early */
1592 #endif
1593 make_lowmem_page_readonly(__va(PFN_PHYS(pfn)));
1594 }
1595
1596 /* Early release_pte assumes that all pts are pinned, since there's
1597 only init_mm and anything attached to that is pinned. */
xen_release_pte_init(unsigned long pfn)1598 static void __init xen_release_pte_init(unsigned long pfn)
1599 {
1600 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1601 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1602 }
1603
xen_release_pmd_init(unsigned long pfn)1604 static void __init xen_release_pmd_init(unsigned long pfn)
1605 {
1606 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
1607 }
1608
__pin_pagetable_pfn(unsigned cmd,unsigned long pfn)1609 static inline void __pin_pagetable_pfn(unsigned cmd, unsigned long pfn)
1610 {
1611 struct multicall_space mcs;
1612 struct mmuext_op *op;
1613
1614 mcs = __xen_mc_entry(sizeof(*op));
1615 op = mcs.args;
1616 op->cmd = cmd;
1617 op->arg1.mfn = pfn_to_mfn(pfn);
1618
1619 MULTI_mmuext_op(mcs.mc, mcs.args, 1, NULL, DOMID_SELF);
1620 }
1621
__set_pfn_prot(unsigned long pfn,pgprot_t prot)1622 static inline void __set_pfn_prot(unsigned long pfn, pgprot_t prot)
1623 {
1624 struct multicall_space mcs;
1625 unsigned long addr = (unsigned long)__va(pfn << PAGE_SHIFT);
1626
1627 mcs = __xen_mc_entry(0);
1628 MULTI_update_va_mapping(mcs.mc, (unsigned long)addr,
1629 pfn_pte(pfn, prot), 0);
1630 }
1631
1632 /* This needs to make sure the new pte page is pinned iff its being
1633 attached to a pinned pagetable. */
xen_alloc_ptpage(struct mm_struct * mm,unsigned long pfn,unsigned level)1634 static inline void xen_alloc_ptpage(struct mm_struct *mm, unsigned long pfn,
1635 unsigned level)
1636 {
1637 bool pinned = xen_page_pinned(mm->pgd);
1638
1639 trace_xen_mmu_alloc_ptpage(mm, pfn, level, pinned);
1640
1641 if (pinned) {
1642 struct page *page = pfn_to_page(pfn);
1643
1644 if (static_branch_likely(&xen_struct_pages_ready))
1645 SetPagePinned(page);
1646
1647 if (!PageHighMem(page)) {
1648 xen_mc_batch();
1649
1650 __set_pfn_prot(pfn, PAGE_KERNEL_RO);
1651
1652 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1653 __pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE, pfn);
1654
1655 xen_mc_issue(PARAVIRT_LAZY_MMU);
1656 } else {
1657 /* make sure there are no stray mappings of
1658 this page */
1659 kmap_flush_unused();
1660 }
1661 }
1662 }
1663
xen_alloc_pte(struct mm_struct * mm,unsigned long pfn)1664 static void xen_alloc_pte(struct mm_struct *mm, unsigned long pfn)
1665 {
1666 xen_alloc_ptpage(mm, pfn, PT_PTE);
1667 }
1668
xen_alloc_pmd(struct mm_struct * mm,unsigned long pfn)1669 static void xen_alloc_pmd(struct mm_struct *mm, unsigned long pfn)
1670 {
1671 xen_alloc_ptpage(mm, pfn, PT_PMD);
1672 }
1673
1674 /* This should never happen until we're OK to use struct page */
xen_release_ptpage(unsigned long pfn,unsigned level)1675 static inline void xen_release_ptpage(unsigned long pfn, unsigned level)
1676 {
1677 struct page *page = pfn_to_page(pfn);
1678 bool pinned = PagePinned(page);
1679
1680 trace_xen_mmu_release_ptpage(pfn, level, pinned);
1681
1682 if (pinned) {
1683 if (!PageHighMem(page)) {
1684 xen_mc_batch();
1685
1686 if (level == PT_PTE && USE_SPLIT_PTE_PTLOCKS)
1687 __pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, pfn);
1688
1689 __set_pfn_prot(pfn, PAGE_KERNEL);
1690
1691 xen_mc_issue(PARAVIRT_LAZY_MMU);
1692 }
1693 ClearPagePinned(page);
1694 }
1695 }
1696
xen_release_pte(unsigned long pfn)1697 static void xen_release_pte(unsigned long pfn)
1698 {
1699 xen_release_ptpage(pfn, PT_PTE);
1700 }
1701
xen_release_pmd(unsigned long pfn)1702 static void xen_release_pmd(unsigned long pfn)
1703 {
1704 xen_release_ptpage(pfn, PT_PMD);
1705 }
1706
1707 #ifdef CONFIG_X86_64
xen_alloc_pud(struct mm_struct * mm,unsigned long pfn)1708 static void xen_alloc_pud(struct mm_struct *mm, unsigned long pfn)
1709 {
1710 xen_alloc_ptpage(mm, pfn, PT_PUD);
1711 }
1712
xen_release_pud(unsigned long pfn)1713 static void xen_release_pud(unsigned long pfn)
1714 {
1715 xen_release_ptpage(pfn, PT_PUD);
1716 }
1717 #endif
1718
xen_reserve_top(void)1719 void __init xen_reserve_top(void)
1720 {
1721 #ifdef CONFIG_X86_32
1722 unsigned long top = HYPERVISOR_VIRT_START;
1723 struct xen_platform_parameters pp;
1724
1725 if (HYPERVISOR_xen_version(XENVER_platform_parameters, &pp) == 0)
1726 top = pp.virt_start;
1727
1728 reserve_top_address(-top);
1729 #endif /* CONFIG_X86_32 */
1730 }
1731
1732 /*
1733 * Like __va(), but returns address in the kernel mapping (which is
1734 * all we have until the physical memory mapping has been set up.
1735 */
__ka(phys_addr_t paddr)1736 static void * __init __ka(phys_addr_t paddr)
1737 {
1738 #ifdef CONFIG_X86_64
1739 return (void *)(paddr + __START_KERNEL_map);
1740 #else
1741 return __va(paddr);
1742 #endif
1743 }
1744
1745 /* Convert a machine address to physical address */
m2p(phys_addr_t maddr)1746 static unsigned long __init m2p(phys_addr_t maddr)
1747 {
1748 phys_addr_t paddr;
1749
1750 maddr &= XEN_PTE_MFN_MASK;
1751 paddr = mfn_to_pfn(maddr >> PAGE_SHIFT) << PAGE_SHIFT;
1752
1753 return paddr;
1754 }
1755
1756 /* Convert a machine address to kernel virtual */
m2v(phys_addr_t maddr)1757 static void * __init m2v(phys_addr_t maddr)
1758 {
1759 return __ka(m2p(maddr));
1760 }
1761
1762 /* Set the page permissions on an identity-mapped pages */
set_page_prot_flags(void * addr,pgprot_t prot,unsigned long flags)1763 static void __init set_page_prot_flags(void *addr, pgprot_t prot,
1764 unsigned long flags)
1765 {
1766 unsigned long pfn = __pa(addr) >> PAGE_SHIFT;
1767 pte_t pte = pfn_pte(pfn, prot);
1768
1769 if (HYPERVISOR_update_va_mapping((unsigned long)addr, pte, flags))
1770 BUG();
1771 }
set_page_prot(void * addr,pgprot_t prot)1772 static void __init set_page_prot(void *addr, pgprot_t prot)
1773 {
1774 return set_page_prot_flags(addr, prot, UVMF_NONE);
1775 }
1776 #ifdef CONFIG_X86_32
xen_map_identity_early(pmd_t * pmd,unsigned long max_pfn)1777 static void __init xen_map_identity_early(pmd_t *pmd, unsigned long max_pfn)
1778 {
1779 unsigned pmdidx, pteidx;
1780 unsigned ident_pte;
1781 unsigned long pfn;
1782
1783 level1_ident_pgt = extend_brk(sizeof(pte_t) * LEVEL1_IDENT_ENTRIES,
1784 PAGE_SIZE);
1785
1786 ident_pte = 0;
1787 pfn = 0;
1788 for (pmdidx = 0; pmdidx < PTRS_PER_PMD && pfn < max_pfn; pmdidx++) {
1789 pte_t *pte_page;
1790
1791 /* Reuse or allocate a page of ptes */
1792 if (pmd_present(pmd[pmdidx]))
1793 pte_page = m2v(pmd[pmdidx].pmd);
1794 else {
1795 /* Check for free pte pages */
1796 if (ident_pte == LEVEL1_IDENT_ENTRIES)
1797 break;
1798
1799 pte_page = &level1_ident_pgt[ident_pte];
1800 ident_pte += PTRS_PER_PTE;
1801
1802 pmd[pmdidx] = __pmd(__pa(pte_page) | _PAGE_TABLE);
1803 }
1804
1805 /* Install mappings */
1806 for (pteidx = 0; pteidx < PTRS_PER_PTE; pteidx++, pfn++) {
1807 pte_t pte;
1808
1809 if (pfn > max_pfn_mapped)
1810 max_pfn_mapped = pfn;
1811
1812 if (!pte_none(pte_page[pteidx]))
1813 continue;
1814
1815 pte = pfn_pte(pfn, PAGE_KERNEL_EXEC);
1816 pte_page[pteidx] = pte;
1817 }
1818 }
1819
1820 for (pteidx = 0; pteidx < ident_pte; pteidx += PTRS_PER_PTE)
1821 set_page_prot(&level1_ident_pgt[pteidx], PAGE_KERNEL_RO);
1822
1823 set_page_prot(pmd, PAGE_KERNEL_RO);
1824 }
1825 #endif
xen_setup_machphys_mapping(void)1826 void __init xen_setup_machphys_mapping(void)
1827 {
1828 struct xen_machphys_mapping mapping;
1829
1830 if (HYPERVISOR_memory_op(XENMEM_machphys_mapping, &mapping) == 0) {
1831 machine_to_phys_mapping = (unsigned long *)mapping.v_start;
1832 machine_to_phys_nr = mapping.max_mfn + 1;
1833 } else {
1834 machine_to_phys_nr = MACH2PHYS_NR_ENTRIES;
1835 }
1836 #ifdef CONFIG_X86_32
1837 WARN_ON((machine_to_phys_mapping + (machine_to_phys_nr - 1))
1838 < machine_to_phys_mapping);
1839 #endif
1840 }
1841
1842 #ifdef CONFIG_X86_64
convert_pfn_mfn(void * v)1843 static void __init convert_pfn_mfn(void *v)
1844 {
1845 pte_t *pte = v;
1846 int i;
1847
1848 /* All levels are converted the same way, so just treat them
1849 as ptes. */
1850 for (i = 0; i < PTRS_PER_PTE; i++)
1851 pte[i] = xen_make_pte(pte[i].pte);
1852 }
check_pt_base(unsigned long * pt_base,unsigned long * pt_end,unsigned long addr)1853 static void __init check_pt_base(unsigned long *pt_base, unsigned long *pt_end,
1854 unsigned long addr)
1855 {
1856 if (*pt_base == PFN_DOWN(__pa(addr))) {
1857 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1858 clear_page((void *)addr);
1859 (*pt_base)++;
1860 }
1861 if (*pt_end == PFN_DOWN(__pa(addr))) {
1862 set_page_prot_flags((void *)addr, PAGE_KERNEL, UVMF_INVLPG);
1863 clear_page((void *)addr);
1864 (*pt_end)--;
1865 }
1866 }
1867 /*
1868 * Set up the initial kernel pagetable.
1869 *
1870 * We can construct this by grafting the Xen provided pagetable into
1871 * head_64.S's preconstructed pagetables. We copy the Xen L2's into
1872 * level2_ident_pgt, and level2_kernel_pgt. This means that only the
1873 * kernel has a physical mapping to start with - but that's enough to
1874 * get __va working. We need to fill in the rest of the physical
1875 * mapping once some sort of allocator has been set up.
1876 */
xen_setup_kernel_pagetable(pgd_t * pgd,unsigned long max_pfn)1877 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
1878 {
1879 pud_t *l3;
1880 pmd_t *l2;
1881 unsigned long addr[3];
1882 unsigned long pt_base, pt_end;
1883 unsigned i;
1884
1885 /* max_pfn_mapped is the last pfn mapped in the initial memory
1886 * mappings. Considering that on Xen after the kernel mappings we
1887 * have the mappings of some pages that don't exist in pfn space, we
1888 * set max_pfn_mapped to the last real pfn mapped. */
1889 if (xen_start_info->mfn_list < __START_KERNEL_map)
1890 max_pfn_mapped = xen_start_info->first_p2m_pfn;
1891 else
1892 max_pfn_mapped = PFN_DOWN(__pa(xen_start_info->mfn_list));
1893
1894 pt_base = PFN_DOWN(__pa(xen_start_info->pt_base));
1895 pt_end = pt_base + xen_start_info->nr_pt_frames;
1896
1897 /* Zap identity mapping */
1898 init_top_pgt[0] = __pgd(0);
1899
1900 /* Pre-constructed entries are in pfn, so convert to mfn */
1901 /* L4[273] -> level3_ident_pgt */
1902 /* L4[511] -> level3_kernel_pgt */
1903 convert_pfn_mfn(init_top_pgt);
1904
1905 /* L3_i[0] -> level2_ident_pgt */
1906 convert_pfn_mfn(level3_ident_pgt);
1907 /* L3_k[510] -> level2_kernel_pgt */
1908 /* L3_k[511] -> level2_fixmap_pgt */
1909 convert_pfn_mfn(level3_kernel_pgt);
1910
1911 /* L3_k[511][508-FIXMAP_PMD_NUM ... 507] -> level1_fixmap_pgt */
1912 convert_pfn_mfn(level2_fixmap_pgt);
1913
1914 /* We get [511][511] and have Xen's version of level2_kernel_pgt */
1915 l3 = m2v(pgd[pgd_index(__START_KERNEL_map)].pgd);
1916 l2 = m2v(l3[pud_index(__START_KERNEL_map)].pud);
1917
1918 addr[0] = (unsigned long)pgd;
1919 addr[1] = (unsigned long)l3;
1920 addr[2] = (unsigned long)l2;
1921 /* Graft it onto L4[273][0]. Note that we creating an aliasing problem:
1922 * Both L4[273][0] and L4[511][510] have entries that point to the same
1923 * L2 (PMD) tables. Meaning that if you modify it in __va space
1924 * it will be also modified in the __ka space! (But if you just
1925 * modify the PMD table to point to other PTE's or none, then you
1926 * are OK - which is what cleanup_highmap does) */
1927 copy_page(level2_ident_pgt, l2);
1928 /* Graft it onto L4[511][510] */
1929 copy_page(level2_kernel_pgt, l2);
1930
1931 /*
1932 * Zap execute permission from the ident map. Due to the sharing of
1933 * L1 entries we need to do this in the L2.
1934 */
1935 if (__supported_pte_mask & _PAGE_NX) {
1936 for (i = 0; i < PTRS_PER_PMD; ++i) {
1937 if (pmd_none(level2_ident_pgt[i]))
1938 continue;
1939 level2_ident_pgt[i] = pmd_set_flags(level2_ident_pgt[i], _PAGE_NX);
1940 }
1941 }
1942
1943 /* Copy the initial P->M table mappings if necessary. */
1944 i = pgd_index(xen_start_info->mfn_list);
1945 if (i && i < pgd_index(__START_KERNEL_map))
1946 init_top_pgt[i] = ((pgd_t *)xen_start_info->pt_base)[i];
1947
1948 /* Make pagetable pieces RO */
1949 set_page_prot(init_top_pgt, PAGE_KERNEL_RO);
1950 set_page_prot(level3_ident_pgt, PAGE_KERNEL_RO);
1951 set_page_prot(level3_kernel_pgt, PAGE_KERNEL_RO);
1952 set_page_prot(level3_user_vsyscall, PAGE_KERNEL_RO);
1953 set_page_prot(level2_ident_pgt, PAGE_KERNEL_RO);
1954 set_page_prot(level2_kernel_pgt, PAGE_KERNEL_RO);
1955 set_page_prot(level2_fixmap_pgt, PAGE_KERNEL_RO);
1956
1957 for (i = 0; i < FIXMAP_PMD_NUM; i++) {
1958 set_page_prot(level1_fixmap_pgt + i * PTRS_PER_PTE,
1959 PAGE_KERNEL_RO);
1960 }
1961
1962 /* Pin down new L4 */
1963 pin_pagetable_pfn(MMUEXT_PIN_L4_TABLE,
1964 PFN_DOWN(__pa_symbol(init_top_pgt)));
1965
1966 /* Unpin Xen-provided one */
1967 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
1968
1969 /*
1970 * At this stage there can be no user pgd, and no page structure to
1971 * attach it to, so make sure we just set kernel pgd.
1972 */
1973 xen_mc_batch();
1974 __xen_write_cr3(true, __pa(init_top_pgt));
1975 xen_mc_issue(PARAVIRT_LAZY_CPU);
1976
1977 /* We can't that easily rip out L3 and L2, as the Xen pagetables are
1978 * set out this way: [L4], [L1], [L2], [L3], [L1], [L1] ... for
1979 * the initial domain. For guests using the toolstack, they are in:
1980 * [L4], [L3], [L2], [L1], [L1], order .. So for dom0 we can only
1981 * rip out the [L4] (pgd), but for guests we shave off three pages.
1982 */
1983 for (i = 0; i < ARRAY_SIZE(addr); i++)
1984 check_pt_base(&pt_base, &pt_end, addr[i]);
1985
1986 /* Our (by three pages) smaller Xen pagetable that we are using */
1987 xen_pt_base = PFN_PHYS(pt_base);
1988 xen_pt_size = (pt_end - pt_base) * PAGE_SIZE;
1989 memblock_reserve(xen_pt_base, xen_pt_size);
1990
1991 /* Revector the xen_start_info */
1992 xen_start_info = (struct start_info *)__va(__pa(xen_start_info));
1993 }
1994
1995 /*
1996 * Read a value from a physical address.
1997 */
xen_read_phys_ulong(phys_addr_t addr)1998 static unsigned long __init xen_read_phys_ulong(phys_addr_t addr)
1999 {
2000 unsigned long *vaddr;
2001 unsigned long val;
2002
2003 vaddr = early_memremap_ro(addr, sizeof(val));
2004 val = *vaddr;
2005 early_memunmap(vaddr, sizeof(val));
2006 return val;
2007 }
2008
2009 /*
2010 * Translate a virtual address to a physical one without relying on mapped
2011 * page tables. Don't rely on big pages being aligned in (guest) physical
2012 * space!
2013 */
xen_early_virt_to_phys(unsigned long vaddr)2014 static phys_addr_t __init xen_early_virt_to_phys(unsigned long vaddr)
2015 {
2016 phys_addr_t pa;
2017 pgd_t pgd;
2018 pud_t pud;
2019 pmd_t pmd;
2020 pte_t pte;
2021
2022 pa = read_cr3_pa();
2023 pgd = native_make_pgd(xen_read_phys_ulong(pa + pgd_index(vaddr) *
2024 sizeof(pgd)));
2025 if (!pgd_present(pgd))
2026 return 0;
2027
2028 pa = pgd_val(pgd) & PTE_PFN_MASK;
2029 pud = native_make_pud(xen_read_phys_ulong(pa + pud_index(vaddr) *
2030 sizeof(pud)));
2031 if (!pud_present(pud))
2032 return 0;
2033 pa = pud_val(pud) & PTE_PFN_MASK;
2034 if (pud_large(pud))
2035 return pa + (vaddr & ~PUD_MASK);
2036
2037 pmd = native_make_pmd(xen_read_phys_ulong(pa + pmd_index(vaddr) *
2038 sizeof(pmd)));
2039 if (!pmd_present(pmd))
2040 return 0;
2041 pa = pmd_val(pmd) & PTE_PFN_MASK;
2042 if (pmd_large(pmd))
2043 return pa + (vaddr & ~PMD_MASK);
2044
2045 pte = native_make_pte(xen_read_phys_ulong(pa + pte_index(vaddr) *
2046 sizeof(pte)));
2047 if (!pte_present(pte))
2048 return 0;
2049 pa = pte_pfn(pte) << PAGE_SHIFT;
2050
2051 return pa | (vaddr & ~PAGE_MASK);
2052 }
2053
2054 /*
2055 * Find a new area for the hypervisor supplied p2m list and relocate the p2m to
2056 * this area.
2057 */
xen_relocate_p2m(void)2058 void __init xen_relocate_p2m(void)
2059 {
2060 phys_addr_t size, new_area, pt_phys, pmd_phys, pud_phys;
2061 unsigned long p2m_pfn, p2m_pfn_end, n_frames, pfn, pfn_end;
2062 int n_pte, n_pt, n_pmd, n_pud, idx_pte, idx_pt, idx_pmd, idx_pud;
2063 pte_t *pt;
2064 pmd_t *pmd;
2065 pud_t *pud;
2066 pgd_t *pgd;
2067 unsigned long *new_p2m;
2068
2069 size = PAGE_ALIGN(xen_start_info->nr_pages * sizeof(unsigned long));
2070 n_pte = roundup(size, PAGE_SIZE) >> PAGE_SHIFT;
2071 n_pt = roundup(size, PMD_SIZE) >> PMD_SHIFT;
2072 n_pmd = roundup(size, PUD_SIZE) >> PUD_SHIFT;
2073 n_pud = roundup(size, P4D_SIZE) >> P4D_SHIFT;
2074 n_frames = n_pte + n_pt + n_pmd + n_pud;
2075
2076 new_area = xen_find_free_area(PFN_PHYS(n_frames));
2077 if (!new_area) {
2078 xen_raw_console_write("Can't find new memory area for p2m needed due to E820 map conflict\n");
2079 BUG();
2080 }
2081
2082 /*
2083 * Setup the page tables for addressing the new p2m list.
2084 * We have asked the hypervisor to map the p2m list at the user address
2085 * PUD_SIZE. It may have done so, or it may have used a kernel space
2086 * address depending on the Xen version.
2087 * To avoid any possible virtual address collision, just use
2088 * 2 * PUD_SIZE for the new area.
2089 */
2090 pud_phys = new_area;
2091 pmd_phys = pud_phys + PFN_PHYS(n_pud);
2092 pt_phys = pmd_phys + PFN_PHYS(n_pmd);
2093 p2m_pfn = PFN_DOWN(pt_phys) + n_pt;
2094
2095 pgd = __va(read_cr3_pa());
2096 new_p2m = (unsigned long *)(2 * PGDIR_SIZE);
2097 for (idx_pud = 0; idx_pud < n_pud; idx_pud++) {
2098 pud = early_memremap(pud_phys, PAGE_SIZE);
2099 clear_page(pud);
2100 for (idx_pmd = 0; idx_pmd < min(n_pmd, PTRS_PER_PUD);
2101 idx_pmd++) {
2102 pmd = early_memremap(pmd_phys, PAGE_SIZE);
2103 clear_page(pmd);
2104 for (idx_pt = 0; idx_pt < min(n_pt, PTRS_PER_PMD);
2105 idx_pt++) {
2106 pt = early_memremap(pt_phys, PAGE_SIZE);
2107 clear_page(pt);
2108 for (idx_pte = 0;
2109 idx_pte < min(n_pte, PTRS_PER_PTE);
2110 idx_pte++) {
2111 pt[idx_pte] = pfn_pte(p2m_pfn,
2112 PAGE_KERNEL);
2113 p2m_pfn++;
2114 }
2115 n_pte -= PTRS_PER_PTE;
2116 early_memunmap(pt, PAGE_SIZE);
2117 make_lowmem_page_readonly(__va(pt_phys));
2118 pin_pagetable_pfn(MMUEXT_PIN_L1_TABLE,
2119 PFN_DOWN(pt_phys));
2120 pmd[idx_pt] = __pmd(_PAGE_TABLE | pt_phys);
2121 pt_phys += PAGE_SIZE;
2122 }
2123 n_pt -= PTRS_PER_PMD;
2124 early_memunmap(pmd, PAGE_SIZE);
2125 make_lowmem_page_readonly(__va(pmd_phys));
2126 pin_pagetable_pfn(MMUEXT_PIN_L2_TABLE,
2127 PFN_DOWN(pmd_phys));
2128 pud[idx_pmd] = __pud(_PAGE_TABLE | pmd_phys);
2129 pmd_phys += PAGE_SIZE;
2130 }
2131 n_pmd -= PTRS_PER_PUD;
2132 early_memunmap(pud, PAGE_SIZE);
2133 make_lowmem_page_readonly(__va(pud_phys));
2134 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, PFN_DOWN(pud_phys));
2135 set_pgd(pgd + 2 + idx_pud, __pgd(_PAGE_TABLE | pud_phys));
2136 pud_phys += PAGE_SIZE;
2137 }
2138
2139 /* Now copy the old p2m info to the new area. */
2140 memcpy(new_p2m, xen_p2m_addr, size);
2141 xen_p2m_addr = new_p2m;
2142
2143 /* Release the old p2m list and set new list info. */
2144 p2m_pfn = PFN_DOWN(xen_early_virt_to_phys(xen_start_info->mfn_list));
2145 BUG_ON(!p2m_pfn);
2146 p2m_pfn_end = p2m_pfn + PFN_DOWN(size);
2147
2148 if (xen_start_info->mfn_list < __START_KERNEL_map) {
2149 pfn = xen_start_info->first_p2m_pfn;
2150 pfn_end = xen_start_info->first_p2m_pfn +
2151 xen_start_info->nr_p2m_frames;
2152 set_pgd(pgd + 1, __pgd(0));
2153 } else {
2154 pfn = p2m_pfn;
2155 pfn_end = p2m_pfn_end;
2156 }
2157
2158 memblock_free(PFN_PHYS(pfn), PAGE_SIZE * (pfn_end - pfn));
2159 while (pfn < pfn_end) {
2160 if (pfn == p2m_pfn) {
2161 pfn = p2m_pfn_end;
2162 continue;
2163 }
2164 make_lowmem_page_readwrite(__va(PFN_PHYS(pfn)));
2165 pfn++;
2166 }
2167
2168 xen_start_info->mfn_list = (unsigned long)xen_p2m_addr;
2169 xen_start_info->first_p2m_pfn = PFN_DOWN(new_area);
2170 xen_start_info->nr_p2m_frames = n_frames;
2171 }
2172
2173 #else /* !CONFIG_X86_64 */
2174 static RESERVE_BRK_ARRAY(pmd_t, initial_kernel_pmd, PTRS_PER_PMD);
2175 static RESERVE_BRK_ARRAY(pmd_t, swapper_kernel_pmd, PTRS_PER_PMD);
2176 RESERVE_BRK(fixup_kernel_pmd, PAGE_SIZE);
2177 RESERVE_BRK(fixup_kernel_pte, PAGE_SIZE);
2178
xen_write_cr3_init(unsigned long cr3)2179 static void __init xen_write_cr3_init(unsigned long cr3)
2180 {
2181 unsigned long pfn = PFN_DOWN(__pa(swapper_pg_dir));
2182
2183 BUG_ON(read_cr3_pa() != __pa(initial_page_table));
2184 BUG_ON(cr3 != __pa(swapper_pg_dir));
2185
2186 /*
2187 * We are switching to swapper_pg_dir for the first time (from
2188 * initial_page_table) and therefore need to mark that page
2189 * read-only and then pin it.
2190 *
2191 * Xen disallows sharing of kernel PMDs for PAE
2192 * guests. Therefore we must copy the kernel PMD from
2193 * initial_page_table into a new kernel PMD to be used in
2194 * swapper_pg_dir.
2195 */
2196 swapper_kernel_pmd =
2197 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2198 copy_page(swapper_kernel_pmd, initial_kernel_pmd);
2199 swapper_pg_dir[KERNEL_PGD_BOUNDARY] =
2200 __pgd(__pa(swapper_kernel_pmd) | _PAGE_PRESENT);
2201 set_page_prot(swapper_kernel_pmd, PAGE_KERNEL_RO);
2202
2203 set_page_prot(swapper_pg_dir, PAGE_KERNEL_RO);
2204 xen_write_cr3(cr3);
2205 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE, pfn);
2206
2207 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE,
2208 PFN_DOWN(__pa(initial_page_table)));
2209 set_page_prot(initial_page_table, PAGE_KERNEL);
2210 set_page_prot(initial_kernel_pmd, PAGE_KERNEL);
2211
2212 pv_mmu_ops.write_cr3 = &xen_write_cr3;
2213 }
2214
2215 /*
2216 * For 32 bit domains xen_start_info->pt_base is the pgd address which might be
2217 * not the first page table in the page table pool.
2218 * Iterate through the initial page tables to find the real page table base.
2219 */
xen_find_pt_base(pmd_t * pmd)2220 static phys_addr_t __init xen_find_pt_base(pmd_t *pmd)
2221 {
2222 phys_addr_t pt_base, paddr;
2223 unsigned pmdidx;
2224
2225 pt_base = min(__pa(xen_start_info->pt_base), __pa(pmd));
2226
2227 for (pmdidx = 0; pmdidx < PTRS_PER_PMD; pmdidx++)
2228 if (pmd_present(pmd[pmdidx]) && !pmd_large(pmd[pmdidx])) {
2229 paddr = m2p(pmd[pmdidx].pmd);
2230 pt_base = min(pt_base, paddr);
2231 }
2232
2233 return pt_base;
2234 }
2235
xen_setup_kernel_pagetable(pgd_t * pgd,unsigned long max_pfn)2236 void __init xen_setup_kernel_pagetable(pgd_t *pgd, unsigned long max_pfn)
2237 {
2238 pmd_t *kernel_pmd;
2239
2240 kernel_pmd = m2v(pgd[KERNEL_PGD_BOUNDARY].pgd);
2241
2242 xen_pt_base = xen_find_pt_base(kernel_pmd);
2243 xen_pt_size = xen_start_info->nr_pt_frames * PAGE_SIZE;
2244
2245 initial_kernel_pmd =
2246 extend_brk(sizeof(pmd_t) * PTRS_PER_PMD, PAGE_SIZE);
2247
2248 max_pfn_mapped = PFN_DOWN(xen_pt_base + xen_pt_size + 512 * 1024);
2249
2250 copy_page(initial_kernel_pmd, kernel_pmd);
2251
2252 xen_map_identity_early(initial_kernel_pmd, max_pfn);
2253
2254 copy_page(initial_page_table, pgd);
2255 initial_page_table[KERNEL_PGD_BOUNDARY] =
2256 __pgd(__pa(initial_kernel_pmd) | _PAGE_PRESENT);
2257
2258 set_page_prot(initial_kernel_pmd, PAGE_KERNEL_RO);
2259 set_page_prot(initial_page_table, PAGE_KERNEL_RO);
2260 set_page_prot(empty_zero_page, PAGE_KERNEL_RO);
2261
2262 pin_pagetable_pfn(MMUEXT_UNPIN_TABLE, PFN_DOWN(__pa(pgd)));
2263
2264 pin_pagetable_pfn(MMUEXT_PIN_L3_TABLE,
2265 PFN_DOWN(__pa(initial_page_table)));
2266 xen_write_cr3(__pa(initial_page_table));
2267
2268 memblock_reserve(xen_pt_base, xen_pt_size);
2269 }
2270 #endif /* CONFIG_X86_64 */
2271
xen_reserve_special_pages(void)2272 void __init xen_reserve_special_pages(void)
2273 {
2274 phys_addr_t paddr;
2275
2276 memblock_reserve(__pa(xen_start_info), PAGE_SIZE);
2277 if (xen_start_info->store_mfn) {
2278 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->store_mfn));
2279 memblock_reserve(paddr, PAGE_SIZE);
2280 }
2281 if (!xen_initial_domain()) {
2282 paddr = PFN_PHYS(mfn_to_pfn(xen_start_info->console.domU.mfn));
2283 memblock_reserve(paddr, PAGE_SIZE);
2284 }
2285 }
2286
xen_pt_check_e820(void)2287 void __init xen_pt_check_e820(void)
2288 {
2289 if (xen_is_e820_reserved(xen_pt_base, xen_pt_size)) {
2290 xen_raw_console_write("Xen hypervisor allocated page table memory conflicts with E820 map\n");
2291 BUG();
2292 }
2293 }
2294
2295 static unsigned char dummy_mapping[PAGE_SIZE] __page_aligned_bss;
2296
xen_set_fixmap(unsigned idx,phys_addr_t phys,pgprot_t prot)2297 static void xen_set_fixmap(unsigned idx, phys_addr_t phys, pgprot_t prot)
2298 {
2299 pte_t pte;
2300
2301 phys >>= PAGE_SHIFT;
2302
2303 switch (idx) {
2304 case FIX_BTMAP_END ... FIX_BTMAP_BEGIN:
2305 #ifdef CONFIG_X86_32
2306 case FIX_WP_TEST:
2307 # ifdef CONFIG_HIGHMEM
2308 case FIX_KMAP_BEGIN ... FIX_KMAP_END:
2309 # endif
2310 #elif defined(CONFIG_X86_VSYSCALL_EMULATION)
2311 case VSYSCALL_PAGE:
2312 #endif
2313 case FIX_TEXT_POKE0:
2314 case FIX_TEXT_POKE1:
2315 /* All local page mappings */
2316 pte = pfn_pte(phys, prot);
2317 break;
2318
2319 #ifdef CONFIG_X86_LOCAL_APIC
2320 case FIX_APIC_BASE: /* maps dummy local APIC */
2321 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2322 break;
2323 #endif
2324
2325 #ifdef CONFIG_X86_IO_APIC
2326 case FIX_IO_APIC_BASE_0 ... FIX_IO_APIC_BASE_END:
2327 /*
2328 * We just don't map the IO APIC - all access is via
2329 * hypercalls. Keep the address in the pte for reference.
2330 */
2331 pte = pfn_pte(PFN_DOWN(__pa(dummy_mapping)), PAGE_KERNEL);
2332 break;
2333 #endif
2334
2335 case FIX_PARAVIRT_BOOTMAP:
2336 /* This is an MFN, but it isn't an IO mapping from the
2337 IO domain */
2338 pte = mfn_pte(phys, prot);
2339 break;
2340
2341 default:
2342 /* By default, set_fixmap is used for hardware mappings */
2343 pte = mfn_pte(phys, prot);
2344 break;
2345 }
2346
2347 __native_set_fixmap(idx, pte);
2348
2349 #ifdef CONFIG_X86_VSYSCALL_EMULATION
2350 /* Replicate changes to map the vsyscall page into the user
2351 pagetable vsyscall mapping. */
2352 if (idx == VSYSCALL_PAGE) {
2353 unsigned long vaddr = __fix_to_virt(idx);
2354 set_pte_vaddr_pud(level3_user_vsyscall, vaddr, pte);
2355 }
2356 #endif
2357 }
2358
xen_post_allocator_init(void)2359 static void __init xen_post_allocator_init(void)
2360 {
2361 pv_mmu_ops.set_pte = xen_set_pte;
2362 pv_mmu_ops.set_pmd = xen_set_pmd;
2363 pv_mmu_ops.set_pud = xen_set_pud;
2364 #ifdef CONFIG_X86_64
2365 pv_mmu_ops.set_p4d = xen_set_p4d;
2366 #endif
2367
2368 /* This will work as long as patching hasn't happened yet
2369 (which it hasn't) */
2370 pv_mmu_ops.alloc_pte = xen_alloc_pte;
2371 pv_mmu_ops.alloc_pmd = xen_alloc_pmd;
2372 pv_mmu_ops.release_pte = xen_release_pte;
2373 pv_mmu_ops.release_pmd = xen_release_pmd;
2374 #ifdef CONFIG_X86_64
2375 pv_mmu_ops.alloc_pud = xen_alloc_pud;
2376 pv_mmu_ops.release_pud = xen_release_pud;
2377 #endif
2378 pv_mmu_ops.make_pte = PV_CALLEE_SAVE(xen_make_pte);
2379
2380 #ifdef CONFIG_X86_64
2381 pv_mmu_ops.write_cr3 = &xen_write_cr3;
2382 #endif
2383 }
2384
xen_leave_lazy_mmu(void)2385 static void xen_leave_lazy_mmu(void)
2386 {
2387 preempt_disable();
2388 xen_mc_flush();
2389 paravirt_leave_lazy_mmu();
2390 preempt_enable();
2391 }
2392
2393 static const struct pv_mmu_ops xen_mmu_ops __initconst = {
2394 .read_cr2 = xen_read_cr2,
2395 .write_cr2 = xen_write_cr2,
2396
2397 .read_cr3 = xen_read_cr3,
2398 .write_cr3 = xen_write_cr3_init,
2399
2400 .flush_tlb_user = xen_flush_tlb,
2401 .flush_tlb_kernel = xen_flush_tlb,
2402 .flush_tlb_one_user = xen_flush_tlb_one_user,
2403 .flush_tlb_others = xen_flush_tlb_others,
2404 .tlb_remove_table = tlb_remove_table,
2405
2406 .pgd_alloc = xen_pgd_alloc,
2407 .pgd_free = xen_pgd_free,
2408
2409 .alloc_pte = xen_alloc_pte_init,
2410 .release_pte = xen_release_pte_init,
2411 .alloc_pmd = xen_alloc_pmd_init,
2412 .release_pmd = xen_release_pmd_init,
2413
2414 .set_pte = xen_set_pte_init,
2415 .set_pte_at = xen_set_pte_at,
2416 .set_pmd = xen_set_pmd_hyper,
2417
2418 .ptep_modify_prot_start = __ptep_modify_prot_start,
2419 .ptep_modify_prot_commit = __ptep_modify_prot_commit,
2420
2421 .pte_val = PV_CALLEE_SAVE(xen_pte_val),
2422 .pgd_val = PV_CALLEE_SAVE(xen_pgd_val),
2423
2424 .make_pte = PV_CALLEE_SAVE(xen_make_pte_init),
2425 .make_pgd = PV_CALLEE_SAVE(xen_make_pgd),
2426
2427 #ifdef CONFIG_X86_PAE
2428 .set_pte_atomic = xen_set_pte_atomic,
2429 .pte_clear = xen_pte_clear,
2430 .pmd_clear = xen_pmd_clear,
2431 #endif /* CONFIG_X86_PAE */
2432 .set_pud = xen_set_pud_hyper,
2433
2434 .make_pmd = PV_CALLEE_SAVE(xen_make_pmd),
2435 .pmd_val = PV_CALLEE_SAVE(xen_pmd_val),
2436
2437 #ifdef CONFIG_X86_64
2438 .pud_val = PV_CALLEE_SAVE(xen_pud_val),
2439 .make_pud = PV_CALLEE_SAVE(xen_make_pud),
2440 .set_p4d = xen_set_p4d_hyper,
2441
2442 .alloc_pud = xen_alloc_pmd_init,
2443 .release_pud = xen_release_pmd_init,
2444
2445 #if CONFIG_PGTABLE_LEVELS >= 5
2446 .p4d_val = PV_CALLEE_SAVE(xen_p4d_val),
2447 .make_p4d = PV_CALLEE_SAVE(xen_make_p4d),
2448 #endif
2449 #endif /* CONFIG_X86_64 */
2450
2451 .activate_mm = xen_activate_mm,
2452 .dup_mmap = xen_dup_mmap,
2453 .exit_mmap = xen_exit_mmap,
2454
2455 .lazy_mode = {
2456 .enter = paravirt_enter_lazy_mmu,
2457 .leave = xen_leave_lazy_mmu,
2458 .flush = paravirt_flush_lazy_mmu,
2459 },
2460
2461 .set_fixmap = xen_set_fixmap,
2462 };
2463
xen_init_mmu_ops(void)2464 void __init xen_init_mmu_ops(void)
2465 {
2466 x86_init.paging.pagetable_init = xen_pagetable_init;
2467 x86_init.hyper.init_after_bootmem = xen_after_bootmem;
2468
2469 pv_mmu_ops = xen_mmu_ops;
2470
2471 memset(dummy_mapping, 0xff, PAGE_SIZE);
2472 }
2473
2474 /* Protected by xen_reservation_lock. */
2475 #define MAX_CONTIG_ORDER 9 /* 2MB */
2476 static unsigned long discontig_frames[1<<MAX_CONTIG_ORDER];
2477
2478 #define VOID_PTE (mfn_pte(0, __pgprot(0)))
xen_zap_pfn_range(unsigned long vaddr,unsigned int order,unsigned long * in_frames,unsigned long * out_frames)2479 static void xen_zap_pfn_range(unsigned long vaddr, unsigned int order,
2480 unsigned long *in_frames,
2481 unsigned long *out_frames)
2482 {
2483 int i;
2484 struct multicall_space mcs;
2485
2486 xen_mc_batch();
2487 for (i = 0; i < (1UL<<order); i++, vaddr += PAGE_SIZE) {
2488 mcs = __xen_mc_entry(0);
2489
2490 if (in_frames)
2491 in_frames[i] = virt_to_mfn(vaddr);
2492
2493 MULTI_update_va_mapping(mcs.mc, vaddr, VOID_PTE, 0);
2494 __set_phys_to_machine(virt_to_pfn(vaddr), INVALID_P2M_ENTRY);
2495
2496 if (out_frames)
2497 out_frames[i] = virt_to_pfn(vaddr);
2498 }
2499 xen_mc_issue(0);
2500 }
2501
2502 /*
2503 * Update the pfn-to-mfn mappings for a virtual address range, either to
2504 * point to an array of mfns, or contiguously from a single starting
2505 * mfn.
2506 */
xen_remap_exchanged_ptes(unsigned long vaddr,int order,unsigned long * mfns,unsigned long first_mfn)2507 static void xen_remap_exchanged_ptes(unsigned long vaddr, int order,
2508 unsigned long *mfns,
2509 unsigned long first_mfn)
2510 {
2511 unsigned i, limit;
2512 unsigned long mfn;
2513
2514 xen_mc_batch();
2515
2516 limit = 1u << order;
2517 for (i = 0; i < limit; i++, vaddr += PAGE_SIZE) {
2518 struct multicall_space mcs;
2519 unsigned flags;
2520
2521 mcs = __xen_mc_entry(0);
2522 if (mfns)
2523 mfn = mfns[i];
2524 else
2525 mfn = first_mfn + i;
2526
2527 if (i < (limit - 1))
2528 flags = 0;
2529 else {
2530 if (order == 0)
2531 flags = UVMF_INVLPG | UVMF_ALL;
2532 else
2533 flags = UVMF_TLB_FLUSH | UVMF_ALL;
2534 }
2535
2536 MULTI_update_va_mapping(mcs.mc, vaddr,
2537 mfn_pte(mfn, PAGE_KERNEL), flags);
2538
2539 set_phys_to_machine(virt_to_pfn(vaddr), mfn);
2540 }
2541
2542 xen_mc_issue(0);
2543 }
2544
2545 /*
2546 * Perform the hypercall to exchange a region of our pfns to point to
2547 * memory with the required contiguous alignment. Takes the pfns as
2548 * input, and populates mfns as output.
2549 *
2550 * Returns a success code indicating whether the hypervisor was able to
2551 * satisfy the request or not.
2552 */
xen_exchange_memory(unsigned long extents_in,unsigned int order_in,unsigned long * pfns_in,unsigned long extents_out,unsigned int order_out,unsigned long * mfns_out,unsigned int address_bits)2553 static int xen_exchange_memory(unsigned long extents_in, unsigned int order_in,
2554 unsigned long *pfns_in,
2555 unsigned long extents_out,
2556 unsigned int order_out,
2557 unsigned long *mfns_out,
2558 unsigned int address_bits)
2559 {
2560 long rc;
2561 int success;
2562
2563 struct xen_memory_exchange exchange = {
2564 .in = {
2565 .nr_extents = extents_in,
2566 .extent_order = order_in,
2567 .extent_start = pfns_in,
2568 .domid = DOMID_SELF
2569 },
2570 .out = {
2571 .nr_extents = extents_out,
2572 .extent_order = order_out,
2573 .extent_start = mfns_out,
2574 .address_bits = address_bits,
2575 .domid = DOMID_SELF
2576 }
2577 };
2578
2579 BUG_ON(extents_in << order_in != extents_out << order_out);
2580
2581 rc = HYPERVISOR_memory_op(XENMEM_exchange, &exchange);
2582 success = (exchange.nr_exchanged == extents_in);
2583
2584 BUG_ON(!success && ((exchange.nr_exchanged != 0) || (rc == 0)));
2585 BUG_ON(success && (rc != 0));
2586
2587 return success;
2588 }
2589
xen_create_contiguous_region(phys_addr_t pstart,unsigned int order,unsigned int address_bits,dma_addr_t * dma_handle)2590 int xen_create_contiguous_region(phys_addr_t pstart, unsigned int order,
2591 unsigned int address_bits,
2592 dma_addr_t *dma_handle)
2593 {
2594 unsigned long *in_frames = discontig_frames, out_frame;
2595 unsigned long flags;
2596 int success;
2597 unsigned long vstart = (unsigned long)phys_to_virt(pstart);
2598
2599 /*
2600 * Currently an auto-translated guest will not perform I/O, nor will
2601 * it require PAE page directories below 4GB. Therefore any calls to
2602 * this function are redundant and can be ignored.
2603 */
2604
2605 if (unlikely(order > MAX_CONTIG_ORDER))
2606 return -ENOMEM;
2607
2608 memset((void *) vstart, 0, PAGE_SIZE << order);
2609
2610 spin_lock_irqsave(&xen_reservation_lock, flags);
2611
2612 /* 1. Zap current PTEs, remembering MFNs. */
2613 xen_zap_pfn_range(vstart, order, in_frames, NULL);
2614
2615 /* 2. Get a new contiguous memory extent. */
2616 out_frame = virt_to_pfn(vstart);
2617 success = xen_exchange_memory(1UL << order, 0, in_frames,
2618 1, order, &out_frame,
2619 address_bits);
2620
2621 /* 3. Map the new extent in place of old pages. */
2622 if (success)
2623 xen_remap_exchanged_ptes(vstart, order, NULL, out_frame);
2624 else
2625 xen_remap_exchanged_ptes(vstart, order, in_frames, 0);
2626
2627 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2628
2629 *dma_handle = virt_to_machine(vstart).maddr;
2630 return success ? 0 : -ENOMEM;
2631 }
2632 EXPORT_SYMBOL_GPL(xen_create_contiguous_region);
2633
xen_destroy_contiguous_region(phys_addr_t pstart,unsigned int order)2634 void xen_destroy_contiguous_region(phys_addr_t pstart, unsigned int order)
2635 {
2636 unsigned long *out_frames = discontig_frames, in_frame;
2637 unsigned long flags;
2638 int success;
2639 unsigned long vstart;
2640
2641 if (unlikely(order > MAX_CONTIG_ORDER))
2642 return;
2643
2644 vstart = (unsigned long)phys_to_virt(pstart);
2645 memset((void *) vstart, 0, PAGE_SIZE << order);
2646
2647 spin_lock_irqsave(&xen_reservation_lock, flags);
2648
2649 /* 1. Find start MFN of contiguous extent. */
2650 in_frame = virt_to_mfn(vstart);
2651
2652 /* 2. Zap current PTEs. */
2653 xen_zap_pfn_range(vstart, order, NULL, out_frames);
2654
2655 /* 3. Do the exchange for non-contiguous MFNs. */
2656 success = xen_exchange_memory(1, order, &in_frame, 1UL << order,
2657 0, out_frames, 0);
2658
2659 /* 4. Map new pages in place of old pages. */
2660 if (success)
2661 xen_remap_exchanged_ptes(vstart, order, out_frames, 0);
2662 else
2663 xen_remap_exchanged_ptes(vstart, order, NULL, in_frame);
2664
2665 spin_unlock_irqrestore(&xen_reservation_lock, flags);
2666 }
2667 EXPORT_SYMBOL_GPL(xen_destroy_contiguous_region);
2668
2669 #ifdef CONFIG_KEXEC_CORE
paddr_vmcoreinfo_note(void)2670 phys_addr_t paddr_vmcoreinfo_note(void)
2671 {
2672 if (xen_pv_domain())
2673 return virt_to_machine(vmcoreinfo_note).maddr;
2674 else
2675 return __pa(vmcoreinfo_note);
2676 }
2677 #endif /* CONFIG_KEXEC_CORE */
2678