1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * AD5686R, AD5685R, AD5684R Digital to analog converters driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 */
7
8 #include <linux/interrupt.h>
9 #include <linux/fs.h>
10 #include <linux/device.h>
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/slab.h>
14 #include <linux/sysfs.h>
15 #include <linux/regulator/consumer.h>
16
17 #include <linux/iio/iio.h>
18 #include <linux/iio/sysfs.h>
19
20 #include "ad5686.h"
21
22 static const char * const ad5686_powerdown_modes[] = {
23 "1kohm_to_gnd",
24 "100kohm_to_gnd",
25 "three_state"
26 };
27
ad5686_get_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan)28 static int ad5686_get_powerdown_mode(struct iio_dev *indio_dev,
29 const struct iio_chan_spec *chan)
30 {
31 struct ad5686_state *st = iio_priv(indio_dev);
32
33 return ((st->pwr_down_mode >> (chan->channel * 2)) & 0x3) - 1;
34 }
35
ad5686_set_powerdown_mode(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,unsigned int mode)36 static int ad5686_set_powerdown_mode(struct iio_dev *indio_dev,
37 const struct iio_chan_spec *chan,
38 unsigned int mode)
39 {
40 struct ad5686_state *st = iio_priv(indio_dev);
41
42 st->pwr_down_mode &= ~(0x3 << (chan->channel * 2));
43 st->pwr_down_mode |= ((mode + 1) << (chan->channel * 2));
44
45 return 0;
46 }
47
48 static const struct iio_enum ad5686_powerdown_mode_enum = {
49 .items = ad5686_powerdown_modes,
50 .num_items = ARRAY_SIZE(ad5686_powerdown_modes),
51 .get = ad5686_get_powerdown_mode,
52 .set = ad5686_set_powerdown_mode,
53 };
54
ad5686_read_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,char * buf)55 static ssize_t ad5686_read_dac_powerdown(struct iio_dev *indio_dev,
56 uintptr_t private, const struct iio_chan_spec *chan, char *buf)
57 {
58 struct ad5686_state *st = iio_priv(indio_dev);
59
60 return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
61 (0x3 << (chan->channel * 2))));
62 }
63
ad5686_write_dac_powerdown(struct iio_dev * indio_dev,uintptr_t private,const struct iio_chan_spec * chan,const char * buf,size_t len)64 static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
65 uintptr_t private,
66 const struct iio_chan_spec *chan,
67 const char *buf,
68 size_t len)
69 {
70 bool readin;
71 int ret;
72 struct ad5686_state *st = iio_priv(indio_dev);
73 unsigned int val, ref_bit_msk;
74 u8 shift;
75
76 ret = strtobool(buf, &readin);
77 if (ret)
78 return ret;
79
80 if (readin)
81 st->pwr_down_mask |= (0x3 << (chan->channel * 2));
82 else
83 st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
84
85 switch (st->chip_info->regmap_type) {
86 case AD5683_REGMAP:
87 shift = 13;
88 ref_bit_msk = AD5683_REF_BIT_MSK;
89 break;
90 case AD5686_REGMAP:
91 shift = 0;
92 ref_bit_msk = 0;
93 break;
94 case AD5693_REGMAP:
95 shift = 13;
96 ref_bit_msk = AD5693_REF_BIT_MSK;
97 break;
98 default:
99 return -EINVAL;
100 }
101
102 val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);
103 if (!st->use_internal_vref)
104 val |= ref_bit_msk;
105
106 ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, 0, val);
107
108 return ret ? ret : len;
109 }
110
ad5686_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)111 static int ad5686_read_raw(struct iio_dev *indio_dev,
112 struct iio_chan_spec const *chan,
113 int *val,
114 int *val2,
115 long m)
116 {
117 struct ad5686_state *st = iio_priv(indio_dev);
118 int ret;
119
120 switch (m) {
121 case IIO_CHAN_INFO_RAW:
122 mutex_lock(&indio_dev->mlock);
123 ret = st->read(st, chan->address);
124 mutex_unlock(&indio_dev->mlock);
125 if (ret < 0)
126 return ret;
127 *val = (ret >> chan->scan_type.shift) &
128 GENMASK(chan->scan_type.realbits - 1, 0);
129 return IIO_VAL_INT;
130 case IIO_CHAN_INFO_SCALE:
131 *val = st->vref_mv;
132 *val2 = chan->scan_type.realbits;
133 return IIO_VAL_FRACTIONAL_LOG2;
134 }
135 return -EINVAL;
136 }
137
ad5686_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)138 static int ad5686_write_raw(struct iio_dev *indio_dev,
139 struct iio_chan_spec const *chan,
140 int val,
141 int val2,
142 long mask)
143 {
144 struct ad5686_state *st = iio_priv(indio_dev);
145 int ret;
146
147 switch (mask) {
148 case IIO_CHAN_INFO_RAW:
149 if (val > (1 << chan->scan_type.realbits) || val < 0)
150 return -EINVAL;
151
152 mutex_lock(&indio_dev->mlock);
153 ret = st->write(st,
154 AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
155 chan->address,
156 val << chan->scan_type.shift);
157 mutex_unlock(&indio_dev->mlock);
158 break;
159 default:
160 ret = -EINVAL;
161 }
162
163 return ret;
164 }
165
166 static const struct iio_info ad5686_info = {
167 .read_raw = ad5686_read_raw,
168 .write_raw = ad5686_write_raw,
169 };
170
171 static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
172 {
173 .name = "powerdown",
174 .read = ad5686_read_dac_powerdown,
175 .write = ad5686_write_dac_powerdown,
176 .shared = IIO_SEPARATE,
177 },
178 IIO_ENUM("powerdown_mode", IIO_SEPARATE, &ad5686_powerdown_mode_enum),
179 IIO_ENUM_AVAILABLE("powerdown_mode", &ad5686_powerdown_mode_enum),
180 { },
181 };
182
183 #define AD5868_CHANNEL(chan, addr, bits, _shift) { \
184 .type = IIO_VOLTAGE, \
185 .indexed = 1, \
186 .output = 1, \
187 .channel = chan, \
188 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
189 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
190 .address = addr, \
191 .scan_type = { \
192 .sign = 'u', \
193 .realbits = (bits), \
194 .storagebits = 16, \
195 .shift = (_shift), \
196 }, \
197 .ext_info = ad5686_ext_info, \
198 }
199
200 #define DECLARE_AD5693_CHANNELS(name, bits, _shift) \
201 static struct iio_chan_spec name[] = { \
202 AD5868_CHANNEL(0, 0, bits, _shift), \
203 }
204
205 #define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
206 static struct iio_chan_spec name[] = { \
207 AD5868_CHANNEL(0, 1, bits, _shift), \
208 AD5868_CHANNEL(1, 2, bits, _shift), \
209 AD5868_CHANNEL(2, 4, bits, _shift), \
210 AD5868_CHANNEL(3, 8, bits, _shift), \
211 }
212
213 #define DECLARE_AD5676_CHANNELS(name, bits, _shift) \
214 static struct iio_chan_spec name[] = { \
215 AD5868_CHANNEL(0, 0, bits, _shift), \
216 AD5868_CHANNEL(1, 1, bits, _shift), \
217 AD5868_CHANNEL(2, 2, bits, _shift), \
218 AD5868_CHANNEL(3, 3, bits, _shift), \
219 AD5868_CHANNEL(4, 4, bits, _shift), \
220 AD5868_CHANNEL(5, 5, bits, _shift), \
221 AD5868_CHANNEL(6, 6, bits, _shift), \
222 AD5868_CHANNEL(7, 7, bits, _shift), \
223 }
224
225 DECLARE_AD5693_CHANNELS(ad5311r_channels, 10, 6);
226 DECLARE_AD5676_CHANNELS(ad5672_channels, 12, 4);
227 DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0);
228 DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4);
229 DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2);
230 DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0);
231 DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0);
232 DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2);
233 DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4);
234
235 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
236 [ID_AD5311R] = {
237 .channels = ad5311r_channels,
238 .int_vref_mv = 2500,
239 .num_channels = 1,
240 .regmap_type = AD5693_REGMAP,
241 },
242 [ID_AD5671R] = {
243 .channels = ad5672_channels,
244 .int_vref_mv = 2500,
245 .num_channels = 8,
246 .regmap_type = AD5686_REGMAP,
247 },
248 [ID_AD5672R] = {
249 .channels = ad5672_channels,
250 .int_vref_mv = 2500,
251 .num_channels = 8,
252 .regmap_type = AD5686_REGMAP,
253 },
254 [ID_AD5675R] = {
255 .channels = ad5676_channels,
256 .int_vref_mv = 2500,
257 .num_channels = 8,
258 .regmap_type = AD5686_REGMAP,
259 },
260 [ID_AD5676] = {
261 .channels = ad5676_channels,
262 .num_channels = 8,
263 .regmap_type = AD5686_REGMAP,
264 },
265 [ID_AD5676R] = {
266 .channels = ad5676_channels,
267 .int_vref_mv = 2500,
268 .num_channels = 8,
269 .regmap_type = AD5686_REGMAP,
270 },
271 [ID_AD5681R] = {
272 .channels = ad5691r_channels,
273 .int_vref_mv = 2500,
274 .num_channels = 1,
275 .regmap_type = AD5683_REGMAP,
276 },
277 [ID_AD5682R] = {
278 .channels = ad5692r_channels,
279 .int_vref_mv = 2500,
280 .num_channels = 1,
281 .regmap_type = AD5683_REGMAP,
282 },
283 [ID_AD5683] = {
284 .channels = ad5693_channels,
285 .num_channels = 1,
286 .regmap_type = AD5683_REGMAP,
287 },
288 [ID_AD5683R] = {
289 .channels = ad5693_channels,
290 .int_vref_mv = 2500,
291 .num_channels = 1,
292 .regmap_type = AD5683_REGMAP,
293 },
294 [ID_AD5684] = {
295 .channels = ad5684_channels,
296 .num_channels = 4,
297 .regmap_type = AD5686_REGMAP,
298 },
299 [ID_AD5684R] = {
300 .channels = ad5684_channels,
301 .int_vref_mv = 2500,
302 .num_channels = 4,
303 .regmap_type = AD5686_REGMAP,
304 },
305 [ID_AD5685R] = {
306 .channels = ad5685r_channels,
307 .int_vref_mv = 2500,
308 .num_channels = 4,
309 .regmap_type = AD5686_REGMAP,
310 },
311 [ID_AD5686] = {
312 .channels = ad5686_channels,
313 .num_channels = 4,
314 .regmap_type = AD5686_REGMAP,
315 },
316 [ID_AD5686R] = {
317 .channels = ad5686_channels,
318 .int_vref_mv = 2500,
319 .num_channels = 4,
320 .regmap_type = AD5686_REGMAP,
321 },
322 [ID_AD5691R] = {
323 .channels = ad5691r_channels,
324 .int_vref_mv = 2500,
325 .num_channels = 1,
326 .regmap_type = AD5693_REGMAP,
327 },
328 [ID_AD5692R] = {
329 .channels = ad5692r_channels,
330 .int_vref_mv = 2500,
331 .num_channels = 1,
332 .regmap_type = AD5693_REGMAP,
333 },
334 [ID_AD5693] = {
335 .channels = ad5693_channels,
336 .num_channels = 1,
337 .regmap_type = AD5693_REGMAP,
338 },
339 [ID_AD5693R] = {
340 .channels = ad5693_channels,
341 .int_vref_mv = 2500,
342 .num_channels = 1,
343 .regmap_type = AD5693_REGMAP,
344 },
345 [ID_AD5694] = {
346 .channels = ad5684_channels,
347 .num_channels = 4,
348 .regmap_type = AD5686_REGMAP,
349 },
350 [ID_AD5694R] = {
351 .channels = ad5684_channels,
352 .int_vref_mv = 2500,
353 .num_channels = 4,
354 .regmap_type = AD5686_REGMAP,
355 },
356 [ID_AD5696] = {
357 .channels = ad5686_channels,
358 .num_channels = 4,
359 .regmap_type = AD5686_REGMAP,
360 },
361 [ID_AD5696R] = {
362 .channels = ad5686_channels,
363 .int_vref_mv = 2500,
364 .num_channels = 4,
365 .regmap_type = AD5686_REGMAP,
366 },
367 };
368
ad5686_probe(struct device * dev,enum ad5686_supported_device_ids chip_type,const char * name,ad5686_write_func write,ad5686_read_func read)369 int ad5686_probe(struct device *dev,
370 enum ad5686_supported_device_ids chip_type,
371 const char *name, ad5686_write_func write,
372 ad5686_read_func read)
373 {
374 struct ad5686_state *st;
375 struct iio_dev *indio_dev;
376 unsigned int val, ref_bit_msk;
377 u8 cmd;
378 int ret, i, voltage_uv = 0;
379
380 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
381 if (indio_dev == NULL)
382 return -ENOMEM;
383
384 st = iio_priv(indio_dev);
385 dev_set_drvdata(dev, indio_dev);
386
387 st->dev = dev;
388 st->write = write;
389 st->read = read;
390
391 st->reg = devm_regulator_get_optional(dev, "vcc");
392 if (!IS_ERR(st->reg)) {
393 ret = regulator_enable(st->reg);
394 if (ret)
395 return ret;
396
397 ret = regulator_get_voltage(st->reg);
398 if (ret < 0)
399 goto error_disable_reg;
400
401 voltage_uv = ret;
402 }
403
404 st->chip_info = &ad5686_chip_info_tbl[chip_type];
405
406 if (voltage_uv)
407 st->vref_mv = voltage_uv / 1000;
408 else
409 st->vref_mv = st->chip_info->int_vref_mv;
410
411 /* Set all the power down mode for all channels to 1K pulldown */
412 for (i = 0; i < st->chip_info->num_channels; i++)
413 st->pwr_down_mode |= (0x01 << (i * 2));
414
415 indio_dev->dev.parent = dev;
416 indio_dev->name = name;
417 indio_dev->info = &ad5686_info;
418 indio_dev->modes = INDIO_DIRECT_MODE;
419 indio_dev->channels = st->chip_info->channels;
420 indio_dev->num_channels = st->chip_info->num_channels;
421
422 switch (st->chip_info->regmap_type) {
423 case AD5683_REGMAP:
424 cmd = AD5686_CMD_CONTROL_REG;
425 ref_bit_msk = AD5683_REF_BIT_MSK;
426 st->use_internal_vref = !voltage_uv;
427 break;
428 case AD5686_REGMAP:
429 cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
430 ref_bit_msk = 0;
431 break;
432 case AD5693_REGMAP:
433 cmd = AD5686_CMD_CONTROL_REG;
434 ref_bit_msk = AD5693_REF_BIT_MSK;
435 st->use_internal_vref = !voltage_uv;
436 break;
437 default:
438 ret = -EINVAL;
439 goto error_disable_reg;
440 }
441
442 val = (voltage_uv | ref_bit_msk);
443
444 ret = st->write(st, cmd, 0, !!val);
445 if (ret)
446 goto error_disable_reg;
447
448 ret = iio_device_register(indio_dev);
449 if (ret)
450 goto error_disable_reg;
451
452 return 0;
453
454 error_disable_reg:
455 if (!IS_ERR(st->reg))
456 regulator_disable(st->reg);
457 return ret;
458 }
459 EXPORT_SYMBOL_GPL(ad5686_probe);
460
ad5686_remove(struct device * dev)461 int ad5686_remove(struct device *dev)
462 {
463 struct iio_dev *indio_dev = dev_get_drvdata(dev);
464 struct ad5686_state *st = iio_priv(indio_dev);
465
466 iio_device_unregister(indio_dev);
467 if (!IS_ERR(st->reg))
468 regulator_disable(st->reg);
469
470 return 0;
471 }
472 EXPORT_SYMBOL_GPL(ad5686_remove);
473
474 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
475 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
476 MODULE_LICENSE("GPL v2");
477