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1 /*
2  * Samsung EXYNOS4x12 FIMC-IS (Imaging Subsystem) driver
3  *
4  * Copyright (C) 2013 Samsung Electronics Co., Ltd.
5  *
6  * Authors: Sylwester Nawrocki <s.nawrocki@samsung.com>
7  *          Younghwan Joo <yhwan.joo@samsung.com>
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13 #define pr_fmt(fmt) "%s:%d " fmt, __func__, __LINE__
14 
15 #include <linux/device.h>
16 #include <linux/errno.h>
17 #include <linux/kernel.h>
18 #include <linux/list.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/printk.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/slab.h>
24 #include <linux/types.h>
25 #include <media/v4l2-device.h>
26 
27 #include "media-dev.h"
28 #include "fimc-isp-video.h"
29 #include "fimc-is-command.h"
30 #include "fimc-is-param.h"
31 #include "fimc-is-regs.h"
32 #include "fimc-is.h"
33 
34 int fimc_isp_debug;
35 module_param_named(debug_isp, fimc_isp_debug, int, S_IRUGO | S_IWUSR);
36 
37 static const struct fimc_fmt fimc_isp_formats[FIMC_ISP_NUM_FORMATS] = {
38 	{
39 		.name		= "RAW8 (GRBG)",
40 		.fourcc		= V4L2_PIX_FMT_SGRBG8,
41 		.depth		= { 8 },
42 		.color		= FIMC_FMT_RAW8,
43 		.memplanes	= 1,
44 		.mbus_code	= MEDIA_BUS_FMT_SGRBG8_1X8,
45 	}, {
46 		.name		= "RAW10 (GRBG)",
47 		.fourcc		= V4L2_PIX_FMT_SGRBG10,
48 		.depth		= { 10 },
49 		.color		= FIMC_FMT_RAW10,
50 		.memplanes	= 1,
51 		.mbus_code	= MEDIA_BUS_FMT_SGRBG10_1X10,
52 	}, {
53 		.name		= "RAW12 (GRBG)",
54 		.fourcc		= V4L2_PIX_FMT_SGRBG12,
55 		.depth		= { 12 },
56 		.color		= FIMC_FMT_RAW12,
57 		.memplanes	= 1,
58 		.mbus_code	= MEDIA_BUS_FMT_SGRBG12_1X12,
59 	},
60 };
61 
62 /**
63  * fimc_isp_find_format - lookup color format by fourcc or media bus code
64  * @pixelformat: fourcc to match, ignored if null
65  * @mbus_code: media bus code to match, ignored if null
66  * @index: index to the fimc_isp_formats array, ignored if negative
67  */
fimc_isp_find_format(const u32 * pixelformat,const u32 * mbus_code,int index)68 const struct fimc_fmt *fimc_isp_find_format(const u32 *pixelformat,
69 					const u32 *mbus_code, int index)
70 {
71 	const struct fimc_fmt *fmt, *def_fmt = NULL;
72 	unsigned int i;
73 	int id = 0;
74 
75 	if (index >= (int)ARRAY_SIZE(fimc_isp_formats))
76 		return NULL;
77 
78 	for (i = 0; i < ARRAY_SIZE(fimc_isp_formats); ++i) {
79 		fmt = &fimc_isp_formats[i];
80 		if (pixelformat && fmt->fourcc == *pixelformat)
81 			return fmt;
82 		if (mbus_code && fmt->mbus_code == *mbus_code)
83 			return fmt;
84 		if (index == id)
85 			def_fmt = fmt;
86 		id++;
87 	}
88 	return def_fmt;
89 }
90 
fimc_isp_irq_handler(struct fimc_is * is)91 void fimc_isp_irq_handler(struct fimc_is *is)
92 {
93 	is->i2h_cmd.args[0] = mcuctl_read(is, MCUCTL_REG_ISSR(20));
94 	is->i2h_cmd.args[1] = mcuctl_read(is, MCUCTL_REG_ISSR(21));
95 
96 	fimc_is_fw_clear_irq1(is, FIMC_IS_INT_FRAME_DONE_ISP);
97 	fimc_isp_video_irq_handler(is);
98 
99 	wake_up(&is->irq_queue);
100 }
101 
102 /* Capture subdev media entity operations */
fimc_is_link_setup(struct media_entity * entity,const struct media_pad * local,const struct media_pad * remote,u32 flags)103 static int fimc_is_link_setup(struct media_entity *entity,
104 				const struct media_pad *local,
105 				const struct media_pad *remote, u32 flags)
106 {
107 	return 0;
108 }
109 
110 static const struct media_entity_operations fimc_is_subdev_media_ops = {
111 	.link_setup = fimc_is_link_setup,
112 };
113 
fimc_is_subdev_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)114 static int fimc_is_subdev_enum_mbus_code(struct v4l2_subdev *sd,
115 				struct v4l2_subdev_pad_config *cfg,
116 				struct v4l2_subdev_mbus_code_enum *code)
117 {
118 	const struct fimc_fmt *fmt;
119 
120 	fmt = fimc_isp_find_format(NULL, NULL, code->index);
121 	if (!fmt)
122 		return -EINVAL;
123 	code->code = fmt->mbus_code;
124 	return 0;
125 }
126 
fimc_isp_subdev_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)127 static int fimc_isp_subdev_get_fmt(struct v4l2_subdev *sd,
128 				   struct v4l2_subdev_pad_config *cfg,
129 				   struct v4l2_subdev_format *fmt)
130 {
131 	struct fimc_isp *isp = v4l2_get_subdevdata(sd);
132 	struct v4l2_mbus_framefmt *mf = &fmt->format;
133 
134 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
135 		*mf = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
136 		return 0;
137 	}
138 
139 	mf->colorspace = V4L2_COLORSPACE_SRGB;
140 
141 	mutex_lock(&isp->subdev_lock);
142 
143 	if (fmt->pad == FIMC_ISP_SD_PAD_SINK) {
144 		/* ISP OTF input image format */
145 		*mf = isp->sink_fmt;
146 	} else {
147 		/* ISP OTF output image format */
148 		*mf = isp->src_fmt;
149 
150 		if (fmt->pad == FIMC_ISP_SD_PAD_SRC_FIFO) {
151 			mf->colorspace = V4L2_COLORSPACE_JPEG;
152 			mf->code = MEDIA_BUS_FMT_YUV10_1X30;
153 		}
154 	}
155 
156 	mutex_unlock(&isp->subdev_lock);
157 
158 	isp_dbg(1, sd, "%s: pad%d: fmt: 0x%x, %dx%d\n", __func__,
159 		fmt->pad, mf->code, mf->width, mf->height);
160 
161 	return 0;
162 }
163 
__isp_subdev_try_format(struct fimc_isp * isp,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)164 static void __isp_subdev_try_format(struct fimc_isp *isp,
165 				    struct v4l2_subdev_pad_config *cfg,
166 				    struct v4l2_subdev_format *fmt)
167 {
168 	struct v4l2_mbus_framefmt *mf = &fmt->format;
169 	struct v4l2_mbus_framefmt *format;
170 
171 	mf->colorspace = V4L2_COLORSPACE_SRGB;
172 
173 	if (fmt->pad == FIMC_ISP_SD_PAD_SINK) {
174 		v4l_bound_align_image(&mf->width, FIMC_ISP_SINK_WIDTH_MIN,
175 				FIMC_ISP_SINK_WIDTH_MAX, 0,
176 				&mf->height, FIMC_ISP_SINK_HEIGHT_MIN,
177 				FIMC_ISP_SINK_HEIGHT_MAX, 0, 0);
178 		mf->code = MEDIA_BUS_FMT_SGRBG10_1X10;
179 	} else {
180 		if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
181 			format = v4l2_subdev_get_try_format(&isp->subdev, cfg,
182 						FIMC_ISP_SD_PAD_SINK);
183 		else
184 			format = &isp->sink_fmt;
185 
186 		/* Allow changing format only on sink pad */
187 		mf->width = format->width - FIMC_ISP_CAC_MARGIN_WIDTH;
188 		mf->height = format->height - FIMC_ISP_CAC_MARGIN_HEIGHT;
189 
190 		if (fmt->pad == FIMC_ISP_SD_PAD_SRC_FIFO) {
191 			mf->code = MEDIA_BUS_FMT_YUV10_1X30;
192 			mf->colorspace = V4L2_COLORSPACE_JPEG;
193 		} else {
194 			mf->code = format->code;
195 		}
196 	}
197 }
198 
fimc_isp_subdev_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)199 static int fimc_isp_subdev_set_fmt(struct v4l2_subdev *sd,
200 				   struct v4l2_subdev_pad_config *cfg,
201 				   struct v4l2_subdev_format *fmt)
202 {
203 	struct fimc_isp *isp = v4l2_get_subdevdata(sd);
204 	struct fimc_is *is = fimc_isp_to_is(isp);
205 	struct v4l2_mbus_framefmt *mf = &fmt->format;
206 	int ret = 0;
207 
208 	isp_dbg(1, sd, "%s: pad%d: code: 0x%x, %dx%d\n",
209 		 __func__, fmt->pad, mf->code, mf->width, mf->height);
210 
211 	mutex_lock(&isp->subdev_lock);
212 	__isp_subdev_try_format(isp, cfg, fmt);
213 
214 	if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
215 		mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
216 		*mf = fmt->format;
217 
218 		/* Propagate format to the source pads */
219 		if (fmt->pad == FIMC_ISP_SD_PAD_SINK) {
220 			struct v4l2_subdev_format format = *fmt;
221 			unsigned int pad;
222 
223 			for (pad = FIMC_ISP_SD_PAD_SRC_FIFO;
224 					pad < FIMC_ISP_SD_PADS_NUM; pad++) {
225 				format.pad = pad;
226 				__isp_subdev_try_format(isp, cfg, &format);
227 				mf = v4l2_subdev_get_try_format(sd, cfg, pad);
228 				*mf = format.format;
229 			}
230 		}
231 	} else {
232 		if (sd->entity.stream_count == 0) {
233 			if (fmt->pad == FIMC_ISP_SD_PAD_SINK) {
234 				struct v4l2_subdev_format format = *fmt;
235 
236 				isp->sink_fmt = *mf;
237 
238 				format.pad = FIMC_ISP_SD_PAD_SRC_DMA;
239 				__isp_subdev_try_format(isp, cfg, &format);
240 
241 				isp->src_fmt = format.format;
242 				__is_set_frame_size(is, &isp->src_fmt);
243 			} else {
244 				isp->src_fmt = *mf;
245 			}
246 		} else {
247 			ret = -EBUSY;
248 		}
249 	}
250 
251 	mutex_unlock(&isp->subdev_lock);
252 	return ret;
253 }
254 
fimc_isp_subdev_s_stream(struct v4l2_subdev * sd,int on)255 static int fimc_isp_subdev_s_stream(struct v4l2_subdev *sd, int on)
256 {
257 	struct fimc_isp *isp = v4l2_get_subdevdata(sd);
258 	struct fimc_is *is = fimc_isp_to_is(isp);
259 	int ret;
260 
261 	isp_dbg(1, sd, "%s: on: %d\n", __func__, on);
262 
263 	if (!test_bit(IS_ST_INIT_DONE, &is->state))
264 		return -EBUSY;
265 
266 	fimc_is_mem_barrier();
267 
268 	if (on) {
269 		if (__get_pending_param_count(is)) {
270 			ret = fimc_is_itf_s_param(is, true);
271 			if (ret < 0)
272 				return ret;
273 		}
274 
275 		isp_dbg(1, sd, "changing mode to %d\n", is->config_index);
276 
277 		ret = fimc_is_itf_mode_change(is);
278 		if (ret)
279 			return -EINVAL;
280 
281 		clear_bit(IS_ST_STREAM_ON, &is->state);
282 		fimc_is_hw_stream_on(is);
283 		ret = fimc_is_wait_event(is, IS_ST_STREAM_ON, 1,
284 					 FIMC_IS_CONFIG_TIMEOUT);
285 		if (ret < 0) {
286 			v4l2_err(sd, "stream on timeout\n");
287 			return ret;
288 		}
289 	} else {
290 		clear_bit(IS_ST_STREAM_OFF, &is->state);
291 		fimc_is_hw_stream_off(is);
292 		ret = fimc_is_wait_event(is, IS_ST_STREAM_OFF, 1,
293 					 FIMC_IS_CONFIG_TIMEOUT);
294 		if (ret < 0) {
295 			v4l2_err(sd, "stream off timeout\n");
296 			return ret;
297 		}
298 		is->setfile.sub_index = 0;
299 	}
300 
301 	return 0;
302 }
303 
fimc_isp_subdev_s_power(struct v4l2_subdev * sd,int on)304 static int fimc_isp_subdev_s_power(struct v4l2_subdev *sd, int on)
305 {
306 	struct fimc_isp *isp = v4l2_get_subdevdata(sd);
307 	struct fimc_is *is = fimc_isp_to_is(isp);
308 	int ret = 0;
309 
310 	pr_debug("on: %d\n", on);
311 
312 	if (on) {
313 		ret = pm_runtime_get_sync(&is->pdev->dev);
314 		if (ret < 0) {
315 			pm_runtime_put(&is->pdev->dev);
316 			return ret;
317 		}
318 		set_bit(IS_ST_PWR_ON, &is->state);
319 
320 		ret = fimc_is_start_firmware(is);
321 		if (ret < 0) {
322 			v4l2_err(sd, "firmware booting failed\n");
323 			pm_runtime_put(&is->pdev->dev);
324 			return ret;
325 		}
326 		set_bit(IS_ST_PWR_SUBIP_ON, &is->state);
327 
328 		ret = fimc_is_hw_initialize(is);
329 	} else {
330 		/* Close sensor */
331 		if (!test_bit(IS_ST_PWR_ON, &is->state)) {
332 			fimc_is_hw_close_sensor(is, 0);
333 
334 			ret = fimc_is_wait_event(is, IS_ST_OPEN_SENSOR, 0,
335 						 FIMC_IS_CONFIG_TIMEOUT);
336 			if (ret < 0) {
337 				v4l2_err(sd, "sensor close timeout\n");
338 				return ret;
339 			}
340 		}
341 
342 		/* SUB IP power off */
343 		if (test_bit(IS_ST_PWR_SUBIP_ON, &is->state)) {
344 			fimc_is_hw_subip_power_off(is);
345 			ret = fimc_is_wait_event(is, IS_ST_PWR_SUBIP_ON, 0,
346 						 FIMC_IS_CONFIG_TIMEOUT);
347 			if (ret < 0) {
348 				v4l2_err(sd, "sub-IP power off timeout\n");
349 				return ret;
350 			}
351 		}
352 
353 		fimc_is_cpu_set_power(is, 0);
354 		pm_runtime_put_sync(&is->pdev->dev);
355 
356 		clear_bit(IS_ST_PWR_ON, &is->state);
357 		clear_bit(IS_ST_INIT_DONE, &is->state);
358 		is->state = 0;
359 		is->config[is->config_index].p_region_index[0] = 0;
360 		is->config[is->config_index].p_region_index[1] = 0;
361 		set_bit(IS_ST_IDLE, &is->state);
362 		wmb();
363 	}
364 
365 	return ret;
366 }
367 
fimc_isp_subdev_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)368 static int fimc_isp_subdev_open(struct v4l2_subdev *sd,
369 				struct v4l2_subdev_fh *fh)
370 {
371 	struct v4l2_mbus_framefmt *format;
372 	struct v4l2_mbus_framefmt fmt = {
373 		.colorspace = V4L2_COLORSPACE_SRGB,
374 		.code = fimc_isp_formats[0].mbus_code,
375 		.width = DEFAULT_PREVIEW_STILL_WIDTH + FIMC_ISP_CAC_MARGIN_WIDTH,
376 		.height = DEFAULT_PREVIEW_STILL_HEIGHT + FIMC_ISP_CAC_MARGIN_HEIGHT,
377 		.field = V4L2_FIELD_NONE,
378 	};
379 
380 	format = v4l2_subdev_get_try_format(sd, fh->pad, FIMC_ISP_SD_PAD_SINK);
381 	*format = fmt;
382 
383 	format = v4l2_subdev_get_try_format(sd, fh->pad, FIMC_ISP_SD_PAD_SRC_FIFO);
384 	fmt.width = DEFAULT_PREVIEW_STILL_WIDTH;
385 	fmt.height = DEFAULT_PREVIEW_STILL_HEIGHT;
386 	*format = fmt;
387 
388 	format = v4l2_subdev_get_try_format(sd, fh->pad, FIMC_ISP_SD_PAD_SRC_DMA);
389 	*format = fmt;
390 
391 	return 0;
392 }
393 
fimc_isp_subdev_registered(struct v4l2_subdev * sd)394 static int fimc_isp_subdev_registered(struct v4l2_subdev *sd)
395 {
396 	struct fimc_isp *isp = v4l2_get_subdevdata(sd);
397 	int ret;
398 
399 	/* Use pipeline object allocated by the media device. */
400 	isp->video_capture.ve.pipe = v4l2_get_subdev_hostdata(sd);
401 
402 	ret = fimc_isp_video_device_register(isp, sd->v4l2_dev,
403 			V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE);
404 	if (ret < 0)
405 		isp->video_capture.ve.pipe = NULL;
406 
407 	return ret;
408 }
409 
fimc_isp_subdev_unregistered(struct v4l2_subdev * sd)410 static void fimc_isp_subdev_unregistered(struct v4l2_subdev *sd)
411 {
412 	struct fimc_isp *isp = v4l2_get_subdevdata(sd);
413 
414 	fimc_isp_video_device_unregister(isp,
415 			V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE);
416 }
417 
418 static const struct v4l2_subdev_internal_ops fimc_is_subdev_internal_ops = {
419 	.registered = fimc_isp_subdev_registered,
420 	.unregistered = fimc_isp_subdev_unregistered,
421 	.open = fimc_isp_subdev_open,
422 };
423 
424 static const struct v4l2_subdev_pad_ops fimc_is_subdev_pad_ops = {
425 	.enum_mbus_code = fimc_is_subdev_enum_mbus_code,
426 	.get_fmt = fimc_isp_subdev_get_fmt,
427 	.set_fmt = fimc_isp_subdev_set_fmt,
428 };
429 
430 static const struct v4l2_subdev_video_ops fimc_is_subdev_video_ops = {
431 	.s_stream = fimc_isp_subdev_s_stream,
432 };
433 
434 static const struct v4l2_subdev_core_ops fimc_is_core_ops = {
435 	.s_power = fimc_isp_subdev_s_power,
436 };
437 
438 static const struct v4l2_subdev_ops fimc_is_subdev_ops = {
439 	.core = &fimc_is_core_ops,
440 	.video = &fimc_is_subdev_video_ops,
441 	.pad = &fimc_is_subdev_pad_ops,
442 };
443 
__ctrl_set_white_balance(struct fimc_is * is,int value)444 static int __ctrl_set_white_balance(struct fimc_is *is, int value)
445 {
446 	switch (value) {
447 	case V4L2_WHITE_BALANCE_AUTO:
448 		__is_set_isp_awb(is, ISP_AWB_COMMAND_AUTO, 0);
449 		break;
450 	case V4L2_WHITE_BALANCE_DAYLIGHT:
451 		__is_set_isp_awb(is, ISP_AWB_COMMAND_ILLUMINATION,
452 					ISP_AWB_ILLUMINATION_DAYLIGHT);
453 		break;
454 	case V4L2_WHITE_BALANCE_CLOUDY:
455 		__is_set_isp_awb(is, ISP_AWB_COMMAND_ILLUMINATION,
456 					ISP_AWB_ILLUMINATION_CLOUDY);
457 		break;
458 	case V4L2_WHITE_BALANCE_INCANDESCENT:
459 		__is_set_isp_awb(is, ISP_AWB_COMMAND_ILLUMINATION,
460 					ISP_AWB_ILLUMINATION_TUNGSTEN);
461 		break;
462 	case V4L2_WHITE_BALANCE_FLUORESCENT:
463 		__is_set_isp_awb(is, ISP_AWB_COMMAND_ILLUMINATION,
464 					ISP_AWB_ILLUMINATION_FLUORESCENT);
465 		break;
466 	default:
467 		return -EINVAL;
468 	}
469 
470 	return 0;
471 }
472 
__ctrl_set_aewb_lock(struct fimc_is * is,struct v4l2_ctrl * ctrl)473 static int __ctrl_set_aewb_lock(struct fimc_is *is,
474 				      struct v4l2_ctrl *ctrl)
475 {
476 	bool awb_lock = ctrl->val & V4L2_LOCK_WHITE_BALANCE;
477 	bool ae_lock = ctrl->val & V4L2_LOCK_EXPOSURE;
478 	struct isp_param *isp = &is->is_p_region->parameter.isp;
479 	int cmd, ret;
480 
481 	cmd = ae_lock ? ISP_AA_COMMAND_STOP : ISP_AA_COMMAND_START;
482 	isp->aa.cmd = cmd;
483 	isp->aa.target = ISP_AA_TARGET_AE;
484 	fimc_is_set_param_bit(is, PARAM_ISP_AA);
485 	is->af.ae_lock_state = ae_lock;
486 	wmb();
487 
488 	ret = fimc_is_itf_s_param(is, false);
489 	if (ret < 0)
490 		return ret;
491 
492 	cmd = awb_lock ? ISP_AA_COMMAND_STOP : ISP_AA_COMMAND_START;
493 	isp->aa.cmd = cmd;
494 	isp->aa.target = ISP_AA_TARGET_AE;
495 	fimc_is_set_param_bit(is, PARAM_ISP_AA);
496 	is->af.awb_lock_state = awb_lock;
497 	wmb();
498 
499 	return fimc_is_itf_s_param(is, false);
500 }
501 
502 /* Supported manual ISO values */
503 static const s64 iso_qmenu[] = {
504 	50, 100, 200, 400, 800,
505 };
506 
__ctrl_set_iso(struct fimc_is * is,int value)507 static int __ctrl_set_iso(struct fimc_is *is, int value)
508 {
509 	unsigned int idx, iso;
510 
511 	if (value == V4L2_ISO_SENSITIVITY_AUTO) {
512 		__is_set_isp_iso(is, ISP_ISO_COMMAND_AUTO, 0);
513 		return 0;
514 	}
515 	idx = is->isp.ctrls.iso->val;
516 	if (idx >= ARRAY_SIZE(iso_qmenu))
517 		return -EINVAL;
518 
519 	iso = iso_qmenu[idx];
520 	__is_set_isp_iso(is, ISP_ISO_COMMAND_MANUAL, iso);
521 	return 0;
522 }
523 
__ctrl_set_metering(struct fimc_is * is,unsigned int value)524 static int __ctrl_set_metering(struct fimc_is *is, unsigned int value)
525 {
526 	unsigned int val;
527 
528 	switch (value) {
529 	case V4L2_EXPOSURE_METERING_AVERAGE:
530 		val = ISP_METERING_COMMAND_AVERAGE;
531 		break;
532 	case V4L2_EXPOSURE_METERING_CENTER_WEIGHTED:
533 		val = ISP_METERING_COMMAND_CENTER;
534 		break;
535 	case V4L2_EXPOSURE_METERING_SPOT:
536 		val = ISP_METERING_COMMAND_SPOT;
537 		break;
538 	case V4L2_EXPOSURE_METERING_MATRIX:
539 		val = ISP_METERING_COMMAND_MATRIX;
540 		break;
541 	default:
542 		return -EINVAL;
543 	}
544 
545 	__is_set_isp_metering(is, IS_METERING_CONFIG_CMD, val);
546 	return 0;
547 }
548 
__ctrl_set_afc(struct fimc_is * is,int value)549 static int __ctrl_set_afc(struct fimc_is *is, int value)
550 {
551 	switch (value) {
552 	case V4L2_CID_POWER_LINE_FREQUENCY_DISABLED:
553 		__is_set_isp_afc(is, ISP_AFC_COMMAND_DISABLE, 0);
554 		break;
555 	case V4L2_CID_POWER_LINE_FREQUENCY_50HZ:
556 		__is_set_isp_afc(is, ISP_AFC_COMMAND_MANUAL, 50);
557 		break;
558 	case V4L2_CID_POWER_LINE_FREQUENCY_60HZ:
559 		__is_set_isp_afc(is, ISP_AFC_COMMAND_MANUAL, 60);
560 		break;
561 	case V4L2_CID_POWER_LINE_FREQUENCY_AUTO:
562 		__is_set_isp_afc(is, ISP_AFC_COMMAND_AUTO, 0);
563 		break;
564 	default:
565 		return -EINVAL;
566 	}
567 
568 	return 0;
569 }
570 
__ctrl_set_image_effect(struct fimc_is * is,int value)571 static int __ctrl_set_image_effect(struct fimc_is *is, int value)
572 {
573 	static const u8 effects[][2] = {
574 		{ V4L2_COLORFX_NONE,	 ISP_IMAGE_EFFECT_DISABLE },
575 		{ V4L2_COLORFX_BW,	 ISP_IMAGE_EFFECT_MONOCHROME },
576 		{ V4L2_COLORFX_SEPIA,	 ISP_IMAGE_EFFECT_SEPIA },
577 		{ V4L2_COLORFX_NEGATIVE, ISP_IMAGE_EFFECT_NEGATIVE_MONO },
578 		{ 16 /* TODO */,	 ISP_IMAGE_EFFECT_NEGATIVE_COLOR },
579 	};
580 	int i;
581 
582 	for (i = 0; i < ARRAY_SIZE(effects); i++) {
583 		if (effects[i][0] != value)
584 			continue;
585 
586 		__is_set_isp_effect(is, effects[i][1]);
587 		return 0;
588 	}
589 
590 	return -EINVAL;
591 }
592 
fimc_is_s_ctrl(struct v4l2_ctrl * ctrl)593 static int fimc_is_s_ctrl(struct v4l2_ctrl *ctrl)
594 {
595 	struct fimc_isp *isp = ctrl_to_fimc_isp(ctrl);
596 	struct fimc_is *is = fimc_isp_to_is(isp);
597 	bool set_param = true;
598 	int ret = 0;
599 
600 	switch (ctrl->id) {
601 	case V4L2_CID_CONTRAST:
602 		__is_set_isp_adjust(is, ISP_ADJUST_COMMAND_MANUAL_CONTRAST,
603 				    ctrl->val);
604 		break;
605 
606 	case V4L2_CID_SATURATION:
607 		__is_set_isp_adjust(is, ISP_ADJUST_COMMAND_MANUAL_SATURATION,
608 				    ctrl->val);
609 		break;
610 
611 	case V4L2_CID_SHARPNESS:
612 		__is_set_isp_adjust(is, ISP_ADJUST_COMMAND_MANUAL_SHARPNESS,
613 				    ctrl->val);
614 		break;
615 
616 	case V4L2_CID_EXPOSURE_ABSOLUTE:
617 		__is_set_isp_adjust(is, ISP_ADJUST_COMMAND_MANUAL_EXPOSURE,
618 				    ctrl->val);
619 		break;
620 
621 	case V4L2_CID_BRIGHTNESS:
622 		__is_set_isp_adjust(is, ISP_ADJUST_COMMAND_MANUAL_BRIGHTNESS,
623 				    ctrl->val);
624 		break;
625 
626 	case V4L2_CID_HUE:
627 		__is_set_isp_adjust(is, ISP_ADJUST_COMMAND_MANUAL_HUE,
628 				    ctrl->val);
629 		break;
630 
631 	case V4L2_CID_EXPOSURE_METERING:
632 		ret = __ctrl_set_metering(is, ctrl->val);
633 		break;
634 
635 	case V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE:
636 		ret = __ctrl_set_white_balance(is, ctrl->val);
637 		break;
638 
639 	case V4L2_CID_3A_LOCK:
640 		ret = __ctrl_set_aewb_lock(is, ctrl);
641 		set_param = false;
642 		break;
643 
644 	case V4L2_CID_ISO_SENSITIVITY_AUTO:
645 		ret = __ctrl_set_iso(is, ctrl->val);
646 		break;
647 
648 	case V4L2_CID_POWER_LINE_FREQUENCY:
649 		ret = __ctrl_set_afc(is, ctrl->val);
650 		break;
651 
652 	case V4L2_CID_COLORFX:
653 		__ctrl_set_image_effect(is, ctrl->val);
654 		break;
655 
656 	default:
657 		ret = -EINVAL;
658 		break;
659 	}
660 
661 	if (ret < 0) {
662 		v4l2_err(&isp->subdev, "Failed to set control: %s (%d)\n",
663 						ctrl->name, ctrl->val);
664 		return ret;
665 	}
666 
667 	if (set_param && test_bit(IS_ST_STREAM_ON, &is->state))
668 		return fimc_is_itf_s_param(is, true);
669 
670 	return 0;
671 }
672 
673 static const struct v4l2_ctrl_ops fimc_isp_ctrl_ops = {
674 	.s_ctrl	= fimc_is_s_ctrl,
675 };
676 
__isp_subdev_set_default_format(struct fimc_isp * isp)677 static void __isp_subdev_set_default_format(struct fimc_isp *isp)
678 {
679 	struct fimc_is *is = fimc_isp_to_is(isp);
680 
681 	isp->sink_fmt.width = DEFAULT_PREVIEW_STILL_WIDTH +
682 				FIMC_ISP_CAC_MARGIN_WIDTH;
683 	isp->sink_fmt.height = DEFAULT_PREVIEW_STILL_HEIGHT +
684 				FIMC_ISP_CAC_MARGIN_HEIGHT;
685 	isp->sink_fmt.code = MEDIA_BUS_FMT_SGRBG10_1X10;
686 
687 	isp->src_fmt.width = DEFAULT_PREVIEW_STILL_WIDTH;
688 	isp->src_fmt.height = DEFAULT_PREVIEW_STILL_HEIGHT;
689 	isp->src_fmt.code = MEDIA_BUS_FMT_SGRBG10_1X10;
690 	__is_set_frame_size(is, &isp->src_fmt);
691 }
692 
fimc_isp_subdev_create(struct fimc_isp * isp)693 int fimc_isp_subdev_create(struct fimc_isp *isp)
694 {
695 	const struct v4l2_ctrl_ops *ops = &fimc_isp_ctrl_ops;
696 	struct v4l2_ctrl_handler *handler = &isp->ctrls.handler;
697 	struct v4l2_subdev *sd = &isp->subdev;
698 	struct fimc_isp_ctrls *ctrls = &isp->ctrls;
699 	int ret;
700 
701 	mutex_init(&isp->subdev_lock);
702 
703 	v4l2_subdev_init(sd, &fimc_is_subdev_ops);
704 
705 	sd->owner = THIS_MODULE;
706 	sd->grp_id = GRP_ID_FIMC_IS;
707 	sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
708 	snprintf(sd->name, sizeof(sd->name), "FIMC-IS-ISP");
709 
710 	sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
711 	isp->subdev_pads[FIMC_ISP_SD_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
712 	isp->subdev_pads[FIMC_ISP_SD_PAD_SRC_FIFO].flags = MEDIA_PAD_FL_SOURCE;
713 	isp->subdev_pads[FIMC_ISP_SD_PAD_SRC_DMA].flags = MEDIA_PAD_FL_SOURCE;
714 	ret = media_entity_pads_init(&sd->entity, FIMC_ISP_SD_PADS_NUM,
715 				isp->subdev_pads);
716 	if (ret)
717 		return ret;
718 
719 	v4l2_ctrl_handler_init(handler, 20);
720 
721 	ctrls->saturation = v4l2_ctrl_new_std(handler, ops, V4L2_CID_SATURATION,
722 						-2, 2, 1, 0);
723 	ctrls->brightness = v4l2_ctrl_new_std(handler, ops, V4L2_CID_BRIGHTNESS,
724 						-4, 4, 1, 0);
725 	ctrls->contrast = v4l2_ctrl_new_std(handler, ops, V4L2_CID_CONTRAST,
726 						-2, 2, 1, 0);
727 	ctrls->sharpness = v4l2_ctrl_new_std(handler, ops, V4L2_CID_SHARPNESS,
728 						-2, 2, 1, 0);
729 	ctrls->hue = v4l2_ctrl_new_std(handler, ops, V4L2_CID_HUE,
730 						-2, 2, 1, 0);
731 
732 	ctrls->auto_wb = v4l2_ctrl_new_std_menu(handler, ops,
733 					V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE,
734 					8, ~0x14e, V4L2_WHITE_BALANCE_AUTO);
735 
736 	ctrls->exposure = v4l2_ctrl_new_std(handler, ops,
737 					V4L2_CID_EXPOSURE_ABSOLUTE,
738 					-4, 4, 1, 0);
739 
740 	ctrls->exp_metering = v4l2_ctrl_new_std_menu(handler, ops,
741 					V4L2_CID_EXPOSURE_METERING, 3,
742 					~0xf, V4L2_EXPOSURE_METERING_AVERAGE);
743 
744 	v4l2_ctrl_new_std_menu(handler, ops, V4L2_CID_POWER_LINE_FREQUENCY,
745 					V4L2_CID_POWER_LINE_FREQUENCY_AUTO, 0,
746 					V4L2_CID_POWER_LINE_FREQUENCY_AUTO);
747 	/* ISO sensitivity */
748 	ctrls->auto_iso = v4l2_ctrl_new_std_menu(handler, ops,
749 			V4L2_CID_ISO_SENSITIVITY_AUTO, 1, 0,
750 			V4L2_ISO_SENSITIVITY_AUTO);
751 
752 	ctrls->iso = v4l2_ctrl_new_int_menu(handler, ops,
753 			V4L2_CID_ISO_SENSITIVITY, ARRAY_SIZE(iso_qmenu) - 1,
754 			ARRAY_SIZE(iso_qmenu)/2 - 1, iso_qmenu);
755 
756 	ctrls->aewb_lock = v4l2_ctrl_new_std(handler, ops,
757 					V4L2_CID_3A_LOCK, 0, 0x3, 0, 0);
758 
759 	/* TODO: Add support for NEGATIVE_COLOR option */
760 	ctrls->colorfx = v4l2_ctrl_new_std_menu(handler, ops, V4L2_CID_COLORFX,
761 			V4L2_COLORFX_SET_CBCR + 1, ~0x1000f, V4L2_COLORFX_NONE);
762 
763 	if (handler->error) {
764 		media_entity_cleanup(&sd->entity);
765 		return handler->error;
766 	}
767 
768 	v4l2_ctrl_auto_cluster(2, &ctrls->auto_iso,
769 			V4L2_ISO_SENSITIVITY_MANUAL, false);
770 
771 	sd->ctrl_handler = handler;
772 	sd->internal_ops = &fimc_is_subdev_internal_ops;
773 	sd->entity.ops = &fimc_is_subdev_media_ops;
774 	v4l2_set_subdevdata(sd, isp);
775 
776 	__isp_subdev_set_default_format(isp);
777 
778 	return 0;
779 }
780 
fimc_isp_subdev_destroy(struct fimc_isp * isp)781 void fimc_isp_subdev_destroy(struct fimc_isp *isp)
782 {
783 	struct v4l2_subdev *sd = &isp->subdev;
784 
785 	v4l2_device_unregister_subdev(sd);
786 	media_entity_cleanup(&sd->entity);
787 	v4l2_ctrl_handler_free(&isp->ctrls.handler);
788 	v4l2_set_subdevdata(sd, NULL);
789 }
790