1 // SPDX-License-Identifier: GPL-2.0
2 /* Ethernet device driver for Cortina Systems Gemini SoC
3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus
4 * Net Engine and Gigabit Ethernet MAC (GMAC)
5 * This hardware contains a TCP Offload Engine (TOE) but currently the
6 * driver does not make use of it.
7 *
8 * Authors:
9 * Linus Walleij <linus.walleij@linaro.org>
10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT)
11 * Michał Mirosław <mirq-linux@rere.qmqm.pl>
12 * Paulius Zaleckas <paulius.zaleckas@gmail.com>
13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it>
14 * Gary Chen & Ch Hsu Storlink Semiconductor
15 */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/spinlock.h>
21 #include <linux/slab.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/cache.h>
24 #include <linux/interrupt.h>
25 #include <linux/reset.h>
26 #include <linux/clk.h>
27 #include <linux/of.h>
28 #include <linux/of_mdio.h>
29 #include <linux/of_net.h>
30 #include <linux/of_platform.h>
31 #include <linux/etherdevice.h>
32 #include <linux/if_vlan.h>
33 #include <linux/skbuff.h>
34 #include <linux/phy.h>
35 #include <linux/crc32.h>
36 #include <linux/ethtool.h>
37 #include <linux/tcp.h>
38 #include <linux/u64_stats_sync.h>
39
40 #include <linux/in.h>
41 #include <linux/ip.h>
42 #include <linux/ipv6.h>
43
44 #include "gemini.h"
45
46 #define DRV_NAME "gmac-gemini"
47 #define DRV_VERSION "1.0"
48
49 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
50 static int debug = -1;
51 module_param(debug, int, 0);
52 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
53
54 #define HSIZE_8 0x00
55 #define HSIZE_16 0x01
56 #define HSIZE_32 0x02
57
58 #define HBURST_SINGLE 0x00
59 #define HBURST_INCR 0x01
60 #define HBURST_INCR4 0x02
61 #define HBURST_INCR8 0x03
62
63 #define HPROT_DATA_CACHE BIT(0)
64 #define HPROT_PRIVILIGED BIT(1)
65 #define HPROT_BUFFERABLE BIT(2)
66 #define HPROT_CACHABLE BIT(3)
67
68 #define DEFAULT_RX_COALESCE_NSECS 0
69 #define DEFAULT_GMAC_RXQ_ORDER 9
70 #define DEFAULT_GMAC_TXQ_ORDER 8
71 #define DEFAULT_RX_BUF_ORDER 11
72 #define DEFAULT_NAPI_WEIGHT 64
73 #define TX_MAX_FRAGS 16
74 #define TX_QUEUE_NUM 1 /* max: 6 */
75 #define RX_MAX_ALLOC_ORDER 2
76
77 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \
78 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT)
79 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \
80 GMAC0_SWTQ00_FIN_INT_BIT)
81 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT)
82
83 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \
84 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \
85 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6)
86
87 /**
88 * struct gmac_queue_page - page buffer per-page info
89 */
90 struct gmac_queue_page {
91 struct page *page;
92 dma_addr_t mapping;
93 };
94
95 struct gmac_txq {
96 struct gmac_txdesc *ring;
97 struct sk_buff **skb;
98 unsigned int cptr;
99 unsigned int noirq_packets;
100 };
101
102 struct gemini_ethernet;
103
104 struct gemini_ethernet_port {
105 u8 id; /* 0 or 1 */
106
107 struct gemini_ethernet *geth;
108 struct net_device *netdev;
109 struct device *dev;
110 void __iomem *dma_base;
111 void __iomem *gmac_base;
112 struct clk *pclk;
113 struct reset_control *reset;
114 int irq;
115 __le32 mac_addr[3];
116
117 void __iomem *rxq_rwptr;
118 struct gmac_rxdesc *rxq_ring;
119 unsigned int rxq_order;
120
121 struct napi_struct napi;
122 struct hrtimer rx_coalesce_timer;
123 unsigned int rx_coalesce_nsecs;
124 unsigned int freeq_refill;
125 struct gmac_txq txq[TX_QUEUE_NUM];
126 unsigned int txq_order;
127 unsigned int irq_every_tx_packets;
128
129 dma_addr_t rxq_dma_base;
130 dma_addr_t txq_dma_base;
131
132 unsigned int msg_enable;
133 spinlock_t config_lock; /* Locks config register */
134
135 struct u64_stats_sync tx_stats_syncp;
136 struct u64_stats_sync rx_stats_syncp;
137 struct u64_stats_sync ir_stats_syncp;
138
139 struct rtnl_link_stats64 stats;
140 u64 hw_stats[RX_STATS_NUM];
141 u64 rx_stats[RX_STATUS_NUM];
142 u64 rx_csum_stats[RX_CHKSUM_NUM];
143 u64 rx_napi_exits;
144 u64 tx_frag_stats[TX_MAX_FRAGS];
145 u64 tx_frags_linearized;
146 u64 tx_hw_csummed;
147 };
148
149 struct gemini_ethernet {
150 struct device *dev;
151 void __iomem *base;
152 struct gemini_ethernet_port *port0;
153 struct gemini_ethernet_port *port1;
154 bool initialized;
155
156 spinlock_t irq_lock; /* Locks IRQ-related registers */
157 unsigned int freeq_order;
158 unsigned int freeq_frag_order;
159 struct gmac_rxdesc *freeq_ring;
160 dma_addr_t freeq_dma_base;
161 struct gmac_queue_page *freeq_pages;
162 unsigned int num_freeq_pages;
163 spinlock_t freeq_lock; /* Locks queue from reentrance */
164 };
165
166 #define GMAC_STATS_NUM ( \
167 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \
168 TX_MAX_FRAGS + 2)
169
170 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = {
171 "GMAC_IN_DISCARDS",
172 "GMAC_IN_ERRORS",
173 "GMAC_IN_MCAST",
174 "GMAC_IN_BCAST",
175 "GMAC_IN_MAC1",
176 "GMAC_IN_MAC2",
177 "RX_STATUS_GOOD_FRAME",
178 "RX_STATUS_TOO_LONG_GOOD_CRC",
179 "RX_STATUS_RUNT_FRAME",
180 "RX_STATUS_SFD_NOT_FOUND",
181 "RX_STATUS_CRC_ERROR",
182 "RX_STATUS_TOO_LONG_BAD_CRC",
183 "RX_STATUS_ALIGNMENT_ERROR",
184 "RX_STATUS_TOO_LONG_BAD_ALIGN",
185 "RX_STATUS_RX_ERR",
186 "RX_STATUS_DA_FILTERED",
187 "RX_STATUS_BUFFER_FULL",
188 "RX_STATUS_11",
189 "RX_STATUS_12",
190 "RX_STATUS_13",
191 "RX_STATUS_14",
192 "RX_STATUS_15",
193 "RX_CHKSUM_IP_UDP_TCP_OK",
194 "RX_CHKSUM_IP_OK_ONLY",
195 "RX_CHKSUM_NONE",
196 "RX_CHKSUM_3",
197 "RX_CHKSUM_IP_ERR_UNKNOWN",
198 "RX_CHKSUM_IP_ERR",
199 "RX_CHKSUM_TCP_UDP_ERR",
200 "RX_CHKSUM_7",
201 "RX_NAPI_EXITS",
202 "TX_FRAGS[1]",
203 "TX_FRAGS[2]",
204 "TX_FRAGS[3]",
205 "TX_FRAGS[4]",
206 "TX_FRAGS[5]",
207 "TX_FRAGS[6]",
208 "TX_FRAGS[7]",
209 "TX_FRAGS[8]",
210 "TX_FRAGS[9]",
211 "TX_FRAGS[10]",
212 "TX_FRAGS[11]",
213 "TX_FRAGS[12]",
214 "TX_FRAGS[13]",
215 "TX_FRAGS[14]",
216 "TX_FRAGS[15]",
217 "TX_FRAGS[16+]",
218 "TX_FRAGS_LINEARIZED",
219 "TX_HW_CSUMMED",
220 };
221
222 static void gmac_dump_dma_state(struct net_device *netdev);
223
gmac_update_config0_reg(struct net_device * netdev,u32 val,u32 vmask)224 static void gmac_update_config0_reg(struct net_device *netdev,
225 u32 val, u32 vmask)
226 {
227 struct gemini_ethernet_port *port = netdev_priv(netdev);
228 unsigned long flags;
229 u32 reg;
230
231 spin_lock_irqsave(&port->config_lock, flags);
232
233 reg = readl(port->gmac_base + GMAC_CONFIG0);
234 reg = (reg & ~vmask) | val;
235 writel(reg, port->gmac_base + GMAC_CONFIG0);
236
237 spin_unlock_irqrestore(&port->config_lock, flags);
238 }
239
gmac_enable_tx_rx(struct net_device * netdev)240 static void gmac_enable_tx_rx(struct net_device *netdev)
241 {
242 struct gemini_ethernet_port *port = netdev_priv(netdev);
243 unsigned long flags;
244 u32 reg;
245
246 spin_lock_irqsave(&port->config_lock, flags);
247
248 reg = readl(port->gmac_base + GMAC_CONFIG0);
249 reg &= ~CONFIG0_TX_RX_DISABLE;
250 writel(reg, port->gmac_base + GMAC_CONFIG0);
251
252 spin_unlock_irqrestore(&port->config_lock, flags);
253 }
254
gmac_disable_tx_rx(struct net_device * netdev)255 static void gmac_disable_tx_rx(struct net_device *netdev)
256 {
257 struct gemini_ethernet_port *port = netdev_priv(netdev);
258 unsigned long flags;
259 u32 val;
260
261 spin_lock_irqsave(&port->config_lock, flags);
262
263 val = readl(port->gmac_base + GMAC_CONFIG0);
264 val |= CONFIG0_TX_RX_DISABLE;
265 writel(val, port->gmac_base + GMAC_CONFIG0);
266
267 spin_unlock_irqrestore(&port->config_lock, flags);
268
269 mdelay(10); /* let GMAC consume packet */
270 }
271
gmac_set_flow_control(struct net_device * netdev,bool tx,bool rx)272 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx)
273 {
274 struct gemini_ethernet_port *port = netdev_priv(netdev);
275 unsigned long flags;
276 u32 val;
277
278 spin_lock_irqsave(&port->config_lock, flags);
279
280 val = readl(port->gmac_base + GMAC_CONFIG0);
281 val &= ~CONFIG0_FLOW_CTL;
282 if (tx)
283 val |= CONFIG0_FLOW_TX;
284 if (rx)
285 val |= CONFIG0_FLOW_RX;
286 writel(val, port->gmac_base + GMAC_CONFIG0);
287
288 spin_unlock_irqrestore(&port->config_lock, flags);
289 }
290
gmac_speed_set(struct net_device * netdev)291 static void gmac_speed_set(struct net_device *netdev)
292 {
293 struct gemini_ethernet_port *port = netdev_priv(netdev);
294 struct phy_device *phydev = netdev->phydev;
295 union gmac_status status, old_status;
296 int pause_tx = 0;
297 int pause_rx = 0;
298
299 status.bits32 = readl(port->gmac_base + GMAC_STATUS);
300 old_status.bits32 = status.bits32;
301 status.bits.link = phydev->link;
302 status.bits.duplex = phydev->duplex;
303
304 switch (phydev->speed) {
305 case 1000:
306 status.bits.speed = GMAC_SPEED_1000;
307 if (phydev->interface == PHY_INTERFACE_MODE_RGMII)
308 status.bits.mii_rmii = GMAC_PHY_RGMII_1000;
309 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n",
310 phydev_name(phydev));
311 break;
312 case 100:
313 status.bits.speed = GMAC_SPEED_100;
314 if (phydev->interface == PHY_INTERFACE_MODE_RGMII)
315 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
316 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n",
317 phydev_name(phydev));
318 break;
319 case 10:
320 status.bits.speed = GMAC_SPEED_10;
321 if (phydev->interface == PHY_INTERFACE_MODE_RGMII)
322 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
323 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n",
324 phydev_name(phydev));
325 break;
326 default:
327 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n",
328 phydev->speed, phydev_name(phydev));
329 }
330
331 if (phydev->duplex == DUPLEX_FULL) {
332 u16 lcladv = phy_read(phydev, MII_ADVERTISE);
333 u16 rmtadv = phy_read(phydev, MII_LPA);
334 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
335
336 if (cap & FLOW_CTRL_RX)
337 pause_rx = 1;
338 if (cap & FLOW_CTRL_TX)
339 pause_tx = 1;
340 }
341
342 gmac_set_flow_control(netdev, pause_tx, pause_rx);
343
344 if (old_status.bits32 == status.bits32)
345 return;
346
347 if (netif_msg_link(port)) {
348 phy_print_status(phydev);
349 netdev_info(netdev, "link flow control: %s\n",
350 phydev->pause
351 ? (phydev->asym_pause ? "tx" : "both")
352 : (phydev->asym_pause ? "rx" : "none")
353 );
354 }
355
356 gmac_disable_tx_rx(netdev);
357 writel(status.bits32, port->gmac_base + GMAC_STATUS);
358 gmac_enable_tx_rx(netdev);
359 }
360
gmac_setup_phy(struct net_device * netdev)361 static int gmac_setup_phy(struct net_device *netdev)
362 {
363 struct gemini_ethernet_port *port = netdev_priv(netdev);
364 union gmac_status status = { .bits32 = 0 };
365 struct device *dev = port->dev;
366 struct phy_device *phy;
367
368 phy = of_phy_get_and_connect(netdev,
369 dev->of_node,
370 gmac_speed_set);
371 if (!phy)
372 return -ENODEV;
373 netdev->phydev = phy;
374
375 phy->supported &= PHY_GBIT_FEATURES;
376 phy->supported |= SUPPORTED_Asym_Pause | SUPPORTED_Pause;
377 phy->advertising = phy->supported;
378
379 /* set PHY interface type */
380 switch (phy->interface) {
381 case PHY_INTERFACE_MODE_MII:
382 netdev_dbg(netdev,
383 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n");
384 status.bits.mii_rmii = GMAC_PHY_MII;
385 break;
386 case PHY_INTERFACE_MODE_GMII:
387 netdev_dbg(netdev,
388 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n");
389 status.bits.mii_rmii = GMAC_PHY_GMII;
390 break;
391 case PHY_INTERFACE_MODE_RGMII:
392 netdev_dbg(netdev,
393 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n");
394 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
395 break;
396 default:
397 netdev_err(netdev, "Unsupported MII interface\n");
398 phy_disconnect(phy);
399 netdev->phydev = NULL;
400 return -EINVAL;
401 }
402 writel(status.bits32, port->gmac_base + GMAC_STATUS);
403
404 if (netif_msg_link(port))
405 phy_attached_info(phy);
406
407 return 0;
408 }
409
410 /* The maximum frame length is not logically enumerated in the
411 * hardware, so we do a table lookup to find the applicable max
412 * frame length.
413 */
414 struct gmac_max_framelen {
415 unsigned int max_l3_len;
416 u8 val;
417 };
418
419 static const struct gmac_max_framelen gmac_maxlens[] = {
420 {
421 .max_l3_len = 1518,
422 .val = CONFIG0_MAXLEN_1518,
423 },
424 {
425 .max_l3_len = 1522,
426 .val = CONFIG0_MAXLEN_1522,
427 },
428 {
429 .max_l3_len = 1536,
430 .val = CONFIG0_MAXLEN_1536,
431 },
432 {
433 .max_l3_len = 1542,
434 .val = CONFIG0_MAXLEN_1542,
435 },
436 {
437 .max_l3_len = 9212,
438 .val = CONFIG0_MAXLEN_9k,
439 },
440 {
441 .max_l3_len = 10236,
442 .val = CONFIG0_MAXLEN_10k,
443 },
444 };
445
gmac_pick_rx_max_len(unsigned int max_l3_len)446 static int gmac_pick_rx_max_len(unsigned int max_l3_len)
447 {
448 const struct gmac_max_framelen *maxlen;
449 int maxtot;
450 int i;
451
452 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN;
453
454 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) {
455 maxlen = &gmac_maxlens[i];
456 if (maxtot <= maxlen->max_l3_len)
457 return maxlen->val;
458 }
459
460 return -1;
461 }
462
gmac_init(struct net_device * netdev)463 static int gmac_init(struct net_device *netdev)
464 {
465 struct gemini_ethernet_port *port = netdev_priv(netdev);
466 union gmac_config0 config0 = { .bits = {
467 .dis_tx = 1,
468 .dis_rx = 1,
469 .ipv4_rx_chksum = 1,
470 .ipv6_rx_chksum = 1,
471 .rx_err_detect = 1,
472 .rgmm_edge = 1,
473 .port0_chk_hwq = 1,
474 .port1_chk_hwq = 1,
475 .port0_chk_toeq = 1,
476 .port1_chk_toeq = 1,
477 .port0_chk_classq = 1,
478 .port1_chk_classq = 1,
479 } };
480 union gmac_ahb_weight ahb_weight = { .bits = {
481 .rx_weight = 1,
482 .tx_weight = 1,
483 .hash_weight = 1,
484 .pre_req = 0x1f,
485 .tq_dv_threshold = 0,
486 } };
487 union gmac_tx_wcr0 hw_weigh = { .bits = {
488 .hw_tq3 = 1,
489 .hw_tq2 = 1,
490 .hw_tq1 = 1,
491 .hw_tq0 = 1,
492 } };
493 union gmac_tx_wcr1 sw_weigh = { .bits = {
494 .sw_tq5 = 1,
495 .sw_tq4 = 1,
496 .sw_tq3 = 1,
497 .sw_tq2 = 1,
498 .sw_tq1 = 1,
499 .sw_tq0 = 1,
500 } };
501 union gmac_config1 config1 = { .bits = {
502 .set_threshold = 16,
503 .rel_threshold = 24,
504 } };
505 union gmac_config2 config2 = { .bits = {
506 .set_threshold = 16,
507 .rel_threshold = 32,
508 } };
509 union gmac_config3 config3 = { .bits = {
510 .set_threshold = 0,
511 .rel_threshold = 0,
512 } };
513 union gmac_config0 tmp;
514 u32 val;
515
516 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu);
517 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
518 config0.bits.reserved = tmp.bits.reserved;
519 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0);
520 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1);
521 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2);
522 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3);
523
524 val = readl(port->dma_base + GMAC_AHB_WEIGHT_REG);
525 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);
526
527 writel(hw_weigh.bits32,
528 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG);
529 writel(sw_weigh.bits32,
530 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG);
531
532 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER;
533 port->txq_order = DEFAULT_GMAC_TXQ_ORDER;
534 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS;
535
536 /* Mark every quarter of the queue a packet for interrupt
537 * in order to be able to wake up the queue if it was stopped
538 */
539 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
540
541 return 0;
542 }
543
gmac_uninit(struct net_device * netdev)544 static void gmac_uninit(struct net_device *netdev)
545 {
546 if (netdev->phydev)
547 phy_disconnect(netdev->phydev);
548 }
549
gmac_setup_txqs(struct net_device * netdev)550 static int gmac_setup_txqs(struct net_device *netdev)
551 {
552 struct gemini_ethernet_port *port = netdev_priv(netdev);
553 unsigned int n_txq = netdev->num_tx_queues;
554 struct gemini_ethernet *geth = port->geth;
555 size_t entries = 1 << port->txq_order;
556 struct gmac_txq *txq = port->txq;
557 struct gmac_txdesc *desc_ring;
558 size_t len = n_txq * entries;
559 struct sk_buff **skb_tab;
560 void __iomem *rwptr_reg;
561 unsigned int r;
562 int i;
563
564 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
565
566 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL);
567 if (!skb_tab)
568 return -ENOMEM;
569
570 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring),
571 &port->txq_dma_base, GFP_KERNEL);
572
573 if (!desc_ring) {
574 kfree(skb_tab);
575 return -ENOMEM;
576 }
577
578 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) {
579 dev_warn(geth->dev, "TX queue base is not aligned\n");
580 dma_free_coherent(geth->dev, len * sizeof(*desc_ring),
581 desc_ring, port->txq_dma_base);
582 kfree(skb_tab);
583 return -ENOMEM;
584 }
585
586 writel(port->txq_dma_base | port->txq_order,
587 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
588
589 for (i = 0; i < n_txq; i++) {
590 txq->ring = desc_ring;
591 txq->skb = skb_tab;
592 txq->noirq_packets = 0;
593
594 r = readw(rwptr_reg);
595 rwptr_reg += 2;
596 writew(r, rwptr_reg);
597 rwptr_reg += 2;
598 txq->cptr = r;
599
600 txq++;
601 desc_ring += entries;
602 skb_tab += entries;
603 }
604
605 return 0;
606 }
607
gmac_clean_txq(struct net_device * netdev,struct gmac_txq * txq,unsigned int r)608 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq,
609 unsigned int r)
610 {
611 struct gemini_ethernet_port *port = netdev_priv(netdev);
612 unsigned int m = (1 << port->txq_order) - 1;
613 struct gemini_ethernet *geth = port->geth;
614 unsigned int c = txq->cptr;
615 union gmac_txdesc_0 word0;
616 union gmac_txdesc_1 word1;
617 unsigned int hwchksum = 0;
618 unsigned long bytes = 0;
619 struct gmac_txdesc *txd;
620 unsigned short nfrags;
621 unsigned int errs = 0;
622 unsigned int pkts = 0;
623 unsigned int word3;
624 dma_addr_t mapping;
625
626 if (c == r)
627 return;
628
629 while (c != r) {
630 txd = txq->ring + c;
631 word0 = txd->word0;
632 word1 = txd->word1;
633 mapping = txd->word2.buf_adr;
634 word3 = txd->word3.bits32;
635
636 dma_unmap_single(geth->dev, mapping,
637 word0.bits.buffer_size, DMA_TO_DEVICE);
638
639 if (word3 & EOF_BIT)
640 dev_kfree_skb(txq->skb[c]);
641
642 c++;
643 c &= m;
644
645 if (!(word3 & SOF_BIT))
646 continue;
647
648 if (!word0.bits.status_tx_ok) {
649 errs++;
650 continue;
651 }
652
653 pkts++;
654 bytes += txd->word1.bits.byte_count;
655
656 if (word1.bits32 & TSS_CHECKUM_ENABLE)
657 hwchksum++;
658
659 nfrags = word0.bits.desc_count - 1;
660 if (nfrags) {
661 if (nfrags >= TX_MAX_FRAGS)
662 nfrags = TX_MAX_FRAGS - 1;
663
664 u64_stats_update_begin(&port->tx_stats_syncp);
665 port->tx_frag_stats[nfrags]++;
666 u64_stats_update_end(&port->tx_stats_syncp);
667 }
668 }
669
670 u64_stats_update_begin(&port->ir_stats_syncp);
671 port->stats.tx_errors += errs;
672 port->stats.tx_packets += pkts;
673 port->stats.tx_bytes += bytes;
674 port->tx_hw_csummed += hwchksum;
675 u64_stats_update_end(&port->ir_stats_syncp);
676
677 txq->cptr = c;
678 }
679
gmac_cleanup_txqs(struct net_device * netdev)680 static void gmac_cleanup_txqs(struct net_device *netdev)
681 {
682 struct gemini_ethernet_port *port = netdev_priv(netdev);
683 unsigned int n_txq = netdev->num_tx_queues;
684 struct gemini_ethernet *geth = port->geth;
685 void __iomem *rwptr_reg;
686 unsigned int r, i;
687
688 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
689
690 for (i = 0; i < n_txq; i++) {
691 r = readw(rwptr_reg);
692 rwptr_reg += 2;
693 writew(r, rwptr_reg);
694 rwptr_reg += 2;
695
696 gmac_clean_txq(netdev, port->txq + i, r);
697 }
698 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
699
700 kfree(port->txq->skb);
701 dma_free_coherent(geth->dev,
702 n_txq * sizeof(*port->txq->ring) << port->txq_order,
703 port->txq->ring, port->txq_dma_base);
704 }
705
gmac_setup_rxq(struct net_device * netdev)706 static int gmac_setup_rxq(struct net_device *netdev)
707 {
708 struct gemini_ethernet_port *port = netdev_priv(netdev);
709 struct gemini_ethernet *geth = port->geth;
710 struct nontoe_qhdr __iomem *qhdr;
711
712 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
713 port->rxq_rwptr = &qhdr->word1;
714
715 /* Remap a slew of memory to use for the RX queue */
716 port->rxq_ring = dma_alloc_coherent(geth->dev,
717 sizeof(*port->rxq_ring) << port->rxq_order,
718 &port->rxq_dma_base, GFP_KERNEL);
719 if (!port->rxq_ring)
720 return -ENOMEM;
721 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) {
722 dev_warn(geth->dev, "RX queue base is not aligned\n");
723 return -ENOMEM;
724 }
725
726 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0);
727 writel(0, port->rxq_rwptr);
728 return 0;
729 }
730
731 static struct gmac_queue_page *
gmac_get_queue_page(struct gemini_ethernet * geth,struct gemini_ethernet_port * port,dma_addr_t addr)732 gmac_get_queue_page(struct gemini_ethernet *geth,
733 struct gemini_ethernet_port *port,
734 dma_addr_t addr)
735 {
736 struct gmac_queue_page *gpage;
737 dma_addr_t mapping;
738 int i;
739
740 /* Only look for even pages */
741 mapping = addr & PAGE_MASK;
742
743 if (!geth->freeq_pages) {
744 dev_err(geth->dev, "try to get page with no page list\n");
745 return NULL;
746 }
747
748 /* Look up a ring buffer page from virtual mapping */
749 for (i = 0; i < geth->num_freeq_pages; i++) {
750 gpage = &geth->freeq_pages[i];
751 if (gpage->mapping == mapping)
752 return gpage;
753 }
754
755 return NULL;
756 }
757
gmac_cleanup_rxq(struct net_device * netdev)758 static void gmac_cleanup_rxq(struct net_device *netdev)
759 {
760 struct gemini_ethernet_port *port = netdev_priv(netdev);
761 struct gemini_ethernet *geth = port->geth;
762 struct gmac_rxdesc *rxd = port->rxq_ring;
763 static struct gmac_queue_page *gpage;
764 struct nontoe_qhdr __iomem *qhdr;
765 void __iomem *dma_reg;
766 void __iomem *ptr_reg;
767 dma_addr_t mapping;
768 union dma_rwptr rw;
769 unsigned int r, w;
770
771 qhdr = geth->base +
772 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
773 dma_reg = &qhdr->word0;
774 ptr_reg = &qhdr->word1;
775
776 rw.bits32 = readl(ptr_reg);
777 r = rw.bits.rptr;
778 w = rw.bits.wptr;
779 writew(r, ptr_reg + 2);
780
781 writel(0, dma_reg);
782
783 /* Loop from read pointer to write pointer of the RX queue
784 * and free up all pages by the queue.
785 */
786 while (r != w) {
787 mapping = rxd[r].word2.buf_adr;
788 r++;
789 r &= ((1 << port->rxq_order) - 1);
790
791 if (!mapping)
792 continue;
793
794 /* Freeq pointers are one page off */
795 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
796 if (!gpage) {
797 dev_err(geth->dev, "could not find page\n");
798 continue;
799 }
800 /* Release the RX queue reference to the page */
801 put_page(gpage->page);
802 }
803
804 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order,
805 port->rxq_ring, port->rxq_dma_base);
806 }
807
geth_freeq_alloc_map_page(struct gemini_ethernet * geth,int pn)808 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth,
809 int pn)
810 {
811 struct gmac_rxdesc *freeq_entry;
812 struct gmac_queue_page *gpage;
813 unsigned int fpp_order;
814 unsigned int frag_len;
815 dma_addr_t mapping;
816 struct page *page;
817 int i;
818
819 /* First allocate and DMA map a single page */
820 page = alloc_page(GFP_ATOMIC);
821 if (!page)
822 return NULL;
823
824 mapping = dma_map_single(geth->dev, page_address(page),
825 PAGE_SIZE, DMA_FROM_DEVICE);
826 if (dma_mapping_error(geth->dev, mapping)) {
827 put_page(page);
828 return NULL;
829 }
830
831 /* The assign the page mapping (physical address) to the buffer address
832 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes,
833 * 4k), and the default RX frag order is 11 (fragments are up 20 2048
834 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus
835 * each page normally needs two entries in the queue.
836 */
837 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */
838 fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
839 freeq_entry = geth->freeq_ring + (pn << fpp_order);
840 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n",
841 pn, frag_len, (1 << fpp_order), freeq_entry);
842 for (i = (1 << fpp_order); i > 0; i--) {
843 freeq_entry->word2.buf_adr = mapping;
844 freeq_entry++;
845 mapping += frag_len;
846 }
847
848 /* If the freeq entry already has a page mapped, then unmap it. */
849 gpage = &geth->freeq_pages[pn];
850 if (gpage->page) {
851 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
852 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
853 /* This should be the last reference to the page so it gets
854 * released
855 */
856 put_page(gpage->page);
857 }
858
859 /* Then put our new mapping into the page table */
860 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n",
861 pn, (unsigned int)mapping, page);
862 gpage->mapping = mapping;
863 gpage->page = page;
864
865 return page;
866 }
867
868 /**
869 * geth_fill_freeq() - Fill the freeq with empty fragments to use
870 * @geth: the ethernet adapter
871 * @refill: whether to reset the queue by filling in all freeq entries or
872 * just refill it, usually the interrupt to refill the queue happens when
873 * the queue is half empty.
874 */
geth_fill_freeq(struct gemini_ethernet * geth,bool refill)875 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill)
876 {
877 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
878 unsigned int count = 0;
879 unsigned int pn, epn;
880 unsigned long flags;
881 union dma_rwptr rw;
882 unsigned int m_pn;
883
884 /* Mask for page */
885 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1;
886
887 spin_lock_irqsave(&geth->freeq_lock, flags);
888
889 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG);
890 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order;
891 epn = (rw.bits.rptr >> fpp_order) - 1;
892 epn &= m_pn;
893
894 /* Loop over the freeq ring buffer entries */
895 while (pn != epn) {
896 struct gmac_queue_page *gpage;
897 struct page *page;
898
899 gpage = &geth->freeq_pages[pn];
900 page = gpage->page;
901
902 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n",
903 pn, page_ref_count(page), 1 << fpp_order);
904
905 if (page_ref_count(page) > 1) {
906 unsigned int fl = (pn - epn) & m_pn;
907
908 if (fl > 64 >> fpp_order)
909 break;
910
911 page = geth_freeq_alloc_map_page(geth, pn);
912 if (!page)
913 break;
914 }
915
916 /* Add one reference per fragment in the page */
917 page_ref_add(page, 1 << fpp_order);
918 count += 1 << fpp_order;
919 pn++;
920 pn &= m_pn;
921 }
922
923 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
924
925 spin_unlock_irqrestore(&geth->freeq_lock, flags);
926
927 return count;
928 }
929
geth_setup_freeq(struct gemini_ethernet * geth)930 static int geth_setup_freeq(struct gemini_ethernet *geth)
931 {
932 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
933 unsigned int frag_len = 1 << geth->freeq_frag_order;
934 unsigned int len = 1 << geth->freeq_order;
935 unsigned int pages = len >> fpp_order;
936 union queue_threshold qt;
937 union dma_skb_size skbsz;
938 unsigned int filled;
939 unsigned int pn;
940
941 geth->freeq_ring = dma_alloc_coherent(geth->dev,
942 sizeof(*geth->freeq_ring) << geth->freeq_order,
943 &geth->freeq_dma_base, GFP_KERNEL);
944 if (!geth->freeq_ring)
945 return -ENOMEM;
946 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) {
947 dev_warn(geth->dev, "queue ring base is not aligned\n");
948 goto err_freeq;
949 }
950
951 /* Allocate a mapping to page look-up index */
952 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages),
953 GFP_KERNEL);
954 if (!geth->freeq_pages)
955 goto err_freeq;
956 geth->num_freeq_pages = pages;
957
958 dev_info(geth->dev, "allocate %d pages for queue\n", pages);
959 for (pn = 0; pn < pages; pn++)
960 if (!geth_freeq_alloc_map_page(geth, pn))
961 goto err_freeq_alloc;
962
963 filled = geth_fill_freeq(geth, false);
964 if (!filled)
965 goto err_freeq_alloc;
966
967 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
968 qt.bits.swfq_empty = 32;
969 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
970
971 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order;
972 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG);
973 writel(geth->freeq_dma_base | geth->freeq_order,
974 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
975
976 return 0;
977
978 err_freeq_alloc:
979 while (pn > 0) {
980 struct gmac_queue_page *gpage;
981 dma_addr_t mapping;
982
983 --pn;
984 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
985 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
986 gpage = &geth->freeq_pages[pn];
987 put_page(gpage->page);
988 }
989
990 kfree(geth->freeq_pages);
991 err_freeq:
992 dma_free_coherent(geth->dev,
993 sizeof(*geth->freeq_ring) << geth->freeq_order,
994 geth->freeq_ring, geth->freeq_dma_base);
995 geth->freeq_ring = NULL;
996 return -ENOMEM;
997 }
998
999 /**
1000 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue
1001 * @geth: the Gemini global ethernet state
1002 */
geth_cleanup_freeq(struct gemini_ethernet * geth)1003 static void geth_cleanup_freeq(struct gemini_ethernet *geth)
1004 {
1005 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
1006 unsigned int frag_len = 1 << geth->freeq_frag_order;
1007 unsigned int len = 1 << geth->freeq_order;
1008 unsigned int pages = len >> fpp_order;
1009 unsigned int pn;
1010
1011 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG),
1012 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
1013 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
1014
1015 for (pn = 0; pn < pages; pn++) {
1016 struct gmac_queue_page *gpage;
1017 dma_addr_t mapping;
1018
1019 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
1020 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
1021
1022 gpage = &geth->freeq_pages[pn];
1023 while (page_ref_count(gpage->page) > 0)
1024 put_page(gpage->page);
1025 }
1026
1027 kfree(geth->freeq_pages);
1028
1029 dma_free_coherent(geth->dev,
1030 sizeof(*geth->freeq_ring) << geth->freeq_order,
1031 geth->freeq_ring, geth->freeq_dma_base);
1032 }
1033
1034 /**
1035 * geth_resize_freeq() - resize the software queue depth
1036 * @port: the port requesting the change
1037 *
1038 * This gets called at least once during probe() so the device queue gets
1039 * "resized" from the hardware defaults. Since both ports/net devices share
1040 * the same hardware queue, some synchronization between the ports is
1041 * needed.
1042 */
geth_resize_freeq(struct gemini_ethernet_port * port)1043 static int geth_resize_freeq(struct gemini_ethernet_port *port)
1044 {
1045 struct gemini_ethernet *geth = port->geth;
1046 struct net_device *netdev = port->netdev;
1047 struct gemini_ethernet_port *other_port;
1048 struct net_device *other_netdev;
1049 unsigned int new_size = 0;
1050 unsigned int new_order;
1051 unsigned long flags;
1052 u32 en;
1053 int ret;
1054
1055 if (netdev->dev_id == 0)
1056 other_netdev = geth->port1->netdev;
1057 else
1058 other_netdev = geth->port0->netdev;
1059
1060 if (other_netdev && netif_running(other_netdev))
1061 return -EBUSY;
1062
1063 new_size = 1 << (port->rxq_order + 1);
1064 netdev_dbg(netdev, "port %d size: %d order %d\n",
1065 netdev->dev_id,
1066 new_size,
1067 port->rxq_order);
1068 if (other_netdev) {
1069 other_port = netdev_priv(other_netdev);
1070 new_size += 1 << (other_port->rxq_order + 1);
1071 netdev_dbg(other_netdev, "port %d size: %d order %d\n",
1072 other_netdev->dev_id,
1073 (1 << (other_port->rxq_order + 1)),
1074 other_port->rxq_order);
1075 }
1076
1077 new_order = min(15, ilog2(new_size - 1) + 1);
1078 dev_dbg(geth->dev, "set shared queue to size %d order %d\n",
1079 new_size, new_order);
1080 if (geth->freeq_order == new_order)
1081 return 0;
1082
1083 spin_lock_irqsave(&geth->irq_lock, flags);
1084
1085 /* Disable the software queue IRQs */
1086 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1087 en &= ~SWFQ_EMPTY_INT_BIT;
1088 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1089 spin_unlock_irqrestore(&geth->irq_lock, flags);
1090
1091 /* Drop the old queue */
1092 if (geth->freeq_ring)
1093 geth_cleanup_freeq(geth);
1094
1095 /* Allocate a new queue with the desired order */
1096 geth->freeq_order = new_order;
1097 ret = geth_setup_freeq(geth);
1098
1099 /* Restart the interrupts - NOTE if this is the first resize
1100 * after probe(), this is where the interrupts get turned on
1101 * in the first place.
1102 */
1103 spin_lock_irqsave(&geth->irq_lock, flags);
1104 en |= SWFQ_EMPTY_INT_BIT;
1105 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1106 spin_unlock_irqrestore(&geth->irq_lock, flags);
1107
1108 return ret;
1109 }
1110
gmac_tx_irq_enable(struct net_device * netdev,unsigned int txq,int en)1111 static void gmac_tx_irq_enable(struct net_device *netdev,
1112 unsigned int txq, int en)
1113 {
1114 struct gemini_ethernet_port *port = netdev_priv(netdev);
1115 struct gemini_ethernet *geth = port->geth;
1116 u32 val, mask;
1117
1118 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id);
1119
1120 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq);
1121
1122 if (en)
1123 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1124
1125 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1126 val = en ? val | mask : val & ~mask;
1127 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1128 }
1129
gmac_tx_irq(struct net_device * netdev,unsigned int txq_num)1130 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num)
1131 {
1132 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num);
1133
1134 gmac_tx_irq_enable(netdev, txq_num, 0);
1135 netif_tx_wake_queue(ntxq);
1136 }
1137
gmac_map_tx_bufs(struct net_device * netdev,struct sk_buff * skb,struct gmac_txq * txq,unsigned short * desc)1138 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,
1139 struct gmac_txq *txq, unsigned short *desc)
1140 {
1141 struct gemini_ethernet_port *port = netdev_priv(netdev);
1142 struct skb_shared_info *skb_si = skb_shinfo(skb);
1143 unsigned short m = (1 << port->txq_order) - 1;
1144 short frag, last_frag = skb_si->nr_frags - 1;
1145 struct gemini_ethernet *geth = port->geth;
1146 unsigned int word1, word3, buflen;
1147 unsigned short w = *desc;
1148 struct gmac_txdesc *txd;
1149 skb_frag_t *skb_frag;
1150 dma_addr_t mapping;
1151 unsigned short mtu;
1152 void *buffer;
1153
1154 mtu = ETH_HLEN;
1155 mtu += netdev->mtu;
1156 if (skb->protocol == htons(ETH_P_8021Q))
1157 mtu += VLAN_HLEN;
1158
1159 word1 = skb->len;
1160 word3 = SOF_BIT;
1161
1162 if (word1 > mtu) {
1163 word1 |= TSS_MTU_ENABLE_BIT;
1164 word3 |= mtu;
1165 }
1166
1167 if (skb->ip_summed != CHECKSUM_NONE) {
1168 int tcp = 0;
1169
1170 if (skb->protocol == htons(ETH_P_IP)) {
1171 word1 |= TSS_IP_CHKSUM_BIT;
1172 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP;
1173 } else { /* IPv6 */
1174 word1 |= TSS_IPV6_ENABLE_BIT;
1175 tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP;
1176 }
1177
1178 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT;
1179 }
1180
1181 frag = -1;
1182 while (frag <= last_frag) {
1183 if (frag == -1) {
1184 buffer = skb->data;
1185 buflen = skb_headlen(skb);
1186 } else {
1187 skb_frag = skb_si->frags + frag;
1188 buffer = page_address(skb_frag_page(skb_frag)) +
1189 skb_frag->page_offset;
1190 buflen = skb_frag->size;
1191 }
1192
1193 if (frag == last_frag) {
1194 word3 |= EOF_BIT;
1195 txq->skb[w] = skb;
1196 }
1197
1198 mapping = dma_map_single(geth->dev, buffer, buflen,
1199 DMA_TO_DEVICE);
1200 if (dma_mapping_error(geth->dev, mapping))
1201 goto map_error;
1202
1203 txd = txq->ring + w;
1204 txd->word0.bits32 = buflen;
1205 txd->word1.bits32 = word1;
1206 txd->word2.buf_adr = mapping;
1207 txd->word3.bits32 = word3;
1208
1209 word3 &= MTU_SIZE_BIT_MASK;
1210 w++;
1211 w &= m;
1212 frag++;
1213 }
1214
1215 *desc = w;
1216 return 0;
1217
1218 map_error:
1219 while (w != *desc) {
1220 w--;
1221 w &= m;
1222
1223 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr,
1224 txq->ring[w].word0.bits.buffer_size,
1225 DMA_TO_DEVICE);
1226 }
1227 return -ENOMEM;
1228 }
1229
gmac_start_xmit(struct sk_buff * skb,struct net_device * netdev)1230 static int gmac_start_xmit(struct sk_buff *skb, struct net_device *netdev)
1231 {
1232 struct gemini_ethernet_port *port = netdev_priv(netdev);
1233 unsigned short m = (1 << port->txq_order) - 1;
1234 struct netdev_queue *ntxq;
1235 unsigned short r, w, d;
1236 void __iomem *ptr_reg;
1237 struct gmac_txq *txq;
1238 int txq_num, nfrags;
1239 union dma_rwptr rw;
1240
1241 SKB_FRAG_ASSERT(skb);
1242
1243 if (skb->len >= 0x10000)
1244 goto out_drop_free;
1245
1246 txq_num = skb_get_queue_mapping(skb);
1247 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num);
1248 txq = &port->txq[txq_num];
1249 ntxq = netdev_get_tx_queue(netdev, txq_num);
1250 nfrags = skb_shinfo(skb)->nr_frags;
1251
1252 rw.bits32 = readl(ptr_reg);
1253 r = rw.bits.rptr;
1254 w = rw.bits.wptr;
1255
1256 d = txq->cptr - w - 1;
1257 d &= m;
1258
1259 if (d < nfrags + 2) {
1260 gmac_clean_txq(netdev, txq, r);
1261 d = txq->cptr - w - 1;
1262 d &= m;
1263
1264 if (d < nfrags + 2) {
1265 netif_tx_stop_queue(ntxq);
1266
1267 d = txq->cptr + nfrags + 16;
1268 d &= m;
1269 txq->ring[d].word3.bits.eofie = 1;
1270 gmac_tx_irq_enable(netdev, txq_num, 1);
1271
1272 u64_stats_update_begin(&port->tx_stats_syncp);
1273 netdev->stats.tx_fifo_errors++;
1274 u64_stats_update_end(&port->tx_stats_syncp);
1275 return NETDEV_TX_BUSY;
1276 }
1277 }
1278
1279 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) {
1280 if (skb_linearize(skb))
1281 goto out_drop;
1282
1283 u64_stats_update_begin(&port->tx_stats_syncp);
1284 port->tx_frags_linearized++;
1285 u64_stats_update_end(&port->tx_stats_syncp);
1286
1287 if (gmac_map_tx_bufs(netdev, skb, txq, &w))
1288 goto out_drop_free;
1289 }
1290
1291 writew(w, ptr_reg + 2);
1292
1293 gmac_clean_txq(netdev, txq, r);
1294 return NETDEV_TX_OK;
1295
1296 out_drop_free:
1297 dev_kfree_skb(skb);
1298 out_drop:
1299 u64_stats_update_begin(&port->tx_stats_syncp);
1300 port->stats.tx_dropped++;
1301 u64_stats_update_end(&port->tx_stats_syncp);
1302 return NETDEV_TX_OK;
1303 }
1304
gmac_tx_timeout(struct net_device * netdev)1305 static void gmac_tx_timeout(struct net_device *netdev)
1306 {
1307 netdev_err(netdev, "Tx timeout\n");
1308 gmac_dump_dma_state(netdev);
1309 }
1310
gmac_enable_irq(struct net_device * netdev,int enable)1311 static void gmac_enable_irq(struct net_device *netdev, int enable)
1312 {
1313 struct gemini_ethernet_port *port = netdev_priv(netdev);
1314 struct gemini_ethernet *geth = port->geth;
1315 unsigned long flags;
1316 u32 val, mask;
1317
1318 netdev_dbg(netdev, "%s device %d %s\n", __func__,
1319 netdev->dev_id, enable ? "enable" : "disable");
1320 spin_lock_irqsave(&geth->irq_lock, flags);
1321
1322 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2);
1323 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1324 val = enable ? (val | mask) : (val & ~mask);
1325 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1326
1327 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1328 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1329 val = enable ? (val | mask) : (val & ~mask);
1330 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1331
1332 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8);
1333 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1334 val = enable ? (val | mask) : (val & ~mask);
1335 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1336
1337 spin_unlock_irqrestore(&geth->irq_lock, flags);
1338 }
1339
gmac_enable_rx_irq(struct net_device * netdev,int enable)1340 static void gmac_enable_rx_irq(struct net_device *netdev, int enable)
1341 {
1342 struct gemini_ethernet_port *port = netdev_priv(netdev);
1343 struct gemini_ethernet *geth = port->geth;
1344 unsigned long flags;
1345 u32 val, mask;
1346
1347 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id,
1348 enable ? "enable" : "disable");
1349 spin_lock_irqsave(&geth->irq_lock, flags);
1350 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1351
1352 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1353 val = enable ? (val | mask) : (val & ~mask);
1354 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1355
1356 spin_unlock_irqrestore(&geth->irq_lock, flags);
1357 }
1358
gmac_skb_if_good_frame(struct gemini_ethernet_port * port,union gmac_rxdesc_0 word0,unsigned int frame_len)1359 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port,
1360 union gmac_rxdesc_0 word0,
1361 unsigned int frame_len)
1362 {
1363 unsigned int rx_csum = word0.bits.chksum_status;
1364 unsigned int rx_status = word0.bits.status;
1365 struct sk_buff *skb = NULL;
1366
1367 port->rx_stats[rx_status]++;
1368 port->rx_csum_stats[rx_csum]++;
1369
1370 if (word0.bits.derr || word0.bits.perr ||
1371 rx_status || frame_len < ETH_ZLEN ||
1372 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) {
1373 port->stats.rx_errors++;
1374
1375 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status))
1376 port->stats.rx_length_errors++;
1377 if (RX_ERROR_OVER(rx_status))
1378 port->stats.rx_over_errors++;
1379 if (RX_ERROR_CRC(rx_status))
1380 port->stats.rx_crc_errors++;
1381 if (RX_ERROR_FRAME(rx_status))
1382 port->stats.rx_frame_errors++;
1383 return NULL;
1384 }
1385
1386 skb = napi_get_frags(&port->napi);
1387 if (!skb)
1388 goto update_exit;
1389
1390 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK)
1391 skb->ip_summed = CHECKSUM_UNNECESSARY;
1392
1393 update_exit:
1394 port->stats.rx_bytes += frame_len;
1395 port->stats.rx_packets++;
1396 return skb;
1397 }
1398
gmac_rx(struct net_device * netdev,unsigned int budget)1399 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget)
1400 {
1401 struct gemini_ethernet_port *port = netdev_priv(netdev);
1402 unsigned short m = (1 << port->rxq_order) - 1;
1403 struct gemini_ethernet *geth = port->geth;
1404 void __iomem *ptr_reg = port->rxq_rwptr;
1405 unsigned int frame_len, frag_len;
1406 struct gmac_rxdesc *rx = NULL;
1407 struct gmac_queue_page *gpage;
1408 static struct sk_buff *skb;
1409 union gmac_rxdesc_0 word0;
1410 union gmac_rxdesc_1 word1;
1411 union gmac_rxdesc_3 word3;
1412 struct page *page = NULL;
1413 unsigned int page_offs;
1414 unsigned short r, w;
1415 union dma_rwptr rw;
1416 dma_addr_t mapping;
1417 int frag_nr = 0;
1418
1419 rw.bits32 = readl(ptr_reg);
1420 /* Reset interrupt as all packages until here are taken into account */
1421 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id,
1422 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1423 r = rw.bits.rptr;
1424 w = rw.bits.wptr;
1425
1426 while (budget && w != r) {
1427 rx = port->rxq_ring + r;
1428 word0 = rx->word0;
1429 word1 = rx->word1;
1430 mapping = rx->word2.buf_adr;
1431 word3 = rx->word3;
1432
1433 r++;
1434 r &= m;
1435
1436 frag_len = word0.bits.buffer_size;
1437 frame_len = word1.bits.byte_count;
1438 page_offs = mapping & ~PAGE_MASK;
1439
1440 if (!mapping) {
1441 netdev_err(netdev,
1442 "rxq[%u]: HW BUG: zero DMA desc\n", r);
1443 goto err_drop;
1444 }
1445
1446 /* Freeq pointers are one page off */
1447 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
1448 if (!gpage) {
1449 dev_err(geth->dev, "could not find mapping\n");
1450 continue;
1451 }
1452 page = gpage->page;
1453
1454 if (word3.bits32 & SOF_BIT) {
1455 if (skb) {
1456 napi_free_frags(&port->napi);
1457 port->stats.rx_dropped++;
1458 }
1459
1460 skb = gmac_skb_if_good_frame(port, word0, frame_len);
1461 if (!skb)
1462 goto err_drop;
1463
1464 page_offs += NET_IP_ALIGN;
1465 frag_len -= NET_IP_ALIGN;
1466 frag_nr = 0;
1467
1468 } else if (!skb) {
1469 put_page(page);
1470 continue;
1471 }
1472
1473 if (word3.bits32 & EOF_BIT)
1474 frag_len = frame_len - skb->len;
1475
1476 /* append page frag to skb */
1477 if (frag_nr == MAX_SKB_FRAGS)
1478 goto err_drop;
1479
1480 if (frag_len == 0)
1481 netdev_err(netdev, "Received fragment with len = 0\n");
1482
1483 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len);
1484 skb->len += frag_len;
1485 skb->data_len += frag_len;
1486 skb->truesize += frag_len;
1487 frag_nr++;
1488
1489 if (word3.bits32 & EOF_BIT) {
1490 napi_gro_frags(&port->napi);
1491 skb = NULL;
1492 --budget;
1493 }
1494 continue;
1495
1496 err_drop:
1497 if (skb) {
1498 napi_free_frags(&port->napi);
1499 skb = NULL;
1500 }
1501
1502 if (mapping)
1503 put_page(page);
1504
1505 port->stats.rx_dropped++;
1506 }
1507
1508 writew(r, ptr_reg);
1509 return budget;
1510 }
1511
gmac_napi_poll(struct napi_struct * napi,int budget)1512 static int gmac_napi_poll(struct napi_struct *napi, int budget)
1513 {
1514 struct gemini_ethernet_port *port = netdev_priv(napi->dev);
1515 struct gemini_ethernet *geth = port->geth;
1516 unsigned int freeq_threshold;
1517 unsigned int received;
1518
1519 freeq_threshold = 1 << (geth->freeq_order - 1);
1520 u64_stats_update_begin(&port->rx_stats_syncp);
1521
1522 received = gmac_rx(napi->dev, budget);
1523 if (received < budget) {
1524 napi_gro_flush(napi, false);
1525 napi_complete_done(napi, received);
1526 gmac_enable_rx_irq(napi->dev, 1);
1527 ++port->rx_napi_exits;
1528 }
1529
1530 port->freeq_refill += (budget - received);
1531 if (port->freeq_refill > freeq_threshold) {
1532 port->freeq_refill -= freeq_threshold;
1533 geth_fill_freeq(geth, true);
1534 }
1535
1536 u64_stats_update_end(&port->rx_stats_syncp);
1537 return received;
1538 }
1539
gmac_dump_dma_state(struct net_device * netdev)1540 static void gmac_dump_dma_state(struct net_device *netdev)
1541 {
1542 struct gemini_ethernet_port *port = netdev_priv(netdev);
1543 struct gemini_ethernet *geth = port->geth;
1544 void __iomem *ptr_reg;
1545 u32 reg[5];
1546
1547 /* Interrupt status */
1548 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1549 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1550 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
1551 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
1552 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1553 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1554 reg[0], reg[1], reg[2], reg[3], reg[4]);
1555
1556 /* Interrupt enable */
1557 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1558 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1559 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
1560 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
1561 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1562 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1563 reg[0], reg[1], reg[2], reg[3], reg[4]);
1564
1565 /* RX DMA status */
1566 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG);
1567 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG);
1568 reg[2] = GET_RPTR(port->rxq_rwptr);
1569 reg[3] = GET_WPTR(port->rxq_rwptr);
1570 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1571 reg[0], reg[1], reg[2], reg[3]);
1572
1573 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG);
1574 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG);
1575 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG);
1576 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG);
1577 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1578 reg[0], reg[1], reg[2], reg[3]);
1579
1580 /* TX DMA status */
1581 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
1582
1583 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG);
1584 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG);
1585 reg[2] = GET_RPTR(ptr_reg);
1586 reg[3] = GET_WPTR(ptr_reg);
1587 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1588 reg[0], reg[1], reg[2], reg[3]);
1589
1590 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG);
1591 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG);
1592 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG);
1593 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG);
1594 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1595 reg[0], reg[1], reg[2], reg[3]);
1596
1597 /* FREE queues status */
1598 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG;
1599
1600 reg[0] = GET_RPTR(ptr_reg);
1601 reg[1] = GET_WPTR(ptr_reg);
1602
1603 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG;
1604
1605 reg[2] = GET_RPTR(ptr_reg);
1606 reg[3] = GET_WPTR(ptr_reg);
1607 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n",
1608 reg[0], reg[1], reg[2], reg[3]);
1609 }
1610
gmac_update_hw_stats(struct net_device * netdev)1611 static void gmac_update_hw_stats(struct net_device *netdev)
1612 {
1613 struct gemini_ethernet_port *port = netdev_priv(netdev);
1614 unsigned int rx_discards, rx_mcast, rx_bcast;
1615 struct gemini_ethernet *geth = port->geth;
1616 unsigned long flags;
1617
1618 spin_lock_irqsave(&geth->irq_lock, flags);
1619 u64_stats_update_begin(&port->ir_stats_syncp);
1620
1621 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS);
1622 port->hw_stats[0] += rx_discards;
1623 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS);
1624 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST);
1625 port->hw_stats[2] += rx_mcast;
1626 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST);
1627 port->hw_stats[3] += rx_bcast;
1628 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1);
1629 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2);
1630
1631 port->stats.rx_missed_errors += rx_discards;
1632 port->stats.multicast += rx_mcast;
1633 port->stats.multicast += rx_bcast;
1634
1635 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8),
1636 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1637
1638 u64_stats_update_end(&port->ir_stats_syncp);
1639 spin_unlock_irqrestore(&geth->irq_lock, flags);
1640 }
1641
1642 /**
1643 * gmac_get_intr_flags() - get interrupt status flags for a port from
1644 * @netdev: the net device for the port to get flags from
1645 * @i: the interrupt status register 0..4
1646 */
gmac_get_intr_flags(struct net_device * netdev,int i)1647 static u32 gmac_get_intr_flags(struct net_device *netdev, int i)
1648 {
1649 struct gemini_ethernet_port *port = netdev_priv(netdev);
1650 struct gemini_ethernet *geth = port->geth;
1651 void __iomem *irqif_reg, *irqen_reg;
1652 unsigned int offs, val;
1653
1654 /* Calculate the offset using the stride of the status registers */
1655 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG -
1656 GLOBAL_INTERRUPT_STATUS_0_REG);
1657
1658 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs;
1659 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs;
1660
1661 val = readl(irqif_reg) & readl(irqen_reg);
1662 return val;
1663 }
1664
gmac_coalesce_delay_expired(struct hrtimer * timer)1665 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer)
1666 {
1667 struct gemini_ethernet_port *port =
1668 container_of(timer, struct gemini_ethernet_port,
1669 rx_coalesce_timer);
1670
1671 napi_schedule(&port->napi);
1672 return HRTIMER_NORESTART;
1673 }
1674
gmac_irq(int irq,void * data)1675 static irqreturn_t gmac_irq(int irq, void *data)
1676 {
1677 struct gemini_ethernet_port *port;
1678 struct net_device *netdev = data;
1679 struct gemini_ethernet *geth;
1680 u32 val, orr = 0;
1681
1682 port = netdev_priv(netdev);
1683 geth = port->geth;
1684
1685 val = gmac_get_intr_flags(netdev, 0);
1686 orr |= val;
1687
1688 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) {
1689 /* Oh, crap */
1690 netdev_err(netdev, "hw failure/sw bug\n");
1691 gmac_dump_dma_state(netdev);
1692
1693 /* don't know how to recover, just reduce losses */
1694 gmac_enable_irq(netdev, 0);
1695 return IRQ_HANDLED;
1696 }
1697
1698 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6)))
1699 gmac_tx_irq(netdev, 0);
1700
1701 val = gmac_get_intr_flags(netdev, 1);
1702 orr |= val;
1703
1704 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) {
1705 gmac_enable_rx_irq(netdev, 0);
1706
1707 if (!port->rx_coalesce_nsecs) {
1708 napi_schedule(&port->napi);
1709 } else {
1710 ktime_t ktime;
1711
1712 ktime = ktime_set(0, port->rx_coalesce_nsecs);
1713 hrtimer_start(&port->rx_coalesce_timer, ktime,
1714 HRTIMER_MODE_REL);
1715 }
1716 }
1717
1718 val = gmac_get_intr_flags(netdev, 4);
1719 orr |= val;
1720
1721 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8)))
1722 gmac_update_hw_stats(netdev);
1723
1724 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) {
1725 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8),
1726 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1727
1728 spin_lock(&geth->irq_lock);
1729 u64_stats_update_begin(&port->ir_stats_syncp);
1730 ++port->stats.rx_fifo_errors;
1731 u64_stats_update_end(&port->ir_stats_syncp);
1732 spin_unlock(&geth->irq_lock);
1733 }
1734
1735 return orr ? IRQ_HANDLED : IRQ_NONE;
1736 }
1737
gmac_start_dma(struct gemini_ethernet_port * port)1738 static void gmac_start_dma(struct gemini_ethernet_port *port)
1739 {
1740 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1741 union gmac_dma_ctrl dma_ctrl;
1742
1743 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1744 dma_ctrl.bits.rd_enable = 1;
1745 dma_ctrl.bits.td_enable = 1;
1746 dma_ctrl.bits.loopback = 0;
1747 dma_ctrl.bits.drop_small_ack = 0;
1748 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN;
1749 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED;
1750 dma_ctrl.bits.rd_burst_size = HBURST_INCR8;
1751 dma_ctrl.bits.rd_bus = HSIZE_8;
1752 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE;
1753 dma_ctrl.bits.td_burst_size = HBURST_INCR8;
1754 dma_ctrl.bits.td_bus = HSIZE_8;
1755
1756 writel(dma_ctrl.bits32, dma_ctrl_reg);
1757 }
1758
gmac_stop_dma(struct gemini_ethernet_port * port)1759 static void gmac_stop_dma(struct gemini_ethernet_port *port)
1760 {
1761 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1762 union gmac_dma_ctrl dma_ctrl;
1763
1764 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1765 dma_ctrl.bits.rd_enable = 0;
1766 dma_ctrl.bits.td_enable = 0;
1767 writel(dma_ctrl.bits32, dma_ctrl_reg);
1768 }
1769
gmac_open(struct net_device * netdev)1770 static int gmac_open(struct net_device *netdev)
1771 {
1772 struct gemini_ethernet_port *port = netdev_priv(netdev);
1773 int err;
1774
1775 if (!netdev->phydev) {
1776 err = gmac_setup_phy(netdev);
1777 if (err) {
1778 netif_err(port, ifup, netdev,
1779 "PHY init failed: %d\n", err);
1780 return err;
1781 }
1782 }
1783
1784 err = request_irq(netdev->irq, gmac_irq,
1785 IRQF_SHARED, netdev->name, netdev);
1786 if (err) {
1787 netdev_err(netdev, "no IRQ\n");
1788 return err;
1789 }
1790
1791 netif_carrier_off(netdev);
1792 phy_start(netdev->phydev);
1793
1794 err = geth_resize_freeq(port);
1795 /* It's fine if it's just busy, the other port has set up
1796 * the freeq in that case.
1797 */
1798 if (err && (err != -EBUSY)) {
1799 netdev_err(netdev, "could not resize freeq\n");
1800 goto err_stop_phy;
1801 }
1802
1803 err = gmac_setup_rxq(netdev);
1804 if (err) {
1805 netdev_err(netdev, "could not setup RXQ\n");
1806 goto err_stop_phy;
1807 }
1808
1809 err = gmac_setup_txqs(netdev);
1810 if (err) {
1811 netdev_err(netdev, "could not setup TXQs\n");
1812 gmac_cleanup_rxq(netdev);
1813 goto err_stop_phy;
1814 }
1815
1816 napi_enable(&port->napi);
1817
1818 gmac_start_dma(port);
1819 gmac_enable_irq(netdev, 1);
1820 gmac_enable_tx_rx(netdev);
1821 netif_tx_start_all_queues(netdev);
1822
1823 hrtimer_init(&port->rx_coalesce_timer, CLOCK_MONOTONIC,
1824 HRTIMER_MODE_REL);
1825 port->rx_coalesce_timer.function = &gmac_coalesce_delay_expired;
1826
1827 netdev_dbg(netdev, "opened\n");
1828
1829 return 0;
1830
1831 err_stop_phy:
1832 phy_stop(netdev->phydev);
1833 free_irq(netdev->irq, netdev);
1834 return err;
1835 }
1836
gmac_stop(struct net_device * netdev)1837 static int gmac_stop(struct net_device *netdev)
1838 {
1839 struct gemini_ethernet_port *port = netdev_priv(netdev);
1840
1841 hrtimer_cancel(&port->rx_coalesce_timer);
1842 netif_tx_stop_all_queues(netdev);
1843 gmac_disable_tx_rx(netdev);
1844 gmac_stop_dma(port);
1845 napi_disable(&port->napi);
1846
1847 gmac_enable_irq(netdev, 0);
1848 gmac_cleanup_rxq(netdev);
1849 gmac_cleanup_txqs(netdev);
1850
1851 phy_stop(netdev->phydev);
1852 free_irq(netdev->irq, netdev);
1853
1854 gmac_update_hw_stats(netdev);
1855 return 0;
1856 }
1857
gmac_set_rx_mode(struct net_device * netdev)1858 static void gmac_set_rx_mode(struct net_device *netdev)
1859 {
1860 struct gemini_ethernet_port *port = netdev_priv(netdev);
1861 union gmac_rx_fltr filter = { .bits = {
1862 .broadcast = 1,
1863 .multicast = 1,
1864 .unicast = 1,
1865 } };
1866 struct netdev_hw_addr *ha;
1867 unsigned int bit_nr;
1868 u32 mc_filter[2];
1869
1870 mc_filter[1] = 0;
1871 mc_filter[0] = 0;
1872
1873 if (netdev->flags & IFF_PROMISC) {
1874 filter.bits.error = 1;
1875 filter.bits.promiscuous = 1;
1876 mc_filter[1] = ~0;
1877 mc_filter[0] = ~0;
1878 } else if (netdev->flags & IFF_ALLMULTI) {
1879 mc_filter[1] = ~0;
1880 mc_filter[0] = ~0;
1881 } else {
1882 netdev_for_each_mc_addr(ha, netdev) {
1883 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f;
1884 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f);
1885 }
1886 }
1887
1888 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0);
1889 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1);
1890 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR);
1891 }
1892
gmac_write_mac_address(struct net_device * netdev)1893 static void gmac_write_mac_address(struct net_device *netdev)
1894 {
1895 struct gemini_ethernet_port *port = netdev_priv(netdev);
1896 __le32 addr[3];
1897
1898 memset(addr, 0, sizeof(addr));
1899 memcpy(addr, netdev->dev_addr, ETH_ALEN);
1900
1901 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0);
1902 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1);
1903 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2);
1904 }
1905
gmac_set_mac_address(struct net_device * netdev,void * addr)1906 static int gmac_set_mac_address(struct net_device *netdev, void *addr)
1907 {
1908 struct sockaddr *sa = addr;
1909
1910 memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN);
1911 gmac_write_mac_address(netdev);
1912
1913 return 0;
1914 }
1915
gmac_clear_hw_stats(struct net_device * netdev)1916 static void gmac_clear_hw_stats(struct net_device *netdev)
1917 {
1918 struct gemini_ethernet_port *port = netdev_priv(netdev);
1919
1920 readl(port->gmac_base + GMAC_IN_DISCARDS);
1921 readl(port->gmac_base + GMAC_IN_ERRORS);
1922 readl(port->gmac_base + GMAC_IN_MCAST);
1923 readl(port->gmac_base + GMAC_IN_BCAST);
1924 readl(port->gmac_base + GMAC_IN_MAC1);
1925 readl(port->gmac_base + GMAC_IN_MAC2);
1926 }
1927
gmac_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)1928 static void gmac_get_stats64(struct net_device *netdev,
1929 struct rtnl_link_stats64 *stats)
1930 {
1931 struct gemini_ethernet_port *port = netdev_priv(netdev);
1932 unsigned int start;
1933
1934 gmac_update_hw_stats(netdev);
1935
1936 /* Racing with RX NAPI */
1937 do {
1938 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
1939
1940 stats->rx_packets = port->stats.rx_packets;
1941 stats->rx_bytes = port->stats.rx_bytes;
1942 stats->rx_errors = port->stats.rx_errors;
1943 stats->rx_dropped = port->stats.rx_dropped;
1944
1945 stats->rx_length_errors = port->stats.rx_length_errors;
1946 stats->rx_over_errors = port->stats.rx_over_errors;
1947 stats->rx_crc_errors = port->stats.rx_crc_errors;
1948 stats->rx_frame_errors = port->stats.rx_frame_errors;
1949
1950 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
1951
1952 /* Racing with MIB and TX completion interrupts */
1953 do {
1954 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
1955
1956 stats->tx_errors = port->stats.tx_errors;
1957 stats->tx_packets = port->stats.tx_packets;
1958 stats->tx_bytes = port->stats.tx_bytes;
1959
1960 stats->multicast = port->stats.multicast;
1961 stats->rx_missed_errors = port->stats.rx_missed_errors;
1962 stats->rx_fifo_errors = port->stats.rx_fifo_errors;
1963
1964 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
1965
1966 /* Racing with hard_start_xmit */
1967 do {
1968 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
1969
1970 stats->tx_dropped = port->stats.tx_dropped;
1971
1972 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
1973
1974 stats->rx_dropped += stats->rx_missed_errors;
1975 }
1976
gmac_change_mtu(struct net_device * netdev,int new_mtu)1977 static int gmac_change_mtu(struct net_device *netdev, int new_mtu)
1978 {
1979 int max_len = gmac_pick_rx_max_len(new_mtu);
1980
1981 if (max_len < 0)
1982 return -EINVAL;
1983
1984 gmac_disable_tx_rx(netdev);
1985
1986 netdev->mtu = new_mtu;
1987 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT,
1988 CONFIG0_MAXLEN_MASK);
1989
1990 netdev_update_features(netdev);
1991
1992 gmac_enable_tx_rx(netdev);
1993
1994 return 0;
1995 }
1996
gmac_fix_features(struct net_device * netdev,netdev_features_t features)1997 static netdev_features_t gmac_fix_features(struct net_device *netdev,
1998 netdev_features_t features)
1999 {
2000 if (netdev->mtu + ETH_HLEN + VLAN_HLEN > MTU_SIZE_BIT_MASK)
2001 features &= ~GMAC_OFFLOAD_FEATURES;
2002
2003 return features;
2004 }
2005
gmac_set_features(struct net_device * netdev,netdev_features_t features)2006 static int gmac_set_features(struct net_device *netdev,
2007 netdev_features_t features)
2008 {
2009 struct gemini_ethernet_port *port = netdev_priv(netdev);
2010 int enable = features & NETIF_F_RXCSUM;
2011 unsigned long flags;
2012 u32 reg;
2013
2014 spin_lock_irqsave(&port->config_lock, flags);
2015
2016 reg = readl(port->gmac_base + GMAC_CONFIG0);
2017 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM;
2018 writel(reg, port->gmac_base + GMAC_CONFIG0);
2019
2020 spin_unlock_irqrestore(&port->config_lock, flags);
2021 return 0;
2022 }
2023
gmac_get_sset_count(struct net_device * netdev,int sset)2024 static int gmac_get_sset_count(struct net_device *netdev, int sset)
2025 {
2026 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0;
2027 }
2028
gmac_get_strings(struct net_device * netdev,u32 stringset,u8 * data)2029 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2030 {
2031 if (stringset != ETH_SS_STATS)
2032 return;
2033
2034 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings));
2035 }
2036
gmac_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * estats,u64 * values)2037 static void gmac_get_ethtool_stats(struct net_device *netdev,
2038 struct ethtool_stats *estats, u64 *values)
2039 {
2040 struct gemini_ethernet_port *port = netdev_priv(netdev);
2041 unsigned int start;
2042 u64 *p;
2043 int i;
2044
2045 gmac_update_hw_stats(netdev);
2046
2047 /* Racing with MIB interrupt */
2048 do {
2049 p = values;
2050 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
2051
2052 for (i = 0; i < RX_STATS_NUM; i++)
2053 *p++ = port->hw_stats[i];
2054
2055 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
2056 values = p;
2057
2058 /* Racing with RX NAPI */
2059 do {
2060 p = values;
2061 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
2062
2063 for (i = 0; i < RX_STATUS_NUM; i++)
2064 *p++ = port->rx_stats[i];
2065 for (i = 0; i < RX_CHKSUM_NUM; i++)
2066 *p++ = port->rx_csum_stats[i];
2067 *p++ = port->rx_napi_exits;
2068
2069 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
2070 values = p;
2071
2072 /* Racing with TX start_xmit */
2073 do {
2074 p = values;
2075 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
2076
2077 for (i = 0; i < TX_MAX_FRAGS; i++) {
2078 *values++ = port->tx_frag_stats[i];
2079 port->tx_frag_stats[i] = 0;
2080 }
2081 *values++ = port->tx_frags_linearized;
2082 *values++ = port->tx_hw_csummed;
2083
2084 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
2085 }
2086
gmac_get_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)2087 static int gmac_get_ksettings(struct net_device *netdev,
2088 struct ethtool_link_ksettings *cmd)
2089 {
2090 if (!netdev->phydev)
2091 return -ENXIO;
2092 phy_ethtool_ksettings_get(netdev->phydev, cmd);
2093
2094 return 0;
2095 }
2096
gmac_set_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)2097 static int gmac_set_ksettings(struct net_device *netdev,
2098 const struct ethtool_link_ksettings *cmd)
2099 {
2100 if (!netdev->phydev)
2101 return -ENXIO;
2102 return phy_ethtool_ksettings_set(netdev->phydev, cmd);
2103 }
2104
gmac_nway_reset(struct net_device * netdev)2105 static int gmac_nway_reset(struct net_device *netdev)
2106 {
2107 if (!netdev->phydev)
2108 return -ENXIO;
2109 return phy_start_aneg(netdev->phydev);
2110 }
2111
gmac_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pparam)2112 static void gmac_get_pauseparam(struct net_device *netdev,
2113 struct ethtool_pauseparam *pparam)
2114 {
2115 struct gemini_ethernet_port *port = netdev_priv(netdev);
2116 union gmac_config0 config0;
2117
2118 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
2119
2120 pparam->rx_pause = config0.bits.rx_fc_en;
2121 pparam->tx_pause = config0.bits.tx_fc_en;
2122 pparam->autoneg = true;
2123 }
2124
gmac_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * rp)2125 static void gmac_get_ringparam(struct net_device *netdev,
2126 struct ethtool_ringparam *rp)
2127 {
2128 struct gemini_ethernet_port *port = netdev_priv(netdev);
2129 union gmac_config0 config0;
2130
2131 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
2132
2133 rp->rx_max_pending = 1 << 15;
2134 rp->rx_mini_max_pending = 0;
2135 rp->rx_jumbo_max_pending = 0;
2136 rp->tx_max_pending = 1 << 15;
2137
2138 rp->rx_pending = 1 << port->rxq_order;
2139 rp->rx_mini_pending = 0;
2140 rp->rx_jumbo_pending = 0;
2141 rp->tx_pending = 1 << port->txq_order;
2142 }
2143
gmac_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * rp)2144 static int gmac_set_ringparam(struct net_device *netdev,
2145 struct ethtool_ringparam *rp)
2146 {
2147 struct gemini_ethernet_port *port = netdev_priv(netdev);
2148 int err = 0;
2149
2150 if (netif_running(netdev))
2151 return -EBUSY;
2152
2153 if (rp->rx_pending) {
2154 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1);
2155 err = geth_resize_freeq(port);
2156 }
2157 if (rp->tx_pending) {
2158 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1);
2159 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
2160 }
2161
2162 return err;
2163 }
2164
gmac_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ecmd)2165 static int gmac_get_coalesce(struct net_device *netdev,
2166 struct ethtool_coalesce *ecmd)
2167 {
2168 struct gemini_ethernet_port *port = netdev_priv(netdev);
2169
2170 ecmd->rx_max_coalesced_frames = 1;
2171 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets;
2172 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000;
2173
2174 return 0;
2175 }
2176
gmac_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ecmd)2177 static int gmac_set_coalesce(struct net_device *netdev,
2178 struct ethtool_coalesce *ecmd)
2179 {
2180 struct gemini_ethernet_port *port = netdev_priv(netdev);
2181
2182 if (ecmd->tx_max_coalesced_frames < 1)
2183 return -EINVAL;
2184 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order)
2185 return -EINVAL;
2186
2187 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames;
2188 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000;
2189
2190 return 0;
2191 }
2192
gmac_get_msglevel(struct net_device * netdev)2193 static u32 gmac_get_msglevel(struct net_device *netdev)
2194 {
2195 struct gemini_ethernet_port *port = netdev_priv(netdev);
2196
2197 return port->msg_enable;
2198 }
2199
gmac_set_msglevel(struct net_device * netdev,u32 level)2200 static void gmac_set_msglevel(struct net_device *netdev, u32 level)
2201 {
2202 struct gemini_ethernet_port *port = netdev_priv(netdev);
2203
2204 port->msg_enable = level;
2205 }
2206
gmac_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)2207 static void gmac_get_drvinfo(struct net_device *netdev,
2208 struct ethtool_drvinfo *info)
2209 {
2210 strcpy(info->driver, DRV_NAME);
2211 strcpy(info->version, DRV_VERSION);
2212 strcpy(info->bus_info, netdev->dev_id ? "1" : "0");
2213 }
2214
2215 static const struct net_device_ops gmac_351x_ops = {
2216 .ndo_init = gmac_init,
2217 .ndo_uninit = gmac_uninit,
2218 .ndo_open = gmac_open,
2219 .ndo_stop = gmac_stop,
2220 .ndo_start_xmit = gmac_start_xmit,
2221 .ndo_tx_timeout = gmac_tx_timeout,
2222 .ndo_set_rx_mode = gmac_set_rx_mode,
2223 .ndo_set_mac_address = gmac_set_mac_address,
2224 .ndo_get_stats64 = gmac_get_stats64,
2225 .ndo_change_mtu = gmac_change_mtu,
2226 .ndo_fix_features = gmac_fix_features,
2227 .ndo_set_features = gmac_set_features,
2228 };
2229
2230 static const struct ethtool_ops gmac_351x_ethtool_ops = {
2231 .get_sset_count = gmac_get_sset_count,
2232 .get_strings = gmac_get_strings,
2233 .get_ethtool_stats = gmac_get_ethtool_stats,
2234 .get_link = ethtool_op_get_link,
2235 .get_link_ksettings = gmac_get_ksettings,
2236 .set_link_ksettings = gmac_set_ksettings,
2237 .nway_reset = gmac_nway_reset,
2238 .get_pauseparam = gmac_get_pauseparam,
2239 .get_ringparam = gmac_get_ringparam,
2240 .set_ringparam = gmac_set_ringparam,
2241 .get_coalesce = gmac_get_coalesce,
2242 .set_coalesce = gmac_set_coalesce,
2243 .get_msglevel = gmac_get_msglevel,
2244 .set_msglevel = gmac_set_msglevel,
2245 .get_drvinfo = gmac_get_drvinfo,
2246 };
2247
gemini_port_irq_thread(int irq,void * data)2248 static irqreturn_t gemini_port_irq_thread(int irq, void *data)
2249 {
2250 unsigned long irqmask = SWFQ_EMPTY_INT_BIT;
2251 struct gemini_ethernet_port *port = data;
2252 struct gemini_ethernet *geth;
2253 unsigned long flags;
2254
2255 geth = port->geth;
2256 /* The queue is half empty so refill it */
2257 geth_fill_freeq(geth, true);
2258
2259 spin_lock_irqsave(&geth->irq_lock, flags);
2260 /* ACK queue interrupt */
2261 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2262 /* Enable queue interrupt again */
2263 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2264 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2265 spin_unlock_irqrestore(&geth->irq_lock, flags);
2266
2267 return IRQ_HANDLED;
2268 }
2269
gemini_port_irq(int irq,void * data)2270 static irqreturn_t gemini_port_irq(int irq, void *data)
2271 {
2272 struct gemini_ethernet_port *port = data;
2273 struct gemini_ethernet *geth;
2274 irqreturn_t ret = IRQ_NONE;
2275 u32 val, en;
2276
2277 geth = port->geth;
2278 spin_lock(&geth->irq_lock);
2279
2280 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2281 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2282
2283 if (val & en & SWFQ_EMPTY_INT_BIT) {
2284 /* Disable the queue empty interrupt while we work on
2285 * processing the queue. Also disable overrun interrupts
2286 * as there is not much we can do about it here.
2287 */
2288 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT
2289 | GMAC1_RX_OVERRUN_INT_BIT);
2290 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2291 ret = IRQ_WAKE_THREAD;
2292 }
2293
2294 spin_unlock(&geth->irq_lock);
2295
2296 return ret;
2297 }
2298
gemini_port_remove(struct gemini_ethernet_port * port)2299 static void gemini_port_remove(struct gemini_ethernet_port *port)
2300 {
2301 if (port->netdev)
2302 unregister_netdev(port->netdev);
2303 clk_disable_unprepare(port->pclk);
2304 geth_cleanup_freeq(port->geth);
2305 }
2306
gemini_ethernet_init(struct gemini_ethernet * geth)2307 static void gemini_ethernet_init(struct gemini_ethernet *geth)
2308 {
2309 /* Only do this once both ports are online */
2310 if (geth->initialized)
2311 return;
2312 if (geth->port0 && geth->port1)
2313 geth->initialized = true;
2314 else
2315 return;
2316
2317 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
2318 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
2319 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
2320 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
2321 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2322
2323 /* Interrupt config:
2324 *
2325 * GMAC0 intr bits ------> int0 ----> eth0
2326 * GMAC1 intr bits ------> int1 ----> eth1
2327 * TOE intr -------------> int1 ----> eth1
2328 * Classification Intr --> int0 ----> eth0
2329 * Default Q0 -----------> int0 ----> eth0
2330 * Default Q1 -----------> int1 ----> eth1
2331 * FreeQ intr -----------> int1 ----> eth1
2332 */
2333 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG);
2334 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG);
2335 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG);
2336 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG);
2337 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG);
2338
2339 /* edge-triggered interrupts packed to level-triggered one... */
2340 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
2341 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
2342 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
2343 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
2344 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2345
2346 /* Set up queue */
2347 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
2348 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG);
2349 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG);
2350 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG);
2351
2352 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER;
2353 /* This makes the queue resize on probe() so that we
2354 * set up and enable the queue IRQ. FIXME: fragile.
2355 */
2356 geth->freeq_order = 1;
2357 }
2358
gemini_port_save_mac_addr(struct gemini_ethernet_port * port)2359 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port)
2360 {
2361 port->mac_addr[0] =
2362 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0));
2363 port->mac_addr[1] =
2364 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1));
2365 port->mac_addr[2] =
2366 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2));
2367 }
2368
gemini_ethernet_port_probe(struct platform_device * pdev)2369 static int gemini_ethernet_port_probe(struct platform_device *pdev)
2370 {
2371 char *port_names[2] = { "ethernet0", "ethernet1" };
2372 struct gemini_ethernet_port *port;
2373 struct device *dev = &pdev->dev;
2374 struct gemini_ethernet *geth;
2375 struct net_device *netdev;
2376 struct resource *gmacres;
2377 struct resource *dmares;
2378 struct device *parent;
2379 unsigned int id;
2380 int irq;
2381 int ret;
2382
2383 parent = dev->parent;
2384 geth = dev_get_drvdata(parent);
2385
2386 if (!strcmp(dev_name(dev), "60008000.ethernet-port"))
2387 id = 0;
2388 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port"))
2389 id = 1;
2390 else
2391 return -ENODEV;
2392
2393 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id);
2394
2395 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM);
2396 if (!netdev) {
2397 dev_err(dev, "Can't allocate ethernet device #%d\n", id);
2398 return -ENOMEM;
2399 }
2400
2401 port = netdev_priv(netdev);
2402 SET_NETDEV_DEV(netdev, dev);
2403 port->netdev = netdev;
2404 port->id = id;
2405 port->geth = geth;
2406 port->dev = dev;
2407 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2408
2409 /* DMA memory */
2410 dmares = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2411 if (!dmares) {
2412 dev_err(dev, "no DMA resource\n");
2413 return -ENODEV;
2414 }
2415 port->dma_base = devm_ioremap_resource(dev, dmares);
2416 if (IS_ERR(port->dma_base))
2417 return PTR_ERR(port->dma_base);
2418
2419 /* GMAC config memory */
2420 gmacres = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2421 if (!gmacres) {
2422 dev_err(dev, "no GMAC resource\n");
2423 return -ENODEV;
2424 }
2425 port->gmac_base = devm_ioremap_resource(dev, gmacres);
2426 if (IS_ERR(port->gmac_base))
2427 return PTR_ERR(port->gmac_base);
2428
2429 /* Interrupt */
2430 irq = platform_get_irq(pdev, 0);
2431 if (irq <= 0) {
2432 dev_err(dev, "no IRQ\n");
2433 return irq ? irq : -ENODEV;
2434 }
2435 port->irq = irq;
2436
2437 /* Clock the port */
2438 port->pclk = devm_clk_get(dev, "PCLK");
2439 if (IS_ERR(port->pclk)) {
2440 dev_err(dev, "no PCLK\n");
2441 return PTR_ERR(port->pclk);
2442 }
2443 ret = clk_prepare_enable(port->pclk);
2444 if (ret)
2445 return ret;
2446
2447 /* Maybe there is a nice ethernet address we should use */
2448 gemini_port_save_mac_addr(port);
2449
2450 /* Reset the port */
2451 port->reset = devm_reset_control_get_exclusive(dev, NULL);
2452 if (IS_ERR(port->reset)) {
2453 dev_err(dev, "no reset\n");
2454 ret = PTR_ERR(port->reset);
2455 goto unprepare;
2456 }
2457 reset_control_reset(port->reset);
2458 usleep_range(100, 500);
2459
2460 /* Assign pointer in the main state container */
2461 if (!id)
2462 geth->port0 = port;
2463 else
2464 geth->port1 = port;
2465
2466 /* This will just be done once both ports are up and reset */
2467 gemini_ethernet_init(geth);
2468
2469 platform_set_drvdata(pdev, port);
2470
2471 /* Set up and register the netdev */
2472 netdev->dev_id = port->id;
2473 netdev->irq = irq;
2474 netdev->netdev_ops = &gmac_351x_ops;
2475 netdev->ethtool_ops = &gmac_351x_ethtool_ops;
2476
2477 spin_lock_init(&port->config_lock);
2478 gmac_clear_hw_stats(netdev);
2479
2480 netdev->hw_features = GMAC_OFFLOAD_FEATURES;
2481 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO;
2482 /* We can handle jumbo frames up to 10236 bytes so, let's accept
2483 * payloads of 10236 bytes minus VLAN and ethernet header
2484 */
2485 netdev->min_mtu = ETH_MIN_MTU;
2486 netdev->max_mtu = 10236 - VLAN_ETH_HLEN;
2487
2488 port->freeq_refill = 0;
2489 netif_napi_add(netdev, &port->napi, gmac_napi_poll,
2490 DEFAULT_NAPI_WEIGHT);
2491
2492 if (is_valid_ether_addr((void *)port->mac_addr)) {
2493 memcpy(netdev->dev_addr, port->mac_addr, ETH_ALEN);
2494 } else {
2495 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n",
2496 port->mac_addr[0], port->mac_addr[1],
2497 port->mac_addr[2]);
2498 dev_info(dev, "using a random ethernet address\n");
2499 eth_random_addr(netdev->dev_addr);
2500 }
2501 gmac_write_mac_address(netdev);
2502
2503 ret = devm_request_threaded_irq(port->dev,
2504 port->irq,
2505 gemini_port_irq,
2506 gemini_port_irq_thread,
2507 IRQF_SHARED,
2508 port_names[port->id],
2509 port);
2510 if (ret)
2511 goto unprepare;
2512
2513 ret = register_netdev(netdev);
2514 if (ret)
2515 goto unprepare;
2516
2517 netdev_info(netdev,
2518 "irq %d, DMA @ 0x%pap, GMAC @ 0x%pap\n",
2519 port->irq, &dmares->start,
2520 &gmacres->start);
2521 ret = gmac_setup_phy(netdev);
2522 if (ret)
2523 netdev_info(netdev,
2524 "PHY init failed, deferring to ifup time\n");
2525 return 0;
2526
2527 unprepare:
2528 clk_disable_unprepare(port->pclk);
2529 return ret;
2530 }
2531
gemini_ethernet_port_remove(struct platform_device * pdev)2532 static int gemini_ethernet_port_remove(struct platform_device *pdev)
2533 {
2534 struct gemini_ethernet_port *port = platform_get_drvdata(pdev);
2535
2536 gemini_port_remove(port);
2537 return 0;
2538 }
2539
2540 static const struct of_device_id gemini_ethernet_port_of_match[] = {
2541 {
2542 .compatible = "cortina,gemini-ethernet-port",
2543 },
2544 {},
2545 };
2546 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match);
2547
2548 static struct platform_driver gemini_ethernet_port_driver = {
2549 .driver = {
2550 .name = "gemini-ethernet-port",
2551 .of_match_table = of_match_ptr(gemini_ethernet_port_of_match),
2552 },
2553 .probe = gemini_ethernet_port_probe,
2554 .remove = gemini_ethernet_port_remove,
2555 };
2556
gemini_ethernet_probe(struct platform_device * pdev)2557 static int gemini_ethernet_probe(struct platform_device *pdev)
2558 {
2559 struct device *dev = &pdev->dev;
2560 struct gemini_ethernet *geth;
2561 unsigned int retry = 5;
2562 struct resource *res;
2563 u32 val;
2564
2565 /* Global registers */
2566 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL);
2567 if (!geth)
2568 return -ENOMEM;
2569 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2570 if (!res)
2571 return -ENODEV;
2572 geth->base = devm_ioremap_resource(dev, res);
2573 if (IS_ERR(geth->base))
2574 return PTR_ERR(geth->base);
2575 geth->dev = dev;
2576
2577 /* Wait for ports to stabilize */
2578 do {
2579 udelay(2);
2580 val = readl(geth->base + GLOBAL_TOE_VERSION_REG);
2581 barrier();
2582 } while (!val && --retry);
2583 if (!retry) {
2584 dev_err(dev, "failed to reset ethernet\n");
2585 return -EIO;
2586 }
2587 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n",
2588 (val >> 4) & 0xFFFU, val & 0xFU);
2589
2590 spin_lock_init(&geth->irq_lock);
2591 spin_lock_init(&geth->freeq_lock);
2592
2593 /* The children will use this */
2594 platform_set_drvdata(pdev, geth);
2595
2596 /* Spawn child devices for the two ports */
2597 return devm_of_platform_populate(dev);
2598 }
2599
gemini_ethernet_remove(struct platform_device * pdev)2600 static int gemini_ethernet_remove(struct platform_device *pdev)
2601 {
2602 struct gemini_ethernet *geth = platform_get_drvdata(pdev);
2603
2604 geth_cleanup_freeq(geth);
2605 geth->initialized = false;
2606
2607 return 0;
2608 }
2609
2610 static const struct of_device_id gemini_ethernet_of_match[] = {
2611 {
2612 .compatible = "cortina,gemini-ethernet",
2613 },
2614 {},
2615 };
2616 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match);
2617
2618 static struct platform_driver gemini_ethernet_driver = {
2619 .driver = {
2620 .name = DRV_NAME,
2621 .of_match_table = of_match_ptr(gemini_ethernet_of_match),
2622 },
2623 .probe = gemini_ethernet_probe,
2624 .remove = gemini_ethernet_remove,
2625 };
2626
gemini_ethernet_module_init(void)2627 static int __init gemini_ethernet_module_init(void)
2628 {
2629 int ret;
2630
2631 ret = platform_driver_register(&gemini_ethernet_port_driver);
2632 if (ret)
2633 return ret;
2634
2635 ret = platform_driver_register(&gemini_ethernet_driver);
2636 if (ret) {
2637 platform_driver_unregister(&gemini_ethernet_port_driver);
2638 return ret;
2639 }
2640
2641 return 0;
2642 }
2643 module_init(gemini_ethernet_module_init);
2644
gemini_ethernet_module_exit(void)2645 static void __exit gemini_ethernet_module_exit(void)
2646 {
2647 platform_driver_unregister(&gemini_ethernet_driver);
2648 platform_driver_unregister(&gemini_ethernet_port_driver);
2649 }
2650 module_exit(gemini_ethernet_module_exit);
2651
2652 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
2653 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver");
2654 MODULE_LICENSE("GPL");
2655 MODULE_ALIAS("platform:" DRV_NAME);
2656