1 /*
2 * Allwinner sun4i USB phy driver
3 *
4 * Copyright (C) 2014-2015 Hans de Goede <hdegoede@redhat.com>
5 *
6 * Based on code from
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8 *
9 * Modelled after: Samsung S5P/EXYNOS SoC series MIPI CSIS/DSIM DPHY driver
10 * Copyright (C) 2013 Samsung Electronics Co., Ltd.
11 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 */
23
24 #include <linux/clk.h>
25 #include <linux/delay.h>
26 #include <linux/err.h>
27 #include <linux/extcon-provider.h>
28 #include <linux/io.h>
29 #include <linux/interrupt.h>
30 #include <linux/kernel.h>
31 #include <linux/module.h>
32 #include <linux/mutex.h>
33 #include <linux/of.h>
34 #include <linux/of_address.h>
35 #include <linux/of_device.h>
36 #include <linux/of_gpio.h>
37 #include <linux/phy/phy.h>
38 #include <linux/phy/phy-sun4i-usb.h>
39 #include <linux/platform_device.h>
40 #include <linux/power_supply.h>
41 #include <linux/regulator/consumer.h>
42 #include <linux/reset.h>
43 #include <linux/spinlock.h>
44 #include <linux/usb/of.h>
45 #include <linux/workqueue.h>
46
47 #define REG_ISCR 0x00
48 #define REG_PHYCTL_A10 0x04
49 #define REG_PHYBIST 0x08
50 #define REG_PHYTUNE 0x0c
51 #define REG_PHYCTL_A33 0x10
52 #define REG_PHY_OTGCTL 0x20
53
54 #define REG_PMU_UNK1 0x10
55
56 #define PHYCTL_DATA BIT(7)
57
58 #define OTGCTL_ROUTE_MUSB BIT(0)
59
60 #define SUNXI_AHB_ICHR8_EN BIT(10)
61 #define SUNXI_AHB_INCR4_BURST_EN BIT(9)
62 #define SUNXI_AHB_INCRX_ALIGN_EN BIT(8)
63 #define SUNXI_ULPI_BYPASS_EN BIT(0)
64
65 /* ISCR, Interface Status and Control bits */
66 #define ISCR_ID_PULLUP_EN (1 << 17)
67 #define ISCR_DPDM_PULLUP_EN (1 << 16)
68 /* sunxi has the phy id/vbus pins not connected, so we use the force bits */
69 #define ISCR_FORCE_ID_MASK (3 << 14)
70 #define ISCR_FORCE_ID_LOW (2 << 14)
71 #define ISCR_FORCE_ID_HIGH (3 << 14)
72 #define ISCR_FORCE_VBUS_MASK (3 << 12)
73 #define ISCR_FORCE_VBUS_LOW (2 << 12)
74 #define ISCR_FORCE_VBUS_HIGH (3 << 12)
75
76 /* Common Control Bits for Both PHYs */
77 #define PHY_PLL_BW 0x03
78 #define PHY_RES45_CAL_EN 0x0c
79
80 /* Private Control Bits for Each PHY */
81 #define PHY_TX_AMPLITUDE_TUNE 0x20
82 #define PHY_TX_SLEWRATE_TUNE 0x22
83 #define PHY_VBUSVALID_TH_SEL 0x25
84 #define PHY_PULLUP_RES_SEL 0x27
85 #define PHY_OTG_FUNC_EN 0x28
86 #define PHY_VBUS_DET_EN 0x29
87 #define PHY_DISCON_TH_SEL 0x2a
88 #define PHY_SQUELCH_DETECT 0x3c
89
90 /* A83T specific control bits for PHY0 */
91 #define PHY_CTL_VBUSVLDEXT BIT(5)
92 #define PHY_CTL_SIDDQ BIT(3)
93
94 /* A83T specific control bits for PHY2 HSIC */
95 #define SUNXI_EHCI_HS_FORCE BIT(20)
96 #define SUNXI_HSIC_CONNECT_DET BIT(17)
97 #define SUNXI_HSIC_CONNECT_INT BIT(16)
98 #define SUNXI_HSIC BIT(1)
99
100 #define MAX_PHYS 4
101
102 /*
103 * Note do not raise the debounce time, we must report Vusb high within 100ms
104 * otherwise we get Vbus errors
105 */
106 #define DEBOUNCE_TIME msecs_to_jiffies(50)
107 #define POLL_TIME msecs_to_jiffies(250)
108
109 enum sun4i_usb_phy_type {
110 sun4i_a10_phy,
111 sun6i_a31_phy,
112 sun8i_a33_phy,
113 sun8i_a83t_phy,
114 sun8i_h3_phy,
115 sun8i_r40_phy,
116 sun8i_v3s_phy,
117 sun50i_a64_phy,
118 };
119
120 struct sun4i_usb_phy_cfg {
121 int num_phys;
122 int hsic_index;
123 enum sun4i_usb_phy_type type;
124 u32 disc_thresh;
125 u8 phyctl_offset;
126 bool dedicated_clocks;
127 bool enable_pmu_unk1;
128 bool phy0_dual_route;
129 int missing_phys;
130 };
131
132 struct sun4i_usb_phy_data {
133 void __iomem *base;
134 const struct sun4i_usb_phy_cfg *cfg;
135 enum usb_dr_mode dr_mode;
136 spinlock_t reg_lock; /* guard access to phyctl reg */
137 struct sun4i_usb_phy {
138 struct phy *phy;
139 void __iomem *pmu;
140 struct regulator *vbus;
141 struct reset_control *reset;
142 struct clk *clk;
143 struct clk *clk2;
144 bool regulator_on;
145 int index;
146 } phys[MAX_PHYS];
147 /* phy0 / otg related variables */
148 struct extcon_dev *extcon;
149 bool phy0_init;
150 struct gpio_desc *id_det_gpio;
151 struct gpio_desc *vbus_det_gpio;
152 struct power_supply *vbus_power_supply;
153 struct notifier_block vbus_power_nb;
154 bool vbus_power_nb_registered;
155 bool force_session_end;
156 int id_det_irq;
157 int vbus_det_irq;
158 int id_det;
159 int vbus_det;
160 struct delayed_work detect;
161 };
162
163 #define to_sun4i_usb_phy_data(phy) \
164 container_of((phy), struct sun4i_usb_phy_data, phys[(phy)->index])
165
sun4i_usb_phy0_update_iscr(struct phy * _phy,u32 clr,u32 set)166 static void sun4i_usb_phy0_update_iscr(struct phy *_phy, u32 clr, u32 set)
167 {
168 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
169 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
170 u32 iscr;
171
172 iscr = readl(data->base + REG_ISCR);
173 iscr &= ~clr;
174 iscr |= set;
175 writel(iscr, data->base + REG_ISCR);
176 }
177
sun4i_usb_phy0_set_id_detect(struct phy * phy,u32 val)178 static void sun4i_usb_phy0_set_id_detect(struct phy *phy, u32 val)
179 {
180 if (val)
181 val = ISCR_FORCE_ID_HIGH;
182 else
183 val = ISCR_FORCE_ID_LOW;
184
185 sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_ID_MASK, val);
186 }
187
sun4i_usb_phy0_set_vbus_detect(struct phy * phy,u32 val)188 static void sun4i_usb_phy0_set_vbus_detect(struct phy *phy, u32 val)
189 {
190 if (val)
191 val = ISCR_FORCE_VBUS_HIGH;
192 else
193 val = ISCR_FORCE_VBUS_LOW;
194
195 sun4i_usb_phy0_update_iscr(phy, ISCR_FORCE_VBUS_MASK, val);
196 }
197
sun4i_usb_phy_write(struct sun4i_usb_phy * phy,u32 addr,u32 data,int len)198 static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
199 int len)
200 {
201 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
202 u32 temp, usbc_bit = BIT(phy->index * 2);
203 void __iomem *phyctl = phy_data->base + phy_data->cfg->phyctl_offset;
204 unsigned long flags;
205 int i;
206
207 spin_lock_irqsave(&phy_data->reg_lock, flags);
208
209 if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
210 /* SoCs newer than A33 need us to set phyctl to 0 explicitly */
211 writel(0, phyctl);
212 }
213
214 for (i = 0; i < len; i++) {
215 temp = readl(phyctl);
216
217 /* clear the address portion */
218 temp &= ~(0xff << 8);
219
220 /* set the address */
221 temp |= ((addr + i) << 8);
222 writel(temp, phyctl);
223
224 /* set the data bit and clear usbc bit*/
225 temp = readb(phyctl);
226 if (data & 0x1)
227 temp |= PHYCTL_DATA;
228 else
229 temp &= ~PHYCTL_DATA;
230 temp &= ~usbc_bit;
231 writeb(temp, phyctl);
232
233 /* pulse usbc_bit */
234 temp = readb(phyctl);
235 temp |= usbc_bit;
236 writeb(temp, phyctl);
237
238 temp = readb(phyctl);
239 temp &= ~usbc_bit;
240 writeb(temp, phyctl);
241
242 data >>= 1;
243 }
244
245 spin_unlock_irqrestore(&phy_data->reg_lock, flags);
246 }
247
sun4i_usb_phy_passby(struct sun4i_usb_phy * phy,int enable)248 static void sun4i_usb_phy_passby(struct sun4i_usb_phy *phy, int enable)
249 {
250 struct sun4i_usb_phy_data *phy_data = to_sun4i_usb_phy_data(phy);
251 u32 bits, reg_value;
252
253 if (!phy->pmu)
254 return;
255
256 bits = SUNXI_AHB_ICHR8_EN | SUNXI_AHB_INCR4_BURST_EN |
257 SUNXI_AHB_INCRX_ALIGN_EN | SUNXI_ULPI_BYPASS_EN;
258
259 /* A83T USB2 is HSIC */
260 if (phy_data->cfg->type == sun8i_a83t_phy && phy->index == 2)
261 bits |= SUNXI_EHCI_HS_FORCE | SUNXI_HSIC_CONNECT_INT |
262 SUNXI_HSIC;
263
264 reg_value = readl(phy->pmu);
265
266 if (enable)
267 reg_value |= bits;
268 else
269 reg_value &= ~bits;
270
271 writel(reg_value, phy->pmu);
272 }
273
sun4i_usb_phy_init(struct phy * _phy)274 static int sun4i_usb_phy_init(struct phy *_phy)
275 {
276 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
277 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
278 int ret;
279 u32 val;
280
281 ret = clk_prepare_enable(phy->clk);
282 if (ret)
283 return ret;
284
285 ret = clk_prepare_enable(phy->clk2);
286 if (ret) {
287 clk_disable_unprepare(phy->clk);
288 return ret;
289 }
290
291 ret = reset_control_deassert(phy->reset);
292 if (ret) {
293 clk_disable_unprepare(phy->clk2);
294 clk_disable_unprepare(phy->clk);
295 return ret;
296 }
297
298 if (data->cfg->type == sun8i_a83t_phy) {
299 if (phy->index == 0) {
300 val = readl(data->base + data->cfg->phyctl_offset);
301 val |= PHY_CTL_VBUSVLDEXT;
302 val &= ~PHY_CTL_SIDDQ;
303 writel(val, data->base + data->cfg->phyctl_offset);
304 }
305 } else {
306 if (phy->pmu && data->cfg->enable_pmu_unk1) {
307 val = readl(phy->pmu + REG_PMU_UNK1);
308 writel(val & ~2, phy->pmu + REG_PMU_UNK1);
309 }
310
311 /* Enable USB 45 Ohm resistor calibration */
312 if (phy->index == 0)
313 sun4i_usb_phy_write(phy, PHY_RES45_CAL_EN, 0x01, 1);
314
315 /* Adjust PHY's magnitude and rate */
316 sun4i_usb_phy_write(phy, PHY_TX_AMPLITUDE_TUNE, 0x14, 5);
317
318 /* Disconnect threshold adjustment */
319 sun4i_usb_phy_write(phy, PHY_DISCON_TH_SEL,
320 data->cfg->disc_thresh, 2);
321 }
322
323 sun4i_usb_phy_passby(phy, 1);
324
325 if (phy->index == 0) {
326 data->phy0_init = true;
327
328 /* Enable pull-ups */
329 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_DPDM_PULLUP_EN);
330 sun4i_usb_phy0_update_iscr(_phy, 0, ISCR_ID_PULLUP_EN);
331
332 /* Force ISCR and cable state updates */
333 data->id_det = -1;
334 data->vbus_det = -1;
335 queue_delayed_work(system_wq, &data->detect, 0);
336 }
337
338 return 0;
339 }
340
sun4i_usb_phy_exit(struct phy * _phy)341 static int sun4i_usb_phy_exit(struct phy *_phy)
342 {
343 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
344 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
345
346 if (phy->index == 0) {
347 if (data->cfg->type == sun8i_a83t_phy) {
348 void __iomem *phyctl = data->base +
349 data->cfg->phyctl_offset;
350
351 writel(readl(phyctl) | PHY_CTL_SIDDQ, phyctl);
352 }
353
354 /* Disable pull-ups */
355 sun4i_usb_phy0_update_iscr(_phy, ISCR_DPDM_PULLUP_EN, 0);
356 sun4i_usb_phy0_update_iscr(_phy, ISCR_ID_PULLUP_EN, 0);
357 data->phy0_init = false;
358 }
359
360 sun4i_usb_phy_passby(phy, 0);
361 reset_control_assert(phy->reset);
362 clk_disable_unprepare(phy->clk2);
363 clk_disable_unprepare(phy->clk);
364
365 return 0;
366 }
367
sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data * data)368 static int sun4i_usb_phy0_get_id_det(struct sun4i_usb_phy_data *data)
369 {
370 switch (data->dr_mode) {
371 case USB_DR_MODE_OTG:
372 if (data->id_det_gpio)
373 return gpiod_get_value_cansleep(data->id_det_gpio);
374 else
375 return 1; /* Fallback to peripheral mode */
376 case USB_DR_MODE_HOST:
377 return 0;
378 case USB_DR_MODE_PERIPHERAL:
379 default:
380 return 1;
381 }
382 }
383
sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data * data)384 static int sun4i_usb_phy0_get_vbus_det(struct sun4i_usb_phy_data *data)
385 {
386 if (data->vbus_det_gpio)
387 return gpiod_get_value_cansleep(data->vbus_det_gpio);
388
389 if (data->vbus_power_supply) {
390 union power_supply_propval val;
391 int r;
392
393 r = power_supply_get_property(data->vbus_power_supply,
394 POWER_SUPPLY_PROP_PRESENT, &val);
395 if (r == 0)
396 return val.intval;
397 }
398
399 /* Fallback: report vbus as high */
400 return 1;
401 }
402
sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data * data)403 static bool sun4i_usb_phy0_have_vbus_det(struct sun4i_usb_phy_data *data)
404 {
405 return data->vbus_det_gpio || data->vbus_power_supply;
406 }
407
sun4i_usb_phy0_poll(struct sun4i_usb_phy_data * data)408 static bool sun4i_usb_phy0_poll(struct sun4i_usb_phy_data *data)
409 {
410 if ((data->id_det_gpio && data->id_det_irq <= 0) ||
411 (data->vbus_det_gpio && data->vbus_det_irq <= 0))
412 return true;
413
414 /*
415 * The A31/A23/A33 companion pmics (AXP221/AXP223) do not
416 * generate vbus change interrupts when the board is driving
417 * vbus using the N_VBUSEN pin on the pmic, so we must poll
418 * when using the pmic for vbus-det _and_ we're driving vbus.
419 */
420 if ((data->cfg->type == sun6i_a31_phy ||
421 data->cfg->type == sun8i_a33_phy) &&
422 data->vbus_power_supply && data->phys[0].regulator_on)
423 return true;
424
425 return false;
426 }
427
sun4i_usb_phy_power_on(struct phy * _phy)428 static int sun4i_usb_phy_power_on(struct phy *_phy)
429 {
430 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
431 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
432 int ret;
433
434 if (!phy->vbus || phy->regulator_on)
435 return 0;
436
437 /* For phy0 only turn on Vbus if we don't have an ext. Vbus */
438 if (phy->index == 0 && sun4i_usb_phy0_have_vbus_det(data) &&
439 data->vbus_det) {
440 dev_warn(&_phy->dev, "External vbus detected, not enabling our own vbus\n");
441 return 0;
442 }
443
444 ret = regulator_enable(phy->vbus);
445 if (ret)
446 return ret;
447
448 phy->regulator_on = true;
449
450 /* We must report Vbus high within OTG_TIME_A_WAIT_VRISE msec. */
451 if (phy->index == 0 && sun4i_usb_phy0_poll(data))
452 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
453
454 return 0;
455 }
456
sun4i_usb_phy_power_off(struct phy * _phy)457 static int sun4i_usb_phy_power_off(struct phy *_phy)
458 {
459 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
460 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
461
462 if (!phy->vbus || !phy->regulator_on)
463 return 0;
464
465 regulator_disable(phy->vbus);
466 phy->regulator_on = false;
467
468 /*
469 * phy0 vbus typically slowly discharges, sometimes this causes the
470 * Vbus gpio to not trigger an edge irq on Vbus off, so force a rescan.
471 */
472 if (phy->index == 0 && !sun4i_usb_phy0_poll(data))
473 mod_delayed_work(system_wq, &data->detect, POLL_TIME);
474
475 return 0;
476 }
477
sun4i_usb_phy_set_mode(struct phy * _phy,enum phy_mode mode)478 static int sun4i_usb_phy_set_mode(struct phy *_phy, enum phy_mode mode)
479 {
480 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
481 struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
482 int new_mode;
483
484 if (phy->index != 0) {
485 if (mode == PHY_MODE_USB_HOST)
486 return 0;
487 return -EINVAL;
488 }
489
490 switch (mode) {
491 case PHY_MODE_USB_HOST:
492 new_mode = USB_DR_MODE_HOST;
493 break;
494 case PHY_MODE_USB_DEVICE:
495 new_mode = USB_DR_MODE_PERIPHERAL;
496 break;
497 case PHY_MODE_USB_OTG:
498 new_mode = USB_DR_MODE_OTG;
499 break;
500 default:
501 return -EINVAL;
502 }
503
504 if (new_mode != data->dr_mode) {
505 dev_info(&_phy->dev, "Changing dr_mode to %d\n", new_mode);
506 data->dr_mode = new_mode;
507 }
508
509 data->id_det = -1; /* Force reprocessing of id */
510 data->force_session_end = true;
511 queue_delayed_work(system_wq, &data->detect, 0);
512
513 return 0;
514 }
515
sun4i_usb_phy_set_squelch_detect(struct phy * _phy,bool enabled)516 void sun4i_usb_phy_set_squelch_detect(struct phy *_phy, bool enabled)
517 {
518 struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
519
520 sun4i_usb_phy_write(phy, PHY_SQUELCH_DETECT, enabled ? 0 : 2, 2);
521 }
522 EXPORT_SYMBOL_GPL(sun4i_usb_phy_set_squelch_detect);
523
524 static const struct phy_ops sun4i_usb_phy_ops = {
525 .init = sun4i_usb_phy_init,
526 .exit = sun4i_usb_phy_exit,
527 .power_on = sun4i_usb_phy_power_on,
528 .power_off = sun4i_usb_phy_power_off,
529 .set_mode = sun4i_usb_phy_set_mode,
530 .owner = THIS_MODULE,
531 };
532
sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data * data,int id_det)533 static void sun4i_usb_phy0_reroute(struct sun4i_usb_phy_data *data, int id_det)
534 {
535 u32 regval;
536
537 regval = readl(data->base + REG_PHY_OTGCTL);
538 if (id_det == 0) {
539 /* Host mode. Route phy0 to EHCI/OHCI */
540 regval &= ~OTGCTL_ROUTE_MUSB;
541 } else {
542 /* Peripheral mode. Route phy0 to MUSB */
543 regval |= OTGCTL_ROUTE_MUSB;
544 }
545 writel(regval, data->base + REG_PHY_OTGCTL);
546 }
547
sun4i_usb_phy0_id_vbus_det_scan(struct work_struct * work)548 static void sun4i_usb_phy0_id_vbus_det_scan(struct work_struct *work)
549 {
550 struct sun4i_usb_phy_data *data =
551 container_of(work, struct sun4i_usb_phy_data, detect.work);
552 struct phy *phy0 = data->phys[0].phy;
553 struct sun4i_usb_phy *phy;
554 bool force_session_end, id_notify = false, vbus_notify = false;
555 int id_det, vbus_det;
556
557 if (!phy0)
558 return;
559
560 phy = phy_get_drvdata(phy0);
561 id_det = sun4i_usb_phy0_get_id_det(data);
562 vbus_det = sun4i_usb_phy0_get_vbus_det(data);
563
564 mutex_lock(&phy0->mutex);
565
566 if (!data->phy0_init) {
567 mutex_unlock(&phy0->mutex);
568 return;
569 }
570
571 force_session_end = data->force_session_end;
572 data->force_session_end = false;
573
574 if (id_det != data->id_det) {
575 /* id-change, force session end if we've no vbus detection */
576 if (data->dr_mode == USB_DR_MODE_OTG &&
577 !sun4i_usb_phy0_have_vbus_det(data))
578 force_session_end = true;
579
580 /* When entering host mode (id = 0) force end the session now */
581 if (force_session_end && id_det == 0) {
582 sun4i_usb_phy0_set_vbus_detect(phy0, 0);
583 msleep(200);
584 sun4i_usb_phy0_set_vbus_detect(phy0, 1);
585 }
586 sun4i_usb_phy0_set_id_detect(phy0, id_det);
587 data->id_det = id_det;
588 id_notify = true;
589 }
590
591 if (vbus_det != data->vbus_det) {
592 sun4i_usb_phy0_set_vbus_detect(phy0, vbus_det);
593 data->vbus_det = vbus_det;
594 vbus_notify = true;
595 }
596
597 mutex_unlock(&phy0->mutex);
598
599 if (id_notify) {
600 extcon_set_state_sync(data->extcon, EXTCON_USB_HOST,
601 !id_det);
602 /* When leaving host mode force end the session here */
603 if (force_session_end && id_det == 1) {
604 mutex_lock(&phy0->mutex);
605 sun4i_usb_phy0_set_vbus_detect(phy0, 0);
606 msleep(1000);
607 sun4i_usb_phy0_set_vbus_detect(phy0, 1);
608 mutex_unlock(&phy0->mutex);
609 }
610
611 /* Enable PHY0 passby for host mode only. */
612 sun4i_usb_phy_passby(phy, !id_det);
613
614 /* Re-route PHY0 if necessary */
615 if (data->cfg->phy0_dual_route)
616 sun4i_usb_phy0_reroute(data, id_det);
617 }
618
619 if (vbus_notify)
620 extcon_set_state_sync(data->extcon, EXTCON_USB, vbus_det);
621
622 if (sun4i_usb_phy0_poll(data))
623 queue_delayed_work(system_wq, &data->detect, POLL_TIME);
624 }
625
sun4i_usb_phy0_id_vbus_det_irq(int irq,void * dev_id)626 static irqreturn_t sun4i_usb_phy0_id_vbus_det_irq(int irq, void *dev_id)
627 {
628 struct sun4i_usb_phy_data *data = dev_id;
629
630 /* vbus or id changed, let the pins settle and then scan them */
631 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
632
633 return IRQ_HANDLED;
634 }
635
sun4i_usb_phy0_vbus_notify(struct notifier_block * nb,unsigned long val,void * v)636 static int sun4i_usb_phy0_vbus_notify(struct notifier_block *nb,
637 unsigned long val, void *v)
638 {
639 struct sun4i_usb_phy_data *data =
640 container_of(nb, struct sun4i_usb_phy_data, vbus_power_nb);
641 struct power_supply *psy = v;
642
643 /* Properties on the vbus_power_supply changed, scan vbus_det */
644 if (val == PSY_EVENT_PROP_CHANGED && psy == data->vbus_power_supply)
645 mod_delayed_work(system_wq, &data->detect, DEBOUNCE_TIME);
646
647 return NOTIFY_OK;
648 }
649
sun4i_usb_phy_xlate(struct device * dev,struct of_phandle_args * args)650 static struct phy *sun4i_usb_phy_xlate(struct device *dev,
651 struct of_phandle_args *args)
652 {
653 struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
654
655 if (args->args[0] >= data->cfg->num_phys)
656 return ERR_PTR(-ENODEV);
657
658 if (data->cfg->missing_phys & BIT(args->args[0]))
659 return ERR_PTR(-ENODEV);
660
661 return data->phys[args->args[0]].phy;
662 }
663
sun4i_usb_phy_remove(struct platform_device * pdev)664 static int sun4i_usb_phy_remove(struct platform_device *pdev)
665 {
666 struct device *dev = &pdev->dev;
667 struct sun4i_usb_phy_data *data = dev_get_drvdata(dev);
668
669 if (data->vbus_power_nb_registered)
670 power_supply_unreg_notifier(&data->vbus_power_nb);
671 if (data->id_det_irq > 0)
672 devm_free_irq(dev, data->id_det_irq, data);
673 if (data->vbus_det_irq > 0)
674 devm_free_irq(dev, data->vbus_det_irq, data);
675
676 cancel_delayed_work_sync(&data->detect);
677
678 return 0;
679 }
680
681 static const unsigned int sun4i_usb_phy0_cable[] = {
682 EXTCON_USB,
683 EXTCON_USB_HOST,
684 EXTCON_NONE,
685 };
686
sun4i_usb_phy_probe(struct platform_device * pdev)687 static int sun4i_usb_phy_probe(struct platform_device *pdev)
688 {
689 struct sun4i_usb_phy_data *data;
690 struct device *dev = &pdev->dev;
691 struct device_node *np = dev->of_node;
692 struct phy_provider *phy_provider;
693 struct resource *res;
694 int i, ret;
695
696 data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
697 if (!data)
698 return -ENOMEM;
699
700 spin_lock_init(&data->reg_lock);
701 INIT_DELAYED_WORK(&data->detect, sun4i_usb_phy0_id_vbus_det_scan);
702 dev_set_drvdata(dev, data);
703 data->cfg = of_device_get_match_data(dev);
704 if (!data->cfg)
705 return -EINVAL;
706
707 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy_ctrl");
708 data->base = devm_ioremap_resource(dev, res);
709 if (IS_ERR(data->base))
710 return PTR_ERR(data->base);
711
712 data->id_det_gpio = devm_gpiod_get_optional(dev, "usb0_id_det",
713 GPIOD_IN);
714 if (IS_ERR(data->id_det_gpio)) {
715 dev_err(dev, "Couldn't request ID GPIO\n");
716 return PTR_ERR(data->id_det_gpio);
717 }
718
719 data->vbus_det_gpio = devm_gpiod_get_optional(dev, "usb0_vbus_det",
720 GPIOD_IN);
721 if (IS_ERR(data->vbus_det_gpio)) {
722 dev_err(dev, "Couldn't request VBUS detect GPIO\n");
723 return PTR_ERR(data->vbus_det_gpio);
724 }
725
726 if (of_find_property(np, "usb0_vbus_power-supply", NULL)) {
727 data->vbus_power_supply = devm_power_supply_get_by_phandle(dev,
728 "usb0_vbus_power-supply");
729 if (IS_ERR(data->vbus_power_supply)) {
730 dev_err(dev, "Couldn't get the VBUS power supply\n");
731 return PTR_ERR(data->vbus_power_supply);
732 }
733
734 if (!data->vbus_power_supply)
735 return -EPROBE_DEFER;
736 }
737
738 data->dr_mode = of_usb_get_dr_mode_by_phy(np, 0);
739
740 data->extcon = devm_extcon_dev_allocate(dev, sun4i_usb_phy0_cable);
741 if (IS_ERR(data->extcon)) {
742 dev_err(dev, "Couldn't allocate our extcon device\n");
743 return PTR_ERR(data->extcon);
744 }
745
746 ret = devm_extcon_dev_register(dev, data->extcon);
747 if (ret) {
748 dev_err(dev, "failed to register extcon: %d\n", ret);
749 return ret;
750 }
751
752 for (i = 0; i < data->cfg->num_phys; i++) {
753 struct sun4i_usb_phy *phy = data->phys + i;
754 char name[16];
755
756 if (data->cfg->missing_phys & BIT(i))
757 continue;
758
759 snprintf(name, sizeof(name), "usb%d_vbus", i);
760 phy->vbus = devm_regulator_get_optional(dev, name);
761 if (IS_ERR(phy->vbus)) {
762 if (PTR_ERR(phy->vbus) == -EPROBE_DEFER) {
763 dev_err(dev,
764 "Couldn't get regulator %s... Deferring probe\n",
765 name);
766 return -EPROBE_DEFER;
767 }
768
769 phy->vbus = NULL;
770 }
771
772 if (data->cfg->dedicated_clocks)
773 snprintf(name, sizeof(name), "usb%d_phy", i);
774 else
775 strlcpy(name, "usb_phy", sizeof(name));
776
777 phy->clk = devm_clk_get(dev, name);
778 if (IS_ERR(phy->clk)) {
779 dev_err(dev, "failed to get clock %s\n", name);
780 return PTR_ERR(phy->clk);
781 }
782
783 /* The first PHY is always tied to OTG, and never HSIC */
784 if (data->cfg->hsic_index && i == data->cfg->hsic_index) {
785 /* HSIC needs secondary clock */
786 snprintf(name, sizeof(name), "usb%d_hsic_12M", i);
787 phy->clk2 = devm_clk_get(dev, name);
788 if (IS_ERR(phy->clk2)) {
789 dev_err(dev, "failed to get clock %s\n", name);
790 return PTR_ERR(phy->clk2);
791 }
792 }
793
794 snprintf(name, sizeof(name), "usb%d_reset", i);
795 phy->reset = devm_reset_control_get(dev, name);
796 if (IS_ERR(phy->reset)) {
797 dev_err(dev, "failed to get reset %s\n", name);
798 return PTR_ERR(phy->reset);
799 }
800
801 if (i || data->cfg->phy0_dual_route) { /* No pmu for musb */
802 snprintf(name, sizeof(name), "pmu%d", i);
803 res = platform_get_resource_byname(pdev,
804 IORESOURCE_MEM, name);
805 phy->pmu = devm_ioremap_resource(dev, res);
806 if (IS_ERR(phy->pmu))
807 return PTR_ERR(phy->pmu);
808 }
809
810 phy->phy = devm_phy_create(dev, NULL, &sun4i_usb_phy_ops);
811 if (IS_ERR(phy->phy)) {
812 dev_err(dev, "failed to create PHY %d\n", i);
813 return PTR_ERR(phy->phy);
814 }
815
816 phy->index = i;
817 phy_set_drvdata(phy->phy, &data->phys[i]);
818 }
819
820 data->id_det_irq = gpiod_to_irq(data->id_det_gpio);
821 if (data->id_det_irq > 0) {
822 ret = devm_request_irq(dev, data->id_det_irq,
823 sun4i_usb_phy0_id_vbus_det_irq,
824 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
825 "usb0-id-det", data);
826 if (ret) {
827 dev_err(dev, "Err requesting id-det-irq: %d\n", ret);
828 return ret;
829 }
830 }
831
832 data->vbus_det_irq = gpiod_to_irq(data->vbus_det_gpio);
833 if (data->vbus_det_irq > 0) {
834 ret = devm_request_irq(dev, data->vbus_det_irq,
835 sun4i_usb_phy0_id_vbus_det_irq,
836 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
837 "usb0-vbus-det", data);
838 if (ret) {
839 dev_err(dev, "Err requesting vbus-det-irq: %d\n", ret);
840 data->vbus_det_irq = -1;
841 sun4i_usb_phy_remove(pdev); /* Stop detect work */
842 return ret;
843 }
844 }
845
846 if (data->vbus_power_supply) {
847 data->vbus_power_nb.notifier_call = sun4i_usb_phy0_vbus_notify;
848 data->vbus_power_nb.priority = 0;
849 ret = power_supply_reg_notifier(&data->vbus_power_nb);
850 if (ret) {
851 sun4i_usb_phy_remove(pdev); /* Stop detect work */
852 return ret;
853 }
854 data->vbus_power_nb_registered = true;
855 }
856
857 phy_provider = devm_of_phy_provider_register(dev, sun4i_usb_phy_xlate);
858 if (IS_ERR(phy_provider)) {
859 sun4i_usb_phy_remove(pdev); /* Stop detect work */
860 return PTR_ERR(phy_provider);
861 }
862
863 dev_dbg(dev, "successfully loaded\n");
864
865 return 0;
866 }
867
868 static const struct sun4i_usb_phy_cfg sun4i_a10_cfg = {
869 .num_phys = 3,
870 .type = sun4i_a10_phy,
871 .disc_thresh = 3,
872 .phyctl_offset = REG_PHYCTL_A10,
873 .dedicated_clocks = false,
874 .enable_pmu_unk1 = false,
875 };
876
877 static const struct sun4i_usb_phy_cfg sun5i_a13_cfg = {
878 .num_phys = 2,
879 .type = sun4i_a10_phy,
880 .disc_thresh = 2,
881 .phyctl_offset = REG_PHYCTL_A10,
882 .dedicated_clocks = false,
883 .enable_pmu_unk1 = false,
884 };
885
886 static const struct sun4i_usb_phy_cfg sun6i_a31_cfg = {
887 .num_phys = 3,
888 .type = sun6i_a31_phy,
889 .disc_thresh = 3,
890 .phyctl_offset = REG_PHYCTL_A10,
891 .dedicated_clocks = true,
892 .enable_pmu_unk1 = false,
893 };
894
895 static const struct sun4i_usb_phy_cfg sun7i_a20_cfg = {
896 .num_phys = 3,
897 .type = sun4i_a10_phy,
898 .disc_thresh = 2,
899 .phyctl_offset = REG_PHYCTL_A10,
900 .dedicated_clocks = false,
901 .enable_pmu_unk1 = false,
902 };
903
904 static const struct sun4i_usb_phy_cfg sun8i_a23_cfg = {
905 .num_phys = 2,
906 .type = sun6i_a31_phy,
907 .disc_thresh = 3,
908 .phyctl_offset = REG_PHYCTL_A10,
909 .dedicated_clocks = true,
910 .enable_pmu_unk1 = false,
911 };
912
913 static const struct sun4i_usb_phy_cfg sun8i_a33_cfg = {
914 .num_phys = 2,
915 .type = sun8i_a33_phy,
916 .disc_thresh = 3,
917 .phyctl_offset = REG_PHYCTL_A33,
918 .dedicated_clocks = true,
919 .enable_pmu_unk1 = false,
920 };
921
922 static const struct sun4i_usb_phy_cfg sun8i_a83t_cfg = {
923 .num_phys = 3,
924 .hsic_index = 2,
925 .type = sun8i_a83t_phy,
926 .phyctl_offset = REG_PHYCTL_A33,
927 .dedicated_clocks = true,
928 };
929
930 static const struct sun4i_usb_phy_cfg sun8i_h3_cfg = {
931 .num_phys = 4,
932 .type = sun8i_h3_phy,
933 .disc_thresh = 3,
934 .phyctl_offset = REG_PHYCTL_A33,
935 .dedicated_clocks = true,
936 .enable_pmu_unk1 = true,
937 .phy0_dual_route = true,
938 };
939
940 static const struct sun4i_usb_phy_cfg sun8i_r40_cfg = {
941 .num_phys = 3,
942 .type = sun8i_r40_phy,
943 .disc_thresh = 3,
944 .phyctl_offset = REG_PHYCTL_A33,
945 .dedicated_clocks = true,
946 .enable_pmu_unk1 = true,
947 .phy0_dual_route = true,
948 };
949
950 static const struct sun4i_usb_phy_cfg sun8i_v3s_cfg = {
951 .num_phys = 1,
952 .type = sun8i_v3s_phy,
953 .disc_thresh = 3,
954 .phyctl_offset = REG_PHYCTL_A33,
955 .dedicated_clocks = true,
956 .enable_pmu_unk1 = true,
957 .phy0_dual_route = true,
958 };
959
960 static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = {
961 .num_phys = 2,
962 .type = sun50i_a64_phy,
963 .disc_thresh = 3,
964 .phyctl_offset = REG_PHYCTL_A33,
965 .dedicated_clocks = true,
966 .enable_pmu_unk1 = true,
967 .phy0_dual_route = true,
968 };
969
970 static const struct of_device_id sun4i_usb_phy_of_match[] = {
971 { .compatible = "allwinner,sun4i-a10-usb-phy", .data = &sun4i_a10_cfg },
972 { .compatible = "allwinner,sun5i-a13-usb-phy", .data = &sun5i_a13_cfg },
973 { .compatible = "allwinner,sun6i-a31-usb-phy", .data = &sun6i_a31_cfg },
974 { .compatible = "allwinner,sun7i-a20-usb-phy", .data = &sun7i_a20_cfg },
975 { .compatible = "allwinner,sun8i-a23-usb-phy", .data = &sun8i_a23_cfg },
976 { .compatible = "allwinner,sun8i-a33-usb-phy", .data = &sun8i_a33_cfg },
977 { .compatible = "allwinner,sun8i-a83t-usb-phy", .data = &sun8i_a83t_cfg },
978 { .compatible = "allwinner,sun8i-h3-usb-phy", .data = &sun8i_h3_cfg },
979 { .compatible = "allwinner,sun8i-r40-usb-phy", .data = &sun8i_r40_cfg },
980 { .compatible = "allwinner,sun8i-v3s-usb-phy", .data = &sun8i_v3s_cfg },
981 { .compatible = "allwinner,sun50i-a64-usb-phy",
982 .data = &sun50i_a64_cfg},
983 { },
984 };
985 MODULE_DEVICE_TABLE(of, sun4i_usb_phy_of_match);
986
987 static struct platform_driver sun4i_usb_phy_driver = {
988 .probe = sun4i_usb_phy_probe,
989 .remove = sun4i_usb_phy_remove,
990 .driver = {
991 .of_match_table = sun4i_usb_phy_of_match,
992 .name = "sun4i-usb-phy",
993 }
994 };
995 module_platform_driver(sun4i_usb_phy_driver);
996
997 MODULE_DESCRIPTION("Allwinner sun4i USB phy driver");
998 MODULE_AUTHOR("Hans de Goede <hdegoede@redhat.com>");
999 MODULE_LICENSE("GPL v2");
1000