1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
4 *
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_gbl.h"
9
10 #include <linux/delay.h>
11 #include <linux/slab.h>
12 #include <linux/vmalloc.h>
13
14 #include "qla_devtbl.h"
15
16 #ifdef CONFIG_SPARC
17 #include <asm/prom.h>
18 #endif
19
20 #include <target/target_core_base.h>
21 #include "qla_target.h"
22
23 /*
24 * QLogic ISP2x00 Hardware Support Function Prototypes.
25 */
26 static int qla2x00_isp_firmware(scsi_qla_host_t *);
27 static int qla2x00_setup_chip(scsi_qla_host_t *);
28 static int qla2x00_fw_ready(scsi_qla_host_t *);
29 static int qla2x00_configure_hba(scsi_qla_host_t *);
30 static int qla2x00_configure_loop(scsi_qla_host_t *);
31 static int qla2x00_configure_local_loop(scsi_qla_host_t *);
32 static int qla2x00_configure_fabric(scsi_qla_host_t *);
33 static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
34 static int qla2x00_restart_isp(scsi_qla_host_t *);
35
36 static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37 static int qla84xx_init_chip(scsi_qla_host_t *);
38 static int qla25xx_init_queues(struct qla_hw_data *);
39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
40 static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
45
46 /* SRB Extensions ---------------------------------------------------------- */
47
48 void
qla2x00_sp_timeout(struct timer_list * t)49 qla2x00_sp_timeout(struct timer_list *t)
50 {
51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
52 struct srb_iocb *iocb;
53 struct req_que *req;
54 unsigned long flags;
55 struct qla_hw_data *ha = sp->vha->hw;
56
57 WARN_ON_ONCE(irqs_disabled());
58 spin_lock_irqsave(&ha->hardware_lock, flags);
59 req = sp->qpair->req;
60 req->outstanding_cmds[sp->handle] = NULL;
61 iocb = &sp->u.iocb_cmd;
62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
63 iocb->timeout(sp);
64 }
65
66 void
qla2x00_sp_free(void * ptr)67 qla2x00_sp_free(void *ptr)
68 {
69 srb_t *sp = ptr;
70 struct srb_iocb *iocb = &sp->u.iocb_cmd;
71
72 del_timer(&iocb->timer);
73 qla2x00_rel_sp(sp);
74 }
75
76 /* Asynchronous Login/Logout Routines -------------------------------------- */
77
78 unsigned long
qla2x00_get_async_timeout(struct scsi_qla_host * vha)79 qla2x00_get_async_timeout(struct scsi_qla_host *vha)
80 {
81 unsigned long tmo;
82 struct qla_hw_data *ha = vha->hw;
83
84 /* Firmware should use switch negotiated r_a_tov for timeout. */
85 tmo = ha->r_a_tov / 10 * 2;
86 if (IS_QLAFX00(ha)) {
87 tmo = FX00_DEF_RATOV * 2;
88 } else if (!IS_FWI2_CAPABLE(ha)) {
89 /*
90 * Except for earlier ISPs where the timeout is seeded from the
91 * initialization control block.
92 */
93 tmo = ha->login_timeout;
94 }
95 return tmo;
96 }
97
98 void
qla2x00_async_iocb_timeout(void * data)99 qla2x00_async_iocb_timeout(void *data)
100 {
101 srb_t *sp = data;
102 fc_port_t *fcport = sp->fcport;
103 struct srb_iocb *lio = &sp->u.iocb_cmd;
104 int rc, h;
105 unsigned long flags;
106
107 if (fcport) {
108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
111
112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
113 } else {
114 pr_info("Async-%s timeout - hdl=%x.\n",
115 sp->name, sp->handle);
116 }
117
118 switch (sp->type) {
119 case SRB_LOGIN_CMD:
120 rc = qla24xx_async_abort_cmd(sp, false);
121 if (rc) {
122 /* Retry as needed. */
123 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
124 lio->u.logio.data[1] =
125 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
126 QLA_LOGIO_LOGIN_RETRIED : 0;
127 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
128 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
129 h++) {
130 if (sp->qpair->req->outstanding_cmds[h] ==
131 sp) {
132 sp->qpair->req->outstanding_cmds[h] =
133 NULL;
134 break;
135 }
136 }
137 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
138 sp->done(sp, QLA_FUNCTION_TIMEOUT);
139 }
140 break;
141 case SRB_LOGOUT_CMD:
142 case SRB_CT_PTHRU_CMD:
143 case SRB_MB_IOCB:
144 case SRB_NACK_PLOGI:
145 case SRB_NACK_PRLI:
146 case SRB_NACK_LOGO:
147 case SRB_CTRL_VP:
148 rc = qla24xx_async_abort_cmd(sp, false);
149 if (rc) {
150 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
151 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
152 h++) {
153 if (sp->qpair->req->outstanding_cmds[h] ==
154 sp) {
155 sp->qpair->req->outstanding_cmds[h] =
156 NULL;
157 break;
158 }
159 }
160 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
161 sp->done(sp, QLA_FUNCTION_TIMEOUT);
162 }
163 break;
164 }
165 }
166
167 static void
qla2x00_async_login_sp_done(void * ptr,int res)168 qla2x00_async_login_sp_done(void *ptr, int res)
169 {
170 srb_t *sp = ptr;
171 struct scsi_qla_host *vha = sp->vha;
172 struct srb_iocb *lio = &sp->u.iocb_cmd;
173 struct event_arg ea;
174
175 ql_dbg(ql_dbg_disc, vha, 0x20dd,
176 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
177
178 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
179
180 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
181 memset(&ea, 0, sizeof(ea));
182 ea.event = FCME_PLOGI_DONE;
183 ea.fcport = sp->fcport;
184 ea.data[0] = lio->u.logio.data[0];
185 ea.data[1] = lio->u.logio.data[1];
186 ea.iop[0] = lio->u.logio.iop[0];
187 ea.iop[1] = lio->u.logio.iop[1];
188 ea.sp = sp;
189 qla2x00_fcport_event_handler(vha, &ea);
190 }
191
192 sp->free(sp);
193 }
194
195 static inline bool
fcport_is_smaller(fc_port_t * fcport)196 fcport_is_smaller(fc_port_t *fcport)
197 {
198 if (wwn_to_u64(fcport->port_name) <
199 wwn_to_u64(fcport->vha->port_name))
200 return true;
201 else
202 return false;
203 }
204
205 static inline bool
fcport_is_bigger(fc_port_t * fcport)206 fcport_is_bigger(fc_port_t *fcport)
207 {
208 return !fcport_is_smaller(fcport);
209 }
210
211 int
qla2x00_async_login(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)212 qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
213 uint16_t *data)
214 {
215 srb_t *sp;
216 struct srb_iocb *lio;
217 int rval = QLA_FUNCTION_FAILED;
218
219 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
220 fcport->loop_id == FC_NO_LOOP_ID) {
221 ql_log(ql_log_warn, vha, 0xffff,
222 "%s: %8phC - not sending command.\n",
223 __func__, fcport->port_name);
224 return rval;
225 }
226
227 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
228 if (!sp)
229 goto done;
230
231 fcport->flags |= FCF_ASYNC_SENT;
232 fcport->logout_completed = 0;
233
234 fcport->disc_state = DSC_LOGIN_PEND;
235 sp->type = SRB_LOGIN_CMD;
236 sp->name = "login";
237 sp->gen1 = fcport->rscn_gen;
238 sp->gen2 = fcport->login_gen;
239
240 lio = &sp->u.iocb_cmd;
241 lio->timeout = qla2x00_async_iocb_timeout;
242 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
243
244 sp->done = qla2x00_async_login_sp_done;
245 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
246 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
247 else
248 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
249
250 if (fcport->fc4f_nvme)
251 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
252
253 ql_dbg(ql_dbg_disc, vha, 0x2072,
254 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
255 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
256 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
257 fcport->login_retry);
258
259 rval = qla2x00_start_sp(sp);
260 if (rval != QLA_SUCCESS) {
261 fcport->flags |= FCF_LOGIN_NEEDED;
262 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
263 goto done_free_sp;
264 }
265
266 return rval;
267
268 done_free_sp:
269 sp->free(sp);
270 fcport->flags &= ~FCF_ASYNC_SENT;
271 done:
272 fcport->flags &= ~FCF_ASYNC_ACTIVE;
273 return rval;
274 }
275
276 static void
qla2x00_async_logout_sp_done(void * ptr,int res)277 qla2x00_async_logout_sp_done(void *ptr, int res)
278 {
279 srb_t *sp = ptr;
280
281 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
282 sp->fcport->login_gen++;
283 qlt_logo_completion_handler(sp->fcport, res);
284 sp->free(sp);
285 }
286
287 int
qla2x00_async_logout(struct scsi_qla_host * vha,fc_port_t * fcport)288 qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
289 {
290 srb_t *sp;
291 struct srb_iocb *lio;
292 int rval = QLA_FUNCTION_FAILED;
293
294 fcport->flags |= FCF_ASYNC_SENT;
295 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
296 if (!sp)
297 goto done;
298
299 sp->type = SRB_LOGOUT_CMD;
300 sp->name = "logout";
301
302 lio = &sp->u.iocb_cmd;
303 lio->timeout = qla2x00_async_iocb_timeout;
304 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
305
306 sp->done = qla2x00_async_logout_sp_done;
307
308 ql_dbg(ql_dbg_disc, vha, 0x2070,
309 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
310 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
311 fcport->d_id.b.area, fcport->d_id.b.al_pa,
312 fcport->port_name);
313
314 rval = qla2x00_start_sp(sp);
315 if (rval != QLA_SUCCESS)
316 goto done_free_sp;
317 return rval;
318
319 done_free_sp:
320 sp->free(sp);
321 done:
322 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
323 return rval;
324 }
325
326 void
qla2x00_async_prlo_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)327 qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
328 uint16_t *data)
329 {
330 fcport->flags &= ~FCF_ASYNC_ACTIVE;
331 /* Don't re-login in target mode */
332 if (!fcport->tgt_session)
333 qla2x00_mark_device_lost(vha, fcport, 1, 0);
334 qlt_logo_completion_handler(fcport, data[0]);
335 }
336
337 static void
qla2x00_async_prlo_sp_done(void * s,int res)338 qla2x00_async_prlo_sp_done(void *s, int res)
339 {
340 srb_t *sp = (srb_t *)s;
341 struct srb_iocb *lio = &sp->u.iocb_cmd;
342 struct scsi_qla_host *vha = sp->vha;
343
344 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
345 if (!test_bit(UNLOADING, &vha->dpc_flags))
346 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
347 lio->u.logio.data);
348 sp->free(sp);
349 }
350
351 int
qla2x00_async_prlo(struct scsi_qla_host * vha,fc_port_t * fcport)352 qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
353 {
354 srb_t *sp;
355 struct srb_iocb *lio;
356 int rval;
357
358 rval = QLA_FUNCTION_FAILED;
359 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
360 if (!sp)
361 goto done;
362
363 sp->type = SRB_PRLO_CMD;
364 sp->name = "prlo";
365
366 lio = &sp->u.iocb_cmd;
367 lio->timeout = qla2x00_async_iocb_timeout;
368 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
369
370 sp->done = qla2x00_async_prlo_sp_done;
371 rval = qla2x00_start_sp(sp);
372 if (rval != QLA_SUCCESS)
373 goto done_free_sp;
374
375 ql_dbg(ql_dbg_disc, vha, 0x2070,
376 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
377 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
378 fcport->d_id.b.area, fcport->d_id.b.al_pa);
379 return rval;
380
381 done_free_sp:
382 sp->free(sp);
383 done:
384 fcport->flags &= ~FCF_ASYNC_ACTIVE;
385 return rval;
386 }
387
388 static
qla24xx_handle_adisc_event(scsi_qla_host_t * vha,struct event_arg * ea)389 void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
390 {
391 struct fc_port *fcport = ea->fcport;
392
393 ql_dbg(ql_dbg_disc, vha, 0x20d2,
394 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
395 __func__, fcport->port_name, fcport->disc_state,
396 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
397 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
398
399 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
400 ql_dbg(ql_dbg_disc, vha, 0x2066,
401 "%s %8phC: adisc fail: post delete\n",
402 __func__, ea->fcport->port_name);
403 qlt_schedule_sess_for_deletion(ea->fcport);
404 return;
405 }
406
407 if (ea->fcport->disc_state == DSC_DELETE_PEND)
408 return;
409
410 if (ea->sp->gen2 != ea->fcport->login_gen) {
411 /* target side must have changed it. */
412 ql_dbg(ql_dbg_disc, vha, 0x20d3,
413 "%s %8phC generation changed\n",
414 __func__, ea->fcport->port_name);
415 return;
416 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
417 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
418 __func__, __LINE__, ea->fcport->port_name);
419 qla24xx_post_gidpn_work(vha, ea->fcport);
420 return;
421 }
422
423 __qla24xx_handle_gpdb_event(vha, ea);
424 }
425
qla_post_els_plogi_work(struct scsi_qla_host * vha,fc_port_t * fcport)426 int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
427 {
428 struct qla_work_evt *e;
429
430 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
431 if (!e)
432 return QLA_FUNCTION_FAILED;
433
434 e->u.fcport.fcport = fcport;
435 fcport->flags |= FCF_ASYNC_ACTIVE;
436 fcport->disc_state = DSC_LOGIN_PEND;
437 return qla2x00_post_work(vha, e);
438 }
439
440 static void
qla2x00_async_adisc_sp_done(void * ptr,int res)441 qla2x00_async_adisc_sp_done(void *ptr, int res)
442 {
443 srb_t *sp = ptr;
444 struct scsi_qla_host *vha = sp->vha;
445 struct event_arg ea;
446 struct srb_iocb *lio = &sp->u.iocb_cmd;
447
448 ql_dbg(ql_dbg_disc, vha, 0x2066,
449 "Async done-%s res %x %8phC\n",
450 sp->name, res, sp->fcport->port_name);
451
452 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
453
454 memset(&ea, 0, sizeof(ea));
455 ea.event = FCME_ADISC_DONE;
456 ea.rc = res;
457 ea.data[0] = lio->u.logio.data[0];
458 ea.data[1] = lio->u.logio.data[1];
459 ea.iop[0] = lio->u.logio.iop[0];
460 ea.iop[1] = lio->u.logio.iop[1];
461 ea.fcport = sp->fcport;
462 ea.sp = sp;
463
464 qla2x00_fcport_event_handler(vha, &ea);
465
466 sp->free(sp);
467 }
468
469 int
qla2x00_async_adisc(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)470 qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
471 uint16_t *data)
472 {
473 srb_t *sp;
474 struct srb_iocb *lio;
475 int rval;
476
477 rval = QLA_FUNCTION_FAILED;
478 fcport->flags |= FCF_ASYNC_SENT;
479 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
480 if (!sp)
481 goto done;
482
483 sp->type = SRB_ADISC_CMD;
484 sp->name = "adisc";
485
486 lio = &sp->u.iocb_cmd;
487 lio->timeout = qla2x00_async_iocb_timeout;
488 sp->gen1 = fcport->rscn_gen;
489 sp->gen2 = fcport->login_gen;
490 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
491
492 sp->done = qla2x00_async_adisc_sp_done;
493 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
494 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
495
496 ql_dbg(ql_dbg_disc, vha, 0x206f,
497 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
498 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
499
500 rval = qla2x00_start_sp(sp);
501 if (rval != QLA_SUCCESS)
502 goto done_free_sp;
503
504 return rval;
505
506 done_free_sp:
507 sp->free(sp);
508 done:
509 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
510 qla2x00_post_async_adisc_work(vha, fcport, data);
511 return rval;
512 }
513
qla24xx_handle_gnl_done_event(scsi_qla_host_t * vha,struct event_arg * ea)514 static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
515 struct event_arg *ea)
516 {
517 fc_port_t *fcport, *conflict_fcport;
518 struct get_name_list_extended *e;
519 u16 i, n, found = 0, loop_id;
520 port_id_t id;
521 u64 wwn;
522 u16 data[2];
523 u8 current_login_state;
524
525 fcport = ea->fcport;
526 ql_dbg(ql_dbg_disc, vha, 0xffff,
527 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
528 __func__, fcport->port_name, fcport->disc_state,
529 fcport->fw_login_state, ea->rc,
530 fcport->login_gen, fcport->last_login_gen,
531 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
532
533 if (fcport->disc_state == DSC_DELETE_PEND)
534 return;
535
536 if (ea->rc) { /* rval */
537 if (fcport->login_retry == 0) {
538 ql_dbg(ql_dbg_disc, vha, 0x20de,
539 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
540 fcport->port_name, fcport->login_retry);
541 }
542 return;
543 }
544
545 if (fcport->last_rscn_gen != fcport->rscn_gen) {
546 ql_dbg(ql_dbg_disc, vha, 0x20df,
547 "%s %8phC rscn gen changed rscn %d|%d \n",
548 __func__, fcport->port_name,
549 fcport->last_rscn_gen, fcport->rscn_gen);
550 qla24xx_post_gidpn_work(vha, fcport);
551 return;
552 } else if (fcport->last_login_gen != fcport->login_gen) {
553 ql_dbg(ql_dbg_disc, vha, 0x20e0,
554 "%s %8phC login gen changed\n",
555 __func__, fcport->port_name);
556 return;
557 }
558
559 n = ea->data[0] / sizeof(struct get_name_list_extended);
560
561 ql_dbg(ql_dbg_disc, vha, 0x20e1,
562 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
563 __func__, __LINE__, fcport->port_name, n,
564 fcport->d_id.b.domain, fcport->d_id.b.area,
565 fcport->d_id.b.al_pa, fcport->loop_id);
566
567 for (i = 0; i < n; i++) {
568 e = &vha->gnl.l[i];
569 wwn = wwn_to_u64(e->port_name);
570 id.b.domain = e->port_id[2];
571 id.b.area = e->port_id[1];
572 id.b.al_pa = e->port_id[0];
573 id.b.rsvd_1 = 0;
574
575 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
576 continue;
577
578 if (IS_SW_RESV_ADDR(id))
579 continue;
580
581 found = 1;
582
583 loop_id = le16_to_cpu(e->nport_handle);
584 loop_id = (loop_id & 0x7fff);
585 if (fcport->fc4f_nvme)
586 current_login_state = e->current_login_state >> 4;
587 else
588 current_login_state = e->current_login_state & 0xf;
589
590
591 ql_dbg(ql_dbg_disc, vha, 0x20e2,
592 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
593 __func__, fcport->port_name,
594 e->current_login_state, fcport->fw_login_state,
595 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
596 fcport->d_id.b.domain, fcport->d_id.b.area,
597 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
598
599 switch (fcport->disc_state) {
600 case DSC_DELETE_PEND:
601 case DSC_DELETED:
602 break;
603 default:
604 if ((id.b24 != fcport->d_id.b24 &&
605 fcport->d_id.b24) ||
606 (fcport->loop_id != FC_NO_LOOP_ID &&
607 fcport->loop_id != loop_id)) {
608 ql_dbg(ql_dbg_disc, vha, 0x20e3,
609 "%s %d %8phC post del sess\n",
610 __func__, __LINE__, fcport->port_name);
611 qlt_schedule_sess_for_deletion(fcport);
612 return;
613 }
614 break;
615 }
616
617 fcport->loop_id = loop_id;
618
619 wwn = wwn_to_u64(fcport->port_name);
620 qlt_find_sess_invalidate_other(vha, wwn,
621 id, loop_id, &conflict_fcport);
622
623 if (conflict_fcport) {
624 /*
625 * Another share fcport share the same loop_id &
626 * nport id. Conflict fcport needs to finish
627 * cleanup before this fcport can proceed to login.
628 */
629 conflict_fcport->conflict = fcport;
630 fcport->login_pause = 1;
631 }
632
633 switch (vha->hw->current_topology) {
634 default:
635 switch (current_login_state) {
636 case DSC_LS_PRLI_COMP:
637 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
638 vha, 0x20e4, "%s %d %8phC post gpdb\n",
639 __func__, __LINE__, fcport->port_name);
640
641 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
642 fcport->port_type = FCT_INITIATOR;
643 else
644 fcport->port_type = FCT_TARGET;
645 data[0] = data[1] = 0;
646 qla2x00_post_async_adisc_work(vha, fcport,
647 data);
648 break;
649 case DSC_LS_PORT_UNAVAIL:
650 default:
651 if (fcport->loop_id == FC_NO_LOOP_ID) {
652 qla2x00_find_new_loop_id(vha, fcport);
653 fcport->fw_login_state =
654 DSC_LS_PORT_UNAVAIL;
655 }
656 ql_dbg(ql_dbg_disc, vha, 0x20e5,
657 "%s %d %8phC\n", __func__, __LINE__,
658 fcport->port_name);
659 qla24xx_fcport_handle_login(vha, fcport);
660 break;
661 }
662 break;
663 case ISP_CFG_N:
664 fcport->fw_login_state = current_login_state;
665 fcport->d_id = id;
666 switch (current_login_state) {
667 case DSC_LS_PRLI_COMP:
668 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
669 fcport->port_type = FCT_INITIATOR;
670 else
671 fcport->port_type = FCT_TARGET;
672
673 data[0] = data[1] = 0;
674 qla2x00_post_async_adisc_work(vha, fcport,
675 data);
676 break;
677 case DSC_LS_PLOGI_COMP:
678 if (fcport_is_bigger(fcport)) {
679 /* local adapter is smaller */
680 if (fcport->loop_id != FC_NO_LOOP_ID)
681 qla2x00_clear_loop_id(fcport);
682
683 fcport->loop_id = loop_id;
684 qla24xx_fcport_handle_login(vha,
685 fcport);
686 break;
687 }
688 /* drop through */
689 default:
690 if (fcport_is_smaller(fcport)) {
691 /* local adapter is bigger */
692 if (fcport->loop_id != FC_NO_LOOP_ID)
693 qla2x00_clear_loop_id(fcport);
694
695 fcport->loop_id = loop_id;
696 qla24xx_fcport_handle_login(vha,
697 fcport);
698 }
699 break;
700 }
701 break;
702 } /* switch (ha->current_topology) */
703 }
704
705 if (!found) {
706 switch (vha->hw->current_topology) {
707 case ISP_CFG_F:
708 case ISP_CFG_FL:
709 for (i = 0; i < n; i++) {
710 e = &vha->gnl.l[i];
711 id.b.domain = e->port_id[0];
712 id.b.area = e->port_id[1];
713 id.b.al_pa = e->port_id[2];
714 id.b.rsvd_1 = 0;
715 loop_id = le16_to_cpu(e->nport_handle);
716
717 if (fcport->d_id.b24 == id.b24) {
718 conflict_fcport =
719 qla2x00_find_fcport_by_wwpn(vha,
720 e->port_name, 0);
721 if (conflict_fcport) {
722 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
723 vha, 0x20e5,
724 "%s %d %8phC post del sess\n",
725 __func__, __LINE__,
726 conflict_fcport->port_name);
727 qlt_schedule_sess_for_deletion
728 (conflict_fcport);
729 }
730 }
731 /*
732 * FW already picked this loop id for
733 * another fcport
734 */
735 if (fcport->loop_id == loop_id)
736 fcport->loop_id = FC_NO_LOOP_ID;
737 }
738 qla24xx_fcport_handle_login(vha, fcport);
739 break;
740 case ISP_CFG_N:
741 fcport->disc_state = DSC_DELETED;
742 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
743 if (fcport->n2n_link_reset_cnt < 2) {
744 fcport->n2n_link_reset_cnt++;
745 /*
746 * remote port is not sending PLOGI.
747 * Reset link to kick start his state
748 * machine
749 */
750 set_bit(N2N_LINK_RESET,
751 &vha->dpc_flags);
752 } else {
753 if (fcport->n2n_chip_reset < 1) {
754 ql_log(ql_log_info, vha, 0x705d,
755 "Chip reset to bring laser down");
756 set_bit(ISP_ABORT_NEEDED,
757 &vha->dpc_flags);
758 fcport->n2n_chip_reset++;
759 } else {
760 ql_log(ql_log_info, vha, 0x705d,
761 "Remote port %8ph is not coming back\n",
762 fcport->port_name);
763 fcport->scan_state = 0;
764 }
765 }
766 qla2xxx_wake_dpc(vha);
767 } else {
768 /*
769 * report port suppose to do PLOGI. Give him
770 * more time. FW will catch it.
771 */
772 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
773 }
774 break;
775 default:
776 break;
777 }
778 }
779 } /* gnl_event */
780
781 static void
qla24xx_async_gnl_sp_done(void * s,int res)782 qla24xx_async_gnl_sp_done(void *s, int res)
783 {
784 struct srb *sp = s;
785 struct scsi_qla_host *vha = sp->vha;
786 unsigned long flags;
787 struct fc_port *fcport = NULL, *tf;
788 u16 i, n = 0, loop_id;
789 struct event_arg ea;
790 struct get_name_list_extended *e;
791 u64 wwn;
792 struct list_head h;
793 bool found = false;
794
795 ql_dbg(ql_dbg_disc, vha, 0x20e7,
796 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
797 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
798 sp->u.iocb_cmd.u.mbx.in_mb[2]);
799
800 if (res == QLA_FUNCTION_TIMEOUT)
801 return;
802
803 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
804 memset(&ea, 0, sizeof(ea));
805 ea.sp = sp;
806 ea.rc = res;
807 ea.event = FCME_GNL_DONE;
808
809 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
810 sizeof(struct get_name_list_extended)) {
811 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
812 sizeof(struct get_name_list_extended);
813 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
814 }
815
816 for (i = 0; i < n; i++) {
817 e = &vha->gnl.l[i];
818 loop_id = le16_to_cpu(e->nport_handle);
819 /* mask out reserve bit */
820 loop_id = (loop_id & 0x7fff);
821 set_bit(loop_id, vha->hw->loop_id_map);
822 wwn = wwn_to_u64(e->port_name);
823
824 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
825 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
826 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
827 e->port_id[0], e->current_login_state, e->last_login_state,
828 (loop_id & 0x7fff));
829 }
830
831 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
832
833 INIT_LIST_HEAD(&h);
834 fcport = tf = NULL;
835 if (!list_empty(&vha->gnl.fcports))
836 list_splice_init(&vha->gnl.fcports, &h);
837 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
838
839 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
840 list_del_init(&fcport->gnl_entry);
841 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
842 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
843 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
844 ea.fcport = fcport;
845
846 qla2x00_fcport_event_handler(vha, &ea);
847 }
848
849 /* create new fcport if fw has knowledge of new sessions */
850 for (i = 0; i < n; i++) {
851 port_id_t id;
852 u64 wwnn;
853
854 e = &vha->gnl.l[i];
855 wwn = wwn_to_u64(e->port_name);
856
857 found = false;
858 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
859 if (!memcmp((u8 *)&wwn, fcport->port_name,
860 WWN_SIZE)) {
861 found = true;
862 break;
863 }
864 }
865
866 id.b.domain = e->port_id[2];
867 id.b.area = e->port_id[1];
868 id.b.al_pa = e->port_id[0];
869 id.b.rsvd_1 = 0;
870
871 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
872 ql_dbg(ql_dbg_disc, vha, 0x2065,
873 "%s %d %8phC %06x post new sess\n",
874 __func__, __LINE__, (u8 *)&wwn, id.b24);
875 wwnn = wwn_to_u64(e->node_name);
876 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
877 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
878 }
879 }
880
881 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
882 vha->gnl.sent = 0;
883 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
884
885 sp->free(sp);
886 }
887
qla24xx_async_gnl(struct scsi_qla_host * vha,fc_port_t * fcport)888 int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
889 {
890 srb_t *sp;
891 struct srb_iocb *mbx;
892 int rval = QLA_FUNCTION_FAILED;
893 unsigned long flags;
894 u16 *mb;
895
896 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
897 return rval;
898
899 ql_dbg(ql_dbg_disc, vha, 0x20d9,
900 "Async-gnlist WWPN %8phC \n", fcport->port_name);
901
902 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
903 fcport->flags |= FCF_ASYNC_SENT;
904 fcport->disc_state = DSC_GNL;
905 fcport->last_rscn_gen = fcport->rscn_gen;
906 fcport->last_login_gen = fcport->login_gen;
907
908 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
909 if (vha->gnl.sent) {
910 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
911 return QLA_SUCCESS;
912 }
913 vha->gnl.sent = 1;
914 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
915
916 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
917 if (!sp)
918 goto done;
919
920 sp->type = SRB_MB_IOCB;
921 sp->name = "gnlist";
922 sp->gen1 = fcport->rscn_gen;
923 sp->gen2 = fcport->login_gen;
924
925 mbx = &sp->u.iocb_cmd;
926 mbx->timeout = qla2x00_async_iocb_timeout;
927 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
928
929 mb = sp->u.iocb_cmd.u.mbx.out_mb;
930 mb[0] = MBC_PORT_NODE_NAME_LIST;
931 mb[1] = BIT_2 | BIT_3;
932 mb[2] = MSW(vha->gnl.ldma);
933 mb[3] = LSW(vha->gnl.ldma);
934 mb[6] = MSW(MSD(vha->gnl.ldma));
935 mb[7] = LSW(MSD(vha->gnl.ldma));
936 mb[8] = vha->gnl.size;
937 mb[9] = vha->vp_idx;
938
939 sp->done = qla24xx_async_gnl_sp_done;
940
941 rval = qla2x00_start_sp(sp);
942 if (rval != QLA_SUCCESS)
943 goto done_free_sp;
944
945 ql_dbg(ql_dbg_disc, vha, 0x20da,
946 "Async-%s - OUT WWPN %8phC hndl %x\n",
947 sp->name, fcport->port_name, sp->handle);
948
949 return rval;
950
951 done_free_sp:
952 sp->free(sp);
953 fcport->flags &= ~FCF_ASYNC_SENT;
954 done:
955 return rval;
956 }
957
qla24xx_post_gnl_work(struct scsi_qla_host * vha,fc_port_t * fcport)958 int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
959 {
960 struct qla_work_evt *e;
961
962 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
963 if (!e)
964 return QLA_FUNCTION_FAILED;
965
966 e->u.fcport.fcport = fcport;
967 fcport->flags |= FCF_ASYNC_ACTIVE;
968 fcport->disc_state = DSC_LOGIN_PEND;
969 return qla2x00_post_work(vha, e);
970 }
971
972 static
qla24xx_async_gpdb_sp_done(void * s,int res)973 void qla24xx_async_gpdb_sp_done(void *s, int res)
974 {
975 struct srb *sp = s;
976 struct scsi_qla_host *vha = sp->vha;
977 struct qla_hw_data *ha = vha->hw;
978 fc_port_t *fcport = sp->fcport;
979 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
980 struct event_arg ea;
981
982 ql_dbg(ql_dbg_disc, vha, 0x20db,
983 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
984 sp->name, res, fcport->port_name, mb[1], mb[2]);
985
986 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
987
988 if (res == QLA_FUNCTION_TIMEOUT)
989 goto done;
990
991 memset(&ea, 0, sizeof(ea));
992 ea.event = FCME_GPDB_DONE;
993 ea.fcport = fcport;
994 ea.sp = sp;
995
996 qla2x00_fcport_event_handler(vha, &ea);
997
998 done:
999 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
1000 sp->u.iocb_cmd.u.mbx.in_dma);
1001
1002 sp->free(sp);
1003 }
1004
qla24xx_post_prli_work(struct scsi_qla_host * vha,fc_port_t * fcport)1005 static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
1006 {
1007 struct qla_work_evt *e;
1008
1009 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1010 if (!e)
1011 return QLA_FUNCTION_FAILED;
1012
1013 e->u.fcport.fcport = fcport;
1014
1015 return qla2x00_post_work(vha, e);
1016 }
1017
1018 static void
qla2x00_async_prli_sp_done(void * ptr,int res)1019 qla2x00_async_prli_sp_done(void *ptr, int res)
1020 {
1021 srb_t *sp = ptr;
1022 struct scsi_qla_host *vha = sp->vha;
1023 struct srb_iocb *lio = &sp->u.iocb_cmd;
1024 struct event_arg ea;
1025
1026 ql_dbg(ql_dbg_disc, vha, 0x2129,
1027 "%s %8phC res %d \n", __func__,
1028 sp->fcport->port_name, res);
1029
1030 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1031
1032 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1033 memset(&ea, 0, sizeof(ea));
1034 ea.event = FCME_PRLI_DONE;
1035 ea.fcport = sp->fcport;
1036 ea.data[0] = lio->u.logio.data[0];
1037 ea.data[1] = lio->u.logio.data[1];
1038 ea.iop[0] = lio->u.logio.iop[0];
1039 ea.iop[1] = lio->u.logio.iop[1];
1040 ea.sp = sp;
1041
1042 qla2x00_fcport_event_handler(vha, &ea);
1043 }
1044
1045 sp->free(sp);
1046 }
1047
1048 int
qla24xx_async_prli(struct scsi_qla_host * vha,fc_port_t * fcport)1049 qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1050 {
1051 srb_t *sp;
1052 struct srb_iocb *lio;
1053 int rval = QLA_FUNCTION_FAILED;
1054
1055 if (!vha->flags.online)
1056 return rval;
1057
1058 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
1059 fcport->fw_login_state == DSC_LS_PRLI_PEND)
1060 return rval;
1061
1062 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1063 if (!sp)
1064 return rval;
1065
1066 fcport->flags |= FCF_ASYNC_SENT;
1067 fcport->logout_completed = 0;
1068
1069 sp->type = SRB_PRLI_CMD;
1070 sp->name = "prli";
1071
1072 lio = &sp->u.iocb_cmd;
1073 lio->timeout = qla2x00_async_iocb_timeout;
1074 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1075
1076 sp->done = qla2x00_async_prli_sp_done;
1077 lio->u.logio.flags = 0;
1078
1079 if (fcport->fc4f_nvme)
1080 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1081
1082 rval = qla2x00_start_sp(sp);
1083 if (rval != QLA_SUCCESS) {
1084 fcport->flags |= FCF_LOGIN_NEEDED;
1085 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1086 goto done_free_sp;
1087 }
1088
1089 ql_dbg(ql_dbg_disc, vha, 0x211b,
1090 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1091 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1092 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
1093
1094 return rval;
1095
1096 done_free_sp:
1097 sp->free(sp);
1098 fcport->flags &= ~FCF_ASYNC_SENT;
1099 return rval;
1100 }
1101
qla24xx_post_gpdb_work(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1102 int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1103 {
1104 struct qla_work_evt *e;
1105
1106 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1107 if (!e)
1108 return QLA_FUNCTION_FAILED;
1109
1110 e->u.fcport.fcport = fcport;
1111 e->u.fcport.opt = opt;
1112 fcport->flags |= FCF_ASYNC_ACTIVE;
1113 return qla2x00_post_work(vha, e);
1114 }
1115
qla24xx_async_gpdb(struct scsi_qla_host * vha,fc_port_t * fcport,u8 opt)1116 int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1117 {
1118 srb_t *sp;
1119 struct srb_iocb *mbx;
1120 int rval = QLA_FUNCTION_FAILED;
1121 u16 *mb;
1122 dma_addr_t pd_dma;
1123 struct port_database_24xx *pd;
1124 struct qla_hw_data *ha = vha->hw;
1125
1126 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) ||
1127 fcport->loop_id == FC_NO_LOOP_ID) {
1128 ql_log(ql_log_warn, vha, 0xffff,
1129 "%s: %8phC - not sending command.\n",
1130 __func__, fcport->port_name);
1131 return rval;
1132 }
1133
1134 fcport->disc_state = DSC_GPDB;
1135
1136 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1137 if (!sp)
1138 goto done;
1139
1140 fcport->flags |= FCF_ASYNC_SENT;
1141 sp->type = SRB_MB_IOCB;
1142 sp->name = "gpdb";
1143 sp->gen1 = fcport->rscn_gen;
1144 sp->gen2 = fcport->login_gen;
1145
1146 mbx = &sp->u.iocb_cmd;
1147 mbx->timeout = qla2x00_async_iocb_timeout;
1148 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1149
1150 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1151 if (pd == NULL) {
1152 ql_log(ql_log_warn, vha, 0xd043,
1153 "Failed to allocate port database structure.\n");
1154 goto done_free_sp;
1155 }
1156
1157 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1158 mb[0] = MBC_GET_PORT_DATABASE;
1159 mb[1] = fcport->loop_id;
1160 mb[2] = MSW(pd_dma);
1161 mb[3] = LSW(pd_dma);
1162 mb[6] = MSW(MSD(pd_dma));
1163 mb[7] = LSW(MSD(pd_dma));
1164 mb[9] = vha->vp_idx;
1165 mb[10] = opt;
1166
1167 mbx->u.mbx.in = (void *)pd;
1168 mbx->u.mbx.in_dma = pd_dma;
1169
1170 sp->done = qla24xx_async_gpdb_sp_done;
1171
1172 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1173 "Async-%s %8phC hndl %x opt %x\n",
1174 sp->name, fcport->port_name, sp->handle, opt);
1175
1176 rval = qla2x00_start_sp(sp);
1177 if (rval != QLA_SUCCESS)
1178 goto done_free_sp;
1179 return rval;
1180
1181 done_free_sp:
1182 if (pd)
1183 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1184
1185 sp->free(sp);
1186 fcport->flags &= ~FCF_ASYNC_SENT;
1187 done:
1188 qla24xx_post_gpdb_work(vha, fcport, opt);
1189 return rval;
1190 }
1191
1192 static
__qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1193 void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1194 {
1195 unsigned long flags;
1196
1197 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1198 ea->fcport->login_gen++;
1199 ea->fcport->deleted = 0;
1200 ea->fcport->logout_on_delete = 1;
1201
1202 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1203 vha->fcport_count++;
1204 ea->fcport->login_succ = 1;
1205
1206 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1207 qla24xx_sched_upd_fcport(ea->fcport);
1208 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1209 } else if (ea->fcport->login_succ) {
1210 /*
1211 * We have an existing session. A late RSCN delivery
1212 * must have triggered the session to be re-validate.
1213 * Session is still valid.
1214 */
1215 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1216 "%s %d %8phC session revalidate success\n",
1217 __func__, __LINE__, ea->fcport->port_name);
1218 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
1219 }
1220 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1221 }
1222
1223 static
qla24xx_handle_gpdb_event(scsi_qla_host_t * vha,struct event_arg * ea)1224 void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1225 {
1226 fc_port_t *fcport = ea->fcport;
1227 struct port_database_24xx *pd;
1228 struct srb *sp = ea->sp;
1229 uint8_t ls;
1230
1231 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1232
1233 fcport->flags &= ~FCF_ASYNC_SENT;
1234
1235 ql_dbg(ql_dbg_disc, vha, 0x20d2,
1236 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1237 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1238 ea->rc);
1239
1240 if (fcport->disc_state == DSC_DELETE_PEND)
1241 return;
1242
1243 if (fcport->fc4f_nvme)
1244 ls = pd->current_login_state >> 4;
1245 else
1246 ls = pd->current_login_state & 0xf;
1247
1248 switch (ls) {
1249 case PDS_PRLI_COMPLETE:
1250 __qla24xx_parse_gpdb(vha, fcport, pd);
1251 break;
1252 case PDS_PLOGI_PENDING:
1253 case PDS_PLOGI_COMPLETE:
1254 case PDS_PRLI_PENDING:
1255 case PDS_PRLI2_PENDING:
1256 /* Set discovery state back to GNL to Relogin attempt */
1257 if (qla_dual_mode_enabled(vha) ||
1258 qla_ini_mode_enabled(vha)) {
1259 fcport->disc_state = DSC_GNL;
1260 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1261 }
1262 return;
1263 case PDS_LOGO_PENDING:
1264 case PDS_PORT_UNAVAILABLE:
1265 default:
1266 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1267 __func__, __LINE__, fcport->port_name);
1268 qlt_schedule_sess_for_deletion(fcport);
1269 return;
1270 }
1271 __qla24xx_handle_gpdb_event(vha, ea);
1272 } /* gpdb event */
1273
qla_chk_n2n_b4_login(struct scsi_qla_host * vha,fc_port_t * fcport)1274 static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1275 {
1276 u8 login = 0;
1277 int rc;
1278
1279 if (qla_tgt_mode_enabled(vha))
1280 return;
1281
1282 if (qla_dual_mode_enabled(vha)) {
1283 if (N2N_TOPO(vha->hw)) {
1284 u64 mywwn, wwn;
1285
1286 mywwn = wwn_to_u64(vha->port_name);
1287 wwn = wwn_to_u64(fcport->port_name);
1288 if (mywwn > wwn)
1289 login = 1;
1290 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1291 && time_after_eq(jiffies,
1292 fcport->plogi_nack_done_deadline))
1293 login = 1;
1294 } else {
1295 login = 1;
1296 }
1297 } else {
1298 /* initiator mode */
1299 login = 1;
1300 }
1301
1302 if (login) {
1303 if (fcport->loop_id == FC_NO_LOOP_ID) {
1304 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1305 rc = qla2x00_find_new_loop_id(vha, fcport);
1306 if (rc) {
1307 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1308 "%s %d %8phC post del sess - out of loopid\n",
1309 __func__, __LINE__, fcport->port_name);
1310 fcport->scan_state = 0;
1311 qlt_schedule_sess_for_deletion(fcport);
1312 return;
1313 }
1314 }
1315 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1316 "%s %d %8phC post login\n",
1317 __func__, __LINE__, fcport->port_name);
1318 qla2x00_post_async_login_work(vha, fcport, NULL);
1319 }
1320 }
1321
qla24xx_fcport_handle_login(struct scsi_qla_host * vha,fc_port_t * fcport)1322 int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1323 {
1324 u16 data[2];
1325 u64 wwn;
1326 u16 sec;
1327
1328 ql_dbg(ql_dbg_disc, vha, 0x20d8,
1329 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n",
1330 __func__, fcport->port_name, fcport->disc_state,
1331 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1332 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
1333 fcport->login_gen, fcport->login_retry,
1334 fcport->loop_id, fcport->scan_state);
1335
1336 if (fcport->scan_state != QLA_FCPORT_FOUND)
1337 return 0;
1338
1339 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1340 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1341 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
1342 return 0;
1343
1344 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1345 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1346 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1347 return 0;
1348 }
1349 }
1350
1351 /* for pure Target Mode. Login will not be initiated */
1352 if (vha->host->active_mode == MODE_TARGET)
1353 return 0;
1354
1355 if (fcport->flags & FCF_ASYNC_SENT) {
1356 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1357 return 0;
1358 }
1359
1360 switch (fcport->disc_state) {
1361 case DSC_DELETED:
1362 wwn = wwn_to_u64(fcport->node_name);
1363 switch (vha->hw->current_topology) {
1364 case ISP_CFG_N:
1365 if (fcport_is_smaller(fcport)) {
1366 /* this adapter is bigger */
1367 if (fcport->login_retry) {
1368 if (fcport->loop_id == FC_NO_LOOP_ID) {
1369 qla2x00_find_new_loop_id(vha,
1370 fcport);
1371 fcport->fw_login_state =
1372 DSC_LS_PORT_UNAVAIL;
1373 }
1374 fcport->login_retry--;
1375 qla_post_els_plogi_work(vha, fcport);
1376 } else {
1377 ql_log(ql_log_info, vha, 0x705d,
1378 "Unable to reach remote port %8phC",
1379 fcport->port_name);
1380 }
1381 } else {
1382 qla24xx_post_gnl_work(vha, fcport);
1383 }
1384 break;
1385 default:
1386 if (wwn == 0) {
1387 ql_dbg(ql_dbg_disc, vha, 0xffff,
1388 "%s %d %8phC post GNNID\n",
1389 __func__, __LINE__, fcport->port_name);
1390 qla24xx_post_gnnid_work(vha, fcport);
1391 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1392 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1393 "%s %d %8phC post gnl\n",
1394 __func__, __LINE__, fcport->port_name);
1395 qla24xx_post_gnl_work(vha, fcport);
1396 } else {
1397 qla_chk_n2n_b4_login(vha, fcport);
1398 }
1399 break;
1400 }
1401 break;
1402
1403 case DSC_GNL:
1404 switch (vha->hw->current_topology) {
1405 case ISP_CFG_N:
1406 if ((fcport->current_login_state & 0xf) == 0x6) {
1407 ql_dbg(ql_dbg_disc, vha, 0x2118,
1408 "%s %d %8phC post GPDB work\n",
1409 __func__, __LINE__, fcport->port_name);
1410 fcport->chip_reset =
1411 vha->hw->base_qpair->chip_reset;
1412 qla24xx_post_gpdb_work(vha, fcport, 0);
1413 } else {
1414 ql_dbg(ql_dbg_disc, vha, 0x2118,
1415 "%s %d %8phC post NVMe PRLI\n",
1416 __func__, __LINE__, fcport->port_name);
1417 qla24xx_post_prli_work(vha, fcport);
1418 }
1419 break;
1420 default:
1421 if (fcport->login_pause) {
1422 fcport->last_rscn_gen = fcport->rscn_gen;
1423 fcport->last_login_gen = fcport->login_gen;
1424 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1425 break;
1426 }
1427 qla_chk_n2n_b4_login(vha, fcport);
1428 break;
1429 }
1430 break;
1431
1432 case DSC_LOGIN_FAILED:
1433 fcport->login_retry--;
1434 ql_dbg(ql_dbg_disc, vha, 0x20d0,
1435 "%s %d %8phC post gidpn\n",
1436 __func__, __LINE__, fcport->port_name);
1437 if (N2N_TOPO(vha->hw))
1438 qla_chk_n2n_b4_login(vha, fcport);
1439 else
1440 qla24xx_post_gidpn_work(vha, fcport);
1441 break;
1442
1443 case DSC_LOGIN_COMPLETE:
1444 /* recheck login state */
1445 ql_dbg(ql_dbg_disc, vha, 0x20d1,
1446 "%s %d %8phC post adisc\n",
1447 __func__, __LINE__, fcport->port_name);
1448 fcport->login_retry--;
1449 data[0] = data[1] = 0;
1450 qla2x00_post_async_adisc_work(vha, fcport, data);
1451 break;
1452
1453 case DSC_LOGIN_PEND:
1454 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1455 qla24xx_post_prli_work(vha, fcport);
1456 break;
1457
1458 case DSC_UPD_FCPORT:
1459 sec = jiffies_to_msecs(jiffies -
1460 fcport->jiffies_at_registration)/1000;
1461 if (fcport->sec_since_registration < sec && sec &&
1462 !(sec % 60)) {
1463 fcport->sec_since_registration = sec;
1464 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1465 "%s %8phC - Slow Rport registration(%d Sec)\n",
1466 __func__, fcport->port_name, sec);
1467 }
1468
1469 if (fcport->next_disc_state != DSC_DELETE_PEND)
1470 fcport->next_disc_state = DSC_ADISC;
1471 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1472 break;
1473
1474 default:
1475 break;
1476 }
1477
1478 return 0;
1479 }
1480
1481 static
qla24xx_handle_rscn_event(fc_port_t * fcport,struct event_arg * ea)1482 void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
1483 {
1484 fcport->rscn_gen++;
1485
1486 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1487 "%s %8phC DS %d LS %d\n",
1488 __func__, fcport->port_name, fcport->disc_state,
1489 fcport->fw_login_state);
1490
1491 if (fcport->flags & FCF_ASYNC_SENT)
1492 return;
1493
1494 switch (fcport->disc_state) {
1495 case DSC_DELETED:
1496 case DSC_LOGIN_COMPLETE:
1497 qla24xx_post_gpnid_work(fcport->vha, &ea->id);
1498 break;
1499 default:
1500 break;
1501 }
1502 }
1503
qla24xx_post_newsess_work(struct scsi_qla_host * vha,port_id_t * id,u8 * port_name,u8 * node_name,void * pla,u8 fc4_type)1504 int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1505 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
1506 {
1507 struct qla_work_evt *e;
1508 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1509 if (!e)
1510 return QLA_FUNCTION_FAILED;
1511
1512 e->u.new_sess.id = *id;
1513 e->u.new_sess.pla = pla;
1514 e->u.new_sess.fc4_type = fc4_type;
1515 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1516 if (node_name)
1517 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
1518
1519 return qla2x00_post_work(vha, e);
1520 }
1521
1522 static
qla24xx_handle_relogin_event(scsi_qla_host_t * vha,struct event_arg * ea)1523 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1524 struct event_arg *ea)
1525 {
1526 fc_port_t *fcport = ea->fcport;
1527
1528 ql_dbg(ql_dbg_disc, vha, 0x2102,
1529 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1530 __func__, fcport->port_name, fcport->disc_state,
1531 fcport->fw_login_state, fcport->login_pause,
1532 fcport->deleted, fcport->conflict,
1533 fcport->last_rscn_gen, fcport->rscn_gen,
1534 fcport->last_login_gen, fcport->login_gen,
1535 fcport->flags);
1536
1537 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1538 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1539 return;
1540
1541 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1542 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1543 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1544 return;
1545 }
1546 }
1547
1548 if (fcport->last_rscn_gen != fcport->rscn_gen) {
1549 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
1550 __func__, __LINE__, fcport->port_name);
1551
1552 qla24xx_post_gidpn_work(vha, fcport);
1553 return;
1554 }
1555
1556 qla24xx_fcport_handle_login(vha, fcport);
1557 }
1558
1559
qla_handle_els_plogi_done(scsi_qla_host_t * vha,struct event_arg * ea)1560 void qla_handle_els_plogi_done(scsi_qla_host_t *vha, struct event_arg *ea)
1561 {
1562 ql_dbg(ql_dbg_disc, vha, 0x2118,
1563 "%s %d %8phC post PRLI\n",
1564 __func__, __LINE__, ea->fcport->port_name);
1565 qla24xx_post_prli_work(vha, ea->fcport);
1566 }
1567
qla2x00_fcport_event_handler(scsi_qla_host_t * vha,struct event_arg * ea)1568 void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
1569 {
1570 fc_port_t *f, *tf;
1571 uint32_t id = 0, mask, rid;
1572 unsigned long flags;
1573 fc_port_t *fcport;
1574
1575 switch (ea->event) {
1576 case FCME_RELOGIN:
1577 if (test_bit(UNLOADING, &vha->dpc_flags))
1578 return;
1579
1580 qla24xx_handle_relogin_event(vha, ea);
1581 break;
1582 case FCME_RSCN:
1583 if (test_bit(UNLOADING, &vha->dpc_flags))
1584 return;
1585 switch (ea->id.b.rsvd_1) {
1586 case RSCN_PORT_ADDR:
1587 fcport = qla2x00_find_fcport_by_nportid
1588 (vha, &ea->id, 1);
1589 if (fcport) {
1590 fcport->scan_needed = 1;
1591 fcport->rscn_gen++;
1592 }
1593
1594 spin_lock_irqsave(&vha->work_lock, flags);
1595 if (vha->scan.scan_flags == 0) {
1596 ql_dbg(ql_dbg_disc, vha, 0xffff,
1597 "%s: schedule\n", __func__);
1598 vha->scan.scan_flags |= SF_QUEUED;
1599 schedule_delayed_work(&vha->scan.scan_work, 5);
1600 }
1601 spin_unlock_irqrestore(&vha->work_lock, flags);
1602
1603 break;
1604 case RSCN_AREA_ADDR:
1605 case RSCN_DOM_ADDR:
1606 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1607 mask = 0xffff00;
1608 ql_dbg(ql_dbg_async, vha, 0x5044,
1609 "RSCN: Area 0x%06x was affected\n",
1610 ea->id.b24);
1611 } else {
1612 mask = 0xff0000;
1613 ql_dbg(ql_dbg_async, vha, 0x507a,
1614 "RSCN: Domain 0x%06x was affected\n",
1615 ea->id.b24);
1616 }
1617
1618 rid = ea->id.b24 & mask;
1619 list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1620 list) {
1621 id = f->d_id.b24 & mask;
1622 if (rid == id) {
1623 ea->fcport = f;
1624 qla24xx_handle_rscn_event(f, ea);
1625 }
1626 }
1627 break;
1628 case RSCN_FAB_ADDR:
1629 default:
1630 ql_log(ql_log_warn, vha, 0xd045,
1631 "RSCN: Fabric was affected. Addr format %d\n",
1632 ea->id.b.rsvd_1);
1633 qla2x00_mark_all_devices_lost(vha, 1);
1634 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1635 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1636 }
1637 break;
1638 case FCME_GIDPN_DONE:
1639 qla24xx_handle_gidpn_event(vha, ea);
1640 break;
1641 case FCME_GNL_DONE:
1642 qla24xx_handle_gnl_done_event(vha, ea);
1643 break;
1644 case FCME_GPSC_DONE:
1645 qla24xx_handle_gpsc_event(vha, ea);
1646 break;
1647 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1648 qla24xx_handle_plogi_done_event(vha, ea);
1649 break;
1650 case FCME_PRLI_DONE:
1651 qla24xx_handle_prli_done_event(vha, ea);
1652 break;
1653 case FCME_GPDB_DONE:
1654 qla24xx_handle_gpdb_event(vha, ea);
1655 break;
1656 case FCME_GPNID_DONE:
1657 qla24xx_handle_gpnid_event(vha, ea);
1658 break;
1659 case FCME_GFFID_DONE:
1660 qla24xx_handle_gffid_event(vha, ea);
1661 break;
1662 case FCME_ADISC_DONE:
1663 qla24xx_handle_adisc_event(vha, ea);
1664 break;
1665 case FCME_GNNID_DONE:
1666 qla24xx_handle_gnnid_event(vha, ea);
1667 break;
1668 case FCME_GFPNID_DONE:
1669 qla24xx_handle_gfpnid_event(vha, ea);
1670 break;
1671 case FCME_ELS_PLOGI_DONE:
1672 qla_handle_els_plogi_done(vha, ea);
1673 break;
1674 default:
1675 BUG_ON(1);
1676 break;
1677 }
1678 }
1679
1680 static void
qla2x00_tmf_iocb_timeout(void * data)1681 qla2x00_tmf_iocb_timeout(void *data)
1682 {
1683 srb_t *sp = data;
1684 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1685
1686 tmf->u.tmf.comp_status = CS_TIMEOUT;
1687 complete(&tmf->u.tmf.comp);
1688 }
1689
1690 static void
qla2x00_tmf_sp_done(void * ptr,int res)1691 qla2x00_tmf_sp_done(void *ptr, int res)
1692 {
1693 srb_t *sp = ptr;
1694 struct srb_iocb *tmf = &sp->u.iocb_cmd;
1695
1696 complete(&tmf->u.tmf.comp);
1697 }
1698
1699 int
qla2x00_async_tm_cmd(fc_port_t * fcport,uint32_t flags,uint32_t lun,uint32_t tag)1700 qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
1701 uint32_t tag)
1702 {
1703 struct scsi_qla_host *vha = fcport->vha;
1704 struct srb_iocb *tm_iocb;
1705 srb_t *sp;
1706 int rval = QLA_FUNCTION_FAILED;
1707
1708 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1709 if (!sp)
1710 goto done;
1711
1712 tm_iocb = &sp->u.iocb_cmd;
1713 sp->type = SRB_TM_CMD;
1714 sp->name = "tmf";
1715
1716 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1717 init_completion(&tm_iocb->u.tmf.comp);
1718 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1719
1720 tm_iocb->u.tmf.flags = flags;
1721 tm_iocb->u.tmf.lun = lun;
1722 tm_iocb->u.tmf.data = tag;
1723 sp->done = qla2x00_tmf_sp_done;
1724
1725 ql_dbg(ql_dbg_taskm, vha, 0x802f,
1726 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1727 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1728 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1729
1730 rval = qla2x00_start_sp(sp);
1731 if (rval != QLA_SUCCESS)
1732 goto done_free_sp;
1733 wait_for_completion(&tm_iocb->u.tmf.comp);
1734
1735 rval = tm_iocb->u.tmf.data;
1736
1737 if (rval != QLA_SUCCESS) {
1738 ql_log(ql_log_warn, vha, 0x8030,
1739 "TM IOCB failed (%x).\n", rval);
1740 }
1741
1742 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1743 flags = tm_iocb->u.tmf.flags;
1744 lun = (uint16_t)tm_iocb->u.tmf.lun;
1745
1746 /* Issue Marker IOCB */
1747 qla2x00_marker(vha, vha->hw->req_q_map[0],
1748 vha->hw->rsp_q_map[0], fcport->loop_id, lun,
1749 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1750 }
1751
1752 done_free_sp:
1753 sp->free(sp);
1754 fcport->flags &= ~FCF_ASYNC_SENT;
1755 done:
1756 return rval;
1757 }
1758
1759 static void
qla24xx_abort_iocb_timeout(void * data)1760 qla24xx_abort_iocb_timeout(void *data)
1761 {
1762 srb_t *sp = data;
1763 struct srb_iocb *abt = &sp->u.iocb_cmd;
1764
1765 abt->u.abt.comp_status = CS_TIMEOUT;
1766 sp->done(sp, QLA_FUNCTION_TIMEOUT);
1767 }
1768
1769 static void
qla24xx_abort_sp_done(void * ptr,int res)1770 qla24xx_abort_sp_done(void *ptr, int res)
1771 {
1772 srb_t *sp = ptr;
1773 struct srb_iocb *abt = &sp->u.iocb_cmd;
1774
1775 if (del_timer(&sp->u.iocb_cmd.timer)) {
1776 if (sp->flags & SRB_WAKEUP_ON_COMP)
1777 complete(&abt->u.abt.comp);
1778 else
1779 sp->free(sp);
1780 }
1781 }
1782
1783 int
qla24xx_async_abort_cmd(srb_t * cmd_sp,bool wait)1784 qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
1785 {
1786 scsi_qla_host_t *vha = cmd_sp->vha;
1787 struct srb_iocb *abt_iocb;
1788 srb_t *sp;
1789 int rval = QLA_FUNCTION_FAILED;
1790
1791 sp = qla2xxx_get_qpair_sp(cmd_sp->qpair, cmd_sp->fcport, GFP_KERNEL);
1792 if (!sp)
1793 goto done;
1794
1795 abt_iocb = &sp->u.iocb_cmd;
1796 sp->type = SRB_ABT_CMD;
1797 sp->name = "abort";
1798 sp->qpair = cmd_sp->qpair;
1799 if (wait)
1800 sp->flags = SRB_WAKEUP_ON_COMP;
1801
1802 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1803 init_completion(&abt_iocb->u.abt.comp);
1804 /* FW can send 2 x ABTS's timeout/20s */
1805 qla2x00_init_timer(sp, 42);
1806
1807 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1808 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
1809
1810 sp->done = qla24xx_abort_sp_done;
1811
1812 ql_dbg(ql_dbg_async, vha, 0x507c,
1813 "Abort command issued - hdl=%x, type=%x\n",
1814 cmd_sp->handle, cmd_sp->type);
1815
1816 rval = qla2x00_start_sp(sp);
1817 if (rval != QLA_SUCCESS)
1818 goto done_free_sp;
1819
1820 if (wait) {
1821 wait_for_completion(&abt_iocb->u.abt.comp);
1822 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1823 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1824 } else {
1825 goto done;
1826 }
1827
1828 done_free_sp:
1829 sp->free(sp);
1830 done:
1831 return rval;
1832 }
1833
1834 int
qla24xx_async_abort_command(srb_t * sp)1835 qla24xx_async_abort_command(srb_t *sp)
1836 {
1837 unsigned long flags = 0;
1838
1839 uint32_t handle;
1840 fc_port_t *fcport = sp->fcport;
1841 struct scsi_qla_host *vha = fcport->vha;
1842 struct qla_hw_data *ha = vha->hw;
1843 struct req_que *req = vha->req;
1844
1845 if (vha->flags.qpairs_available && sp->qpair)
1846 req = sp->qpair->req;
1847
1848 spin_lock_irqsave(&ha->hardware_lock, flags);
1849 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1850 if (req->outstanding_cmds[handle] == sp)
1851 break;
1852 }
1853 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1854 if (handle == req->num_outstanding_cmds) {
1855 /* Command not found. */
1856 return QLA_FUNCTION_FAILED;
1857 }
1858 if (sp->type == SRB_FXIOCB_DCMD)
1859 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1860 FXDISC_ABORT_IOCTL);
1861
1862 return qla24xx_async_abort_cmd(sp, true);
1863 }
1864
1865 static void
qla24xx_handle_prli_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1866 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1867 {
1868 switch (ea->data[0]) {
1869 case MBS_COMMAND_COMPLETE:
1870 ql_dbg(ql_dbg_disc, vha, 0x2118,
1871 "%s %d %8phC post gpdb\n",
1872 __func__, __LINE__, ea->fcport->port_name);
1873
1874 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1875 ea->fcport->logout_on_delete = 1;
1876 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1877 break;
1878 default:
1879 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1880 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1881 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1882 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1883 break;
1884 }
1885
1886 if (ea->fcport->n2n_flag) {
1887 ql_dbg(ql_dbg_disc, vha, 0x2118,
1888 "%s %d %8phC post fc4 prli\n",
1889 __func__, __LINE__, ea->fcport->port_name);
1890 ea->fcport->fc4f_nvme = 0;
1891 ea->fcport->n2n_flag = 0;
1892 qla24xx_post_prli_work(vha, ea->fcport);
1893 }
1894 ql_dbg(ql_dbg_disc, vha, 0x2119,
1895 "%s %d %8phC unhandle event of %x\n",
1896 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1897 break;
1898 }
1899 }
1900
1901 static void
qla24xx_handle_plogi_done_event(struct scsi_qla_host * vha,struct event_arg * ea)1902 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1903 {
1904 port_id_t cid; /* conflict Nport id */
1905 u16 lid;
1906 struct fc_port *conflict_fcport;
1907 unsigned long flags;
1908 struct fc_port *fcport = ea->fcport;
1909
1910 ql_dbg(ql_dbg_disc, vha, 0xffff,
1911 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1912 __func__, fcport->port_name, fcport->disc_state,
1913 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1914 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1,
1915 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1916
1917 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1918 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1919 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1920 "%s %d %8phC Remote is trying to login\n",
1921 __func__, __LINE__, fcport->port_name);
1922 return;
1923 }
1924
1925 if ((fcport->disc_state == DSC_DELETE_PEND) ||
1926 (fcport->disc_state == DSC_DELETED)) {
1927 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1928 return;
1929 }
1930
1931 if (ea->sp->gen2 != fcport->login_gen) {
1932 /* target side must have changed it. */
1933 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1934 "%s %8phC generation changed\n",
1935 __func__, fcport->port_name);
1936 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1937 return;
1938 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1939 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
1940 __func__, __LINE__, fcport->port_name);
1941 qla24xx_post_gidpn_work(vha, fcport);
1942 return;
1943 }
1944
1945 switch (ea->data[0]) {
1946 case MBS_COMMAND_COMPLETE:
1947 /*
1948 * Driver must validate login state - If PRLI not complete,
1949 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1950 * requests.
1951 */
1952 if (ea->fcport->fc4f_nvme) {
1953 ql_dbg(ql_dbg_disc, vha, 0x2117,
1954 "%s %d %8phC post prli\n",
1955 __func__, __LINE__, ea->fcport->port_name);
1956 qla24xx_post_prli_work(vha, ea->fcport);
1957 } else {
1958 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1959 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1960 __func__, __LINE__, ea->fcport->port_name,
1961 ea->fcport->loop_id, ea->fcport->d_id.b24);
1962
1963 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1964 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1965 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1966 ea->fcport->logout_on_delete = 1;
1967 ea->fcport->send_els_logo = 0;
1968 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1969 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1970
1971 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1972 }
1973 break;
1974 case MBS_COMMAND_ERROR:
1975 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
1976 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1977
1978 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1979 ea->fcport->disc_state = DSC_LOGIN_FAILED;
1980 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
1981 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1982 else
1983 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
1984 break;
1985 case MBS_LOOP_ID_USED:
1986 /* data[1] = IO PARAM 1 = nport ID */
1987 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
1988 cid.b.area = (ea->iop[1] >> 8) & 0xff;
1989 cid.b.al_pa = ea->iop[1] & 0xff;
1990 cid.b.rsvd_1 = 0;
1991
1992 ql_dbg(ql_dbg_disc, vha, 0x20ec,
1993 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
1994 __func__, __LINE__, ea->fcport->port_name,
1995 ea->fcport->loop_id, cid.b24);
1996
1997 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1998 ea->fcport->loop_id = FC_NO_LOOP_ID;
1999 qla24xx_post_gnl_work(vha, ea->fcport);
2000 break;
2001 case MBS_PORT_ID_USED:
2002 lid = ea->iop[1] & 0xffff;
2003 qlt_find_sess_invalidate_other(vha,
2004 wwn_to_u64(ea->fcport->port_name),
2005 ea->fcport->d_id, lid, &conflict_fcport);
2006
2007 if (conflict_fcport) {
2008 /*
2009 * Another fcport share the same loop_id/nport id.
2010 * Conflict fcport needs to finish cleanup before this
2011 * fcport can proceed to login.
2012 */
2013 conflict_fcport->conflict = ea->fcport;
2014 ea->fcport->login_pause = 1;
2015
2016 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2017 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2018 __func__, __LINE__, ea->fcport->port_name,
2019 ea->fcport->d_id.b24, lid);
2020 qla2x00_clear_loop_id(ea->fcport);
2021 qla24xx_post_gidpn_work(vha, ea->fcport);
2022 } else {
2023 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2024 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2025 __func__, __LINE__, ea->fcport->port_name,
2026 ea->fcport->d_id.b24, lid);
2027
2028 qla2x00_clear_loop_id(ea->fcport);
2029 set_bit(lid, vha->hw->loop_id_map);
2030 ea->fcport->loop_id = lid;
2031 ea->fcport->keep_nport_handle = 0;
2032 qlt_schedule_sess_for_deletion(ea->fcport);
2033 }
2034 break;
2035 }
2036 return;
2037 }
2038
2039 void
qla2x00_async_logout_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)2040 qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2041 uint16_t *data)
2042 {
2043 qlt_logo_completion_handler(fcport, data[0]);
2044 fcport->login_gen++;
2045 fcport->flags &= ~FCF_ASYNC_ACTIVE;
2046 return;
2047 }
2048
2049 void
qla2x00_async_adisc_done(struct scsi_qla_host * vha,fc_port_t * fcport,uint16_t * data)2050 qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2051 uint16_t *data)
2052 {
2053 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
2054 if (data[0] == MBS_COMMAND_COMPLETE) {
2055 qla2x00_update_fcport(vha, fcport);
2056
2057 return;
2058 }
2059
2060 /* Retry login. */
2061 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
2062 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2063 else
2064 qla2x00_mark_device_lost(vha, fcport, 1, 0);
2065
2066 return;
2067 }
2068
2069 /****************************************************************************/
2070 /* QLogic ISP2x00 Hardware Support Functions. */
2071 /****************************************************************************/
2072
2073 static int
qla83xx_nic_core_fw_load(scsi_qla_host_t * vha)2074 qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2075 {
2076 int rval = QLA_SUCCESS;
2077 struct qla_hw_data *ha = vha->hw;
2078 uint32_t idc_major_ver, idc_minor_ver;
2079 uint16_t config[4];
2080
2081 qla83xx_idc_lock(vha, 0);
2082
2083 /* SV: TODO: Assign initialization timeout from
2084 * flash-info / other param
2085 */
2086 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2087 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2088
2089 /* Set our fcoe function presence */
2090 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2091 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2092 "Error while setting DRV-Presence.\n");
2093 rval = QLA_FUNCTION_FAILED;
2094 goto exit;
2095 }
2096
2097 /* Decide the reset ownership */
2098 qla83xx_reset_ownership(vha);
2099
2100 /*
2101 * On first protocol driver load:
2102 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2103 * register.
2104 * Others: Check compatibility with current IDC Major version.
2105 */
2106 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2107 if (ha->flags.nic_core_reset_owner) {
2108 /* Set IDC Major version */
2109 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2110 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2111
2112 /* Clearing IDC-Lock-Recovery register */
2113 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2114 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2115 /*
2116 * Clear further IDC participation if we are not compatible with
2117 * the current IDC Major Version.
2118 */
2119 ql_log(ql_log_warn, vha, 0xb07d,
2120 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2121 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2122 __qla83xx_clear_drv_presence(vha);
2123 rval = QLA_FUNCTION_FAILED;
2124 goto exit;
2125 }
2126 /* Each function sets its supported Minor version. */
2127 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2128 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2129 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2130
2131 if (ha->flags.nic_core_reset_owner) {
2132 memset(config, 0, sizeof(config));
2133 if (!qla81xx_get_port_config(vha, config))
2134 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2135 QLA8XXX_DEV_READY);
2136 }
2137
2138 rval = qla83xx_idc_state_handler(vha);
2139
2140 exit:
2141 qla83xx_idc_unlock(vha, 0);
2142
2143 return rval;
2144 }
2145
2146 /*
2147 * qla2x00_initialize_adapter
2148 * Initialize board.
2149 *
2150 * Input:
2151 * ha = adapter block pointer.
2152 *
2153 * Returns:
2154 * 0 = success
2155 */
2156 int
qla2x00_initialize_adapter(scsi_qla_host_t * vha)2157 qla2x00_initialize_adapter(scsi_qla_host_t *vha)
2158 {
2159 int rval;
2160 struct qla_hw_data *ha = vha->hw;
2161 struct req_que *req = ha->req_q_map[0];
2162
2163 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2164 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2165
2166 /* Clear adapter flags. */
2167 vha->flags.online = 0;
2168 ha->flags.chip_reset_done = 0;
2169 vha->flags.reset_active = 0;
2170 ha->flags.pci_channel_io_perm_failure = 0;
2171 ha->flags.eeh_busy = 0;
2172 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
2173 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2174 atomic_set(&vha->loop_state, LOOP_DOWN);
2175 vha->device_flags = DFLG_NO_CABLE;
2176 vha->dpc_flags = 0;
2177 vha->flags.management_server_logged_in = 0;
2178 vha->marker_needed = 0;
2179 ha->isp_abort_cnt = 0;
2180 ha->beacon_blink_led = 0;
2181
2182 set_bit(0, ha->req_qid_map);
2183 set_bit(0, ha->rsp_qid_map);
2184
2185 ql_dbg(ql_dbg_init, vha, 0x0040,
2186 "Configuring PCI space...\n");
2187 rval = ha->isp_ops->pci_config(vha);
2188 if (rval) {
2189 ql_log(ql_log_warn, vha, 0x0044,
2190 "Unable to configure PCI space.\n");
2191 return (rval);
2192 }
2193
2194 ha->isp_ops->reset_chip(vha);
2195
2196 rval = qla2xxx_get_flash_info(vha);
2197 if (rval) {
2198 ql_log(ql_log_fatal, vha, 0x004f,
2199 "Unable to validate FLASH data.\n");
2200 return rval;
2201 }
2202
2203 if (IS_QLA8044(ha)) {
2204 qla8044_read_reset_template(vha);
2205
2206 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2207 * If DONRESET_BIT0 is set, drivers should not set dev_state
2208 * to NEED_RESET. But if NEED_RESET is set, drivers should
2209 * should honor the reset. */
2210 if (ql2xdontresethba == 1)
2211 qla8044_set_idc_dontreset(vha);
2212 }
2213
2214 ha->isp_ops->get_flash_version(vha, req->ring);
2215 ql_dbg(ql_dbg_init, vha, 0x0061,
2216 "Configure NVRAM parameters...\n");
2217
2218 ha->isp_ops->nvram_config(vha);
2219
2220 if (ha->flags.disable_serdes) {
2221 /* Mask HBA via NVRAM settings? */
2222 ql_log(ql_log_info, vha, 0x0077,
2223 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
2224 return QLA_FUNCTION_FAILED;
2225 }
2226
2227 ql_dbg(ql_dbg_init, vha, 0x0078,
2228 "Verifying loaded RISC code...\n");
2229
2230 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2231 rval = ha->isp_ops->chip_diag(vha);
2232 if (rval)
2233 return (rval);
2234 rval = qla2x00_setup_chip(vha);
2235 if (rval)
2236 return (rval);
2237 }
2238
2239 if (IS_QLA84XX(ha)) {
2240 ha->cs84xx = qla84xx_get_chip(vha);
2241 if (!ha->cs84xx) {
2242 ql_log(ql_log_warn, vha, 0x00d0,
2243 "Unable to configure ISP84XX.\n");
2244 return QLA_FUNCTION_FAILED;
2245 }
2246 }
2247
2248 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2249 rval = qla2x00_init_rings(vha);
2250
2251 ha->flags.chip_reset_done = 1;
2252
2253 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
2254 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
2255 rval = qla84xx_init_chip(vha);
2256 if (rval != QLA_SUCCESS) {
2257 ql_log(ql_log_warn, vha, 0x00d4,
2258 "Unable to initialize ISP84XX.\n");
2259 qla84xx_put_chip(vha);
2260 }
2261 }
2262
2263 /* Load the NIC Core f/w if we are the first protocol driver. */
2264 if (IS_QLA8031(ha)) {
2265 rval = qla83xx_nic_core_fw_load(vha);
2266 if (rval)
2267 ql_log(ql_log_warn, vha, 0x0124,
2268 "Error in initializing NIC Core f/w.\n");
2269 }
2270
2271 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2272 qla24xx_read_fcp_prio_cfg(vha);
2273
2274 if (IS_P3P_TYPE(ha))
2275 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2276 else
2277 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2278
2279 return (rval);
2280 }
2281
2282 /**
2283 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2284 * @vha: HA context
2285 *
2286 * Returns 0 on success.
2287 */
2288 int
qla2100_pci_config(scsi_qla_host_t * vha)2289 qla2100_pci_config(scsi_qla_host_t *vha)
2290 {
2291 uint16_t w;
2292 unsigned long flags;
2293 struct qla_hw_data *ha = vha->hw;
2294 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2295
2296 pci_set_master(ha->pdev);
2297 pci_try_set_mwi(ha->pdev);
2298
2299 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2300 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2301 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2302
2303 pci_disable_rom(ha->pdev);
2304
2305 /* Get PCI bus information. */
2306 spin_lock_irqsave(&ha->hardware_lock, flags);
2307 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
2308 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2309
2310 return QLA_SUCCESS;
2311 }
2312
2313 /**
2314 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2315 * @vha: HA context
2316 *
2317 * Returns 0 on success.
2318 */
2319 int
qla2300_pci_config(scsi_qla_host_t * vha)2320 qla2300_pci_config(scsi_qla_host_t *vha)
2321 {
2322 uint16_t w;
2323 unsigned long flags = 0;
2324 uint32_t cnt;
2325 struct qla_hw_data *ha = vha->hw;
2326 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2327
2328 pci_set_master(ha->pdev);
2329 pci_try_set_mwi(ha->pdev);
2330
2331 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2332 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2333
2334 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2335 w &= ~PCI_COMMAND_INTX_DISABLE;
2336 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2337
2338 /*
2339 * If this is a 2300 card and not 2312, reset the
2340 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2341 * the 2310 also reports itself as a 2300 so we need to get the
2342 * fb revision level -- a 6 indicates it really is a 2300 and
2343 * not a 2310.
2344 */
2345 if (IS_QLA2300(ha)) {
2346 spin_lock_irqsave(&ha->hardware_lock, flags);
2347
2348 /* Pause RISC. */
2349 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
2350 for (cnt = 0; cnt < 30000; cnt++) {
2351 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0)
2352 break;
2353
2354 udelay(10);
2355 }
2356
2357 /* Select FPM registers. */
2358 WRT_REG_WORD(®->ctrl_status, 0x20);
2359 RD_REG_WORD(®->ctrl_status);
2360
2361 /* Get the fb rev level */
2362 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
2363
2364 if (ha->fb_rev == FPM_2300)
2365 pci_clear_mwi(ha->pdev);
2366
2367 /* Deselect FPM registers. */
2368 WRT_REG_WORD(®->ctrl_status, 0x0);
2369 RD_REG_WORD(®->ctrl_status);
2370
2371 /* Release RISC module. */
2372 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2373 for (cnt = 0; cnt < 30000; cnt++) {
2374 if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0)
2375 break;
2376
2377 udelay(10);
2378 }
2379
2380 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2381 }
2382
2383 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2384
2385 pci_disable_rom(ha->pdev);
2386
2387 /* Get PCI bus information. */
2388 spin_lock_irqsave(&ha->hardware_lock, flags);
2389 ha->pci_attr = RD_REG_WORD(®->ctrl_status);
2390 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2391
2392 return QLA_SUCCESS;
2393 }
2394
2395 /**
2396 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2397 * @vha: HA context
2398 *
2399 * Returns 0 on success.
2400 */
2401 int
qla24xx_pci_config(scsi_qla_host_t * vha)2402 qla24xx_pci_config(scsi_qla_host_t *vha)
2403 {
2404 uint16_t w;
2405 unsigned long flags = 0;
2406 struct qla_hw_data *ha = vha->hw;
2407 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2408
2409 pci_set_master(ha->pdev);
2410 pci_try_set_mwi(ha->pdev);
2411
2412 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2413 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2414 w &= ~PCI_COMMAND_INTX_DISABLE;
2415 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2416
2417 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2418
2419 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
2420 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2421 pcix_set_mmrbc(ha->pdev, 2048);
2422
2423 /* PCIe -- adjust Maximum Read Request Size (2048). */
2424 if (pci_is_pcie(ha->pdev))
2425 pcie_set_readrq(ha->pdev, 4096);
2426
2427 pci_disable_rom(ha->pdev);
2428
2429 ha->chip_revision = ha->pdev->revision;
2430
2431 /* Get PCI bus information. */
2432 spin_lock_irqsave(&ha->hardware_lock, flags);
2433 ha->pci_attr = RD_REG_DWORD(®->ctrl_status);
2434 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2435
2436 return QLA_SUCCESS;
2437 }
2438
2439 /**
2440 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2441 * @vha: HA context
2442 *
2443 * Returns 0 on success.
2444 */
2445 int
qla25xx_pci_config(scsi_qla_host_t * vha)2446 qla25xx_pci_config(scsi_qla_host_t *vha)
2447 {
2448 uint16_t w;
2449 struct qla_hw_data *ha = vha->hw;
2450
2451 pci_set_master(ha->pdev);
2452 pci_try_set_mwi(ha->pdev);
2453
2454 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2455 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2456 w &= ~PCI_COMMAND_INTX_DISABLE;
2457 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2458
2459 /* PCIe -- adjust Maximum Read Request Size (2048). */
2460 if (pci_is_pcie(ha->pdev))
2461 pcie_set_readrq(ha->pdev, 4096);
2462
2463 pci_disable_rom(ha->pdev);
2464
2465 ha->chip_revision = ha->pdev->revision;
2466
2467 return QLA_SUCCESS;
2468 }
2469
2470 /**
2471 * qla2x00_isp_firmware() - Choose firmware image.
2472 * @vha: HA context
2473 *
2474 * Returns 0 on success.
2475 */
2476 static int
qla2x00_isp_firmware(scsi_qla_host_t * vha)2477 qla2x00_isp_firmware(scsi_qla_host_t *vha)
2478 {
2479 int rval;
2480 uint16_t loop_id, topo, sw_cap;
2481 uint8_t domain, area, al_pa;
2482 struct qla_hw_data *ha = vha->hw;
2483
2484 /* Assume loading risc code */
2485 rval = QLA_FUNCTION_FAILED;
2486
2487 if (ha->flags.disable_risc_code_load) {
2488 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
2489
2490 /* Verify checksum of loaded RISC code. */
2491 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
2492 if (rval == QLA_SUCCESS) {
2493 /* And, verify we are not in ROM code. */
2494 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
2495 &area, &domain, &topo, &sw_cap);
2496 }
2497 }
2498
2499 if (rval)
2500 ql_dbg(ql_dbg_init, vha, 0x007a,
2501 "**** Load RISC code ****.\n");
2502
2503 return (rval);
2504 }
2505
2506 /**
2507 * qla2x00_reset_chip() - Reset ISP chip.
2508 * @vha: HA context
2509 *
2510 * Returns 0 on success.
2511 */
2512 void
qla2x00_reset_chip(scsi_qla_host_t * vha)2513 qla2x00_reset_chip(scsi_qla_host_t *vha)
2514 {
2515 unsigned long flags = 0;
2516 struct qla_hw_data *ha = vha->hw;
2517 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2518 uint32_t cnt;
2519 uint16_t cmd;
2520
2521 if (unlikely(pci_channel_offline(ha->pdev)))
2522 return;
2523
2524 ha->isp_ops->disable_intrs(ha);
2525
2526 spin_lock_irqsave(&ha->hardware_lock, flags);
2527
2528 /* Turn off master enable */
2529 cmd = 0;
2530 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2531 cmd &= ~PCI_COMMAND_MASTER;
2532 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2533
2534 if (!IS_QLA2100(ha)) {
2535 /* Pause RISC. */
2536 WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC);
2537 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2538 for (cnt = 0; cnt < 30000; cnt++) {
2539 if ((RD_REG_WORD(®->hccr) &
2540 HCCR_RISC_PAUSE) != 0)
2541 break;
2542 udelay(100);
2543 }
2544 } else {
2545 RD_REG_WORD(®->hccr); /* PCI Posting. */
2546 udelay(10);
2547 }
2548
2549 /* Select FPM registers. */
2550 WRT_REG_WORD(®->ctrl_status, 0x20);
2551 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
2552
2553 /* FPM Soft Reset. */
2554 WRT_REG_WORD(®->fpm_diag_config, 0x100);
2555 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */
2556
2557 /* Toggle Fpm Reset. */
2558 if (!IS_QLA2200(ha)) {
2559 WRT_REG_WORD(®->fpm_diag_config, 0x0);
2560 RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */
2561 }
2562
2563 /* Select frame buffer registers. */
2564 WRT_REG_WORD(®->ctrl_status, 0x10);
2565 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
2566
2567 /* Reset frame buffer FIFOs. */
2568 if (IS_QLA2200(ha)) {
2569 WRT_FB_CMD_REG(ha, reg, 0xa000);
2570 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2571 } else {
2572 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2573
2574 /* Read back fb_cmd until zero or 3 seconds max */
2575 for (cnt = 0; cnt < 3000; cnt++) {
2576 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2577 break;
2578 udelay(100);
2579 }
2580 }
2581
2582 /* Select RISC module registers. */
2583 WRT_REG_WORD(®->ctrl_status, 0);
2584 RD_REG_WORD(®->ctrl_status); /* PCI Posting. */
2585
2586 /* Reset RISC processor. */
2587 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2588 RD_REG_WORD(®->hccr); /* PCI Posting. */
2589
2590 /* Release RISC processor. */
2591 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2592 RD_REG_WORD(®->hccr); /* PCI Posting. */
2593 }
2594
2595 WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT);
2596 WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT);
2597
2598 /* Reset ISP chip. */
2599 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
2600
2601 /* Wait for RISC to recover from reset. */
2602 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2603 /*
2604 * It is necessary to for a delay here since the card doesn't
2605 * respond to PCI reads during a reset. On some architectures
2606 * this will result in an MCA.
2607 */
2608 udelay(20);
2609 for (cnt = 30000; cnt; cnt--) {
2610 if ((RD_REG_WORD(®->ctrl_status) &
2611 CSR_ISP_SOFT_RESET) == 0)
2612 break;
2613 udelay(100);
2614 }
2615 } else
2616 udelay(10);
2617
2618 /* Reset RISC processor. */
2619 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2620
2621 WRT_REG_WORD(®->semaphore, 0);
2622
2623 /* Release RISC processor. */
2624 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2625 RD_REG_WORD(®->hccr); /* PCI Posting. */
2626
2627 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2628 for (cnt = 0; cnt < 30000; cnt++) {
2629 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
2630 break;
2631
2632 udelay(100);
2633 }
2634 } else
2635 udelay(100);
2636
2637 /* Turn on master enable */
2638 cmd |= PCI_COMMAND_MASTER;
2639 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2640
2641 /* Disable RISC pause on FPM parity error. */
2642 if (!IS_QLA2100(ha)) {
2643 WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE);
2644 RD_REG_WORD(®->hccr); /* PCI Posting. */
2645 }
2646
2647 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2648 }
2649
2650 /**
2651 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2652 * @vha: HA context
2653 *
2654 * Returns 0 on success.
2655 */
2656 static int
qla81xx_reset_mpi(scsi_qla_host_t * vha)2657 qla81xx_reset_mpi(scsi_qla_host_t *vha)
2658 {
2659 uint16_t mb[4] = {0x1010, 0, 1, 0};
2660
2661 if (!IS_QLA81XX(vha->hw))
2662 return QLA_SUCCESS;
2663
2664 return qla81xx_write_mpi_register(vha, mb);
2665 }
2666
2667 /**
2668 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2669 * @vha: HA context
2670 *
2671 * Returns 0 on success.
2672 */
2673 static inline int
qla24xx_reset_risc(scsi_qla_host_t * vha)2674 qla24xx_reset_risc(scsi_qla_host_t *vha)
2675 {
2676 unsigned long flags = 0;
2677 struct qla_hw_data *ha = vha->hw;
2678 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2679 uint32_t cnt;
2680 uint16_t wd;
2681 static int abts_cnt; /* ISP abort retry counts */
2682 int rval = QLA_SUCCESS;
2683
2684 spin_lock_irqsave(&ha->hardware_lock, flags);
2685
2686 /* Reset RISC. */
2687 WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2688 for (cnt = 0; cnt < 30000; cnt++) {
2689 if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2690 break;
2691
2692 udelay(10);
2693 }
2694
2695 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE))
2696 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2697
2698 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2699 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2700 RD_REG_DWORD(®->hccr),
2701 RD_REG_DWORD(®->ctrl_status),
2702 (RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE));
2703
2704 WRT_REG_DWORD(®->ctrl_status,
2705 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2706 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
2707
2708 udelay(100);
2709
2710 /* Wait for firmware to complete NVRAM accesses. */
2711 RD_REG_WORD(®->mailbox0);
2712 for (cnt = 10000; RD_REG_WORD(®->mailbox0) != 0 &&
2713 rval == QLA_SUCCESS; cnt--) {
2714 barrier();
2715 if (cnt)
2716 udelay(5);
2717 else
2718 rval = QLA_FUNCTION_TIMEOUT;
2719 }
2720
2721 if (rval == QLA_SUCCESS)
2722 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2723
2724 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2725 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2726 RD_REG_DWORD(®->hccr),
2727 RD_REG_DWORD(®->mailbox0));
2728
2729 /* Wait for soft-reset to complete. */
2730 RD_REG_DWORD(®->ctrl_status);
2731 for (cnt = 0; cnt < 60; cnt++) {
2732 barrier();
2733 if ((RD_REG_DWORD(®->ctrl_status) &
2734 CSRX_ISP_SOFT_RESET) == 0)
2735 break;
2736
2737 udelay(5);
2738 }
2739 if (!(RD_REG_DWORD(®->ctrl_status) & CSRX_ISP_SOFT_RESET))
2740 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2741
2742 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2743 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2744 RD_REG_DWORD(®->hccr),
2745 RD_REG_DWORD(®->ctrl_status));
2746
2747 /* If required, do an MPI FW reset now */
2748 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2749 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2750 if (++abts_cnt < 5) {
2751 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2752 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2753 } else {
2754 /*
2755 * We exhausted the ISP abort retries. We have to
2756 * set the board offline.
2757 */
2758 abts_cnt = 0;
2759 vha->flags.online = 0;
2760 }
2761 }
2762 }
2763
2764 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
2765 RD_REG_DWORD(®->hccr);
2766
2767 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
2768 RD_REG_DWORD(®->hccr);
2769
2770 WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET);
2771 RD_REG_DWORD(®->hccr);
2772
2773 RD_REG_WORD(®->mailbox0);
2774 for (cnt = 60; RD_REG_WORD(®->mailbox0) != 0 &&
2775 rval == QLA_SUCCESS; cnt--) {
2776 barrier();
2777 if (cnt)
2778 udelay(5);
2779 else
2780 rval = QLA_FUNCTION_TIMEOUT;
2781 }
2782 if (rval == QLA_SUCCESS)
2783 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2784
2785 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2786 "Host Risc 0x%x, mailbox0 0x%x\n",
2787 RD_REG_DWORD(®->hccr),
2788 RD_REG_WORD(®->mailbox0));
2789
2790 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2791
2792 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2793 "Driver in %s mode\n",
2794 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2795
2796 if (IS_NOPOLLING_TYPE(ha))
2797 ha->isp_ops->enable_intrs(ha);
2798
2799 return rval;
2800 }
2801
2802 static void
qla25xx_read_risc_sema_reg(scsi_qla_host_t * vha,uint32_t * data)2803 qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2804 {
2805 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2806
2807 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2808 *data = RD_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2809
2810 }
2811
2812 static void
qla25xx_write_risc_sema_reg(scsi_qla_host_t * vha,uint32_t data)2813 qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2814 {
2815 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2816
2817 WRT_REG_DWORD(®->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2818 WRT_REG_DWORD(®->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2819 }
2820
2821 static void
qla25xx_manipulate_risc_semaphore(scsi_qla_host_t * vha)2822 qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2823 {
2824 uint32_t wd32 = 0;
2825 uint delta_msec = 100;
2826 uint elapsed_msec = 0;
2827 uint timeout_msec;
2828 ulong n;
2829
2830 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2831 vha->hw->pdev->subsystem_device != 0x0240)
2832 return;
2833
2834 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2835 udelay(100);
2836
2837 attempt:
2838 timeout_msec = TIMEOUT_SEMAPHORE;
2839 n = timeout_msec / delta_msec;
2840 while (n--) {
2841 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2842 qla25xx_read_risc_sema_reg(vha, &wd32);
2843 if (wd32 & RISC_SEMAPHORE)
2844 break;
2845 msleep(delta_msec);
2846 elapsed_msec += delta_msec;
2847 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2848 goto force;
2849 }
2850
2851 if (!(wd32 & RISC_SEMAPHORE))
2852 goto force;
2853
2854 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2855 goto acquired;
2856
2857 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2858 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2859 n = timeout_msec / delta_msec;
2860 while (n--) {
2861 qla25xx_read_risc_sema_reg(vha, &wd32);
2862 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2863 break;
2864 msleep(delta_msec);
2865 elapsed_msec += delta_msec;
2866 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2867 goto force;
2868 }
2869
2870 if (wd32 & RISC_SEMAPHORE_FORCE)
2871 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2872
2873 goto attempt;
2874
2875 force:
2876 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2877
2878 acquired:
2879 return;
2880 }
2881
2882 /**
2883 * qla24xx_reset_chip() - Reset ISP24xx chip.
2884 * @vha: HA context
2885 *
2886 * Returns 0 on success.
2887 */
2888 void
qla24xx_reset_chip(scsi_qla_host_t * vha)2889 qla24xx_reset_chip(scsi_qla_host_t *vha)
2890 {
2891 struct qla_hw_data *ha = vha->hw;
2892
2893 if (pci_channel_offline(ha->pdev) &&
2894 ha->flags.pci_channel_io_perm_failure) {
2895 return;
2896 }
2897
2898 ha->isp_ops->disable_intrs(ha);
2899
2900 qla25xx_manipulate_risc_semaphore(vha);
2901
2902 /* Perform RISC reset. */
2903 qla24xx_reset_risc(vha);
2904 }
2905
2906 /**
2907 * qla2x00_chip_diag() - Test chip for proper operation.
2908 * @vha: HA context
2909 *
2910 * Returns 0 on success.
2911 */
2912 int
qla2x00_chip_diag(scsi_qla_host_t * vha)2913 qla2x00_chip_diag(scsi_qla_host_t *vha)
2914 {
2915 int rval;
2916 struct qla_hw_data *ha = vha->hw;
2917 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
2918 unsigned long flags = 0;
2919 uint16_t data;
2920 uint32_t cnt;
2921 uint16_t mb[5];
2922 struct req_que *req = ha->req_q_map[0];
2923
2924 /* Assume a failed state */
2925 rval = QLA_FUNCTION_FAILED;
2926
2927 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2928 ®->flash_address);
2929
2930 spin_lock_irqsave(&ha->hardware_lock, flags);
2931
2932 /* Reset ISP chip. */
2933 WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET);
2934
2935 /*
2936 * We need to have a delay here since the card will not respond while
2937 * in reset causing an MCA on some architectures.
2938 */
2939 udelay(20);
2940 data = qla2x00_debounce_register(®->ctrl_status);
2941 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2942 udelay(5);
2943 data = RD_REG_WORD(®->ctrl_status);
2944 barrier();
2945 }
2946
2947 if (!cnt)
2948 goto chip_diag_failed;
2949
2950 ql_dbg(ql_dbg_init, vha, 0x007c,
2951 "Reset register cleared by chip reset.\n");
2952
2953 /* Reset RISC processor. */
2954 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
2955 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
2956
2957 /* Workaround for QLA2312 PCI parity error */
2958 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2959 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2960 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2961 udelay(5);
2962 data = RD_MAILBOX_REG(ha, reg, 0);
2963 barrier();
2964 }
2965 } else
2966 udelay(10);
2967
2968 if (!cnt)
2969 goto chip_diag_failed;
2970
2971 /* Check product ID of chip */
2972 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
2973
2974 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2975 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2976 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2977 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2978 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2979 mb[3] != PROD_ID_3) {
2980 ql_log(ql_log_warn, vha, 0x0062,
2981 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2982 mb[1], mb[2], mb[3]);
2983
2984 goto chip_diag_failed;
2985 }
2986 ha->product_id[0] = mb[1];
2987 ha->product_id[1] = mb[2];
2988 ha->product_id[2] = mb[3];
2989 ha->product_id[3] = mb[4];
2990
2991 /* Adjust fw RISC transfer size */
2992 if (req->length > 1024)
2993 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
2994 else
2995 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
2996 req->length;
2997
2998 if (IS_QLA2200(ha) &&
2999 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3000 /* Limit firmware transfer size with a 2200A */
3001 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
3002
3003 ha->device_type |= DT_ISP2200A;
3004 ha->fw_transfer_size = 128;
3005 }
3006
3007 /* Wrap Incoming Mailboxes Test. */
3008 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3009
3010 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
3011 rval = qla2x00_mbx_reg_test(vha);
3012 if (rval)
3013 ql_log(ql_log_warn, vha, 0x0080,
3014 "Failed mailbox send register test.\n");
3015 else
3016 /* Flag a successful rval */
3017 rval = QLA_SUCCESS;
3018 spin_lock_irqsave(&ha->hardware_lock, flags);
3019
3020 chip_diag_failed:
3021 if (rval)
3022 ql_log(ql_log_info, vha, 0x0081,
3023 "Chip diagnostics **** FAILED ****.\n");
3024
3025 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3026
3027 return (rval);
3028 }
3029
3030 /**
3031 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
3032 * @vha: HA context
3033 *
3034 * Returns 0 on success.
3035 */
3036 int
qla24xx_chip_diag(scsi_qla_host_t * vha)3037 qla24xx_chip_diag(scsi_qla_host_t *vha)
3038 {
3039 int rval;
3040 struct qla_hw_data *ha = vha->hw;
3041 struct req_que *req = ha->req_q_map[0];
3042
3043 if (IS_P3P_TYPE(ha))
3044 return QLA_SUCCESS;
3045
3046 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
3047
3048 rval = qla2x00_mbx_reg_test(vha);
3049 if (rval) {
3050 ql_log(ql_log_warn, vha, 0x0082,
3051 "Failed mailbox send register test.\n");
3052 } else {
3053 /* Flag a successful rval */
3054 rval = QLA_SUCCESS;
3055 }
3056
3057 return rval;
3058 }
3059
3060 static void
qla2x00_alloc_offload_mem(scsi_qla_host_t * vha)3061 qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
3062 {
3063 int rval;
3064 dma_addr_t tc_dma;
3065 void *tc;
3066 struct qla_hw_data *ha = vha->hw;
3067
3068 if (ha->eft) {
3069 ql_dbg(ql_dbg_init, vha, 0x00bd,
3070 "%s: Offload Mem is already allocated.\n",
3071 __func__);
3072 return;
3073 }
3074
3075 if (IS_FWI2_CAPABLE(ha)) {
3076 /* Allocate memory for Fibre Channel Event Buffer. */
3077 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3078 !IS_QLA27XX(ha))
3079 goto try_eft;
3080
3081 if (ha->fce)
3082 dma_free_coherent(&ha->pdev->dev,
3083 FCE_SIZE, ha->fce, ha->fce_dma);
3084
3085 /* Allocate memory for Fibre Channel Event Buffer. */
3086 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3087 GFP_KERNEL);
3088 if (!tc) {
3089 ql_log(ql_log_warn, vha, 0x00be,
3090 "Unable to allocate (%d KB) for FCE.\n",
3091 FCE_SIZE / 1024);
3092 goto try_eft;
3093 }
3094
3095 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
3096 ha->fce_mb, &ha->fce_bufs);
3097 if (rval) {
3098 ql_log(ql_log_warn, vha, 0x00bf,
3099 "Unable to initialize FCE (%d).\n", rval);
3100 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
3101 tc_dma);
3102 ha->flags.fce_enabled = 0;
3103 goto try_eft;
3104 }
3105 ql_dbg(ql_dbg_init, vha, 0x00c0,
3106 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
3107
3108 ha->flags.fce_enabled = 1;
3109 ha->fce_dma = tc_dma;
3110 ha->fce = tc;
3111
3112 try_eft:
3113 if (ha->eft)
3114 dma_free_coherent(&ha->pdev->dev,
3115 EFT_SIZE, ha->eft, ha->eft_dma);
3116
3117 /* Allocate memory for Extended Trace Buffer. */
3118 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3119 GFP_KERNEL);
3120 if (!tc) {
3121 ql_log(ql_log_warn, vha, 0x00c1,
3122 "Unable to allocate (%d KB) for EFT.\n",
3123 EFT_SIZE / 1024);
3124 goto eft_err;
3125 }
3126
3127 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
3128 if (rval) {
3129 ql_log(ql_log_warn, vha, 0x00c2,
3130 "Unable to initialize EFT (%d).\n", rval);
3131 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3132 tc_dma);
3133 goto eft_err;
3134 }
3135 ql_dbg(ql_dbg_init, vha, 0x00c3,
3136 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3137
3138 ha->eft_dma = tc_dma;
3139 ha->eft = tc;
3140 }
3141
3142 eft_err:
3143 return;
3144 }
3145
3146 void
qla2x00_alloc_fw_dump(scsi_qla_host_t * vha)3147 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3148 {
3149 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3150 eft_size, fce_size, mq_size;
3151 struct qla_hw_data *ha = vha->hw;
3152 struct req_que *req = ha->req_q_map[0];
3153 struct rsp_que *rsp = ha->rsp_q_map[0];
3154 struct qla2xxx_fw_dump *fw_dump;
3155
3156 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3157 req_q_size = rsp_q_size = 0;
3158
3159 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3160 fixed_size = sizeof(struct qla2100_fw_dump);
3161 } else if (IS_QLA23XX(ha)) {
3162 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3163 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3164 sizeof(uint16_t);
3165 } else if (IS_FWI2_CAPABLE(ha)) {
3166 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3167 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3168 else if (IS_QLA81XX(ha))
3169 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3170 else if (IS_QLA25XX(ha))
3171 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3172 else
3173 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3174
3175 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3176 sizeof(uint32_t);
3177 if (ha->mqenable) {
3178 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
3179 mq_size = sizeof(struct qla2xxx_mq_chain);
3180 /*
3181 * Allocate maximum buffer size for all queues.
3182 * Resizing must be done at end-of-dump processing.
3183 */
3184 mq_size += ha->max_req_queues *
3185 (req->length * sizeof(request_t));
3186 mq_size += ha->max_rsp_queues *
3187 (rsp->length * sizeof(response_t));
3188 }
3189 if (ha->tgt.atio_ring)
3190 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3191 /* Allocate memory for Fibre Channel Event Buffer. */
3192 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3193 !IS_QLA27XX(ha))
3194 goto try_eft;
3195
3196 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3197 try_eft:
3198 ql_dbg(ql_dbg_init, vha, 0x00c3,
3199 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3200 eft_size = EFT_SIZE;
3201 }
3202
3203 if (IS_QLA27XX(ha)) {
3204 if (!ha->fw_dump_template) {
3205 ql_log(ql_log_warn, vha, 0x00ba,
3206 "Failed missing fwdump template\n");
3207 return;
3208 }
3209 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
3210 ql_dbg(ql_dbg_init, vha, 0x00fa,
3211 "-> allocating fwdump (%x bytes)...\n", dump_size);
3212 goto allocate;
3213 }
3214
3215 req_q_size = req->length * sizeof(request_t);
3216 rsp_q_size = rsp->length * sizeof(response_t);
3217 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
3218 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
3219 ha->chain_offset = dump_size;
3220 dump_size += mq_size + fce_size;
3221
3222 if (ha->exchoffld_buf)
3223 dump_size += sizeof(struct qla2xxx_offld_chain) +
3224 ha->exchoffld_size;
3225 if (ha->exlogin_buf)
3226 dump_size += sizeof(struct qla2xxx_offld_chain) +
3227 ha->exlogin_size;
3228
3229 allocate:
3230 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) {
3231 fw_dump = vmalloc(dump_size);
3232 if (!fw_dump) {
3233 ql_log(ql_log_warn, vha, 0x00c4,
3234 "Unable to allocate (%d KB) for firmware dump.\n",
3235 dump_size / 1024);
3236 } else {
3237 if (ha->fw_dump)
3238 vfree(ha->fw_dump);
3239 ha->fw_dump = fw_dump;
3240
3241 ha->fw_dump_len = dump_size;
3242 ql_dbg(ql_dbg_init, vha, 0x00c5,
3243 "Allocated (%d KB) for firmware dump.\n",
3244 dump_size / 1024);
3245
3246 if (IS_QLA27XX(ha))
3247 return;
3248
3249 ha->fw_dump->signature[0] = 'Q';
3250 ha->fw_dump->signature[1] = 'L';
3251 ha->fw_dump->signature[2] = 'G';
3252 ha->fw_dump->signature[3] = 'C';
3253 ha->fw_dump->version = htonl(1);
3254
3255 ha->fw_dump->fixed_size = htonl(fixed_size);
3256 ha->fw_dump->mem_size = htonl(mem_size);
3257 ha->fw_dump->req_q_size = htonl(req_q_size);
3258 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3259
3260 ha->fw_dump->eft_size = htonl(eft_size);
3261 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3262 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
3263
3264 ha->fw_dump->header_size =
3265 htonl(offsetof(struct qla2xxx_fw_dump, isp));
3266 }
3267 }
3268 }
3269
3270 static int
qla81xx_mpi_sync(scsi_qla_host_t * vha)3271 qla81xx_mpi_sync(scsi_qla_host_t *vha)
3272 {
3273 #define MPS_MASK 0xe0
3274 int rval;
3275 uint16_t dc;
3276 uint32_t dw;
3277
3278 if (!IS_QLA81XX(vha->hw))
3279 return QLA_SUCCESS;
3280
3281 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3282 if (rval != QLA_SUCCESS) {
3283 ql_log(ql_log_warn, vha, 0x0105,
3284 "Unable to acquire semaphore.\n");
3285 goto done;
3286 }
3287
3288 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3289 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3290 if (rval != QLA_SUCCESS) {
3291 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
3292 goto done_release;
3293 }
3294
3295 dc &= MPS_MASK;
3296 if (dc == (dw & MPS_MASK))
3297 goto done_release;
3298
3299 dw &= ~MPS_MASK;
3300 dw |= dc;
3301 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3302 if (rval != QLA_SUCCESS) {
3303 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
3304 }
3305
3306 done_release:
3307 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3308 if (rval != QLA_SUCCESS) {
3309 ql_log(ql_log_warn, vha, 0x006d,
3310 "Unable to release semaphore.\n");
3311 }
3312
3313 done:
3314 return rval;
3315 }
3316
3317 int
qla2x00_alloc_outstanding_cmds(struct qla_hw_data * ha,struct req_que * req)3318 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3319 {
3320 /* Don't try to reallocate the array */
3321 if (req->outstanding_cmds)
3322 return QLA_SUCCESS;
3323
3324 if (!IS_FWI2_CAPABLE(ha))
3325 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3326 else {
3327 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3328 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
3329 else
3330 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
3331 }
3332
3333 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3334 sizeof(srb_t *),
3335 GFP_KERNEL);
3336
3337 if (!req->outstanding_cmds) {
3338 /*
3339 * Try to allocate a minimal size just so we can get through
3340 * initialization.
3341 */
3342 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
3343 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3344 sizeof(srb_t *),
3345 GFP_KERNEL);
3346
3347 if (!req->outstanding_cmds) {
3348 ql_log(ql_log_fatal, NULL, 0x0126,
3349 "Failed to allocate memory for "
3350 "outstanding_cmds for req_que %p.\n", req);
3351 req->num_outstanding_cmds = 0;
3352 return QLA_FUNCTION_FAILED;
3353 }
3354 }
3355
3356 return QLA_SUCCESS;
3357 }
3358
3359 #define PRINT_FIELD(_field, _flag, _str) { \
3360 if (a0->_field & _flag) {\
3361 if (p) {\
3362 strcat(ptr, "|");\
3363 ptr++;\
3364 leftover--;\
3365 } \
3366 len = snprintf(ptr, leftover, "%s", _str); \
3367 p = 1;\
3368 leftover -= len;\
3369 ptr += len; \
3370 } \
3371 }
3372
qla2xxx_print_sfp_info(struct scsi_qla_host * vha)3373 static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3374 {
3375 #define STR_LEN 64
3376 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3377 u8 str[STR_LEN], *ptr, p;
3378 int leftover, len;
3379
3380 memset(str, 0, STR_LEN);
3381 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3382 ql_dbg(ql_dbg_init, vha, 0x015a,
3383 "SFP MFG Name: %s\n", str);
3384
3385 memset(str, 0, STR_LEN);
3386 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3387 ql_dbg(ql_dbg_init, vha, 0x015c,
3388 "SFP Part Name: %s\n", str);
3389
3390 /* media */
3391 memset(str, 0, STR_LEN);
3392 ptr = str;
3393 leftover = STR_LEN;
3394 p = len = 0;
3395 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3396 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3397 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3398 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3399 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3400 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3401 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3402 ql_dbg(ql_dbg_init, vha, 0x0160,
3403 "SFP Media: %s\n", str);
3404
3405 /* link length */
3406 memset(str, 0, STR_LEN);
3407 ptr = str;
3408 leftover = STR_LEN;
3409 p = len = 0;
3410 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3411 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3412 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3413 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3414 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3415 ql_dbg(ql_dbg_init, vha, 0x0196,
3416 "SFP Link Length: %s\n", str);
3417
3418 memset(str, 0, STR_LEN);
3419 ptr = str;
3420 leftover = STR_LEN;
3421 p = len = 0;
3422 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3423 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3424 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3425 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3426 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3427 ql_dbg(ql_dbg_init, vha, 0x016e,
3428 "SFP FC Link Tech: %s\n", str);
3429
3430 if (a0->length_km)
3431 ql_dbg(ql_dbg_init, vha, 0x016f,
3432 "SFP Distant: %d km\n", a0->length_km);
3433 if (a0->length_100m)
3434 ql_dbg(ql_dbg_init, vha, 0x0170,
3435 "SFP Distant: %d m\n", a0->length_100m*100);
3436 if (a0->length_50um_10m)
3437 ql_dbg(ql_dbg_init, vha, 0x0189,
3438 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3439 if (a0->length_62um_10m)
3440 ql_dbg(ql_dbg_init, vha, 0x018a,
3441 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3442 if (a0->length_om4_10m)
3443 ql_dbg(ql_dbg_init, vha, 0x0194,
3444 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3445 if (a0->length_om3_10m)
3446 ql_dbg(ql_dbg_init, vha, 0x0195,
3447 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3448 }
3449
3450
3451 /*
3452 * Return Code:
3453 * QLA_SUCCESS: no action
3454 * QLA_INTERFACE_ERROR: SFP is not there.
3455 * QLA_FUNCTION_FAILED: detected New SFP
3456 */
3457 int
qla24xx_detect_sfp(scsi_qla_host_t * vha)3458 qla24xx_detect_sfp(scsi_qla_host_t *vha)
3459 {
3460 int rc = QLA_SUCCESS;
3461 struct sff_8247_a0 *a;
3462 struct qla_hw_data *ha = vha->hw;
3463
3464 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3465 goto out;
3466
3467 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3468 if (rc)
3469 goto out;
3470
3471 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3472 qla2xxx_print_sfp_info(vha);
3473
3474 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3475 /* long range */
3476 ha->flags.detected_lr_sfp = 1;
3477
3478 if (a->length_km > 5 || a->length_100m > 50)
3479 ha->long_range_distance = LR_DISTANCE_10K;
3480 else
3481 ha->long_range_distance = LR_DISTANCE_5K;
3482
3483 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3484 ql_dbg(ql_dbg_async, vha, 0x507b,
3485 "Detected Long Range SFP.\n");
3486 } else {
3487 /* short range */
3488 ha->flags.detected_lr_sfp = 0;
3489 if (ha->flags.using_lr_setting)
3490 ql_dbg(ql_dbg_async, vha, 0x5084,
3491 "Detected Short Range SFP.\n");
3492 }
3493
3494 if (!vha->flags.init_done)
3495 rc = QLA_SUCCESS;
3496 out:
3497 return rc;
3498 }
3499
3500 /**
3501 * qla2x00_setup_chip() - Load and start RISC firmware.
3502 * @vha: HA context
3503 *
3504 * Returns 0 on success.
3505 */
3506 static int
qla2x00_setup_chip(scsi_qla_host_t * vha)3507 qla2x00_setup_chip(scsi_qla_host_t *vha)
3508 {
3509 int rval;
3510 uint32_t srisc_address = 0;
3511 struct qla_hw_data *ha = vha->hw;
3512 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3513 unsigned long flags;
3514 uint16_t fw_major_version;
3515
3516 if (IS_P3P_TYPE(ha)) {
3517 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3518 if (rval == QLA_SUCCESS) {
3519 qla2x00_stop_firmware(vha);
3520 goto enable_82xx_npiv;
3521 } else
3522 goto failed;
3523 }
3524
3525 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3526 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3527 spin_lock_irqsave(&ha->hardware_lock, flags);
3528 WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0));
3529 RD_REG_WORD(®->hccr);
3530 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3531 }
3532
3533 qla81xx_mpi_sync(vha);
3534
3535 /* Load firmware sequences */
3536 rval = ha->isp_ops->load_risc(vha, &srisc_address);
3537 if (rval == QLA_SUCCESS) {
3538 ql_dbg(ql_dbg_init, vha, 0x00c9,
3539 "Verifying Checksum of loaded RISC code.\n");
3540
3541 rval = qla2x00_verify_checksum(vha, srisc_address);
3542 if (rval == QLA_SUCCESS) {
3543 /* Start firmware execution. */
3544 ql_dbg(ql_dbg_init, vha, 0x00ca,
3545 "Starting firmware.\n");
3546
3547 if (ql2xexlogins)
3548 ha->flags.exlogins_enabled = 1;
3549
3550 if (qla_is_exch_offld_enabled(vha))
3551 ha->flags.exchoffld_enabled = 1;
3552
3553 rval = qla2x00_execute_fw(vha, srisc_address);
3554 /* Retrieve firmware information. */
3555 if (rval == QLA_SUCCESS) {
3556 qla24xx_detect_sfp(vha);
3557
3558 rval = qla2x00_set_exlogins_buffer(vha);
3559 if (rval != QLA_SUCCESS)
3560 goto failed;
3561
3562 rval = qla2x00_set_exchoffld_buffer(vha);
3563 if (rval != QLA_SUCCESS)
3564 goto failed;
3565
3566 enable_82xx_npiv:
3567 fw_major_version = ha->fw_major_version;
3568 if (IS_P3P_TYPE(ha))
3569 qla82xx_check_md_needed(vha);
3570 else
3571 rval = qla2x00_get_fw_version(vha);
3572 if (rval != QLA_SUCCESS)
3573 goto failed;
3574 ha->flags.npiv_supported = 0;
3575 if (IS_QLA2XXX_MIDTYPE(ha) &&
3576 (ha->fw_attributes & BIT_2)) {
3577 ha->flags.npiv_supported = 1;
3578 if ((!ha->max_npiv_vports) ||
3579 ((ha->max_npiv_vports + 1) %
3580 MIN_MULTI_ID_FABRIC))
3581 ha->max_npiv_vports =
3582 MIN_MULTI_ID_FABRIC - 1;
3583 }
3584 qla2x00_get_resource_cnts(vha);
3585
3586 /*
3587 * Allocate the array of outstanding commands
3588 * now that we know the firmware resources.
3589 */
3590 rval = qla2x00_alloc_outstanding_cmds(ha,
3591 vha->req);
3592 if (rval != QLA_SUCCESS)
3593 goto failed;
3594
3595 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3596 qla2x00_alloc_offload_mem(vha);
3597
3598 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
3599 qla2x00_alloc_fw_dump(vha);
3600
3601 } else {
3602 goto failed;
3603 }
3604 } else {
3605 ql_log(ql_log_fatal, vha, 0x00cd,
3606 "ISP Firmware failed checksum.\n");
3607 goto failed;
3608 }
3609 } else
3610 goto failed;
3611
3612 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3613 /* Enable proper parity. */
3614 spin_lock_irqsave(&ha->hardware_lock, flags);
3615 if (IS_QLA2300(ha))
3616 /* SRAM parity */
3617 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1);
3618 else
3619 /* SRAM, Instruction RAM and GP RAM parity */
3620 WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7);
3621 RD_REG_WORD(®->hccr);
3622 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3623 }
3624
3625 if (IS_QLA27XX(ha))
3626 ha->flags.fac_supported = 1;
3627 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
3628 uint32_t size;
3629
3630 rval = qla81xx_fac_get_sector_size(vha, &size);
3631 if (rval == QLA_SUCCESS) {
3632 ha->flags.fac_supported = 1;
3633 ha->fdt_block_size = size << 2;
3634 } else {
3635 ql_log(ql_log_warn, vha, 0x00ce,
3636 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3637 ha->fw_major_version, ha->fw_minor_version,
3638 ha->fw_subminor_version);
3639
3640 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3641 ha->flags.fac_supported = 0;
3642 rval = QLA_SUCCESS;
3643 }
3644 }
3645 }
3646 failed:
3647 if (rval) {
3648 ql_log(ql_log_fatal, vha, 0x00cf,
3649 "Setup chip ****FAILED****.\n");
3650 }
3651
3652 return (rval);
3653 }
3654
3655 /**
3656 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3657 * @rsp: response queue
3658 *
3659 * Beginning of request ring has initialization control block already built
3660 * by nvram config routine.
3661 *
3662 * Returns 0 on success.
3663 */
3664 void
qla2x00_init_response_q_entries(struct rsp_que * rsp)3665 qla2x00_init_response_q_entries(struct rsp_que *rsp)
3666 {
3667 uint16_t cnt;
3668 response_t *pkt;
3669
3670 rsp->ring_ptr = rsp->ring;
3671 rsp->ring_index = 0;
3672 rsp->status_srb = NULL;
3673 pkt = rsp->ring_ptr;
3674 for (cnt = 0; cnt < rsp->length; cnt++) {
3675 pkt->signature = RESPONSE_PROCESSED;
3676 pkt++;
3677 }
3678 }
3679
3680 /**
3681 * qla2x00_update_fw_options() - Read and process firmware options.
3682 * @vha: HA context
3683 *
3684 * Returns 0 on success.
3685 */
3686 void
qla2x00_update_fw_options(scsi_qla_host_t * vha)3687 qla2x00_update_fw_options(scsi_qla_host_t *vha)
3688 {
3689 uint16_t swing, emphasis, tx_sens, rx_sens;
3690 struct qla_hw_data *ha = vha->hw;
3691
3692 memset(ha->fw_options, 0, sizeof(ha->fw_options));
3693 qla2x00_get_fw_options(vha, ha->fw_options);
3694
3695 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3696 return;
3697
3698 /* Serial Link options. */
3699 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3700 "Serial link options.\n");
3701 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3702 (uint8_t *)&ha->fw_seriallink_options,
3703 sizeof(ha->fw_seriallink_options));
3704
3705 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3706 if (ha->fw_seriallink_options[3] & BIT_2) {
3707 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3708
3709 /* 1G settings */
3710 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3711 emphasis = (ha->fw_seriallink_options[2] &
3712 (BIT_4 | BIT_3)) >> 3;
3713 tx_sens = ha->fw_seriallink_options[0] &
3714 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3715 rx_sens = (ha->fw_seriallink_options[0] &
3716 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3717 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3718 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3719 if (rx_sens == 0x0)
3720 rx_sens = 0x3;
3721 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3722 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3723 ha->fw_options[10] |= BIT_5 |
3724 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3725 (tx_sens & (BIT_1 | BIT_0));
3726
3727 /* 2G settings */
3728 swing = (ha->fw_seriallink_options[2] &
3729 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3730 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3731 tx_sens = ha->fw_seriallink_options[1] &
3732 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
3733 rx_sens = (ha->fw_seriallink_options[1] &
3734 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3735 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3736 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3737 if (rx_sens == 0x0)
3738 rx_sens = 0x3;
3739 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3740 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3741 ha->fw_options[11] |= BIT_5 |
3742 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3743 (tx_sens & (BIT_1 | BIT_0));
3744 }
3745
3746 /* FCP2 options. */
3747 /* Return command IOCBs without waiting for an ABTS to complete. */
3748 ha->fw_options[3] |= BIT_13;
3749
3750 /* LED scheme. */
3751 if (ha->flags.enable_led_scheme)
3752 ha->fw_options[2] |= BIT_12;
3753
3754 /* Detect ISP6312. */
3755 if (IS_QLA6312(ha))
3756 ha->fw_options[2] |= BIT_13;
3757
3758 /* Set Retry FLOGI in case of P2P connection */
3759 if (ha->operating_mode == P2P) {
3760 ha->fw_options[2] |= BIT_3;
3761 ql_dbg(ql_dbg_disc, vha, 0x2100,
3762 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3763 __func__, ha->fw_options[2]);
3764 }
3765
3766 /* Update firmware options. */
3767 qla2x00_set_fw_options(vha, ha->fw_options);
3768 }
3769
3770 void
qla24xx_update_fw_options(scsi_qla_host_t * vha)3771 qla24xx_update_fw_options(scsi_qla_host_t *vha)
3772 {
3773 int rval;
3774 struct qla_hw_data *ha = vha->hw;
3775
3776 if (IS_P3P_TYPE(ha))
3777 return;
3778
3779 /* Hold status IOCBs until ABTS response received. */
3780 if (ql2xfwholdabts)
3781 ha->fw_options[3] |= BIT_12;
3782
3783 /* Set Retry FLOGI in case of P2P connection */
3784 if (ha->operating_mode == P2P) {
3785 ha->fw_options[2] |= BIT_3;
3786 ql_dbg(ql_dbg_disc, vha, 0x2101,
3787 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3788 __func__, ha->fw_options[2]);
3789 }
3790
3791 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3792 if (ql2xmvasynctoatio &&
3793 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
3794 if (qla_tgt_mode_enabled(vha) ||
3795 qla_dual_mode_enabled(vha))
3796 ha->fw_options[2] |= BIT_11;
3797 else
3798 ha->fw_options[2] &= ~BIT_11;
3799 }
3800
3801 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3802 /*
3803 * Tell FW to track each exchange to prevent
3804 * driver from using stale exchange.
3805 */
3806 if (qla_tgt_mode_enabled(vha) ||
3807 qla_dual_mode_enabled(vha))
3808 ha->fw_options[2] |= BIT_4;
3809 else
3810 ha->fw_options[2] &= ~BIT_4;
3811
3812 /* Reserve 1/2 of emergency exchanges for ELS.*/
3813 if (qla2xuseresexchforels)
3814 ha->fw_options[2] |= BIT_8;
3815 else
3816 ha->fw_options[2] &= ~BIT_8;
3817 }
3818
3819 ql_dbg(ql_dbg_init, vha, 0x00e8,
3820 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3821 __func__, ha->fw_options[1], ha->fw_options[2],
3822 ha->fw_options[3], vha->host->active_mode);
3823
3824 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3825 qla2x00_set_fw_options(vha, ha->fw_options);
3826
3827 /* Update Serial Link options. */
3828 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
3829 return;
3830
3831 rval = qla2x00_set_serdes_params(vha,
3832 le16_to_cpu(ha->fw_seriallink_options24[1]),
3833 le16_to_cpu(ha->fw_seriallink_options24[2]),
3834 le16_to_cpu(ha->fw_seriallink_options24[3]));
3835 if (rval != QLA_SUCCESS) {
3836 ql_log(ql_log_warn, vha, 0x0104,
3837 "Unable to update Serial Link options (%x).\n", rval);
3838 }
3839 }
3840
3841 void
qla2x00_config_rings(struct scsi_qla_host * vha)3842 qla2x00_config_rings(struct scsi_qla_host *vha)
3843 {
3844 struct qla_hw_data *ha = vha->hw;
3845 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3846 struct req_que *req = ha->req_q_map[0];
3847 struct rsp_que *rsp = ha->rsp_q_map[0];
3848
3849 /* Setup ring parameters in initialization control block. */
3850 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3851 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
3852 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3853 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3854 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3855 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3856 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3857 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3858
3859 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3860 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3861 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3862 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3863 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3864 }
3865
3866 void
qla24xx_config_rings(struct scsi_qla_host * vha)3867 qla24xx_config_rings(struct scsi_qla_host *vha)
3868 {
3869 struct qla_hw_data *ha = vha->hw;
3870 device_reg_t *reg = ISP_QUE_REG(ha, 0);
3871 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3872 struct qla_msix_entry *msix;
3873 struct init_cb_24xx *icb;
3874 uint16_t rid = 0;
3875 struct req_que *req = ha->req_q_map[0];
3876 struct rsp_que *rsp = ha->rsp_q_map[0];
3877
3878 /* Setup ring parameters in initialization control block. */
3879 icb = (struct init_cb_24xx *)ha->init_cb;
3880 icb->request_q_outpointer = cpu_to_le16(0);
3881 icb->response_q_inpointer = cpu_to_le16(0);
3882 icb->request_q_length = cpu_to_le16(req->length);
3883 icb->response_q_length = cpu_to_le16(rsp->length);
3884 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3885 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3886 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3887 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
3888
3889 /* Setup ATIO queue dma pointers for target mode */
3890 icb->atio_q_inpointer = cpu_to_le16(0);
3891 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3892 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3893 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3894
3895 if (IS_SHADOW_REG_CAPABLE(ha))
3896 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
3897
3898 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3899 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3900 icb->rid = cpu_to_le16(rid);
3901 if (ha->flags.msix_enabled) {
3902 msix = &ha->msix_entries[1];
3903 ql_dbg(ql_dbg_init, vha, 0x0019,
3904 "Registering vector 0x%x for base que.\n",
3905 msix->entry);
3906 icb->msix = cpu_to_le16(msix->entry);
3907 }
3908 /* Use alternate PCI bus number */
3909 if (MSB(rid))
3910 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
3911 /* Use alternate PCI devfn */
3912 if (LSB(rid))
3913 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
3914
3915 /* Use Disable MSIX Handshake mode for capable adapters */
3916 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3917 (ha->flags.msix_enabled)) {
3918 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3919 ha->flags.disable_msix_handshake = 1;
3920 ql_dbg(ql_dbg_init, vha, 0x00fe,
3921 "MSIX Handshake Disable Mode turned on.\n");
3922 } else {
3923 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3924 }
3925 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
3926
3927 WRT_REG_DWORD(®->isp25mq.req_q_in, 0);
3928 WRT_REG_DWORD(®->isp25mq.req_q_out, 0);
3929 WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0);
3930 WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0);
3931 } else {
3932 WRT_REG_DWORD(®->isp24.req_q_in, 0);
3933 WRT_REG_DWORD(®->isp24.req_q_out, 0);
3934 WRT_REG_DWORD(®->isp24.rsp_q_in, 0);
3935 WRT_REG_DWORD(®->isp24.rsp_q_out, 0);
3936 }
3937 qlt_24xx_config_rings(vha);
3938
3939 /* PCI posting */
3940 RD_REG_DWORD(&ioreg->hccr);
3941 }
3942
3943 /**
3944 * qla2x00_init_rings() - Initializes firmware.
3945 * @vha: HA context
3946 *
3947 * Beginning of request ring has initialization control block already built
3948 * by nvram config routine.
3949 *
3950 * Returns 0 on success.
3951 */
3952 int
qla2x00_init_rings(scsi_qla_host_t * vha)3953 qla2x00_init_rings(scsi_qla_host_t *vha)
3954 {
3955 int rval;
3956 unsigned long flags = 0;
3957 int cnt, que;
3958 struct qla_hw_data *ha = vha->hw;
3959 struct req_que *req;
3960 struct rsp_que *rsp;
3961 struct mid_init_cb_24xx *mid_init_cb =
3962 (struct mid_init_cb_24xx *) ha->init_cb;
3963
3964 spin_lock_irqsave(&ha->hardware_lock, flags);
3965
3966 /* Clear outstanding commands array. */
3967 for (que = 0; que < ha->max_req_queues; que++) {
3968 req = ha->req_q_map[que];
3969 if (!req || !test_bit(que, ha->req_qid_map))
3970 continue;
3971 req->out_ptr = (void *)(req->ring + req->length);
3972 *req->out_ptr = 0;
3973 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
3974 req->outstanding_cmds[cnt] = NULL;
3975
3976 req->current_outstanding_cmd = 1;
3977
3978 /* Initialize firmware. */
3979 req->ring_ptr = req->ring;
3980 req->ring_index = 0;
3981 req->cnt = req->length;
3982 }
3983
3984 for (que = 0; que < ha->max_rsp_queues; que++) {
3985 rsp = ha->rsp_q_map[que];
3986 if (!rsp || !test_bit(que, ha->rsp_qid_map))
3987 continue;
3988 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
3989 *rsp->in_ptr = 0;
3990 /* Initialize response queue entries */
3991 if (IS_QLAFX00(ha))
3992 qlafx00_init_response_q_entries(rsp);
3993 else
3994 qla2x00_init_response_q_entries(rsp);
3995 }
3996
3997 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
3998 ha->tgt.atio_ring_index = 0;
3999 /* Initialize ATIO queue entries */
4000 qlt_init_atio_q_entries(vha);
4001
4002 ha->isp_ops->config_rings(vha);
4003
4004 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4005
4006 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4007
4008 if (IS_QLAFX00(ha)) {
4009 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4010 goto next_check;
4011 }
4012
4013 /* Update any ISP specific firmware options before initialization. */
4014 ha->isp_ops->update_fw_options(vha);
4015
4016 if (ha->flags.npiv_supported) {
4017 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
4018 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
4019 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
4020 }
4021
4022 if (IS_FWI2_CAPABLE(ha)) {
4023 mid_init_cb->options = cpu_to_le16(BIT_1);
4024 mid_init_cb->init_cb.execution_throttle =
4025 cpu_to_le16(ha->cur_fw_xcb_count);
4026 ha->flags.dport_enabled =
4027 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4028 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4029 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4030 /* FA-WWPN Status */
4031 ha->flags.fawwpn_enabled =
4032 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
4033 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
4034 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
4035 }
4036
4037 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
4038 next_check:
4039 if (rval) {
4040 ql_log(ql_log_fatal, vha, 0x00d2,
4041 "Init Firmware **** FAILED ****.\n");
4042 } else {
4043 ql_dbg(ql_dbg_init, vha, 0x00d3,
4044 "Init Firmware -- success.\n");
4045 QLA_FW_STARTED(ha);
4046 }
4047
4048 return (rval);
4049 }
4050
4051 /**
4052 * qla2x00_fw_ready() - Waits for firmware ready.
4053 * @vha: HA context
4054 *
4055 * Returns 0 on success.
4056 */
4057 static int
qla2x00_fw_ready(scsi_qla_host_t * vha)4058 qla2x00_fw_ready(scsi_qla_host_t *vha)
4059 {
4060 int rval;
4061 unsigned long wtime, mtime, cs84xx_time;
4062 uint16_t min_wait; /* Minimum wait time if loop is down */
4063 uint16_t wait_time; /* Wait time if loop is coming ready */
4064 uint16_t state[6];
4065 struct qla_hw_data *ha = vha->hw;
4066
4067 if (IS_QLAFX00(vha->hw))
4068 return qlafx00_fw_ready(vha);
4069
4070 rval = QLA_SUCCESS;
4071
4072 /* Time to wait for loop down */
4073 if (IS_P3P_TYPE(ha))
4074 min_wait = 30;
4075 else
4076 min_wait = 20;
4077
4078 /*
4079 * Firmware should take at most one RATOV to login, plus 5 seconds for
4080 * our own processing.
4081 */
4082 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4083 wait_time = min_wait;
4084 }
4085
4086 /* Min wait time if loop down */
4087 mtime = jiffies + (min_wait * HZ);
4088
4089 /* wait time before firmware ready */
4090 wtime = jiffies + (wait_time * HZ);
4091
4092 /* Wait for ISP to finish LIP */
4093 if (!vha->flags.init_done)
4094 ql_log(ql_log_info, vha, 0x801e,
4095 "Waiting for LIP to complete.\n");
4096
4097 do {
4098 memset(state, -1, sizeof(state));
4099 rval = qla2x00_get_firmware_state(vha, state);
4100 if (rval == QLA_SUCCESS) {
4101 if (state[0] < FSTATE_LOSS_OF_SYNC) {
4102 vha->device_flags &= ~DFLG_NO_CABLE;
4103 }
4104 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
4105 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4106 "fw_state=%x 84xx=%x.\n", state[0],
4107 state[2]);
4108 if ((state[2] & FSTATE_LOGGED_IN) &&
4109 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
4110 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4111 "Sending verify iocb.\n");
4112
4113 cs84xx_time = jiffies;
4114 rval = qla84xx_init_chip(vha);
4115 if (rval != QLA_SUCCESS) {
4116 ql_log(ql_log_warn,
4117 vha, 0x8007,
4118 "Init chip failed.\n");
4119 break;
4120 }
4121
4122 /* Add time taken to initialize. */
4123 cs84xx_time = jiffies - cs84xx_time;
4124 wtime += cs84xx_time;
4125 mtime += cs84xx_time;
4126 ql_dbg(ql_dbg_taskm, vha, 0x8008,
4127 "Increasing wait time by %ld. "
4128 "New time %ld.\n", cs84xx_time,
4129 wtime);
4130 }
4131 } else if (state[0] == FSTATE_READY) {
4132 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4133 "F/W Ready - OK.\n");
4134
4135 qla2x00_get_retry_cnt(vha, &ha->retry_count,
4136 &ha->login_timeout, &ha->r_a_tov);
4137
4138 rval = QLA_SUCCESS;
4139 break;
4140 }
4141
4142 rval = QLA_FUNCTION_FAILED;
4143
4144 if (atomic_read(&vha->loop_down_timer) &&
4145 state[0] != FSTATE_READY) {
4146 /* Loop down. Timeout on min_wait for states
4147 * other than Wait for Login.
4148 */
4149 if (time_after_eq(jiffies, mtime)) {
4150 ql_log(ql_log_info, vha, 0x8038,
4151 "Cable is unplugged...\n");
4152
4153 vha->device_flags |= DFLG_NO_CABLE;
4154 break;
4155 }
4156 }
4157 } else {
4158 /* Mailbox cmd failed. Timeout on min_wait. */
4159 if (time_after_eq(jiffies, mtime) ||
4160 ha->flags.isp82xx_fw_hung)
4161 break;
4162 }
4163
4164 if (time_after_eq(jiffies, wtime))
4165 break;
4166
4167 /* Delay for a while */
4168 msleep(500);
4169 } while (1);
4170
4171 ql_dbg(ql_dbg_taskm, vha, 0x803a,
4172 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4173 state[1], state[2], state[3], state[4], state[5], jiffies);
4174
4175 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
4176 ql_log(ql_log_warn, vha, 0x803b,
4177 "Firmware ready **** FAILED ****.\n");
4178 }
4179
4180 return (rval);
4181 }
4182
4183 /*
4184 * qla2x00_configure_hba
4185 * Setup adapter context.
4186 *
4187 * Input:
4188 * ha = adapter state pointer.
4189 *
4190 * Returns:
4191 * 0 = success
4192 *
4193 * Context:
4194 * Kernel context.
4195 */
4196 static int
qla2x00_configure_hba(scsi_qla_host_t * vha)4197 qla2x00_configure_hba(scsi_qla_host_t *vha)
4198 {
4199 int rval;
4200 uint16_t loop_id;
4201 uint16_t topo;
4202 uint16_t sw_cap;
4203 uint8_t al_pa;
4204 uint8_t area;
4205 uint8_t domain;
4206 char connect_type[22];
4207 struct qla_hw_data *ha = vha->hw;
4208 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4209 port_id_t id;
4210 unsigned long flags;
4211
4212 /* Get host addresses. */
4213 rval = qla2x00_get_adapter_id(vha,
4214 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
4215 if (rval != QLA_SUCCESS) {
4216 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
4217 IS_CNA_CAPABLE(ha) ||
4218 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
4219 ql_dbg(ql_dbg_disc, vha, 0x2008,
4220 "Loop is in a transition state.\n");
4221 } else {
4222 ql_log(ql_log_warn, vha, 0x2009,
4223 "Unable to get host loop ID.\n");
4224 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4225 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4226 ql_log(ql_log_warn, vha, 0x1151,
4227 "Doing link init.\n");
4228 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4229 return rval;
4230 }
4231 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
4232 }
4233 return (rval);
4234 }
4235
4236 if (topo == 4) {
4237 ql_log(ql_log_info, vha, 0x200a,
4238 "Cannot get topology - retrying.\n");
4239 return (QLA_FUNCTION_FAILED);
4240 }
4241
4242 vha->loop_id = loop_id;
4243
4244 /* initialize */
4245 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4246 ha->operating_mode = LOOP;
4247 ha->switch_cap = 0;
4248
4249 switch (topo) {
4250 case 0:
4251 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
4252 ha->current_topology = ISP_CFG_NL;
4253 strcpy(connect_type, "(Loop)");
4254 break;
4255
4256 case 1:
4257 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
4258 ha->switch_cap = sw_cap;
4259 ha->current_topology = ISP_CFG_FL;
4260 strcpy(connect_type, "(FL_Port)");
4261 break;
4262
4263 case 2:
4264 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
4265 ha->operating_mode = P2P;
4266 ha->current_topology = ISP_CFG_N;
4267 strcpy(connect_type, "(N_Port-to-N_Port)");
4268 break;
4269
4270 case 3:
4271 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
4272 ha->switch_cap = sw_cap;
4273 ha->operating_mode = P2P;
4274 ha->current_topology = ISP_CFG_F;
4275 strcpy(connect_type, "(F_Port)");
4276 break;
4277
4278 default:
4279 ql_dbg(ql_dbg_disc, vha, 0x200f,
4280 "HBA in unknown topology %x, using NL.\n", topo);
4281 ha->current_topology = ISP_CFG_NL;
4282 strcpy(connect_type, "(Loop)");
4283 break;
4284 }
4285
4286 /* Save Host port and loop ID. */
4287 /* byte order - Big Endian */
4288 id.b.domain = domain;
4289 id.b.area = area;
4290 id.b.al_pa = al_pa;
4291 id.b.rsvd_1 = 0;
4292 spin_lock_irqsave(&ha->hardware_lock, flags);
4293 if (!(topo == 2 && ha->flags.n2n_bigger))
4294 qlt_update_host_map(vha, id);
4295 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4296
4297 if (!vha->flags.init_done)
4298 ql_log(ql_log_info, vha, 0x2010,
4299 "Topology - %s, Host Loop address 0x%x.\n",
4300 connect_type, vha->loop_id);
4301
4302 return(rval);
4303 }
4304
4305 inline void
qla2x00_set_model_info(scsi_qla_host_t * vha,uint8_t * model,size_t len,char * def)4306 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4307 char *def)
4308 {
4309 char *st, *en;
4310 uint16_t index;
4311 struct qla_hw_data *ha = vha->hw;
4312 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
4313 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
4314
4315 if (memcmp(model, BINZERO, len) != 0) {
4316 strncpy(ha->model_number, model, len);
4317 st = en = ha->model_number;
4318 en += len - 1;
4319 while (en > st) {
4320 if (*en != 0x20 && *en != 0x00)
4321 break;
4322 *en-- = '\0';
4323 }
4324
4325 index = (ha->pdev->subsystem_device & 0xff);
4326 if (use_tbl &&
4327 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4328 index < QLA_MODEL_NAMES)
4329 strncpy(ha->model_desc,
4330 qla2x00_model_name[index * 2 + 1],
4331 sizeof(ha->model_desc) - 1);
4332 } else {
4333 index = (ha->pdev->subsystem_device & 0xff);
4334 if (use_tbl &&
4335 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4336 index < QLA_MODEL_NAMES) {
4337 strcpy(ha->model_number,
4338 qla2x00_model_name[index * 2]);
4339 strncpy(ha->model_desc,
4340 qla2x00_model_name[index * 2 + 1],
4341 sizeof(ha->model_desc) - 1);
4342 } else {
4343 strcpy(ha->model_number, def);
4344 }
4345 }
4346 if (IS_FWI2_CAPABLE(ha))
4347 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
4348 sizeof(ha->model_desc));
4349 }
4350
4351 /* On sparc systems, obtain port and node WWN from firmware
4352 * properties.
4353 */
qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,nvram_t * nv)4354 static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4355 {
4356 #ifdef CONFIG_SPARC
4357 struct qla_hw_data *ha = vha->hw;
4358 struct pci_dev *pdev = ha->pdev;
4359 struct device_node *dp = pci_device_to_OF_node(pdev);
4360 const u8 *val;
4361 int len;
4362
4363 val = of_get_property(dp, "port-wwn", &len);
4364 if (val && len >= WWN_SIZE)
4365 memcpy(nv->port_name, val, WWN_SIZE);
4366
4367 val = of_get_property(dp, "node-wwn", &len);
4368 if (val && len >= WWN_SIZE)
4369 memcpy(nv->node_name, val, WWN_SIZE);
4370 #endif
4371 }
4372
4373 /*
4374 * NVRAM configuration for ISP 2xxx
4375 *
4376 * Input:
4377 * ha = adapter block pointer.
4378 *
4379 * Output:
4380 * initialization control block in response_ring
4381 * host adapters parameters in host adapter block
4382 *
4383 * Returns:
4384 * 0 = success.
4385 */
4386 int
qla2x00_nvram_config(scsi_qla_host_t * vha)4387 qla2x00_nvram_config(scsi_qla_host_t *vha)
4388 {
4389 int rval;
4390 uint8_t chksum = 0;
4391 uint16_t cnt;
4392 uint8_t *dptr1, *dptr2;
4393 struct qla_hw_data *ha = vha->hw;
4394 init_cb_t *icb = ha->init_cb;
4395 nvram_t *nv = ha->nvram;
4396 uint8_t *ptr = ha->nvram;
4397 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
4398
4399 rval = QLA_SUCCESS;
4400
4401 /* Determine NVRAM starting address. */
4402 ha->nvram_size = sizeof(nvram_t);
4403 ha->nvram_base = 0;
4404 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4405 if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1)
4406 ha->nvram_base = 0x80;
4407
4408 /* Get NVRAM data and calculate checksum. */
4409 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
4410 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4411 chksum += *ptr++;
4412
4413 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4414 "Contents of NVRAM.\n");
4415 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4416 (uint8_t *)nv, ha->nvram_size);
4417
4418 /* Bad NVRAM data, set defaults parameters. */
4419 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
4420 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
4421 /* Reset NVRAM data. */
4422 ql_log(ql_log_warn, vha, 0x0064,
4423 "Inconsistent NVRAM "
4424 "detected: checksum=0x%x id=%c version=0x%x.\n",
4425 chksum, nv->id[0], nv->nvram_version);
4426 ql_log(ql_log_warn, vha, 0x0065,
4427 "Falling back to "
4428 "functioning (yet invalid -- WWPN) defaults.\n");
4429
4430 /*
4431 * Set default initialization control block.
4432 */
4433 memset(nv, 0, ha->nvram_size);
4434 nv->parameter_block_version = ICB_VERSION;
4435
4436 if (IS_QLA23XX(ha)) {
4437 nv->firmware_options[0] = BIT_2 | BIT_1;
4438 nv->firmware_options[1] = BIT_7 | BIT_5;
4439 nv->add_firmware_options[0] = BIT_5;
4440 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4441 nv->frame_payload_size = 2048;
4442 nv->special_options[1] = BIT_7;
4443 } else if (IS_QLA2200(ha)) {
4444 nv->firmware_options[0] = BIT_2 | BIT_1;
4445 nv->firmware_options[1] = BIT_7 | BIT_5;
4446 nv->add_firmware_options[0] = BIT_5;
4447 nv->add_firmware_options[1] = BIT_5 | BIT_4;
4448 nv->frame_payload_size = 1024;
4449 } else if (IS_QLA2100(ha)) {
4450 nv->firmware_options[0] = BIT_3 | BIT_1;
4451 nv->firmware_options[1] = BIT_5;
4452 nv->frame_payload_size = 1024;
4453 }
4454
4455 nv->max_iocb_allocation = cpu_to_le16(256);
4456 nv->execution_throttle = cpu_to_le16(16);
4457 nv->retry_count = 8;
4458 nv->retry_delay = 1;
4459
4460 nv->port_name[0] = 33;
4461 nv->port_name[3] = 224;
4462 nv->port_name[4] = 139;
4463
4464 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4465
4466 nv->login_timeout = 4;
4467
4468 /*
4469 * Set default host adapter parameters
4470 */
4471 nv->host_p[1] = BIT_2;
4472 nv->reset_delay = 5;
4473 nv->port_down_retry_count = 8;
4474 nv->max_luns_per_target = cpu_to_le16(8);
4475 nv->link_down_timeout = 60;
4476
4477 rval = 1;
4478 }
4479
4480 #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4481 /*
4482 * The SN2 does not provide BIOS emulation which means you can't change
4483 * potentially bogus BIOS settings. Force the use of default settings
4484 * for link rate and frame size. Hope that the rest of the settings
4485 * are valid.
4486 */
4487 if (ia64_platform_is("sn2")) {
4488 nv->frame_payload_size = 2048;
4489 if (IS_QLA23XX(ha))
4490 nv->special_options[1] = BIT_7;
4491 }
4492 #endif
4493
4494 /* Reset Initialization control block */
4495 memset(icb, 0, ha->init_cb_size);
4496
4497 /*
4498 * Setup driver NVRAM options.
4499 */
4500 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4501 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4502 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4503 nv->firmware_options[1] &= ~BIT_4;
4504
4505 if (IS_QLA23XX(ha)) {
4506 nv->firmware_options[0] |= BIT_2;
4507 nv->firmware_options[0] &= ~BIT_3;
4508 nv->special_options[0] &= ~BIT_6;
4509 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
4510
4511 if (IS_QLA2300(ha)) {
4512 if (ha->fb_rev == FPM_2310) {
4513 strcpy(ha->model_number, "QLA2310");
4514 } else {
4515 strcpy(ha->model_number, "QLA2300");
4516 }
4517 } else {
4518 qla2x00_set_model_info(vha, nv->model_number,
4519 sizeof(nv->model_number), "QLA23xx");
4520 }
4521 } else if (IS_QLA2200(ha)) {
4522 nv->firmware_options[0] |= BIT_2;
4523 /*
4524 * 'Point-to-point preferred, else loop' is not a safe
4525 * connection mode setting.
4526 */
4527 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4528 (BIT_5 | BIT_4)) {
4529 /* Force 'loop preferred, else point-to-point'. */
4530 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4531 nv->add_firmware_options[0] |= BIT_5;
4532 }
4533 strcpy(ha->model_number, "QLA22xx");
4534 } else /*if (IS_QLA2100(ha))*/ {
4535 strcpy(ha->model_number, "QLA2100");
4536 }
4537
4538 /*
4539 * Copy over NVRAM RISC parameter block to initialization control block.
4540 */
4541 dptr1 = (uint8_t *)icb;
4542 dptr2 = (uint8_t *)&nv->parameter_block_version;
4543 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4544 while (cnt--)
4545 *dptr1++ = *dptr2++;
4546
4547 /* Copy 2nd half. */
4548 dptr1 = (uint8_t *)icb->add_firmware_options;
4549 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4550 while (cnt--)
4551 *dptr1++ = *dptr2++;
4552 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
4553 /* Use alternate WWN? */
4554 if (nv->host_p[1] & BIT_7) {
4555 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4556 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4557 }
4558
4559 /* Prepare nodename */
4560 if ((icb->firmware_options[1] & BIT_6) == 0) {
4561 /*
4562 * Firmware will apply the following mask if the nodename was
4563 * not provided.
4564 */
4565 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4566 icb->node_name[0] &= 0xF0;
4567 }
4568
4569 /*
4570 * Set host adapter parameters.
4571 */
4572
4573 /*
4574 * BIT_7 in the host-parameters section allows for modification to
4575 * internal driver logging.
4576 */
4577 if (nv->host_p[0] & BIT_7)
4578 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
4579 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4580 /* Always load RISC code on non ISP2[12]00 chips. */
4581 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4582 ha->flags.disable_risc_code_load = 0;
4583 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4584 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4585 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
4586 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
4587 ha->flags.disable_serdes = 0;
4588
4589 ha->operating_mode =
4590 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4591
4592 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4593 sizeof(ha->fw_seriallink_options));
4594
4595 /* save HBA serial number */
4596 ha->serial0 = icb->port_name[5];
4597 ha->serial1 = icb->port_name[6];
4598 ha->serial2 = icb->port_name[7];
4599 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4600 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
4601
4602 icb->execution_throttle = cpu_to_le16(0xFFFF);
4603
4604 ha->retry_count = nv->retry_count;
4605
4606 /* Set minimum login_timeout to 4 seconds. */
4607 if (nv->login_timeout != ql2xlogintimeout)
4608 nv->login_timeout = ql2xlogintimeout;
4609 if (nv->login_timeout < 4)
4610 nv->login_timeout = 4;
4611 ha->login_timeout = nv->login_timeout;
4612
4613 /* Set minimum RATOV to 100 tenths of a second. */
4614 ha->r_a_tov = 100;
4615
4616 ha->loop_reset_delay = nv->reset_delay;
4617
4618 /* Link Down Timeout = 0:
4619 *
4620 * When Port Down timer expires we will start returning
4621 * I/O's to OS with "DID_NO_CONNECT".
4622 *
4623 * Link Down Timeout != 0:
4624 *
4625 * The driver waits for the link to come up after link down
4626 * before returning I/Os to OS with "DID_NO_CONNECT".
4627 */
4628 if (nv->link_down_timeout == 0) {
4629 ha->loop_down_abort_time =
4630 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
4631 } else {
4632 ha->link_down_timeout = nv->link_down_timeout;
4633 ha->loop_down_abort_time =
4634 (LOOP_DOWN_TIME - ha->link_down_timeout);
4635 }
4636
4637 /*
4638 * Need enough time to try and get the port back.
4639 */
4640 ha->port_down_retry_count = nv->port_down_retry_count;
4641 if (qlport_down_retry)
4642 ha->port_down_retry_count = qlport_down_retry;
4643 /* Set login_retry_count */
4644 ha->login_retry_count = nv->retry_count;
4645 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4646 ha->port_down_retry_count > 3)
4647 ha->login_retry_count = ha->port_down_retry_count;
4648 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4649 ha->login_retry_count = ha->port_down_retry_count;
4650 if (ql2xloginretrycount)
4651 ha->login_retry_count = ql2xloginretrycount;
4652
4653 icb->lun_enables = cpu_to_le16(0);
4654 icb->command_resource_count = 0;
4655 icb->immediate_notify_resource_count = 0;
4656 icb->timeout = cpu_to_le16(0);
4657
4658 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4659 /* Enable RIO */
4660 icb->firmware_options[0] &= ~BIT_3;
4661 icb->add_firmware_options[0] &=
4662 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4663 icb->add_firmware_options[0] |= BIT_2;
4664 icb->response_accumulation_timer = 3;
4665 icb->interrupt_delay_timer = 5;
4666
4667 vha->flags.process_response_queue = 1;
4668 } else {
4669 /* Enable ZIO. */
4670 if (!vha->flags.init_done) {
4671 ha->zio_mode = icb->add_firmware_options[0] &
4672 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4673 ha->zio_timer = icb->interrupt_delay_timer ?
4674 icb->interrupt_delay_timer: 2;
4675 }
4676 icb->add_firmware_options[0] &=
4677 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4678 vha->flags.process_response_queue = 0;
4679 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4680 ha->zio_mode = QLA_ZIO_MODE_6;
4681
4682 ql_log(ql_log_info, vha, 0x0068,
4683 "ZIO mode %d enabled; timer delay (%d us).\n",
4684 ha->zio_mode, ha->zio_timer * 100);
4685
4686 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4687 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
4688 vha->flags.process_response_queue = 1;
4689 }
4690 }
4691
4692 if (rval) {
4693 ql_log(ql_log_warn, vha, 0x0069,
4694 "NVRAM configuration failed.\n");
4695 }
4696 return (rval);
4697 }
4698
4699 static void
qla2x00_rport_del(void * data)4700 qla2x00_rport_del(void *data)
4701 {
4702 fc_port_t *fcport = data;
4703 struct fc_rport *rport;
4704 unsigned long flags;
4705
4706 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
4707 rport = fcport->drport ? fcport->drport: fcport->rport;
4708 fcport->drport = NULL;
4709 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
4710 if (rport) {
4711 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4712 "%s %8phN. rport %p roles %x\n",
4713 __func__, fcport->port_name, rport,
4714 rport->roles);
4715
4716 fc_remote_port_delete(rport);
4717 }
4718 }
4719
4720 /**
4721 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4722 * @vha: HA context
4723 * @flags: allocation flags
4724 *
4725 * Returns a pointer to the allocated fcport, or NULL, if none available.
4726 */
4727 fc_port_t *
qla2x00_alloc_fcport(scsi_qla_host_t * vha,gfp_t flags)4728 qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
4729 {
4730 fc_port_t *fcport;
4731
4732 fcport = kzalloc(sizeof(fc_port_t), flags);
4733 if (!fcport)
4734 return NULL;
4735
4736 /* Setup fcport template structure. */
4737 fcport->vha = vha;
4738 fcport->port_type = FCT_UNKNOWN;
4739 fcport->loop_id = FC_NO_LOOP_ID;
4740 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
4741 fcport->supported_classes = FC_COS_UNSPECIFIED;
4742 fcport->fp_speed = PORT_SPEED_UNKNOWN;
4743
4744 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4745 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
4746 flags);
4747 fcport->disc_state = DSC_DELETED;
4748 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4749 fcport->deleted = QLA_SESS_DELETED;
4750 fcport->login_retry = vha->hw->login_retry_count;
4751 fcport->logout_on_delete = 1;
4752
4753 if (!fcport->ct_desc.ct_sns) {
4754 ql_log(ql_log_warn, vha, 0xd049,
4755 "Failed to allocate ct_sns request.\n");
4756 kfree(fcport);
4757 return NULL;
4758 }
4759 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4760 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
4761 INIT_LIST_HEAD(&fcport->gnl_entry);
4762 INIT_LIST_HEAD(&fcport->list);
4763
4764 return fcport;
4765 }
4766
4767 void
qla2x00_free_fcport(fc_port_t * fcport)4768 qla2x00_free_fcport(fc_port_t *fcport)
4769 {
4770 if (fcport->ct_desc.ct_sns) {
4771 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4772 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4773 fcport->ct_desc.ct_sns_dma);
4774
4775 fcport->ct_desc.ct_sns = NULL;
4776 }
4777 kfree(fcport);
4778 }
4779
4780 /*
4781 * qla2x00_configure_loop
4782 * Updates Fibre Channel Device Database with what is actually on loop.
4783 *
4784 * Input:
4785 * ha = adapter block pointer.
4786 *
4787 * Returns:
4788 * 0 = success.
4789 * 1 = error.
4790 * 2 = database was full and device was not configured.
4791 */
4792 static int
qla2x00_configure_loop(scsi_qla_host_t * vha)4793 qla2x00_configure_loop(scsi_qla_host_t *vha)
4794 {
4795 int rval;
4796 unsigned long flags, save_flags;
4797 struct qla_hw_data *ha = vha->hw;
4798 rval = QLA_SUCCESS;
4799
4800 /* Get Initiator ID */
4801 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4802 rval = qla2x00_configure_hba(vha);
4803 if (rval != QLA_SUCCESS) {
4804 ql_dbg(ql_dbg_disc, vha, 0x2013,
4805 "Unable to configure HBA.\n");
4806 return (rval);
4807 }
4808 }
4809
4810 save_flags = flags = vha->dpc_flags;
4811 ql_dbg(ql_dbg_disc, vha, 0x2014,
4812 "Configure loop -- dpc flags = 0x%lx.\n", flags);
4813
4814 /*
4815 * If we have both an RSCN and PORT UPDATE pending then handle them
4816 * both at the same time.
4817 */
4818 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4819 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
4820
4821 qla2x00_get_data_rate(vha);
4822
4823 /* Determine what we need to do */
4824 if (ha->current_topology == ISP_CFG_FL &&
4825 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4826
4827 set_bit(RSCN_UPDATE, &flags);
4828
4829 } else if (ha->current_topology == ISP_CFG_F &&
4830 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4831
4832 set_bit(RSCN_UPDATE, &flags);
4833 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4834
4835 } else if (ha->current_topology == ISP_CFG_NL ||
4836 ha->current_topology == ISP_CFG_N) {
4837 clear_bit(RSCN_UPDATE, &flags);
4838 set_bit(LOCAL_LOOP_UPDATE, &flags);
4839 } else if (!vha->flags.online ||
4840 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
4841 set_bit(RSCN_UPDATE, &flags);
4842 set_bit(LOCAL_LOOP_UPDATE, &flags);
4843 }
4844
4845 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
4846 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4847 ql_dbg(ql_dbg_disc, vha, 0x2015,
4848 "Loop resync needed, failing.\n");
4849 rval = QLA_FUNCTION_FAILED;
4850 } else
4851 rval = qla2x00_configure_local_loop(vha);
4852 }
4853
4854 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
4855 if (LOOP_TRANSITION(vha)) {
4856 ql_dbg(ql_dbg_disc, vha, 0x2099,
4857 "Needs RSCN update and loop transition.\n");
4858 rval = QLA_FUNCTION_FAILED;
4859 }
4860 else
4861 rval = qla2x00_configure_fabric(vha);
4862 }
4863
4864 if (rval == QLA_SUCCESS) {
4865 if (atomic_read(&vha->loop_down_timer) ||
4866 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4867 rval = QLA_FUNCTION_FAILED;
4868 } else {
4869 atomic_set(&vha->loop_state, LOOP_READY);
4870 ql_dbg(ql_dbg_disc, vha, 0x2069,
4871 "LOOP READY.\n");
4872 ha->flags.fw_init_done = 1;
4873
4874 /*
4875 * Process any ATIO queue entries that came in
4876 * while we weren't online.
4877 */
4878 if (qla_tgt_mode_enabled(vha) ||
4879 qla_dual_mode_enabled(vha)) {
4880 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
4881 qlt_24xx_process_atio_queue(vha, 0);
4882 spin_unlock_irqrestore(&ha->tgt.atio_lock,
4883 flags);
4884 }
4885 }
4886 }
4887
4888 if (rval) {
4889 ql_dbg(ql_dbg_disc, vha, 0x206a,
4890 "%s *** FAILED ***.\n", __func__);
4891 } else {
4892 ql_dbg(ql_dbg_disc, vha, 0x206b,
4893 "%s: exiting normally.\n", __func__);
4894 }
4895
4896 /* Restore state if a resync event occurred during processing */
4897 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4898 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
4899 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4900 if (test_bit(RSCN_UPDATE, &save_flags)) {
4901 set_bit(RSCN_UPDATE, &vha->dpc_flags);
4902 }
4903 }
4904
4905 return (rval);
4906 }
4907
4908 /*
4909 * qla2x00_configure_local_loop
4910 * Updates Fibre Channel Device Database with local loop devices.
4911 *
4912 * Input:
4913 * ha = adapter block pointer.
4914 *
4915 * Returns:
4916 * 0 = success.
4917 */
4918 static int
qla2x00_configure_local_loop(scsi_qla_host_t * vha)4919 qla2x00_configure_local_loop(scsi_qla_host_t *vha)
4920 {
4921 int rval, rval2;
4922 int found_devs;
4923 int found;
4924 fc_port_t *fcport, *new_fcport;
4925
4926 uint16_t index;
4927 uint16_t entries;
4928 char *id_iter;
4929 uint16_t loop_id;
4930 uint8_t domain, area, al_pa;
4931 struct qla_hw_data *ha = vha->hw;
4932 unsigned long flags;
4933
4934 /* Inititae N2N login. */
4935 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4936 /* borrowing */
4937 u32 *bp, i, sz;
4938
4939 memset(ha->init_cb, 0, ha->init_cb_size);
4940 sz = min_t(int, sizeof(struct els_plogi_payload),
4941 ha->init_cb_size);
4942 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
4943 (void *)ha->init_cb, sz);
4944 if (rval == QLA_SUCCESS) {
4945 bp = (uint32_t *)ha->init_cb;
4946 for (i = 0; i < sz/4 ; i++, bp++)
4947 *bp = cpu_to_be32(*bp);
4948
4949 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb,
4950 sizeof(ha->plogi_els_payld.data));
4951 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4952 } else {
4953 ql_dbg(ql_dbg_init, vha, 0x00d1,
4954 "PLOGI ELS param read fail.\n");
4955 }
4956 return QLA_SUCCESS;
4957 }
4958
4959 found_devs = 0;
4960 new_fcport = NULL;
4961 entries = MAX_FIBRE_DEVICES_LOOP;
4962
4963 /* Get list of logged in devices. */
4964 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
4965 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
4966 &entries);
4967 if (rval != QLA_SUCCESS)
4968 goto cleanup_allocation;
4969
4970 ql_dbg(ql_dbg_disc, vha, 0x2011,
4971 "Entries in ID list (%d).\n", entries);
4972 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
4973 (uint8_t *)ha->gid_list,
4974 entries * sizeof(struct gid_list_info));
4975
4976 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4977 fcport->scan_state = QLA_FCPORT_SCAN;
4978 }
4979
4980 /* Allocate temporary fcport for any new fcports discovered. */
4981 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
4982 if (new_fcport == NULL) {
4983 ql_log(ql_log_warn, vha, 0x2012,
4984 "Memory allocation failed for fcport.\n");
4985 rval = QLA_MEMORY_ALLOC_FAILED;
4986 goto cleanup_allocation;
4987 }
4988 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4989
4990 /* Add devices to port list. */
4991 id_iter = (char *)ha->gid_list;
4992 for (index = 0; index < entries; index++) {
4993 domain = ((struct gid_list_info *)id_iter)->domain;
4994 area = ((struct gid_list_info *)id_iter)->area;
4995 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
4996 if (IS_QLA2100(ha) || IS_QLA2200(ha))
4997 loop_id = (uint16_t)
4998 ((struct gid_list_info *)id_iter)->loop_id_2100;
4999 else
5000 loop_id = le16_to_cpu(
5001 ((struct gid_list_info *)id_iter)->loop_id);
5002 id_iter += ha->gid_list_info_size;
5003
5004 /* Bypass reserved domain fields. */
5005 if ((domain & 0xf0) == 0xf0)
5006 continue;
5007
5008 /* Bypass if not same domain and area of adapter. */
5009 if (area && domain &&
5010 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
5011 continue;
5012
5013 /* Bypass invalid local loop ID. */
5014 if (loop_id > LAST_LOCAL_LOOP_ID)
5015 continue;
5016
5017 memset(new_fcport->port_name, 0, WWN_SIZE);
5018
5019 /* Fill in member data. */
5020 new_fcport->d_id.b.domain = domain;
5021 new_fcport->d_id.b.area = area;
5022 new_fcport->d_id.b.al_pa = al_pa;
5023 new_fcport->loop_id = loop_id;
5024 new_fcport->scan_state = QLA_FCPORT_FOUND;
5025
5026 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
5027 if (rval2 != QLA_SUCCESS) {
5028 ql_dbg(ql_dbg_disc, vha, 0x2097,
5029 "Failed to retrieve fcport information "
5030 "-- get_port_database=%x, loop_id=0x%04x.\n",
5031 rval2, new_fcport->loop_id);
5032 /* Skip retry if N2N */
5033 if (ha->current_topology != ISP_CFG_N) {
5034 ql_dbg(ql_dbg_disc, vha, 0x2105,
5035 "Scheduling resync.\n");
5036 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5037 continue;
5038 }
5039 }
5040
5041 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5042 /* Check for matching device in port list. */
5043 found = 0;
5044 fcport = NULL;
5045 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5046 if (memcmp(new_fcport->port_name, fcport->port_name,
5047 WWN_SIZE))
5048 continue;
5049
5050 fcport->flags &= ~FCF_FABRIC_DEVICE;
5051 fcport->loop_id = new_fcport->loop_id;
5052 fcport->port_type = new_fcport->port_type;
5053 fcport->d_id.b24 = new_fcport->d_id.b24;
5054 memcpy(fcport->node_name, new_fcport->node_name,
5055 WWN_SIZE);
5056 fcport->scan_state = QLA_FCPORT_FOUND;
5057 found++;
5058 break;
5059 }
5060
5061 if (!found) {
5062 /* New device, add to fcports list. */
5063 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5064
5065 /* Allocate a new replacement fcport. */
5066 fcport = new_fcport;
5067
5068 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5069
5070 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5071
5072 if (new_fcport == NULL) {
5073 ql_log(ql_log_warn, vha, 0xd031,
5074 "Failed to allocate memory for fcport.\n");
5075 rval = QLA_MEMORY_ALLOC_FAILED;
5076 goto cleanup_allocation;
5077 }
5078 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5079 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5080 }
5081
5082 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5083
5084 /* Base iIDMA settings on HBA port speed. */
5085 fcport->fp_speed = ha->link_data_rate;
5086
5087 found_devs++;
5088 }
5089
5090 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5091 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5092 break;
5093
5094 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5095 if ((qla_dual_mode_enabled(vha) ||
5096 qla_ini_mode_enabled(vha)) &&
5097 atomic_read(&fcport->state) == FCS_ONLINE) {
5098 qla2x00_mark_device_lost(vha, fcport,
5099 ql2xplogiabsentdevice, 0);
5100 if (fcport->loop_id != FC_NO_LOOP_ID &&
5101 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5102 fcport->port_type != FCT_INITIATOR &&
5103 fcport->port_type != FCT_BROADCAST) {
5104 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5105 "%s %d %8phC post del sess\n",
5106 __func__, __LINE__,
5107 fcport->port_name);
5108
5109 qlt_schedule_sess_for_deletion(fcport);
5110 continue;
5111 }
5112 }
5113 }
5114
5115 if (fcport->scan_state == QLA_FCPORT_FOUND)
5116 qla24xx_fcport_handle_login(vha, fcport);
5117 }
5118
5119 cleanup_allocation:
5120 kfree(new_fcport);
5121
5122 if (rval != QLA_SUCCESS) {
5123 ql_dbg(ql_dbg_disc, vha, 0x2098,
5124 "Configure local loop error exit: rval=%x.\n", rval);
5125 }
5126
5127 return (rval);
5128 }
5129
5130 static void
qla2x00_iidma_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5131 qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5132 {
5133 int rval;
5134 uint16_t mb[MAILBOX_REGISTER_COUNT];
5135 struct qla_hw_data *ha = vha->hw;
5136
5137 if (!IS_IIDMA_CAPABLE(ha))
5138 return;
5139
5140 if (atomic_read(&fcport->state) != FCS_ONLINE)
5141 return;
5142
5143 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
5144 fcport->fp_speed > ha->link_data_rate ||
5145 !ha->flags.gpsc_supported)
5146 return;
5147
5148 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
5149 mb);
5150 if (rval != QLA_SUCCESS) {
5151 ql_dbg(ql_dbg_disc, vha, 0x2004,
5152 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5153 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
5154 } else {
5155 ql_dbg(ql_dbg_disc, vha, 0x2005,
5156 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
5157 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
5158 fcport->fp_speed, fcport->port_name);
5159 }
5160 }
5161
qla_do_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5162 void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5163 {
5164 qla2x00_iidma_fcport(vha, fcport);
5165 qla24xx_update_fcport_fcp_prio(vha, fcport);
5166 }
5167
qla_post_iidma_work(struct scsi_qla_host * vha,fc_port_t * fcport)5168 int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5169 {
5170 struct qla_work_evt *e;
5171
5172 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5173 if (!e)
5174 return QLA_FUNCTION_FAILED;
5175
5176 e->u.fcport.fcport = fcport;
5177 return qla2x00_post_work(vha, e);
5178 }
5179
5180 /* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
5181 static void
qla2x00_reg_remote_port(scsi_qla_host_t * vha,fc_port_t * fcport)5182 qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
5183 {
5184 struct fc_rport_identifiers rport_ids;
5185 struct fc_rport *rport;
5186 unsigned long flags;
5187
5188 if (atomic_read(&fcport->state) == FCS_ONLINE)
5189 return;
5190
5191 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5192 rport_ids.port_name = wwn_to_u64(fcport->port_name);
5193 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5194 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
5195 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5196 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
5197 if (!rport) {
5198 ql_log(ql_log_warn, vha, 0x2006,
5199 "Unable to allocate fc remote port.\n");
5200 return;
5201 }
5202
5203 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
5204 *((fc_port_t **)rport->dd_data) = fcport;
5205 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
5206
5207 rport->supported_classes = fcport->supported_classes;
5208
5209 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5210 if (fcport->port_type == FCT_INITIATOR)
5211 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
5212 if (fcport->port_type == FCT_TARGET)
5213 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
5214
5215 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5216 "%s %8phN. rport %p is %s mode\n",
5217 __func__, fcport->port_name, rport,
5218 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
5219
5220 fc_remote_port_rolechg(rport, rport_ids.roles);
5221 }
5222
5223 /*
5224 * qla2x00_update_fcport
5225 * Updates device on list.
5226 *
5227 * Input:
5228 * ha = adapter block pointer.
5229 * fcport = port structure pointer.
5230 *
5231 * Return:
5232 * 0 - Success
5233 * BIT_0 - error
5234 *
5235 * Context:
5236 * Kernel context.
5237 */
5238 void
qla2x00_update_fcport(scsi_qla_host_t * vha,fc_port_t * fcport)5239 qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
5240 {
5241 if (IS_SW_RESV_ADDR(fcport->d_id))
5242 return;
5243
5244 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5245 __func__, fcport->port_name);
5246
5247 fcport->disc_state = DSC_UPD_FCPORT;
5248 fcport->login_retry = vha->hw->login_retry_count;
5249 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
5250 fcport->deleted = 0;
5251 fcport->logout_on_delete = 1;
5252 fcport->login_retry = vha->hw->login_retry_count;
5253 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
5254
5255 qla2x00_iidma_fcport(vha, fcport);
5256
5257 switch (vha->hw->current_topology) {
5258 case ISP_CFG_N:
5259 case ISP_CFG_NL:
5260 fcport->keep_nport_handle = 1;
5261 break;
5262 default:
5263 break;
5264 }
5265
5266 if (fcport->fc4f_nvme) {
5267 qla_nvme_register_remote(vha, fcport);
5268 fcport->disc_state = DSC_LOGIN_COMPLETE;
5269 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5270 return;
5271 }
5272
5273 qla24xx_update_fcport_fcp_prio(vha, fcport);
5274
5275 switch (vha->host->active_mode) {
5276 case MODE_INITIATOR:
5277 qla2x00_reg_remote_port(vha, fcport);
5278 break;
5279 case MODE_TARGET:
5280 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5281 !vha->vha_tgt.qla_tgt->tgt_stopped)
5282 qlt_fc_port_added(vha, fcport);
5283 break;
5284 case MODE_DUAL:
5285 qla2x00_reg_remote_port(vha, fcport);
5286 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5287 !vha->vha_tgt.qla_tgt->tgt_stopped)
5288 qlt_fc_port_added(vha, fcport);
5289 break;
5290 default:
5291 break;
5292 }
5293
5294 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5295 if (fcport->id_changed) {
5296 fcport->id_changed = 0;
5297 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5298 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5299 __func__, __LINE__, fcport->port_name,
5300 vha->fcport_count);
5301 qla24xx_post_gfpnid_work(vha, fcport);
5302 } else {
5303 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5304 "%s %d %8phC post gpsc fcp_cnt %d\n",
5305 __func__, __LINE__, fcport->port_name,
5306 vha->fcport_count);
5307 qla24xx_post_gpsc_work(vha, fcport);
5308 }
5309 }
5310 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5311
5312 fcport->disc_state = DSC_LOGIN_COMPLETE;
5313 }
5314
qla_register_fcport_fn(struct work_struct * work)5315 void qla_register_fcport_fn(struct work_struct *work)
5316 {
5317 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5318 u32 rscn_gen = fcport->rscn_gen;
5319 u16 data[2];
5320
5321 if (IS_SW_RESV_ADDR(fcport->d_id))
5322 return;
5323
5324 qla2x00_update_fcport(fcport->vha, fcport);
5325
5326 if (rscn_gen != fcport->rscn_gen) {
5327 /* RSCN(s) came in while registration */
5328 switch (fcport->next_disc_state) {
5329 case DSC_DELETE_PEND:
5330 qlt_schedule_sess_for_deletion(fcport);
5331 break;
5332 case DSC_ADISC:
5333 data[0] = data[1] = 0;
5334 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5335 data);
5336 break;
5337 default:
5338 break;
5339 }
5340 }
5341 }
5342
5343 /*
5344 * qla2x00_configure_fabric
5345 * Setup SNS devices with loop ID's.
5346 *
5347 * Input:
5348 * ha = adapter block pointer.
5349 *
5350 * Returns:
5351 * 0 = success.
5352 * BIT_0 = error
5353 */
5354 static int
qla2x00_configure_fabric(scsi_qla_host_t * vha)5355 qla2x00_configure_fabric(scsi_qla_host_t *vha)
5356 {
5357 int rval;
5358 fc_port_t *fcport;
5359 uint16_t mb[MAILBOX_REGISTER_COUNT];
5360 uint16_t loop_id;
5361 LIST_HEAD(new_fcports);
5362 struct qla_hw_data *ha = vha->hw;
5363 int discovery_gen;
5364
5365 /* If FL port exists, then SNS is present */
5366 if (IS_FWI2_CAPABLE(ha))
5367 loop_id = NPH_F_PORT;
5368 else
5369 loop_id = SNS_FL_PORT;
5370 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
5371 if (rval != QLA_SUCCESS) {
5372 ql_dbg(ql_dbg_disc, vha, 0x20a0,
5373 "MBX_GET_PORT_NAME failed, No FL Port.\n");
5374
5375 vha->device_flags &= ~SWITCH_FOUND;
5376 return (QLA_SUCCESS);
5377 }
5378 vha->device_flags |= SWITCH_FOUND;
5379
5380
5381 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5382 rval = qla2x00_send_change_request(vha, 0x3, 0);
5383 if (rval != QLA_SUCCESS)
5384 ql_log(ql_log_warn, vha, 0x121,
5385 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5386 rval);
5387 }
5388
5389
5390 do {
5391 qla2x00_mgmt_svr_login(vha);
5392
5393 /* FDMI support. */
5394 if (ql2xfdmienable &&
5395 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5396 qla2x00_fdmi_register(vha);
5397
5398 /* Ensure we are logged into the SNS. */
5399 loop_id = NPH_SNS_LID(ha);
5400 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5401 0xfc, mb, BIT_1|BIT_0);
5402 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5403 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5404 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5405 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
5406 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5407 return rval;
5408 }
5409 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5410 if (qla2x00_rft_id(vha)) {
5411 /* EMPTY */
5412 ql_dbg(ql_dbg_disc, vha, 0x20a2,
5413 "Register FC-4 TYPE failed.\n");
5414 if (test_bit(LOOP_RESYNC_NEEDED,
5415 &vha->dpc_flags))
5416 break;
5417 }
5418 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
5419 /* EMPTY */
5420 ql_dbg(ql_dbg_disc, vha, 0x209a,
5421 "Register FC-4 Features failed.\n");
5422 if (test_bit(LOOP_RESYNC_NEEDED,
5423 &vha->dpc_flags))
5424 break;
5425 }
5426 if (vha->flags.nvme_enabled) {
5427 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5428 ql_dbg(ql_dbg_disc, vha, 0x2049,
5429 "Register NVME FC Type Features failed.\n");
5430 }
5431 }
5432 if (qla2x00_rnn_id(vha)) {
5433 /* EMPTY */
5434 ql_dbg(ql_dbg_disc, vha, 0x2104,
5435 "Register Node Name failed.\n");
5436 if (test_bit(LOOP_RESYNC_NEEDED,
5437 &vha->dpc_flags))
5438 break;
5439 } else if (qla2x00_rsnn_nn(vha)) {
5440 /* EMPTY */
5441 ql_dbg(ql_dbg_disc, vha, 0x209b,
5442 "Register Symbolic Node Name failed.\n");
5443 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5444 break;
5445 }
5446 }
5447
5448
5449 /* Mark the time right before querying FW for connected ports.
5450 * This process is long, asynchronous and by the time it's done,
5451 * collected information might not be accurate anymore. E.g.
5452 * disconnected port might have re-connected and a brand new
5453 * session has been created. In this case session's generation
5454 * will be newer than discovery_gen. */
5455 qlt_do_generation_tick(vha, &discovery_gen);
5456
5457 if (USE_ASYNC_SCAN(ha)) {
5458 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5459 NULL);
5460 if (rval)
5461 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5462 } else {
5463 list_for_each_entry(fcport, &vha->vp_fcports, list)
5464 fcport->scan_state = QLA_FCPORT_SCAN;
5465
5466 rval = qla2x00_find_all_fabric_devs(vha);
5467 }
5468 if (rval != QLA_SUCCESS)
5469 break;
5470 } while (0);
5471
5472 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5473 qla_nvme_register_hba(vha);
5474
5475 if (rval)
5476 ql_dbg(ql_dbg_disc, vha, 0x2068,
5477 "Configure fabric error exit rval=%d.\n", rval);
5478
5479 return (rval);
5480 }
5481
5482 /*
5483 * qla2x00_find_all_fabric_devs
5484 *
5485 * Input:
5486 * ha = adapter block pointer.
5487 * dev = database device entry pointer.
5488 *
5489 * Returns:
5490 * 0 = success.
5491 *
5492 * Context:
5493 * Kernel context.
5494 */
5495 static int
qla2x00_find_all_fabric_devs(scsi_qla_host_t * vha)5496 qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
5497 {
5498 int rval;
5499 uint16_t loop_id;
5500 fc_port_t *fcport, *new_fcport;
5501 int found;
5502
5503 sw_info_t *swl;
5504 int swl_idx;
5505 int first_dev, last_dev;
5506 port_id_t wrap = {}, nxt_d_id;
5507 struct qla_hw_data *ha = vha->hw;
5508 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
5509 unsigned long flags;
5510
5511 rval = QLA_SUCCESS;
5512
5513 /* Try GID_PT to get device list, else GAN. */
5514 if (!ha->swl)
5515 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
5516 GFP_KERNEL);
5517 swl = ha->swl;
5518 if (!swl) {
5519 /*EMPTY*/
5520 ql_dbg(ql_dbg_disc, vha, 0x209c,
5521 "GID_PT allocations failed, fallback on GA_NXT.\n");
5522 } else {
5523 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
5524 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
5525 swl = NULL;
5526 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5527 return rval;
5528 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
5529 swl = NULL;
5530 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5531 return rval;
5532 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
5533 swl = NULL;
5534 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5535 return rval;
5536 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5537 swl = NULL;
5538 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5539 return rval;
5540 }
5541
5542 /* If other queries succeeded probe for FC-4 type */
5543 if (swl) {
5544 qla2x00_gff_id(vha, swl);
5545 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5546 return rval;
5547 }
5548 }
5549 swl_idx = 0;
5550
5551 /* Allocate temporary fcport for any new fcports discovered. */
5552 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5553 if (new_fcport == NULL) {
5554 ql_log(ql_log_warn, vha, 0x209d,
5555 "Failed to allocate memory for fcport.\n");
5556 return (QLA_MEMORY_ALLOC_FAILED);
5557 }
5558 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5559 /* Set start port ID scan at adapter ID. */
5560 first_dev = 1;
5561 last_dev = 0;
5562
5563 /* Starting free loop ID. */
5564 loop_id = ha->min_external_loopid;
5565 for (; loop_id <= ha->max_loop_id; loop_id++) {
5566 if (qla2x00_is_reserved_id(vha, loop_id))
5567 continue;
5568
5569 if (ha->current_topology == ISP_CFG_FL &&
5570 (atomic_read(&vha->loop_down_timer) ||
5571 LOOP_TRANSITION(vha))) {
5572 atomic_set(&vha->loop_down_timer, 0);
5573 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5574 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5575 break;
5576 }
5577
5578 if (swl != NULL) {
5579 if (last_dev) {
5580 wrap.b24 = new_fcport->d_id.b24;
5581 } else {
5582 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5583 memcpy(new_fcport->node_name,
5584 swl[swl_idx].node_name, WWN_SIZE);
5585 memcpy(new_fcport->port_name,
5586 swl[swl_idx].port_name, WWN_SIZE);
5587 memcpy(new_fcport->fabric_port_name,
5588 swl[swl_idx].fabric_port_name, WWN_SIZE);
5589 new_fcport->fp_speed = swl[swl_idx].fp_speed;
5590 new_fcport->fc4_type = swl[swl_idx].fc4_type;
5591
5592 new_fcport->nvme_flag = 0;
5593 new_fcport->fc4f_nvme = 0;
5594 if (vha->flags.nvme_enabled &&
5595 swl[swl_idx].fc4f_nvme) {
5596 new_fcport->fc4f_nvme =
5597 swl[swl_idx].fc4f_nvme;
5598 ql_log(ql_log_info, vha, 0x2131,
5599 "FOUND: NVME port %8phC as FC Type 28h\n",
5600 new_fcport->port_name);
5601 }
5602
5603 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5604 last_dev = 1;
5605 }
5606 swl_idx++;
5607 }
5608 } else {
5609 /* Send GA_NXT to the switch */
5610 rval = qla2x00_ga_nxt(vha, new_fcport);
5611 if (rval != QLA_SUCCESS) {
5612 ql_log(ql_log_warn, vha, 0x209e,
5613 "SNS scan failed -- assuming "
5614 "zero-entry result.\n");
5615 rval = QLA_SUCCESS;
5616 break;
5617 }
5618 }
5619
5620 /* If wrap on switch device list, exit. */
5621 if (first_dev) {
5622 wrap.b24 = new_fcport->d_id.b24;
5623 first_dev = 0;
5624 } else if (new_fcport->d_id.b24 == wrap.b24) {
5625 ql_dbg(ql_dbg_disc, vha, 0x209f,
5626 "Device wrap (%02x%02x%02x).\n",
5627 new_fcport->d_id.b.domain,
5628 new_fcport->d_id.b.area,
5629 new_fcport->d_id.b.al_pa);
5630 break;
5631 }
5632
5633 /* Bypass if same physical adapter. */
5634 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
5635 continue;
5636
5637 /* Bypass virtual ports of the same host. */
5638 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5639 continue;
5640
5641 /* Bypass if same domain and area of adapter. */
5642 if (((new_fcport->d_id.b24 & 0xffff00) ==
5643 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
5644 ISP_CFG_FL)
5645 continue;
5646
5647 /* Bypass reserved domain fields. */
5648 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5649 continue;
5650
5651 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
5652 if (ql2xgffidenable &&
5653 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5654 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
5655 continue;
5656
5657 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5658
5659 /* Locate matching device in database. */
5660 found = 0;
5661 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5662 if (memcmp(new_fcport->port_name, fcport->port_name,
5663 WWN_SIZE))
5664 continue;
5665
5666 fcport->scan_state = QLA_FCPORT_FOUND;
5667
5668 found++;
5669
5670 /* Update port state. */
5671 memcpy(fcport->fabric_port_name,
5672 new_fcport->fabric_port_name, WWN_SIZE);
5673 fcport->fp_speed = new_fcport->fp_speed;
5674
5675 /*
5676 * If address the same and state FCS_ONLINE
5677 * (or in target mode), nothing changed.
5678 */
5679 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
5680 (atomic_read(&fcport->state) == FCS_ONLINE ||
5681 (vha->host->active_mode == MODE_TARGET))) {
5682 break;
5683 }
5684
5685 /*
5686 * If device was not a fabric device before.
5687 */
5688 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5689 fcport->d_id.b24 = new_fcport->d_id.b24;
5690 qla2x00_clear_loop_id(fcport);
5691 fcport->flags |= (FCF_FABRIC_DEVICE |
5692 FCF_LOGIN_NEEDED);
5693 break;
5694 }
5695
5696 /*
5697 * Port ID changed or device was marked to be updated;
5698 * Log it out if still logged in and mark it for
5699 * relogin later.
5700 */
5701 if (qla_tgt_mode_enabled(base_vha)) {
5702 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5703 "port changed FC ID, %8phC"
5704 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5705 fcport->port_name,
5706 fcport->d_id.b.domain,
5707 fcport->d_id.b.area,
5708 fcport->d_id.b.al_pa,
5709 fcport->loop_id,
5710 new_fcport->d_id.b.domain,
5711 new_fcport->d_id.b.area,
5712 new_fcport->d_id.b.al_pa);
5713 fcport->d_id.b24 = new_fcport->d_id.b24;
5714 break;
5715 }
5716
5717 fcport->d_id.b24 = new_fcport->d_id.b24;
5718 fcport->flags |= FCF_LOGIN_NEEDED;
5719 break;
5720 }
5721
5722 if (fcport->fc4f_nvme) {
5723 if (fcport->disc_state == DSC_DELETE_PEND) {
5724 fcport->disc_state = DSC_GNL;
5725 vha->fcport_count--;
5726 fcport->login_succ = 0;
5727 }
5728 }
5729
5730 if (found) {
5731 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5732 continue;
5733 }
5734 /* If device was not in our fcports list, then add it. */
5735 new_fcport->scan_state = QLA_FCPORT_FOUND;
5736 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5737
5738 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5739
5740
5741 /* Allocate a new replacement fcport. */
5742 nxt_d_id.b24 = new_fcport->d_id.b24;
5743 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5744 if (new_fcport == NULL) {
5745 ql_log(ql_log_warn, vha, 0xd032,
5746 "Memory allocation failed for fcport.\n");
5747 return (QLA_MEMORY_ALLOC_FAILED);
5748 }
5749 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5750 new_fcport->d_id.b24 = nxt_d_id.b24;
5751 }
5752
5753 qla2x00_free_fcport(new_fcport);
5754
5755 /*
5756 * Logout all previous fabric dev marked lost, except FCP2 devices.
5757 */
5758 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5759 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5760 break;
5761
5762 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
5763 continue;
5764
5765 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5766 if ((qla_dual_mode_enabled(vha) ||
5767 qla_ini_mode_enabled(vha)) &&
5768 atomic_read(&fcport->state) == FCS_ONLINE) {
5769 qla2x00_mark_device_lost(vha, fcport,
5770 ql2xplogiabsentdevice, 0);
5771 if (fcport->loop_id != FC_NO_LOOP_ID &&
5772 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5773 fcport->port_type != FCT_INITIATOR &&
5774 fcport->port_type != FCT_BROADCAST) {
5775 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5776 "%s %d %8phC post del sess\n",
5777 __func__, __LINE__,
5778 fcport->port_name);
5779 qlt_schedule_sess_for_deletion(fcport);
5780 continue;
5781 }
5782 }
5783 }
5784
5785 if (fcport->scan_state == QLA_FCPORT_FOUND &&
5786 (fcport->flags & FCF_LOGIN_NEEDED) != 0)
5787 qla24xx_fcport_handle_login(vha, fcport);
5788 }
5789 return (rval);
5790 }
5791
5792 /*
5793 * qla2x00_find_new_loop_id
5794 * Scan through our port list and find a new usable loop ID.
5795 *
5796 * Input:
5797 * ha: adapter state pointer.
5798 * dev: port structure pointer.
5799 *
5800 * Returns:
5801 * qla2x00 local function return status code.
5802 *
5803 * Context:
5804 * Kernel context.
5805 */
5806 int
qla2x00_find_new_loop_id(scsi_qla_host_t * vha,fc_port_t * dev)5807 qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
5808 {
5809 int rval;
5810 struct qla_hw_data *ha = vha->hw;
5811 unsigned long flags = 0;
5812
5813 rval = QLA_SUCCESS;
5814
5815 spin_lock_irqsave(&ha->vport_slock, flags);
5816
5817 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5818 LOOPID_MAP_SIZE);
5819 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5820 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5821 dev->loop_id = FC_NO_LOOP_ID;
5822 rval = QLA_FUNCTION_FAILED;
5823 } else
5824 set_bit(dev->loop_id, ha->loop_id_map);
5825
5826 spin_unlock_irqrestore(&ha->vport_slock, flags);
5827
5828 if (rval == QLA_SUCCESS)
5829 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5830 "Assigning new loopid=%x, portid=%x.\n",
5831 dev->loop_id, dev->d_id.b24);
5832 else
5833 ql_log(ql_log_warn, dev->vha, 0x2087,
5834 "No loop_id's available, portid=%x.\n",
5835 dev->d_id.b24);
5836
5837 return (rval);
5838 }
5839
5840
5841 /* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5842 int
qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t * vha)5843 qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5844 {
5845 int loop_id = FC_NO_LOOP_ID;
5846 int lid = NPH_MGMT_SERVER - vha->vp_idx;
5847 unsigned long flags;
5848 struct qla_hw_data *ha = vha->hw;
5849
5850 if (vha->vp_idx == 0) {
5851 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5852 return NPH_MGMT_SERVER;
5853 }
5854
5855 /* pick id from high and work down to low */
5856 spin_lock_irqsave(&ha->vport_slock, flags);
5857 for (; lid > 0; lid--) {
5858 if (!test_bit(lid, vha->hw->loop_id_map)) {
5859 set_bit(lid, vha->hw->loop_id_map);
5860 loop_id = lid;
5861 break;
5862 }
5863 }
5864 spin_unlock_irqrestore(&ha->vport_slock, flags);
5865
5866 return loop_id;
5867 }
5868
5869 /*
5870 * qla2x00_fabric_login
5871 * Issue fabric login command.
5872 *
5873 * Input:
5874 * ha = adapter block pointer.
5875 * device = pointer to FC device type structure.
5876 *
5877 * Returns:
5878 * 0 - Login successfully
5879 * 1 - Login failed
5880 * 2 - Initiator device
5881 * 3 - Fatal error
5882 */
5883 int
qla2x00_fabric_login(scsi_qla_host_t * vha,fc_port_t * fcport,uint16_t * next_loopid)5884 qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
5885 uint16_t *next_loopid)
5886 {
5887 int rval;
5888 int retry;
5889 uint16_t tmp_loopid;
5890 uint16_t mb[MAILBOX_REGISTER_COUNT];
5891 struct qla_hw_data *ha = vha->hw;
5892
5893 retry = 0;
5894 tmp_loopid = 0;
5895
5896 for (;;) {
5897 ql_dbg(ql_dbg_disc, vha, 0x2000,
5898 "Trying Fabric Login w/loop id 0x%04x for port "
5899 "%02x%02x%02x.\n",
5900 fcport->loop_id, fcport->d_id.b.domain,
5901 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5902
5903 /* Login fcport on switch. */
5904 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
5905 fcport->d_id.b.domain, fcport->d_id.b.area,
5906 fcport->d_id.b.al_pa, mb, BIT_0);
5907 if (rval != QLA_SUCCESS) {
5908 return rval;
5909 }
5910 if (mb[0] == MBS_PORT_ID_USED) {
5911 /*
5912 * Device has another loop ID. The firmware team
5913 * recommends the driver perform an implicit login with
5914 * the specified ID again. The ID we just used is save
5915 * here so we return with an ID that can be tried by
5916 * the next login.
5917 */
5918 retry++;
5919 tmp_loopid = fcport->loop_id;
5920 fcport->loop_id = mb[1];
5921
5922 ql_dbg(ql_dbg_disc, vha, 0x2001,
5923 "Fabric Login: port in use - next loop "
5924 "id=0x%04x, port id= %02x%02x%02x.\n",
5925 fcport->loop_id, fcport->d_id.b.domain,
5926 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5927
5928 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5929 /*
5930 * Login succeeded.
5931 */
5932 if (retry) {
5933 /* A retry occurred before. */
5934 *next_loopid = tmp_loopid;
5935 } else {
5936 /*
5937 * No retry occurred before. Just increment the
5938 * ID value for next login.
5939 */
5940 *next_loopid = (fcport->loop_id + 1);
5941 }
5942
5943 if (mb[1] & BIT_0) {
5944 fcport->port_type = FCT_INITIATOR;
5945 } else {
5946 fcport->port_type = FCT_TARGET;
5947 if (mb[1] & BIT_1) {
5948 fcport->flags |= FCF_FCP2_DEVICE;
5949 }
5950 }
5951
5952 if (mb[10] & BIT_0)
5953 fcport->supported_classes |= FC_COS_CLASS2;
5954 if (mb[10] & BIT_1)
5955 fcport->supported_classes |= FC_COS_CLASS3;
5956
5957 if (IS_FWI2_CAPABLE(ha)) {
5958 if (mb[10] & BIT_7)
5959 fcport->flags |=
5960 FCF_CONF_COMP_SUPPORTED;
5961 }
5962
5963 rval = QLA_SUCCESS;
5964 break;
5965 } else if (mb[0] == MBS_LOOP_ID_USED) {
5966 /*
5967 * Loop ID already used, try next loop ID.
5968 */
5969 fcport->loop_id++;
5970 rval = qla2x00_find_new_loop_id(vha, fcport);
5971 if (rval != QLA_SUCCESS) {
5972 /* Ran out of loop IDs to use */
5973 break;
5974 }
5975 } else if (mb[0] == MBS_COMMAND_ERROR) {
5976 /*
5977 * Firmware possibly timed out during login. If NO
5978 * retries are left to do then the device is declared
5979 * dead.
5980 */
5981 *next_loopid = fcport->loop_id;
5982 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
5983 fcport->d_id.b.domain, fcport->d_id.b.area,
5984 fcport->d_id.b.al_pa);
5985 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5986
5987 rval = 1;
5988 break;
5989 } else {
5990 /*
5991 * unrecoverable / not handled error
5992 */
5993 ql_dbg(ql_dbg_disc, vha, 0x2002,
5994 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
5995 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
5996 fcport->d_id.b.area, fcport->d_id.b.al_pa,
5997 fcport->loop_id, jiffies);
5998
5999 *next_loopid = fcport->loop_id;
6000 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
6001 fcport->d_id.b.domain, fcport->d_id.b.area,
6002 fcport->d_id.b.al_pa);
6003 qla2x00_clear_loop_id(fcport);
6004 fcport->login_retry = 0;
6005
6006 rval = 3;
6007 break;
6008 }
6009 }
6010
6011 return (rval);
6012 }
6013
6014 /*
6015 * qla2x00_local_device_login
6016 * Issue local device login command.
6017 *
6018 * Input:
6019 * ha = adapter block pointer.
6020 * loop_id = loop id of device to login to.
6021 *
6022 * Returns (Where's the #define!!!!):
6023 * 0 - Login successfully
6024 * 1 - Login failed
6025 * 3 - Fatal error
6026 */
6027 int
qla2x00_local_device_login(scsi_qla_host_t * vha,fc_port_t * fcport)6028 qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
6029 {
6030 int rval;
6031 uint16_t mb[MAILBOX_REGISTER_COUNT];
6032
6033 memset(mb, 0, sizeof(mb));
6034 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
6035 if (rval == QLA_SUCCESS) {
6036 /* Interrogate mailbox registers for any errors */
6037 if (mb[0] == MBS_COMMAND_ERROR)
6038 rval = 1;
6039 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6040 /* device not in PCB table */
6041 rval = 3;
6042 }
6043
6044 return (rval);
6045 }
6046
6047 /*
6048 * qla2x00_loop_resync
6049 * Resync with fibre channel devices.
6050 *
6051 * Input:
6052 * ha = adapter block pointer.
6053 *
6054 * Returns:
6055 * 0 = success
6056 */
6057 int
qla2x00_loop_resync(scsi_qla_host_t * vha)6058 qla2x00_loop_resync(scsi_qla_host_t *vha)
6059 {
6060 int rval = QLA_SUCCESS;
6061 uint32_t wait_time;
6062 struct req_que *req;
6063 struct rsp_que *rsp;
6064
6065 req = vha->req;
6066 rsp = req->rsp;
6067
6068 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6069 if (vha->flags.online) {
6070 if (!(rval = qla2x00_fw_ready(vha))) {
6071 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6072 wait_time = 256;
6073 do {
6074 if (!IS_QLAFX00(vha->hw)) {
6075 /*
6076 * Issue a marker after FW becomes
6077 * ready.
6078 */
6079 qla2x00_marker(vha, req, rsp, 0, 0,
6080 MK_SYNC_ALL);
6081 vha->marker_needed = 0;
6082 }
6083
6084 /* Remap devices on Loop. */
6085 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6086
6087 if (IS_QLAFX00(vha->hw))
6088 qlafx00_configure_devices(vha);
6089 else
6090 qla2x00_configure_loop(vha);
6091
6092 wait_time--;
6093 } while (!atomic_read(&vha->loop_down_timer) &&
6094 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6095 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6096 &vha->dpc_flags)));
6097 }
6098 }
6099
6100 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6101 return (QLA_FUNCTION_FAILED);
6102
6103 if (rval)
6104 ql_dbg(ql_dbg_disc, vha, 0x206c,
6105 "%s *** FAILED ***.\n", __func__);
6106
6107 return (rval);
6108 }
6109
6110 /*
6111 * qla2x00_perform_loop_resync
6112 * Description: This function will set the appropriate flags and call
6113 * qla2x00_loop_resync. If successful loop will be resynced
6114 * Arguments : scsi_qla_host_t pointer
6115 * returm : Success or Failure
6116 */
6117
qla2x00_perform_loop_resync(scsi_qla_host_t * ha)6118 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6119 {
6120 int32_t rval = 0;
6121
6122 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6123 /*Configure the flags so that resync happens properly*/
6124 atomic_set(&ha->loop_down_timer, 0);
6125 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6126 atomic_set(&ha->loop_state, LOOP_UP);
6127 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6128 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6129 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6130
6131 rval = qla2x00_loop_resync(ha);
6132 } else
6133 atomic_set(&ha->loop_state, LOOP_DEAD);
6134
6135 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6136 }
6137
6138 return rval;
6139 }
6140
6141 void
qla2x00_update_fcports(scsi_qla_host_t * base_vha)6142 qla2x00_update_fcports(scsi_qla_host_t *base_vha)
6143 {
6144 fc_port_t *fcport;
6145 struct scsi_qla_host *vha;
6146 struct qla_hw_data *ha = base_vha->hw;
6147 unsigned long flags;
6148
6149 spin_lock_irqsave(&ha->vport_slock, flags);
6150 /* Go with deferred removal of rport references. */
6151 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6152 atomic_inc(&vha->vref_count);
6153 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6154 if (fcport->drport &&
6155 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6156 spin_unlock_irqrestore(&ha->vport_slock, flags);
6157 qla2x00_rport_del(fcport);
6158
6159 spin_lock_irqsave(&ha->vport_slock, flags);
6160 }
6161 }
6162 atomic_dec(&vha->vref_count);
6163 wake_up(&vha->vref_waitq);
6164 }
6165 spin_unlock_irqrestore(&ha->vport_slock, flags);
6166 }
6167
6168 /* Assumes idc_lock always held on entry */
6169 void
qla83xx_reset_ownership(scsi_qla_host_t * vha)6170 qla83xx_reset_ownership(scsi_qla_host_t *vha)
6171 {
6172 struct qla_hw_data *ha = vha->hw;
6173 uint32_t drv_presence, drv_presence_mask;
6174 uint32_t dev_part_info1, dev_part_info2, class_type;
6175 uint32_t class_type_mask = 0x3;
6176 uint16_t fcoe_other_function = 0xffff, i;
6177
6178 if (IS_QLA8044(ha)) {
6179 drv_presence = qla8044_rd_direct(vha,
6180 QLA8044_CRB_DRV_ACTIVE_INDEX);
6181 dev_part_info1 = qla8044_rd_direct(vha,
6182 QLA8044_CRB_DEV_PART_INFO_INDEX);
6183 dev_part_info2 = qla8044_rd_direct(vha,
6184 QLA8044_CRB_DEV_PART_INFO2);
6185 } else {
6186 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6187 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6188 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6189 }
6190 for (i = 0; i < 8; i++) {
6191 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6192 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6193 (i != ha->portnum)) {
6194 fcoe_other_function = i;
6195 break;
6196 }
6197 }
6198 if (fcoe_other_function == 0xffff) {
6199 for (i = 0; i < 8; i++) {
6200 class_type = ((dev_part_info2 >> (i * 4)) &
6201 class_type_mask);
6202 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6203 ((i + 8) != ha->portnum)) {
6204 fcoe_other_function = i + 8;
6205 break;
6206 }
6207 }
6208 }
6209 /*
6210 * Prepare drv-presence mask based on fcoe functions present.
6211 * However consider only valid physical fcoe function numbers (0-15).
6212 */
6213 drv_presence_mask = ~((1 << (ha->portnum)) |
6214 ((fcoe_other_function == 0xffff) ?
6215 0 : (1 << (fcoe_other_function))));
6216
6217 /* We are the reset owner iff:
6218 * - No other protocol drivers present.
6219 * - This is the lowest among fcoe functions. */
6220 if (!(drv_presence & drv_presence_mask) &&
6221 (ha->portnum < fcoe_other_function)) {
6222 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6223 "This host is Reset owner.\n");
6224 ha->flags.nic_core_reset_owner = 1;
6225 }
6226 }
6227
6228 static int
__qla83xx_set_drv_ack(scsi_qla_host_t * vha)6229 __qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6230 {
6231 int rval = QLA_SUCCESS;
6232 struct qla_hw_data *ha = vha->hw;
6233 uint32_t drv_ack;
6234
6235 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6236 if (rval == QLA_SUCCESS) {
6237 drv_ack |= (1 << ha->portnum);
6238 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6239 }
6240
6241 return rval;
6242 }
6243
6244 static int
__qla83xx_clear_drv_ack(scsi_qla_host_t * vha)6245 __qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6246 {
6247 int rval = QLA_SUCCESS;
6248 struct qla_hw_data *ha = vha->hw;
6249 uint32_t drv_ack;
6250
6251 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6252 if (rval == QLA_SUCCESS) {
6253 drv_ack &= ~(1 << ha->portnum);
6254 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6255 }
6256
6257 return rval;
6258 }
6259
6260 static const char *
qla83xx_dev_state_to_string(uint32_t dev_state)6261 qla83xx_dev_state_to_string(uint32_t dev_state)
6262 {
6263 switch (dev_state) {
6264 case QLA8XXX_DEV_COLD:
6265 return "COLD/RE-INIT";
6266 case QLA8XXX_DEV_INITIALIZING:
6267 return "INITIALIZING";
6268 case QLA8XXX_DEV_READY:
6269 return "READY";
6270 case QLA8XXX_DEV_NEED_RESET:
6271 return "NEED RESET";
6272 case QLA8XXX_DEV_NEED_QUIESCENT:
6273 return "NEED QUIESCENT";
6274 case QLA8XXX_DEV_FAILED:
6275 return "FAILED";
6276 case QLA8XXX_DEV_QUIESCENT:
6277 return "QUIESCENT";
6278 default:
6279 return "Unknown";
6280 }
6281 }
6282
6283 /* Assumes idc-lock always held on entry */
6284 void
qla83xx_idc_audit(scsi_qla_host_t * vha,int audit_type)6285 qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6286 {
6287 struct qla_hw_data *ha = vha->hw;
6288 uint32_t idc_audit_reg = 0, duration_secs = 0;
6289
6290 switch (audit_type) {
6291 case IDC_AUDIT_TIMESTAMP:
6292 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6293 idc_audit_reg = (ha->portnum) |
6294 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6295 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6296 break;
6297
6298 case IDC_AUDIT_COMPLETION:
6299 duration_secs = ((jiffies_to_msecs(jiffies) -
6300 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6301 idc_audit_reg = (ha->portnum) |
6302 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6303 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6304 break;
6305
6306 default:
6307 ql_log(ql_log_warn, vha, 0xb078,
6308 "Invalid audit type specified.\n");
6309 break;
6310 }
6311 }
6312
6313 /* Assumes idc_lock always held on entry */
6314 static int
qla83xx_initiating_reset(scsi_qla_host_t * vha)6315 qla83xx_initiating_reset(scsi_qla_host_t *vha)
6316 {
6317 struct qla_hw_data *ha = vha->hw;
6318 uint32_t idc_control, dev_state;
6319
6320 __qla83xx_get_idc_control(vha, &idc_control);
6321 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6322 ql_log(ql_log_info, vha, 0xb080,
6323 "NIC Core reset has been disabled. idc-control=0x%x\n",
6324 idc_control);
6325 return QLA_FUNCTION_FAILED;
6326 }
6327
6328 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6329 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6330 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6331 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6332 QLA8XXX_DEV_NEED_RESET);
6333 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6334 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6335 } else {
6336 const char *state = qla83xx_dev_state_to_string(dev_state);
6337 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6338
6339 /* SV: XXX: Is timeout required here? */
6340 /* Wait for IDC state change READY -> NEED_RESET */
6341 while (dev_state == QLA8XXX_DEV_READY) {
6342 qla83xx_idc_unlock(vha, 0);
6343 msleep(200);
6344 qla83xx_idc_lock(vha, 0);
6345 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6346 }
6347 }
6348
6349 /* Send IDC ack by writing to drv-ack register */
6350 __qla83xx_set_drv_ack(vha);
6351
6352 return QLA_SUCCESS;
6353 }
6354
6355 int
__qla83xx_set_idc_control(scsi_qla_host_t * vha,uint32_t idc_control)6356 __qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6357 {
6358 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6359 }
6360
6361 int
__qla83xx_get_idc_control(scsi_qla_host_t * vha,uint32_t * idc_control)6362 __qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6363 {
6364 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6365 }
6366
6367 static int
qla83xx_check_driver_presence(scsi_qla_host_t * vha)6368 qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6369 {
6370 uint32_t drv_presence = 0;
6371 struct qla_hw_data *ha = vha->hw;
6372
6373 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6374 if (drv_presence & (1 << ha->portnum))
6375 return QLA_SUCCESS;
6376 else
6377 return QLA_TEST_FAILED;
6378 }
6379
6380 int
qla83xx_nic_core_reset(scsi_qla_host_t * vha)6381 qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6382 {
6383 int rval = QLA_SUCCESS;
6384 struct qla_hw_data *ha = vha->hw;
6385
6386 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6387 "Entered %s().\n", __func__);
6388
6389 if (vha->device_flags & DFLG_DEV_FAILED) {
6390 ql_log(ql_log_warn, vha, 0xb059,
6391 "Device in unrecoverable FAILED state.\n");
6392 return QLA_FUNCTION_FAILED;
6393 }
6394
6395 qla83xx_idc_lock(vha, 0);
6396
6397 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6398 ql_log(ql_log_warn, vha, 0xb05a,
6399 "Function=0x%x has been removed from IDC participation.\n",
6400 ha->portnum);
6401 rval = QLA_FUNCTION_FAILED;
6402 goto exit;
6403 }
6404
6405 qla83xx_reset_ownership(vha);
6406
6407 rval = qla83xx_initiating_reset(vha);
6408
6409 /*
6410 * Perform reset if we are the reset-owner,
6411 * else wait till IDC state changes to READY/FAILED.
6412 */
6413 if (rval == QLA_SUCCESS) {
6414 rval = qla83xx_idc_state_handler(vha);
6415
6416 if (rval == QLA_SUCCESS)
6417 ha->flags.nic_core_hung = 0;
6418 __qla83xx_clear_drv_ack(vha);
6419 }
6420
6421 exit:
6422 qla83xx_idc_unlock(vha, 0);
6423
6424 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6425
6426 return rval;
6427 }
6428
6429 int
qla2xxx_mctp_dump(scsi_qla_host_t * vha)6430 qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6431 {
6432 struct qla_hw_data *ha = vha->hw;
6433 int rval = QLA_FUNCTION_FAILED;
6434
6435 if (!IS_MCTP_CAPABLE(ha)) {
6436 /* This message can be removed from the final version */
6437 ql_log(ql_log_info, vha, 0x506d,
6438 "This board is not MCTP capable\n");
6439 return rval;
6440 }
6441
6442 if (!ha->mctp_dump) {
6443 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6444 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6445
6446 if (!ha->mctp_dump) {
6447 ql_log(ql_log_warn, vha, 0x506e,
6448 "Failed to allocate memory for mctp dump\n");
6449 return rval;
6450 }
6451 }
6452
6453 #define MCTP_DUMP_STR_ADDR 0x00000000
6454 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6455 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6456 if (rval != QLA_SUCCESS) {
6457 ql_log(ql_log_warn, vha, 0x506f,
6458 "Failed to capture mctp dump\n");
6459 } else {
6460 ql_log(ql_log_info, vha, 0x5070,
6461 "Mctp dump capture for host (%ld/%p).\n",
6462 vha->host_no, ha->mctp_dump);
6463 ha->mctp_dumped = 1;
6464 }
6465
6466 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
6467 ha->flags.nic_core_reset_hdlr_active = 1;
6468 rval = qla83xx_restart_nic_firmware(vha);
6469 if (rval)
6470 /* NIC Core reset failed. */
6471 ql_log(ql_log_warn, vha, 0x5071,
6472 "Failed to restart nic firmware\n");
6473 else
6474 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6475 "Restarted NIC firmware successfully.\n");
6476 ha->flags.nic_core_reset_hdlr_active = 0;
6477 }
6478
6479 return rval;
6480
6481 }
6482
6483 /*
6484 * qla2x00_quiesce_io
6485 * Description: This function will block the new I/Os
6486 * Its not aborting any I/Os as context
6487 * is not destroyed during quiescence
6488 * Arguments: scsi_qla_host_t
6489 * return : void
6490 */
6491 void
qla2x00_quiesce_io(scsi_qla_host_t * vha)6492 qla2x00_quiesce_io(scsi_qla_host_t *vha)
6493 {
6494 struct qla_hw_data *ha = vha->hw;
6495 struct scsi_qla_host *vp;
6496
6497 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6498 "Quiescing I/O - ha=%p.\n", ha);
6499
6500 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6501 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6502 atomic_set(&vha->loop_state, LOOP_DOWN);
6503 qla2x00_mark_all_devices_lost(vha, 0);
6504 list_for_each_entry(vp, &ha->vp_list, list)
6505 qla2x00_mark_all_devices_lost(vp, 0);
6506 } else {
6507 if (!atomic_read(&vha->loop_down_timer))
6508 atomic_set(&vha->loop_down_timer,
6509 LOOP_DOWN_TIME);
6510 }
6511 /* Wait for pending cmds to complete */
6512 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6513 }
6514
6515 void
qla2x00_abort_isp_cleanup(scsi_qla_host_t * vha)6516 qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6517 {
6518 struct qla_hw_data *ha = vha->hw;
6519 struct scsi_qla_host *vp;
6520 unsigned long flags;
6521 fc_port_t *fcport;
6522 u16 i;
6523
6524 /* For ISP82XX, driver waits for completion of the commands.
6525 * online flag should be set.
6526 */
6527 if (!(IS_P3P_TYPE(ha)))
6528 vha->flags.online = 0;
6529 ha->flags.chip_reset_done = 0;
6530 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
6531 vha->qla_stats.total_isp_aborts++;
6532
6533 ql_log(ql_log_info, vha, 0x00af,
6534 "Performing ISP error recovery - ha=%p.\n", ha);
6535
6536 ha->flags.purge_mbox = 1;
6537 /* For ISP82XX, reset_chip is just disabling interrupts.
6538 * Driver waits for the completion of the commands.
6539 * the interrupts need to be enabled.
6540 */
6541 if (!(IS_P3P_TYPE(ha)))
6542 ha->isp_ops->reset_chip(vha);
6543
6544 ha->link_data_rate = PORT_SPEED_UNKNOWN;
6545 SAVE_TOPO(ha);
6546 ha->flags.rida_fmt2 = 0;
6547 ha->flags.n2n_ae = 0;
6548 ha->flags.lip_ae = 0;
6549 ha->current_topology = 0;
6550 ha->flags.fw_started = 0;
6551 ha->flags.fw_init_done = 0;
6552 ha->chip_reset++;
6553 ha->base_qpair->chip_reset = ha->chip_reset;
6554 for (i = 0; i < ha->max_qpairs; i++) {
6555 if (ha->queue_pair_map[i])
6556 ha->queue_pair_map[i]->chip_reset =
6557 ha->base_qpair->chip_reset;
6558 }
6559
6560 /* purge MBox commands */
6561 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6562 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6563 complete(&ha->mbx_intr_comp);
6564 }
6565
6566 i = 0;
6567 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6568 atomic_read(&ha->num_pend_mbx_stage2) ||
6569 atomic_read(&ha->num_pend_mbx_stage1)) {
6570 msleep(20);
6571 i++;
6572 if (i > 50)
6573 break;
6574 }
6575 ha->flags.purge_mbox = 0;
6576
6577 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6578 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6579 atomic_set(&vha->loop_state, LOOP_DOWN);
6580 qla2x00_mark_all_devices_lost(vha, 0);
6581
6582 spin_lock_irqsave(&ha->vport_slock, flags);
6583 list_for_each_entry(vp, &ha->vp_list, list) {
6584 atomic_inc(&vp->vref_count);
6585 spin_unlock_irqrestore(&ha->vport_slock, flags);
6586
6587 qla2x00_mark_all_devices_lost(vp, 0);
6588
6589 spin_lock_irqsave(&ha->vport_slock, flags);
6590 atomic_dec(&vp->vref_count);
6591 }
6592 spin_unlock_irqrestore(&ha->vport_slock, flags);
6593 } else {
6594 if (!atomic_read(&vha->loop_down_timer))
6595 atomic_set(&vha->loop_down_timer,
6596 LOOP_DOWN_TIME);
6597 }
6598
6599 /* Clear all async request states across all VPs. */
6600 list_for_each_entry(fcport, &vha->vp_fcports, list) {
6601 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6602 fcport->scan_state = 0;
6603 }
6604 spin_lock_irqsave(&ha->vport_slock, flags);
6605 list_for_each_entry(vp, &ha->vp_list, list) {
6606 atomic_inc(&vp->vref_count);
6607 spin_unlock_irqrestore(&ha->vport_slock, flags);
6608
6609 list_for_each_entry(fcport, &vp->vp_fcports, list)
6610 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6611
6612 spin_lock_irqsave(&ha->vport_slock, flags);
6613 atomic_dec(&vp->vref_count);
6614 }
6615 spin_unlock_irqrestore(&ha->vport_slock, flags);
6616
6617 if (!ha->flags.eeh_busy) {
6618 /* Make sure for ISP 82XX IO DMA is complete */
6619 if (IS_P3P_TYPE(ha)) {
6620 qla82xx_chip_reset_cleanup(vha);
6621 ql_log(ql_log_info, vha, 0x00b4,
6622 "Done chip reset cleanup.\n");
6623
6624 /* Done waiting for pending commands.
6625 * Reset the online flag.
6626 */
6627 vha->flags.online = 0;
6628 }
6629
6630 /* Requeue all commands in outstanding command list. */
6631 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6632 }
6633 /* memory barrier */
6634 wmb();
6635 }
6636
6637 /*
6638 * qla2x00_abort_isp
6639 * Resets ISP and aborts all outstanding commands.
6640 *
6641 * Input:
6642 * ha = adapter block pointer.
6643 *
6644 * Returns:
6645 * 0 = success
6646 */
6647 int
qla2x00_abort_isp(scsi_qla_host_t * vha)6648 qla2x00_abort_isp(scsi_qla_host_t *vha)
6649 {
6650 int rval;
6651 uint8_t status = 0;
6652 struct qla_hw_data *ha = vha->hw;
6653 struct scsi_qla_host *vp;
6654 struct req_que *req = ha->req_q_map[0];
6655 unsigned long flags;
6656
6657 if (vha->flags.online) {
6658 qla2x00_abort_isp_cleanup(vha);
6659
6660 if (IS_QLA8031(ha)) {
6661 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6662 "Clearing fcoe driver presence.\n");
6663 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6664 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6665 "Error while clearing DRV-Presence.\n");
6666 }
6667
6668 if (unlikely(pci_channel_offline(ha->pdev) &&
6669 ha->flags.pci_channel_io_perm_failure)) {
6670 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6671 status = 0;
6672 return status;
6673 }
6674
6675 ha->isp_ops->get_flash_version(vha, req->ring);
6676
6677 ha->isp_ops->nvram_config(vha);
6678
6679 if (!qla2x00_restart_isp(vha)) {
6680 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6681
6682 if (!atomic_read(&vha->loop_down_timer)) {
6683 /*
6684 * Issue marker command only when we are going
6685 * to start the I/O .
6686 */
6687 vha->marker_needed = 1;
6688 }
6689
6690 vha->flags.online = 1;
6691
6692 ha->isp_ops->enable_intrs(ha);
6693
6694 ha->isp_abort_cnt = 0;
6695 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6696
6697 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6698 qla2x00_get_fw_version(vha);
6699 if (ha->fce) {
6700 ha->flags.fce_enabled = 1;
6701 memset(ha->fce, 0,
6702 fce_calc_size(ha->fce_bufs));
6703 rval = qla2x00_enable_fce_trace(vha,
6704 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6705 &ha->fce_bufs);
6706 if (rval) {
6707 ql_log(ql_log_warn, vha, 0x8033,
6708 "Unable to reinitialize FCE "
6709 "(%d).\n", rval);
6710 ha->flags.fce_enabled = 0;
6711 }
6712 }
6713
6714 if (ha->eft) {
6715 memset(ha->eft, 0, EFT_SIZE);
6716 rval = qla2x00_enable_eft_trace(vha,
6717 ha->eft_dma, EFT_NUM_BUFFERS);
6718 if (rval) {
6719 ql_log(ql_log_warn, vha, 0x8034,
6720 "Unable to reinitialize EFT "
6721 "(%d).\n", rval);
6722 }
6723 }
6724 } else { /* failed the ISP abort */
6725 vha->flags.online = 1;
6726 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
6727 if (ha->isp_abort_cnt == 0) {
6728 ql_log(ql_log_fatal, vha, 0x8035,
6729 "ISP error recover failed - "
6730 "board disabled.\n");
6731 /*
6732 * The next call disables the board
6733 * completely.
6734 */
6735 qla2x00_abort_isp_cleanup(vha);
6736 vha->flags.online = 0;
6737 clear_bit(ISP_ABORT_RETRY,
6738 &vha->dpc_flags);
6739 status = 0;
6740 } else { /* schedule another ISP abort */
6741 ha->isp_abort_cnt--;
6742 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6743 "ISP abort - retry remaining %d.\n",
6744 ha->isp_abort_cnt);
6745 status = 1;
6746 }
6747 } else {
6748 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
6749 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6750 "ISP error recovery - retrying (%d) "
6751 "more times.\n", ha->isp_abort_cnt);
6752 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6753 status = 1;
6754 }
6755 }
6756
6757 }
6758
6759 if (!status) {
6760 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
6761 qla2x00_configure_hba(vha);
6762 spin_lock_irqsave(&ha->vport_slock, flags);
6763 list_for_each_entry(vp, &ha->vp_list, list) {
6764 if (vp->vp_idx) {
6765 atomic_inc(&vp->vref_count);
6766 spin_unlock_irqrestore(&ha->vport_slock, flags);
6767
6768 qla2x00_vp_abort_isp(vp);
6769
6770 spin_lock_irqsave(&ha->vport_slock, flags);
6771 atomic_dec(&vp->vref_count);
6772 }
6773 }
6774 spin_unlock_irqrestore(&ha->vport_slock, flags);
6775
6776 if (IS_QLA8031(ha)) {
6777 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6778 "Setting back fcoe driver presence.\n");
6779 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6780 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6781 "Error while setting DRV-Presence.\n");
6782 }
6783 } else {
6784 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6785 __func__);
6786 }
6787
6788 return(status);
6789 }
6790
6791 /*
6792 * qla2x00_restart_isp
6793 * restarts the ISP after a reset
6794 *
6795 * Input:
6796 * ha = adapter block pointer.
6797 *
6798 * Returns:
6799 * 0 = success
6800 */
6801 static int
qla2x00_restart_isp(scsi_qla_host_t * vha)6802 qla2x00_restart_isp(scsi_qla_host_t *vha)
6803 {
6804 int status = 0;
6805 struct qla_hw_data *ha = vha->hw;
6806 struct req_que *req = ha->req_q_map[0];
6807 struct rsp_que *rsp = ha->rsp_q_map[0];
6808
6809 /* If firmware needs to be loaded */
6810 if (qla2x00_isp_firmware(vha)) {
6811 vha->flags.online = 0;
6812 status = ha->isp_ops->chip_diag(vha);
6813 if (!status)
6814 status = qla2x00_setup_chip(vha);
6815 }
6816
6817 if (!status && !(status = qla2x00_init_rings(vha))) {
6818 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6819 ha->flags.chip_reset_done = 1;
6820
6821 /* Initialize the queues in use */
6822 qla25xx_init_queues(ha);
6823
6824 status = qla2x00_fw_ready(vha);
6825 if (!status) {
6826 /* Issue a marker after FW becomes ready. */
6827 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
6828 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
6829 }
6830
6831 /* if no cable then assume it's good */
6832 if ((vha->device_flags & DFLG_NO_CABLE))
6833 status = 0;
6834 }
6835 return (status);
6836 }
6837
6838 static int
qla25xx_init_queues(struct qla_hw_data * ha)6839 qla25xx_init_queues(struct qla_hw_data *ha)
6840 {
6841 struct rsp_que *rsp = NULL;
6842 struct req_que *req = NULL;
6843 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6844 int ret = -1;
6845 int i;
6846
6847 for (i = 1; i < ha->max_rsp_queues; i++) {
6848 rsp = ha->rsp_q_map[i];
6849 if (rsp && test_bit(i, ha->rsp_qid_map)) {
6850 rsp->options &= ~BIT_0;
6851 ret = qla25xx_init_rsp_que(base_vha, rsp);
6852 if (ret != QLA_SUCCESS)
6853 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6854 "%s Rsp que: %d init failed.\n",
6855 __func__, rsp->id);
6856 else
6857 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6858 "%s Rsp que: %d inited.\n",
6859 __func__, rsp->id);
6860 }
6861 }
6862 for (i = 1; i < ha->max_req_queues; i++) {
6863 req = ha->req_q_map[i];
6864 if (req && test_bit(i, ha->req_qid_map)) {
6865 /* Clear outstanding commands array. */
6866 req->options &= ~BIT_0;
6867 ret = qla25xx_init_req_que(base_vha, req);
6868 if (ret != QLA_SUCCESS)
6869 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6870 "%s Req que: %d init failed.\n",
6871 __func__, req->id);
6872 else
6873 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6874 "%s Req que: %d inited.\n",
6875 __func__, req->id);
6876 }
6877 }
6878 return ret;
6879 }
6880
6881 /*
6882 * qla2x00_reset_adapter
6883 * Reset adapter.
6884 *
6885 * Input:
6886 * ha = adapter block pointer.
6887 */
6888 void
qla2x00_reset_adapter(scsi_qla_host_t * vha)6889 qla2x00_reset_adapter(scsi_qla_host_t *vha)
6890 {
6891 unsigned long flags = 0;
6892 struct qla_hw_data *ha = vha->hw;
6893 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6894
6895 vha->flags.online = 0;
6896 ha->isp_ops->disable_intrs(ha);
6897
6898 spin_lock_irqsave(&ha->hardware_lock, flags);
6899 WRT_REG_WORD(®->hccr, HCCR_RESET_RISC);
6900 RD_REG_WORD(®->hccr); /* PCI Posting. */
6901 WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC);
6902 RD_REG_WORD(®->hccr); /* PCI Posting. */
6903 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6904 }
6905
6906 void
qla24xx_reset_adapter(scsi_qla_host_t * vha)6907 qla24xx_reset_adapter(scsi_qla_host_t *vha)
6908 {
6909 unsigned long flags = 0;
6910 struct qla_hw_data *ha = vha->hw;
6911 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6912
6913 if (IS_P3P_TYPE(ha))
6914 return;
6915
6916 vha->flags.online = 0;
6917 ha->isp_ops->disable_intrs(ha);
6918
6919 spin_lock_irqsave(&ha->hardware_lock, flags);
6920 WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET);
6921 RD_REG_DWORD(®->hccr);
6922 WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE);
6923 RD_REG_DWORD(®->hccr);
6924 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6925
6926 if (IS_NOPOLLING_TYPE(ha))
6927 ha->isp_ops->enable_intrs(ha);
6928 }
6929
6930 /* On sparc systems, obtain port and node WWN from firmware
6931 * properties.
6932 */
qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t * vha,struct nvram_24xx * nv)6933 static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6934 struct nvram_24xx *nv)
6935 {
6936 #ifdef CONFIG_SPARC
6937 struct qla_hw_data *ha = vha->hw;
6938 struct pci_dev *pdev = ha->pdev;
6939 struct device_node *dp = pci_device_to_OF_node(pdev);
6940 const u8 *val;
6941 int len;
6942
6943 val = of_get_property(dp, "port-wwn", &len);
6944 if (val && len >= WWN_SIZE)
6945 memcpy(nv->port_name, val, WWN_SIZE);
6946
6947 val = of_get_property(dp, "node-wwn", &len);
6948 if (val && len >= WWN_SIZE)
6949 memcpy(nv->node_name, val, WWN_SIZE);
6950 #endif
6951 }
6952
6953 int
qla24xx_nvram_config(scsi_qla_host_t * vha)6954 qla24xx_nvram_config(scsi_qla_host_t *vha)
6955 {
6956 int rval;
6957 struct init_cb_24xx *icb;
6958 struct nvram_24xx *nv;
6959 uint32_t *dptr;
6960 uint8_t *dptr1, *dptr2;
6961 uint32_t chksum;
6962 uint16_t cnt;
6963 struct qla_hw_data *ha = vha->hw;
6964
6965 rval = QLA_SUCCESS;
6966 icb = (struct init_cb_24xx *)ha->init_cb;
6967 nv = ha->nvram;
6968
6969 /* Determine NVRAM starting address. */
6970 if (ha->port_no == 0) {
6971 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
6972 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
6973 } else {
6974 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6975 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
6976 }
6977
6978 ha->nvram_size = sizeof(struct nvram_24xx);
6979 ha->vpd_size = FA_NVRAM_VPD_SIZE;
6980
6981 /* Get VPD data into cache */
6982 ha->vpd = ha->nvram + VPD_OFFSET;
6983 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
6984 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
6985
6986 /* Get NVRAM data into cache and calculate checksum. */
6987 dptr = (uint32_t *)nv;
6988 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
6989 ha->nvram_size);
6990 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6991 chksum += le32_to_cpu(*dptr);
6992
6993 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
6994 "Contents of NVRAM\n");
6995 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
6996 (uint8_t *)nv, ha->nvram_size);
6997
6998 /* Bad NVRAM data, set defaults parameters. */
6999 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
7000 || nv->id[3] != ' ' ||
7001 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
7002 /* Reset NVRAM data. */
7003 ql_log(ql_log_warn, vha, 0x006b,
7004 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7005 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
7006 ql_log(ql_log_warn, vha, 0x006c,
7007 "Falling back to functioning (yet invalid -- WWPN) "
7008 "defaults.\n");
7009
7010 /*
7011 * Set default initialization control block.
7012 */
7013 memset(nv, 0, ha->nvram_size);
7014 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7015 nv->version = cpu_to_le16(ICB_VERSION);
7016 nv->frame_payload_size = 2048;
7017 nv->execution_throttle = cpu_to_le16(0xFFFF);
7018 nv->exchange_count = cpu_to_le16(0);
7019 nv->hard_address = cpu_to_le16(124);
7020 nv->port_name[0] = 0x21;
7021 nv->port_name[1] = 0x00 + ha->port_no + 1;
7022 nv->port_name[2] = 0x00;
7023 nv->port_name[3] = 0xe0;
7024 nv->port_name[4] = 0x8b;
7025 nv->port_name[5] = 0x1c;
7026 nv->port_name[6] = 0x55;
7027 nv->port_name[7] = 0x86;
7028 nv->node_name[0] = 0x20;
7029 nv->node_name[1] = 0x00;
7030 nv->node_name[2] = 0x00;
7031 nv->node_name[3] = 0xe0;
7032 nv->node_name[4] = 0x8b;
7033 nv->node_name[5] = 0x1c;
7034 nv->node_name[6] = 0x55;
7035 nv->node_name[7] = 0x86;
7036 qla24xx_nvram_wwn_from_ofw(vha, nv);
7037 nv->login_retry_count = cpu_to_le16(8);
7038 nv->interrupt_delay_timer = cpu_to_le16(0);
7039 nv->login_timeout = cpu_to_le16(0);
7040 nv->firmware_options_1 =
7041 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7042 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7043 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7044 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7045 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7046 nv->efi_parameters = cpu_to_le32(0);
7047 nv->reset_delay = 5;
7048 nv->max_luns_per_target = cpu_to_le16(128);
7049 nv->port_down_retry_count = cpu_to_le16(30);
7050 nv->link_down_timeout = cpu_to_le16(30);
7051
7052 rval = 1;
7053 }
7054
7055 if (qla_tgt_mode_enabled(vha)) {
7056 /* Don't enable full login after initial LIP */
7057 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
7058 /* Don't enable LIP full login for initiator */
7059 nv->host_p &= cpu_to_le32(~BIT_10);
7060 }
7061
7062 qlt_24xx_config_nvram_stage1(vha, nv);
7063
7064 /* Reset Initialization control block */
7065 memset(icb, 0, ha->init_cb_size);
7066
7067 /* Copy 1st segment. */
7068 dptr1 = (uint8_t *)icb;
7069 dptr2 = (uint8_t *)&nv->version;
7070 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7071 while (cnt--)
7072 *dptr1++ = *dptr2++;
7073
7074 icb->login_retry_count = nv->login_retry_count;
7075 icb->link_down_on_nos = nv->link_down_on_nos;
7076
7077 /* Copy 2nd segment. */
7078 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7079 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7080 cnt = (uint8_t *)&icb->reserved_3 -
7081 (uint8_t *)&icb->interrupt_delay_timer;
7082 while (cnt--)
7083 *dptr1++ = *dptr2++;
7084 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
7085 /*
7086 * Setup driver NVRAM options.
7087 */
7088 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
7089 "QLA2462");
7090
7091 qlt_24xx_config_nvram_stage2(vha, icb);
7092
7093 if (nv->host_p & cpu_to_le32(BIT_15)) {
7094 /* Use alternate WWN? */
7095 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7096 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7097 }
7098
7099 /* Prepare nodename */
7100 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
7101 /*
7102 * Firmware will apply the following mask if the nodename was
7103 * not provided.
7104 */
7105 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7106 icb->node_name[0] &= 0xF0;
7107 }
7108
7109 /* Set host adapter parameters. */
7110 ha->flags.disable_risc_code_load = 0;
7111 ha->flags.enable_lip_reset = 0;
7112 ha->flags.enable_lip_full_login =
7113 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7114 ha->flags.enable_target_reset =
7115 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
7116 ha->flags.enable_led_scheme = 0;
7117 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
7118
7119 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7120 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7121
7122 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7123 sizeof(ha->fw_seriallink_options24));
7124
7125 /* save HBA serial number */
7126 ha->serial0 = icb->port_name[5];
7127 ha->serial1 = icb->port_name[6];
7128 ha->serial2 = icb->port_name[7];
7129 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7130 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7131
7132 icb->execution_throttle = cpu_to_le16(0xFFFF);
7133
7134 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7135
7136 /* Set minimum login_timeout to 4 seconds. */
7137 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7138 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7139 if (le16_to_cpu(nv->login_timeout) < 4)
7140 nv->login_timeout = cpu_to_le16(4);
7141 ha->login_timeout = le16_to_cpu(nv->login_timeout);
7142
7143 /* Set minimum RATOV to 100 tenths of a second. */
7144 ha->r_a_tov = 100;
7145
7146 ha->loop_reset_delay = nv->reset_delay;
7147
7148 /* Link Down Timeout = 0:
7149 *
7150 * When Port Down timer expires we will start returning
7151 * I/O's to OS with "DID_NO_CONNECT".
7152 *
7153 * Link Down Timeout != 0:
7154 *
7155 * The driver waits for the link to come up after link down
7156 * before returning I/Os to OS with "DID_NO_CONNECT".
7157 */
7158 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7159 ha->loop_down_abort_time =
7160 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7161 } else {
7162 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7163 ha->loop_down_abort_time =
7164 (LOOP_DOWN_TIME - ha->link_down_timeout);
7165 }
7166
7167 /* Need enough time to try and get the port back. */
7168 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7169 if (qlport_down_retry)
7170 ha->port_down_retry_count = qlport_down_retry;
7171
7172 /* Set login_retry_count */
7173 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7174 if (ha->port_down_retry_count ==
7175 le16_to_cpu(nv->port_down_retry_count) &&
7176 ha->port_down_retry_count > 3)
7177 ha->login_retry_count = ha->port_down_retry_count;
7178 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7179 ha->login_retry_count = ha->port_down_retry_count;
7180 if (ql2xloginretrycount)
7181 ha->login_retry_count = ql2xloginretrycount;
7182
7183 /* N2N: driver will initiate Login instead of FW */
7184 icb->firmware_options_3 |= BIT_8;
7185
7186 /* Enable ZIO. */
7187 if (!vha->flags.init_done) {
7188 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7189 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7190 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7191 le16_to_cpu(icb->interrupt_delay_timer): 2;
7192 }
7193 icb->firmware_options_2 &= cpu_to_le32(
7194 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7195 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7196 ha->zio_mode = QLA_ZIO_MODE_6;
7197
7198 ql_log(ql_log_info, vha, 0x006f,
7199 "ZIO mode %d enabled; timer delay (%d us).\n",
7200 ha->zio_mode, ha->zio_timer * 100);
7201
7202 icb->firmware_options_2 |= cpu_to_le32(
7203 (uint32_t)ha->zio_mode);
7204 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7205 }
7206
7207 if (rval) {
7208 ql_log(ql_log_warn, vha, 0x0070,
7209 "NVRAM configuration failed.\n");
7210 }
7211 return (rval);
7212 }
7213
qla27xx_find_valid_image(struct scsi_qla_host * vha)7214 uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
7215 {
7216 struct qla27xx_image_status pri_image_status, sec_image_status;
7217 uint8_t valid_pri_image, valid_sec_image;
7218 uint32_t *wptr;
7219 uint32_t cnt, chksum, size;
7220 struct qla_hw_data *ha = vha->hw;
7221
7222 valid_pri_image = valid_sec_image = 1;
7223 ha->active_image = 0;
7224 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
7225
7226 if (!ha->flt_region_img_status_pri) {
7227 valid_pri_image = 0;
7228 goto check_sec_image;
7229 }
7230
7231 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
7232 ha->flt_region_img_status_pri, size);
7233
7234 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7235 ql_dbg(ql_dbg_init, vha, 0x018b,
7236 "Primary image signature (0x%x) not valid\n",
7237 pri_image_status.signature);
7238 valid_pri_image = 0;
7239 goto check_sec_image;
7240 }
7241
7242 wptr = (uint32_t *)(&pri_image_status);
7243 cnt = size;
7244
7245 for (chksum = 0; cnt--; wptr++)
7246 chksum += le32_to_cpu(*wptr);
7247
7248 if (chksum) {
7249 ql_dbg(ql_dbg_init, vha, 0x018c,
7250 "Checksum validation failed for primary image (0x%x)\n",
7251 chksum);
7252 valid_pri_image = 0;
7253 }
7254
7255 check_sec_image:
7256 if (!ha->flt_region_img_status_sec) {
7257 valid_sec_image = 0;
7258 goto check_valid_image;
7259 }
7260
7261 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7262 ha->flt_region_img_status_sec, size);
7263
7264 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7265 ql_dbg(ql_dbg_init, vha, 0x018d,
7266 "Secondary image signature(0x%x) not valid\n",
7267 sec_image_status.signature);
7268 valid_sec_image = 0;
7269 goto check_valid_image;
7270 }
7271
7272 wptr = (uint32_t *)(&sec_image_status);
7273 cnt = size;
7274 for (chksum = 0; cnt--; wptr++)
7275 chksum += le32_to_cpu(*wptr);
7276 if (chksum) {
7277 ql_dbg(ql_dbg_init, vha, 0x018e,
7278 "Checksum validation failed for secondary image (0x%x)\n",
7279 chksum);
7280 valid_sec_image = 0;
7281 }
7282
7283 check_valid_image:
7284 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7285 ha->active_image = QLA27XX_PRIMARY_IMAGE;
7286 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7287 if (!ha->active_image ||
7288 pri_image_status.generation_number <
7289 sec_image_status.generation_number)
7290 ha->active_image = QLA27XX_SECONDARY_IMAGE;
7291 }
7292
7293 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n",
7294 ha->active_image == 0 ? "default bootld and fw" :
7295 ha->active_image == 1 ? "primary" :
7296 ha->active_image == 2 ? "secondary" :
7297 "Invalid");
7298
7299 return ha->active_image;
7300 }
7301
7302 static int
qla24xx_load_risc_flash(scsi_qla_host_t * vha,uint32_t * srisc_addr,uint32_t faddr)7303 qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7304 uint32_t faddr)
7305 {
7306 int rval = QLA_SUCCESS;
7307 int segments, fragment;
7308 uint32_t *dcode, dlen;
7309 uint32_t risc_addr;
7310 uint32_t risc_size;
7311 uint32_t i;
7312 struct qla_hw_data *ha = vha->hw;
7313 struct req_que *req = ha->req_q_map[0];
7314
7315 ql_dbg(ql_dbg_init, vha, 0x008b,
7316 "FW: Loading firmware from flash (%x).\n", faddr);
7317
7318 rval = QLA_SUCCESS;
7319
7320 segments = FA_RISC_CODE_SEGMENTS;
7321 dcode = (uint32_t *)req->ring;
7322 *srisc_addr = 0;
7323
7324 if (IS_QLA27XX(ha) &&
7325 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7326 faddr = ha->flt_region_fw_sec;
7327
7328 /* Validate firmware image by checking version. */
7329 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
7330 for (i = 0; i < 4; i++)
7331 dcode[i] = be32_to_cpu(dcode[i]);
7332 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7333 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7334 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7335 dcode[3] == 0)) {
7336 ql_log(ql_log_fatal, vha, 0x008c,
7337 "Unable to verify the integrity of flash firmware "
7338 "image.\n");
7339 ql_log(ql_log_fatal, vha, 0x008d,
7340 "Firmware data: %08x %08x %08x %08x.\n",
7341 dcode[0], dcode[1], dcode[2], dcode[3]);
7342
7343 return QLA_FUNCTION_FAILED;
7344 }
7345
7346 while (segments && rval == QLA_SUCCESS) {
7347 /* Read segment's load information. */
7348 qla24xx_read_flash_data(vha, dcode, faddr, 4);
7349
7350 risc_addr = be32_to_cpu(dcode[2]);
7351 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7352 risc_size = be32_to_cpu(dcode[3]);
7353
7354 fragment = 0;
7355 while (risc_size > 0 && rval == QLA_SUCCESS) {
7356 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7357 if (dlen > risc_size)
7358 dlen = risc_size;
7359
7360 ql_dbg(ql_dbg_init, vha, 0x008e,
7361 "Loading risc segment@ risc addr %x "
7362 "number of dwords 0x%x offset 0x%x.\n",
7363 risc_addr, dlen, faddr);
7364
7365 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
7366 for (i = 0; i < dlen; i++)
7367 dcode[i] = swab32(dcode[i]);
7368
7369 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7370 dlen);
7371 if (rval) {
7372 ql_log(ql_log_fatal, vha, 0x008f,
7373 "Failed to load segment %d of firmware.\n",
7374 fragment);
7375 return QLA_FUNCTION_FAILED;
7376 }
7377
7378 faddr += dlen;
7379 risc_addr += dlen;
7380 risc_size -= dlen;
7381 fragment++;
7382 }
7383
7384 /* Next segment. */
7385 segments--;
7386 }
7387
7388 if (!IS_QLA27XX(ha))
7389 return rval;
7390
7391 if (ha->fw_dump_template)
7392 vfree(ha->fw_dump_template);
7393 ha->fw_dump_template = NULL;
7394 ha->fw_dump_template_len = 0;
7395
7396 ql_dbg(ql_dbg_init, vha, 0x0161,
7397 "Loading fwdump template from %x\n", faddr);
7398 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7399 risc_size = be32_to_cpu(dcode[2]);
7400 ql_dbg(ql_dbg_init, vha, 0x0162,
7401 "-> array size %x dwords\n", risc_size);
7402 if (risc_size == 0 || risc_size == ~0)
7403 goto default_template;
7404
7405 dlen = (risc_size - 8) * sizeof(*dcode);
7406 ql_dbg(ql_dbg_init, vha, 0x0163,
7407 "-> template allocating %x bytes...\n", dlen);
7408 ha->fw_dump_template = vmalloc(dlen);
7409 if (!ha->fw_dump_template) {
7410 ql_log(ql_log_warn, vha, 0x0164,
7411 "Failed fwdump template allocate %x bytes.\n", risc_size);
7412 goto default_template;
7413 }
7414
7415 faddr += 7;
7416 risc_size -= 8;
7417 dcode = ha->fw_dump_template;
7418 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7419 for (i = 0; i < risc_size; i++)
7420 dcode[i] = le32_to_cpu(dcode[i]);
7421
7422 if (!qla27xx_fwdt_template_valid(dcode)) {
7423 ql_log(ql_log_warn, vha, 0x0165,
7424 "Failed fwdump template validate\n");
7425 goto default_template;
7426 }
7427
7428 dlen = qla27xx_fwdt_template_size(dcode);
7429 ql_dbg(ql_dbg_init, vha, 0x0166,
7430 "-> template size %x bytes\n", dlen);
7431 if (dlen > risc_size * sizeof(*dcode)) {
7432 ql_log(ql_log_warn, vha, 0x0167,
7433 "Failed fwdump template exceeds array by %zx bytes\n",
7434 (size_t)(dlen - risc_size * sizeof(*dcode)));
7435 goto default_template;
7436 }
7437 ha->fw_dump_template_len = dlen;
7438 return rval;
7439
7440 default_template:
7441 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7442 if (ha->fw_dump_template)
7443 vfree(ha->fw_dump_template);
7444 ha->fw_dump_template = NULL;
7445 ha->fw_dump_template_len = 0;
7446
7447 dlen = qla27xx_fwdt_template_default_size();
7448 ql_dbg(ql_dbg_init, vha, 0x0169,
7449 "-> template allocating %x bytes...\n", dlen);
7450 ha->fw_dump_template = vmalloc(dlen);
7451 if (!ha->fw_dump_template) {
7452 ql_log(ql_log_warn, vha, 0x016a,
7453 "Failed fwdump template allocate %x bytes.\n", risc_size);
7454 goto failed_template;
7455 }
7456
7457 dcode = ha->fw_dump_template;
7458 risc_size = dlen / sizeof(*dcode);
7459 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7460 for (i = 0; i < risc_size; i++)
7461 dcode[i] = be32_to_cpu(dcode[i]);
7462
7463 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7464 ql_log(ql_log_warn, vha, 0x016b,
7465 "Failed fwdump template validate\n");
7466 goto failed_template;
7467 }
7468
7469 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7470 ql_dbg(ql_dbg_init, vha, 0x016c,
7471 "-> template size %x bytes\n", dlen);
7472 ha->fw_dump_template_len = dlen;
7473 return rval;
7474
7475 failed_template:
7476 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7477 if (ha->fw_dump_template)
7478 vfree(ha->fw_dump_template);
7479 ha->fw_dump_template = NULL;
7480 ha->fw_dump_template_len = 0;
7481 return rval;
7482 }
7483
7484 #define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
7485
7486 int
qla2x00_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)7487 qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7488 {
7489 int rval;
7490 int i, fragment;
7491 uint16_t *wcode, *fwcode;
7492 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7493 struct fw_blob *blob;
7494 struct qla_hw_data *ha = vha->hw;
7495 struct req_que *req = ha->req_q_map[0];
7496
7497 /* Load firmware blob. */
7498 blob = qla2x00_request_firmware(vha);
7499 if (!blob) {
7500 ql_log(ql_log_info, vha, 0x0083,
7501 "Firmware image unavailable.\n");
7502 ql_log(ql_log_info, vha, 0x0084,
7503 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
7504 return QLA_FUNCTION_FAILED;
7505 }
7506
7507 rval = QLA_SUCCESS;
7508
7509 wcode = (uint16_t *)req->ring;
7510 *srisc_addr = 0;
7511 fwcode = (uint16_t *)blob->fw->data;
7512 fwclen = 0;
7513
7514 /* Validate firmware image by checking version. */
7515 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7516 ql_log(ql_log_fatal, vha, 0x0085,
7517 "Unable to verify integrity of firmware image (%zd).\n",
7518 blob->fw->size);
7519 goto fail_fw_integrity;
7520 }
7521 for (i = 0; i < 4; i++)
7522 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7523 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7524 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7525 wcode[2] == 0 && wcode[3] == 0)) {
7526 ql_log(ql_log_fatal, vha, 0x0086,
7527 "Unable to verify integrity of firmware image.\n");
7528 ql_log(ql_log_fatal, vha, 0x0087,
7529 "Firmware data: %04x %04x %04x %04x.\n",
7530 wcode[0], wcode[1], wcode[2], wcode[3]);
7531 goto fail_fw_integrity;
7532 }
7533
7534 seg = blob->segs;
7535 while (*seg && rval == QLA_SUCCESS) {
7536 risc_addr = *seg;
7537 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7538 risc_size = be16_to_cpu(fwcode[3]);
7539
7540 /* Validate firmware image size. */
7541 fwclen += risc_size * sizeof(uint16_t);
7542 if (blob->fw->size < fwclen) {
7543 ql_log(ql_log_fatal, vha, 0x0088,
7544 "Unable to verify integrity of firmware image "
7545 "(%zd).\n", blob->fw->size);
7546 goto fail_fw_integrity;
7547 }
7548
7549 fragment = 0;
7550 while (risc_size > 0 && rval == QLA_SUCCESS) {
7551 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7552 if (wlen > risc_size)
7553 wlen = risc_size;
7554 ql_dbg(ql_dbg_init, vha, 0x0089,
7555 "Loading risc segment@ risc addr %x number of "
7556 "words 0x%x.\n", risc_addr, wlen);
7557
7558 for (i = 0; i < wlen; i++)
7559 wcode[i] = swab16(fwcode[i]);
7560
7561 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7562 wlen);
7563 if (rval) {
7564 ql_log(ql_log_fatal, vha, 0x008a,
7565 "Failed to load segment %d of firmware.\n",
7566 fragment);
7567 break;
7568 }
7569
7570 fwcode += wlen;
7571 risc_addr += wlen;
7572 risc_size -= wlen;
7573 fragment++;
7574 }
7575
7576 /* Next segment. */
7577 seg++;
7578 }
7579 return rval;
7580
7581 fail_fw_integrity:
7582 return QLA_FUNCTION_FAILED;
7583 }
7584
7585 static int
qla24xx_load_risc_blob(scsi_qla_host_t * vha,uint32_t * srisc_addr)7586 qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7587 {
7588 int rval;
7589 int segments, fragment;
7590 uint32_t *dcode, dlen;
7591 uint32_t risc_addr;
7592 uint32_t risc_size;
7593 uint32_t i;
7594 struct fw_blob *blob;
7595 const uint32_t *fwcode;
7596 uint32_t fwclen;
7597 struct qla_hw_data *ha = vha->hw;
7598 struct req_que *req = ha->req_q_map[0];
7599
7600 /* Load firmware blob. */
7601 blob = qla2x00_request_firmware(vha);
7602 if (!blob) {
7603 ql_log(ql_log_warn, vha, 0x0090,
7604 "Firmware image unavailable.\n");
7605 ql_log(ql_log_warn, vha, 0x0091,
7606 "Firmware images can be retrieved from: "
7607 QLA_FW_URL ".\n");
7608
7609 return QLA_FUNCTION_FAILED;
7610 }
7611
7612 ql_dbg(ql_dbg_init, vha, 0x0092,
7613 "FW: Loading via request-firmware.\n");
7614
7615 rval = QLA_SUCCESS;
7616
7617 segments = FA_RISC_CODE_SEGMENTS;
7618 dcode = (uint32_t *)req->ring;
7619 *srisc_addr = 0;
7620 fwcode = (uint32_t *)blob->fw->data;
7621 fwclen = 0;
7622
7623 /* Validate firmware image by checking version. */
7624 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7625 ql_log(ql_log_fatal, vha, 0x0093,
7626 "Unable to verify integrity of firmware image (%zd).\n",
7627 blob->fw->size);
7628 return QLA_FUNCTION_FAILED;
7629 }
7630 for (i = 0; i < 4; i++)
7631 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7632 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7633 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7634 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7635 dcode[3] == 0)) {
7636 ql_log(ql_log_fatal, vha, 0x0094,
7637 "Unable to verify integrity of firmware image (%zd).\n",
7638 blob->fw->size);
7639 ql_log(ql_log_fatal, vha, 0x0095,
7640 "Firmware data: %08x %08x %08x %08x.\n",
7641 dcode[0], dcode[1], dcode[2], dcode[3]);
7642 return QLA_FUNCTION_FAILED;
7643 }
7644
7645 while (segments && rval == QLA_SUCCESS) {
7646 risc_addr = be32_to_cpu(fwcode[2]);
7647 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7648 risc_size = be32_to_cpu(fwcode[3]);
7649
7650 /* Validate firmware image size. */
7651 fwclen += risc_size * sizeof(uint32_t);
7652 if (blob->fw->size < fwclen) {
7653 ql_log(ql_log_fatal, vha, 0x0096,
7654 "Unable to verify integrity of firmware image "
7655 "(%zd).\n", blob->fw->size);
7656 return QLA_FUNCTION_FAILED;
7657 }
7658
7659 fragment = 0;
7660 while (risc_size > 0 && rval == QLA_SUCCESS) {
7661 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7662 if (dlen > risc_size)
7663 dlen = risc_size;
7664
7665 ql_dbg(ql_dbg_init, vha, 0x0097,
7666 "Loading risc segment@ risc addr %x "
7667 "number of dwords 0x%x.\n", risc_addr, dlen);
7668
7669 for (i = 0; i < dlen; i++)
7670 dcode[i] = swab32(fwcode[i]);
7671
7672 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
7673 dlen);
7674 if (rval) {
7675 ql_log(ql_log_fatal, vha, 0x0098,
7676 "Failed to load segment %d of firmware.\n",
7677 fragment);
7678 return QLA_FUNCTION_FAILED;
7679 }
7680
7681 fwcode += dlen;
7682 risc_addr += dlen;
7683 risc_size -= dlen;
7684 fragment++;
7685 }
7686
7687 /* Next segment. */
7688 segments--;
7689 }
7690
7691 if (!IS_QLA27XX(ha))
7692 return rval;
7693
7694 if (ha->fw_dump_template)
7695 vfree(ha->fw_dump_template);
7696 ha->fw_dump_template = NULL;
7697 ha->fw_dump_template_len = 0;
7698
7699 ql_dbg(ql_dbg_init, vha, 0x171,
7700 "Loading fwdump template from %x\n",
7701 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
7702 risc_size = be32_to_cpu(fwcode[2]);
7703 ql_dbg(ql_dbg_init, vha, 0x172,
7704 "-> array size %x dwords\n", risc_size);
7705 if (risc_size == 0 || risc_size == ~0)
7706 goto default_template;
7707
7708 dlen = (risc_size - 8) * sizeof(*fwcode);
7709 ql_dbg(ql_dbg_init, vha, 0x0173,
7710 "-> template allocating %x bytes...\n", dlen);
7711 ha->fw_dump_template = vmalloc(dlen);
7712 if (!ha->fw_dump_template) {
7713 ql_log(ql_log_warn, vha, 0x0174,
7714 "Failed fwdump template allocate %x bytes.\n", risc_size);
7715 goto default_template;
7716 }
7717
7718 fwcode += 7;
7719 risc_size -= 8;
7720 dcode = ha->fw_dump_template;
7721 for (i = 0; i < risc_size; i++)
7722 dcode[i] = le32_to_cpu(fwcode[i]);
7723
7724 if (!qla27xx_fwdt_template_valid(dcode)) {
7725 ql_log(ql_log_warn, vha, 0x0175,
7726 "Failed fwdump template validate\n");
7727 goto default_template;
7728 }
7729
7730 dlen = qla27xx_fwdt_template_size(dcode);
7731 ql_dbg(ql_dbg_init, vha, 0x0176,
7732 "-> template size %x bytes\n", dlen);
7733 if (dlen > risc_size * sizeof(*fwcode)) {
7734 ql_log(ql_log_warn, vha, 0x0177,
7735 "Failed fwdump template exceeds array by %zx bytes\n",
7736 (size_t)(dlen - risc_size * sizeof(*fwcode)));
7737 goto default_template;
7738 }
7739 ha->fw_dump_template_len = dlen;
7740 return rval;
7741
7742 default_template:
7743 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7744 if (ha->fw_dump_template)
7745 vfree(ha->fw_dump_template);
7746 ha->fw_dump_template = NULL;
7747 ha->fw_dump_template_len = 0;
7748
7749 dlen = qla27xx_fwdt_template_default_size();
7750 ql_dbg(ql_dbg_init, vha, 0x0179,
7751 "-> template allocating %x bytes...\n", dlen);
7752 ha->fw_dump_template = vmalloc(dlen);
7753 if (!ha->fw_dump_template) {
7754 ql_log(ql_log_warn, vha, 0x017a,
7755 "Failed fwdump template allocate %x bytes.\n", risc_size);
7756 goto failed_template;
7757 }
7758
7759 dcode = ha->fw_dump_template;
7760 risc_size = dlen / sizeof(*fwcode);
7761 fwcode = qla27xx_fwdt_template_default();
7762 for (i = 0; i < risc_size; i++)
7763 dcode[i] = be32_to_cpu(fwcode[i]);
7764
7765 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7766 ql_log(ql_log_warn, vha, 0x017b,
7767 "Failed fwdump template validate\n");
7768 goto failed_template;
7769 }
7770
7771 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7772 ql_dbg(ql_dbg_init, vha, 0x017c,
7773 "-> template size %x bytes\n", dlen);
7774 ha->fw_dump_template_len = dlen;
7775 return rval;
7776
7777 failed_template:
7778 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7779 if (ha->fw_dump_template)
7780 vfree(ha->fw_dump_template);
7781 ha->fw_dump_template = NULL;
7782 ha->fw_dump_template_len = 0;
7783 return rval;
7784 }
7785
7786 int
qla24xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)7787 qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7788 {
7789 int rval;
7790
7791 if (ql2xfwloadbin == 1)
7792 return qla81xx_load_risc(vha, srisc_addr);
7793
7794 /*
7795 * FW Load priority:
7796 * 1) Firmware via request-firmware interface (.bin file).
7797 * 2) Firmware residing in flash.
7798 */
7799 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7800 if (rval == QLA_SUCCESS)
7801 return rval;
7802
7803 return qla24xx_load_risc_flash(vha, srisc_addr,
7804 vha->hw->flt_region_fw);
7805 }
7806
7807 int
qla81xx_load_risc(scsi_qla_host_t * vha,uint32_t * srisc_addr)7808 qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7809 {
7810 int rval;
7811 struct qla_hw_data *ha = vha->hw;
7812
7813 if (ql2xfwloadbin == 2)
7814 goto try_blob_fw;
7815
7816 /*
7817 * FW Load priority:
7818 * 1) Firmware residing in flash.
7819 * 2) Firmware via request-firmware interface (.bin file).
7820 * 3) Golden-Firmware residing in flash -- limited operation.
7821 */
7822 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
7823 if (rval == QLA_SUCCESS)
7824 return rval;
7825
7826 try_blob_fw:
7827 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7828 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7829 return rval;
7830
7831 ql_log(ql_log_info, vha, 0x0099,
7832 "Attempting to fallback to golden firmware.\n");
7833 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7834 if (rval != QLA_SUCCESS)
7835 return rval;
7836
7837 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
7838 ha->flags.running_gold_fw = 1;
7839 return rval;
7840 }
7841
7842 void
qla2x00_try_to_stop_firmware(scsi_qla_host_t * vha)7843 qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
7844 {
7845 int ret, retries;
7846 struct qla_hw_data *ha = vha->hw;
7847
7848 if (ha->flags.pci_channel_io_perm_failure)
7849 return;
7850 if (!IS_FWI2_CAPABLE(ha))
7851 return;
7852 if (!ha->fw_major_version)
7853 return;
7854 if (!ha->flags.fw_started)
7855 return;
7856
7857 ret = qla2x00_stop_firmware(vha);
7858 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
7859 ret != QLA_INVALID_COMMAND && retries ; retries--) {
7860 ha->isp_ops->reset_chip(vha);
7861 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
7862 continue;
7863 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
7864 continue;
7865 ql_log(ql_log_info, vha, 0x8015,
7866 "Attempting retry of stop-firmware command.\n");
7867 ret = qla2x00_stop_firmware(vha);
7868 }
7869
7870 QLA_FW_STOPPED(ha);
7871 ha->flags.fw_init_done = 0;
7872 }
7873
7874 int
qla24xx_configure_vhba(scsi_qla_host_t * vha)7875 qla24xx_configure_vhba(scsi_qla_host_t *vha)
7876 {
7877 int rval = QLA_SUCCESS;
7878 int rval2;
7879 uint16_t mb[MAILBOX_REGISTER_COUNT];
7880 struct qla_hw_data *ha = vha->hw;
7881 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
7882 struct req_que *req;
7883 struct rsp_que *rsp;
7884
7885 if (!vha->vp_idx)
7886 return -EINVAL;
7887
7888 rval = qla2x00_fw_ready(base_vha);
7889 if (vha->qpair)
7890 req = vha->qpair->req;
7891 else
7892 req = ha->req_q_map[0];
7893 rsp = req->rsp;
7894
7895 if (rval == QLA_SUCCESS) {
7896 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7897 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7898 }
7899
7900 vha->flags.management_server_logged_in = 0;
7901
7902 /* Login to SNS first */
7903 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7904 BIT_1);
7905 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7906 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7907 ql_dbg(ql_dbg_init, vha, 0x0120,
7908 "Failed SNS login: loop_id=%x, rval2=%d\n",
7909 NPH_SNS, rval2);
7910 else
7911 ql_dbg(ql_dbg_init, vha, 0x0103,
7912 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7913 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7914 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
7915 return (QLA_FUNCTION_FAILED);
7916 }
7917
7918 atomic_set(&vha->loop_down_timer, 0);
7919 atomic_set(&vha->loop_state, LOOP_UP);
7920 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7921 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7922 rval = qla2x00_loop_resync(base_vha);
7923
7924 return rval;
7925 }
7926
7927 /* 84XX Support **************************************************************/
7928
7929 static LIST_HEAD(qla_cs84xx_list);
7930 static DEFINE_MUTEX(qla_cs84xx_mutex);
7931
7932 static struct qla_chip_state_84xx *
qla84xx_get_chip(struct scsi_qla_host * vha)7933 qla84xx_get_chip(struct scsi_qla_host *vha)
7934 {
7935 struct qla_chip_state_84xx *cs84xx;
7936 struct qla_hw_data *ha = vha->hw;
7937
7938 mutex_lock(&qla_cs84xx_mutex);
7939
7940 /* Find any shared 84xx chip. */
7941 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7942 if (cs84xx->bus == ha->pdev->bus) {
7943 kref_get(&cs84xx->kref);
7944 goto done;
7945 }
7946 }
7947
7948 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7949 if (!cs84xx)
7950 goto done;
7951
7952 kref_init(&cs84xx->kref);
7953 spin_lock_init(&cs84xx->access_lock);
7954 mutex_init(&cs84xx->fw_update_mutex);
7955 cs84xx->bus = ha->pdev->bus;
7956
7957 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
7958 done:
7959 mutex_unlock(&qla_cs84xx_mutex);
7960 return cs84xx;
7961 }
7962
7963 static void
__qla84xx_chip_release(struct kref * kref)7964 __qla84xx_chip_release(struct kref *kref)
7965 {
7966 struct qla_chip_state_84xx *cs84xx =
7967 container_of(kref, struct qla_chip_state_84xx, kref);
7968
7969 mutex_lock(&qla_cs84xx_mutex);
7970 list_del(&cs84xx->list);
7971 mutex_unlock(&qla_cs84xx_mutex);
7972 kfree(cs84xx);
7973 }
7974
7975 void
qla84xx_put_chip(struct scsi_qla_host * vha)7976 qla84xx_put_chip(struct scsi_qla_host *vha)
7977 {
7978 struct qla_hw_data *ha = vha->hw;
7979 if (ha->cs84xx)
7980 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
7981 }
7982
7983 static int
qla84xx_init_chip(scsi_qla_host_t * vha)7984 qla84xx_init_chip(scsi_qla_host_t *vha)
7985 {
7986 int rval;
7987 uint16_t status[2];
7988 struct qla_hw_data *ha = vha->hw;
7989
7990 mutex_lock(&ha->cs84xx->fw_update_mutex);
7991
7992 rval = qla84xx_verify_chip(vha, status);
7993
7994 mutex_unlock(&ha->cs84xx->fw_update_mutex);
7995
7996 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
7997 QLA_SUCCESS;
7998 }
7999
8000 /* 81XX Support **************************************************************/
8001
8002 int
qla81xx_nvram_config(scsi_qla_host_t * vha)8003 qla81xx_nvram_config(scsi_qla_host_t *vha)
8004 {
8005 int rval;
8006 struct init_cb_81xx *icb;
8007 struct nvram_81xx *nv;
8008 uint32_t *dptr;
8009 uint8_t *dptr1, *dptr2;
8010 uint32_t chksum;
8011 uint16_t cnt;
8012 struct qla_hw_data *ha = vha->hw;
8013
8014 rval = QLA_SUCCESS;
8015 icb = (struct init_cb_81xx *)ha->init_cb;
8016 nv = ha->nvram;
8017
8018 /* Determine NVRAM starting address. */
8019 ha->nvram_size = sizeof(struct nvram_81xx);
8020 ha->vpd_size = FA_NVRAM_VPD_SIZE;
8021 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8022 ha->vpd_size = FA_VPD_SIZE_82XX;
8023
8024 /* Get VPD data into cache */
8025 ha->vpd = ha->nvram + VPD_OFFSET;
8026 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
8027 ha->vpd_size);
8028
8029 /* Get NVRAM data into cache and calculate checksum. */
8030 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
8031 ha->nvram_size);
8032 dptr = (uint32_t *)nv;
8033 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8034 chksum += le32_to_cpu(*dptr);
8035
8036 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8037 "Contents of NVRAM:\n");
8038 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8039 (uint8_t *)nv, ha->nvram_size);
8040
8041 /* Bad NVRAM data, set defaults parameters. */
8042 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
8043 || nv->id[3] != ' ' ||
8044 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
8045 /* Reset NVRAM data. */
8046 ql_log(ql_log_info, vha, 0x0073,
8047 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
8048 "version=0x%x.\n", chksum, nv->id[0],
8049 le16_to_cpu(nv->nvram_version));
8050 ql_log(ql_log_info, vha, 0x0074,
8051 "Falling back to functioning (yet invalid -- WWPN) "
8052 "defaults.\n");
8053
8054 /*
8055 * Set default initialization control block.
8056 */
8057 memset(nv, 0, ha->nvram_size);
8058 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8059 nv->version = cpu_to_le16(ICB_VERSION);
8060 nv->frame_payload_size = 2048;
8061 nv->execution_throttle = cpu_to_le16(0xFFFF);
8062 nv->exchange_count = cpu_to_le16(0);
8063 nv->port_name[0] = 0x21;
8064 nv->port_name[1] = 0x00 + ha->port_no + 1;
8065 nv->port_name[2] = 0x00;
8066 nv->port_name[3] = 0xe0;
8067 nv->port_name[4] = 0x8b;
8068 nv->port_name[5] = 0x1c;
8069 nv->port_name[6] = 0x55;
8070 nv->port_name[7] = 0x86;
8071 nv->node_name[0] = 0x20;
8072 nv->node_name[1] = 0x00;
8073 nv->node_name[2] = 0x00;
8074 nv->node_name[3] = 0xe0;
8075 nv->node_name[4] = 0x8b;
8076 nv->node_name[5] = 0x1c;
8077 nv->node_name[6] = 0x55;
8078 nv->node_name[7] = 0x86;
8079 nv->login_retry_count = cpu_to_le16(8);
8080 nv->interrupt_delay_timer = cpu_to_le16(0);
8081 nv->login_timeout = cpu_to_le16(0);
8082 nv->firmware_options_1 =
8083 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8084 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8085 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8086 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8087 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8088 nv->efi_parameters = cpu_to_le32(0);
8089 nv->reset_delay = 5;
8090 nv->max_luns_per_target = cpu_to_le16(128);
8091 nv->port_down_retry_count = cpu_to_le16(30);
8092 nv->link_down_timeout = cpu_to_le16(180);
8093 nv->enode_mac[0] = 0x00;
8094 nv->enode_mac[1] = 0xC0;
8095 nv->enode_mac[2] = 0xDD;
8096 nv->enode_mac[3] = 0x04;
8097 nv->enode_mac[4] = 0x05;
8098 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
8099
8100 rval = 1;
8101 }
8102
8103 if (IS_T10_PI_CAPABLE(ha))
8104 nv->frame_payload_size &= ~7;
8105
8106 qlt_81xx_config_nvram_stage1(vha, nv);
8107
8108 /* Reset Initialization control block */
8109 memset(icb, 0, ha->init_cb_size);
8110
8111 /* Copy 1st segment. */
8112 dptr1 = (uint8_t *)icb;
8113 dptr2 = (uint8_t *)&nv->version;
8114 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8115 while (cnt--)
8116 *dptr1++ = *dptr2++;
8117
8118 icb->login_retry_count = nv->login_retry_count;
8119
8120 /* Copy 2nd segment. */
8121 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8122 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8123 cnt = (uint8_t *)&icb->reserved_5 -
8124 (uint8_t *)&icb->interrupt_delay_timer;
8125 while (cnt--)
8126 *dptr1++ = *dptr2++;
8127
8128 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8129 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8130 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
8131 icb->enode_mac[0] = 0x00;
8132 icb->enode_mac[1] = 0xC0;
8133 icb->enode_mac[2] = 0xDD;
8134 icb->enode_mac[3] = 0x04;
8135 icb->enode_mac[4] = 0x05;
8136 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
8137 }
8138
8139 /* Use extended-initialization control block. */
8140 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
8141 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
8142 /*
8143 * Setup driver NVRAM options.
8144 */
8145 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
8146 "QLE8XXX");
8147
8148 qlt_81xx_config_nvram_stage2(vha, icb);
8149
8150 /* Use alternate WWN? */
8151 if (nv->host_p & cpu_to_le32(BIT_15)) {
8152 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8153 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8154 }
8155
8156 /* Prepare nodename */
8157 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
8158 /*
8159 * Firmware will apply the following mask if the nodename was
8160 * not provided.
8161 */
8162 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8163 icb->node_name[0] &= 0xF0;
8164 }
8165
8166 /* Set host adapter parameters. */
8167 ha->flags.disable_risc_code_load = 0;
8168 ha->flags.enable_lip_reset = 0;
8169 ha->flags.enable_lip_full_login =
8170 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
8171 ha->flags.enable_target_reset =
8172 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
8173 ha->flags.enable_led_scheme = 0;
8174 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
8175
8176 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8177 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8178
8179 /* save HBA serial number */
8180 ha->serial0 = icb->port_name[5];
8181 ha->serial1 = icb->port_name[6];
8182 ha->serial2 = icb->port_name[7];
8183 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8184 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8185
8186 icb->execution_throttle = cpu_to_le16(0xFFFF);
8187
8188 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8189
8190 /* Set minimum login_timeout to 4 seconds. */
8191 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8192 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8193 if (le16_to_cpu(nv->login_timeout) < 4)
8194 nv->login_timeout = cpu_to_le16(4);
8195 ha->login_timeout = le16_to_cpu(nv->login_timeout);
8196
8197 /* Set minimum RATOV to 100 tenths of a second. */
8198 ha->r_a_tov = 100;
8199
8200 ha->loop_reset_delay = nv->reset_delay;
8201
8202 /* Link Down Timeout = 0:
8203 *
8204 * When Port Down timer expires we will start returning
8205 * I/O's to OS with "DID_NO_CONNECT".
8206 *
8207 * Link Down Timeout != 0:
8208 *
8209 * The driver waits for the link to come up after link down
8210 * before returning I/Os to OS with "DID_NO_CONNECT".
8211 */
8212 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8213 ha->loop_down_abort_time =
8214 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8215 } else {
8216 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8217 ha->loop_down_abort_time =
8218 (LOOP_DOWN_TIME - ha->link_down_timeout);
8219 }
8220
8221 /* Need enough time to try and get the port back. */
8222 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8223 if (qlport_down_retry)
8224 ha->port_down_retry_count = qlport_down_retry;
8225
8226 /* Set login_retry_count */
8227 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8228 if (ha->port_down_retry_count ==
8229 le16_to_cpu(nv->port_down_retry_count) &&
8230 ha->port_down_retry_count > 3)
8231 ha->login_retry_count = ha->port_down_retry_count;
8232 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8233 ha->login_retry_count = ha->port_down_retry_count;
8234 if (ql2xloginretrycount)
8235 ha->login_retry_count = ql2xloginretrycount;
8236
8237 /* if not running MSI-X we need handshaking on interrupts */
8238 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
8239 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
8240
8241 /* Enable ZIO. */
8242 if (!vha->flags.init_done) {
8243 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8244 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8245 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8246 le16_to_cpu(icb->interrupt_delay_timer): 2;
8247 }
8248 icb->firmware_options_2 &= cpu_to_le32(
8249 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8250 vha->flags.process_response_queue = 0;
8251 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8252 ha->zio_mode = QLA_ZIO_MODE_6;
8253
8254 ql_log(ql_log_info, vha, 0x0075,
8255 "ZIO mode %d enabled; timer delay (%d us).\n",
8256 ha->zio_mode,
8257 ha->zio_timer * 100);
8258
8259 icb->firmware_options_2 |= cpu_to_le32(
8260 (uint32_t)ha->zio_mode);
8261 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8262 vha->flags.process_response_queue = 1;
8263 }
8264
8265 /* enable RIDA Format2 */
8266 icb->firmware_options_3 |= BIT_0;
8267
8268 /* N2N: driver will initiate Login instead of FW */
8269 icb->firmware_options_3 |= BIT_8;
8270
8271 if (IS_QLA27XX(ha)) {
8272 icb->firmware_options_3 |= BIT_8;
8273 ql_dbg(ql_log_info, vha, 0x0075,
8274 "Enabling direct connection.\n");
8275 }
8276
8277 if (rval) {
8278 ql_log(ql_log_warn, vha, 0x0076,
8279 "NVRAM configuration failed.\n");
8280 }
8281 return (rval);
8282 }
8283
8284 int
qla82xx_restart_isp(scsi_qla_host_t * vha)8285 qla82xx_restart_isp(scsi_qla_host_t *vha)
8286 {
8287 int status, rval;
8288 struct qla_hw_data *ha = vha->hw;
8289 struct req_que *req = ha->req_q_map[0];
8290 struct rsp_que *rsp = ha->rsp_q_map[0];
8291 struct scsi_qla_host *vp;
8292 unsigned long flags;
8293
8294 status = qla2x00_init_rings(vha);
8295 if (!status) {
8296 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8297 ha->flags.chip_reset_done = 1;
8298
8299 status = qla2x00_fw_ready(vha);
8300 if (!status) {
8301 /* Issue a marker after FW becomes ready. */
8302 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
8303 vha->flags.online = 1;
8304 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
8305 }
8306
8307 /* if no cable then assume it's good */
8308 if ((vha->device_flags & DFLG_NO_CABLE))
8309 status = 0;
8310 }
8311
8312 if (!status) {
8313 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8314
8315 if (!atomic_read(&vha->loop_down_timer)) {
8316 /*
8317 * Issue marker command only when we are going
8318 * to start the I/O .
8319 */
8320 vha->marker_needed = 1;
8321 }
8322
8323 ha->isp_ops->enable_intrs(ha);
8324
8325 ha->isp_abort_cnt = 0;
8326 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8327
8328 /* Update the firmware version */
8329 status = qla82xx_check_md_needed(vha);
8330
8331 if (ha->fce) {
8332 ha->flags.fce_enabled = 1;
8333 memset(ha->fce, 0,
8334 fce_calc_size(ha->fce_bufs));
8335 rval = qla2x00_enable_fce_trace(vha,
8336 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8337 &ha->fce_bufs);
8338 if (rval) {
8339 ql_log(ql_log_warn, vha, 0x8001,
8340 "Unable to reinitialize FCE (%d).\n",
8341 rval);
8342 ha->flags.fce_enabled = 0;
8343 }
8344 }
8345
8346 if (ha->eft) {
8347 memset(ha->eft, 0, EFT_SIZE);
8348 rval = qla2x00_enable_eft_trace(vha,
8349 ha->eft_dma, EFT_NUM_BUFFERS);
8350 if (rval) {
8351 ql_log(ql_log_warn, vha, 0x8010,
8352 "Unable to reinitialize EFT (%d).\n",
8353 rval);
8354 }
8355 }
8356 }
8357
8358 if (!status) {
8359 ql_dbg(ql_dbg_taskm, vha, 0x8011,
8360 "qla82xx_restart_isp succeeded.\n");
8361
8362 spin_lock_irqsave(&ha->vport_slock, flags);
8363 list_for_each_entry(vp, &ha->vp_list, list) {
8364 if (vp->vp_idx) {
8365 atomic_inc(&vp->vref_count);
8366 spin_unlock_irqrestore(&ha->vport_slock, flags);
8367
8368 qla2x00_vp_abort_isp(vp);
8369
8370 spin_lock_irqsave(&ha->vport_slock, flags);
8371 atomic_dec(&vp->vref_count);
8372 }
8373 }
8374 spin_unlock_irqrestore(&ha->vport_slock, flags);
8375
8376 } else {
8377 ql_log(ql_log_warn, vha, 0x8016,
8378 "qla82xx_restart_isp **** FAILED ****.\n");
8379 }
8380
8381 return status;
8382 }
8383
8384 void
qla81xx_update_fw_options(scsi_qla_host_t * vha)8385 qla81xx_update_fw_options(scsi_qla_host_t *vha)
8386 {
8387 struct qla_hw_data *ha = vha->hw;
8388
8389 /* Hold status IOCBs until ABTS response received. */
8390 if (ql2xfwholdabts)
8391 ha->fw_options[3] |= BIT_12;
8392
8393 /* Set Retry FLOGI in case of P2P connection */
8394 if (ha->operating_mode == P2P) {
8395 ha->fw_options[2] |= BIT_3;
8396 ql_dbg(ql_dbg_disc, vha, 0x2103,
8397 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8398 __func__, ha->fw_options[2]);
8399 }
8400
8401 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8402 if (ql2xmvasynctoatio) {
8403 if (qla_tgt_mode_enabled(vha) ||
8404 qla_dual_mode_enabled(vha))
8405 ha->fw_options[2] |= BIT_11;
8406 else
8407 ha->fw_options[2] &= ~BIT_11;
8408 }
8409
8410 if (qla_tgt_mode_enabled(vha) ||
8411 qla_dual_mode_enabled(vha)) {
8412 /* FW auto send SCSI status during */
8413 ha->fw_options[1] |= BIT_8;
8414 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8415
8416 /* FW perform Exchange validation */
8417 ha->fw_options[2] |= BIT_4;
8418 } else {
8419 ha->fw_options[1] &= ~BIT_8;
8420 ha->fw_options[10] &= 0x00ff;
8421
8422 ha->fw_options[2] &= ~BIT_4;
8423 }
8424
8425 if (ql2xetsenable) {
8426 /* Enable ETS Burst. */
8427 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8428 ha->fw_options[2] |= BIT_9;
8429 }
8430
8431 ql_dbg(ql_dbg_init, vha, 0x00e9,
8432 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8433 __func__, ha->fw_options[1], ha->fw_options[2],
8434 ha->fw_options[3], vha->host->active_mode);
8435
8436 qla2x00_set_fw_options(vha, ha->fw_options);
8437 }
8438
8439 /*
8440 * qla24xx_get_fcp_prio
8441 * Gets the fcp cmd priority value for the logged in port.
8442 * Looks for a match of the port descriptors within
8443 * each of the fcp prio config entries. If a match is found,
8444 * the tag (priority) value is returned.
8445 *
8446 * Input:
8447 * vha = scsi host structure pointer.
8448 * fcport = port structure pointer.
8449 *
8450 * Return:
8451 * non-zero (if found)
8452 * -1 (if not found)
8453 *
8454 * Context:
8455 * Kernel context
8456 */
8457 static int
qla24xx_get_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8458 qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8459 {
8460 int i, entries;
8461 uint8_t pid_match, wwn_match;
8462 int priority;
8463 uint32_t pid1, pid2;
8464 uint64_t wwn1, wwn2;
8465 struct qla_fcp_prio_entry *pri_entry;
8466 struct qla_hw_data *ha = vha->hw;
8467
8468 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
8469 return -1;
8470
8471 priority = -1;
8472 entries = ha->fcp_prio_cfg->num_entries;
8473 pri_entry = &ha->fcp_prio_cfg->entry[0];
8474
8475 for (i = 0; i < entries; i++) {
8476 pid_match = wwn_match = 0;
8477
8478 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8479 pri_entry++;
8480 continue;
8481 }
8482
8483 /* check source pid for a match */
8484 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8485 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8486 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8487 if (pid1 == INVALID_PORT_ID)
8488 pid_match++;
8489 else if (pid1 == pid2)
8490 pid_match++;
8491 }
8492
8493 /* check destination pid for a match */
8494 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8495 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8496 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8497 if (pid1 == INVALID_PORT_ID)
8498 pid_match++;
8499 else if (pid1 == pid2)
8500 pid_match++;
8501 }
8502
8503 /* check source WWN for a match */
8504 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8505 wwn1 = wwn_to_u64(vha->port_name);
8506 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8507 if (wwn2 == (uint64_t)-1)
8508 wwn_match++;
8509 else if (wwn1 == wwn2)
8510 wwn_match++;
8511 }
8512
8513 /* check destination WWN for a match */
8514 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8515 wwn1 = wwn_to_u64(fcport->port_name);
8516 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8517 if (wwn2 == (uint64_t)-1)
8518 wwn_match++;
8519 else if (wwn1 == wwn2)
8520 wwn_match++;
8521 }
8522
8523 if (pid_match == 2 || wwn_match == 2) {
8524 /* Found a matching entry */
8525 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8526 priority = pri_entry->tag;
8527 break;
8528 }
8529
8530 pri_entry++;
8531 }
8532
8533 return priority;
8534 }
8535
8536 /*
8537 * qla24xx_update_fcport_fcp_prio
8538 * Activates fcp priority for the logged in fc port
8539 *
8540 * Input:
8541 * vha = scsi host structure pointer.
8542 * fcp = port structure pointer.
8543 *
8544 * Return:
8545 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8546 *
8547 * Context:
8548 * Kernel context.
8549 */
8550 int
qla24xx_update_fcport_fcp_prio(scsi_qla_host_t * vha,fc_port_t * fcport)8551 qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8552 {
8553 int ret;
8554 int priority;
8555 uint16_t mb[5];
8556
8557 if (fcport->port_type != FCT_TARGET ||
8558 fcport->loop_id == FC_NO_LOOP_ID)
8559 return QLA_FUNCTION_FAILED;
8560
8561 priority = qla24xx_get_fcp_prio(vha, fcport);
8562 if (priority < 0)
8563 return QLA_FUNCTION_FAILED;
8564
8565 if (IS_P3P_TYPE(vha->hw)) {
8566 fcport->fcp_prio = priority & 0xf;
8567 return QLA_SUCCESS;
8568 }
8569
8570 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
8571 if (ret == QLA_SUCCESS) {
8572 if (fcport->fcp_prio != priority)
8573 ql_dbg(ql_dbg_user, vha, 0x709e,
8574 "Updated FCP_CMND priority - value=%d loop_id=%d "
8575 "port_id=%02x%02x%02x.\n", priority,
8576 fcport->loop_id, fcport->d_id.b.domain,
8577 fcport->d_id.b.area, fcport->d_id.b.al_pa);
8578 fcport->fcp_prio = priority & 0xf;
8579 } else
8580 ql_dbg(ql_dbg_user, vha, 0x704f,
8581 "Unable to update FCP_CMND priority - ret=0x%x for "
8582 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8583 fcport->d_id.b.domain, fcport->d_id.b.area,
8584 fcport->d_id.b.al_pa);
8585 return ret;
8586 }
8587
8588 /*
8589 * qla24xx_update_all_fcp_prio
8590 * Activates fcp priority for all the logged in ports
8591 *
8592 * Input:
8593 * ha = adapter block pointer.
8594 *
8595 * Return:
8596 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8597 *
8598 * Context:
8599 * Kernel context.
8600 */
8601 int
qla24xx_update_all_fcp_prio(scsi_qla_host_t * vha)8602 qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8603 {
8604 int ret;
8605 fc_port_t *fcport;
8606
8607 ret = QLA_FUNCTION_FAILED;
8608 /* We need to set priority for all logged in ports */
8609 list_for_each_entry(fcport, &vha->vp_fcports, list)
8610 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8611
8612 return ret;
8613 }
8614
qla2xxx_create_qpair(struct scsi_qla_host * vha,int qos,int vp_idx,bool startqp)8615 struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8616 int vp_idx, bool startqp)
8617 {
8618 int rsp_id = 0;
8619 int req_id = 0;
8620 int i;
8621 struct qla_hw_data *ha = vha->hw;
8622 uint16_t qpair_id = 0;
8623 struct qla_qpair *qpair = NULL;
8624 struct qla_msix_entry *msix;
8625
8626 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8627 ql_log(ql_log_warn, vha, 0x00181,
8628 "FW/Driver is not multi-queue capable.\n");
8629 return NULL;
8630 }
8631
8632 if (ql2xmqsupport || ql2xnvmeenable) {
8633 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8634 if (qpair == NULL) {
8635 ql_log(ql_log_warn, vha, 0x0182,
8636 "Failed to allocate memory for queue pair.\n");
8637 return NULL;
8638 }
8639 memset(qpair, 0, sizeof(struct qla_qpair));
8640
8641 qpair->hw = vha->hw;
8642 qpair->vha = vha;
8643 qpair->qp_lock_ptr = &qpair->qp_lock;
8644 spin_lock_init(&qpair->qp_lock);
8645 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
8646
8647 /* Assign available que pair id */
8648 mutex_lock(&ha->mq_lock);
8649 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
8650 if (ha->num_qpairs >= ha->max_qpairs) {
8651 mutex_unlock(&ha->mq_lock);
8652 ql_log(ql_log_warn, vha, 0x0183,
8653 "No resources to create additional q pair.\n");
8654 goto fail_qid_map;
8655 }
8656 ha->num_qpairs++;
8657 set_bit(qpair_id, ha->qpair_qid_map);
8658 ha->queue_pair_map[qpair_id] = qpair;
8659 qpair->id = qpair_id;
8660 qpair->vp_idx = vp_idx;
8661 qpair->fw_started = ha->flags.fw_started;
8662 INIT_LIST_HEAD(&qpair->hints_list);
8663 qpair->chip_reset = ha->base_qpair->chip_reset;
8664 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8665 qpair->enable_explicit_conf =
8666 ha->base_qpair->enable_explicit_conf;
8667
8668 for (i = 0; i < ha->msix_count; i++) {
8669 msix = &ha->msix_entries[i];
8670 if (msix->in_use)
8671 continue;
8672 qpair->msix = msix;
8673 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
8674 "Vector %x selected for qpair\n", msix->vector);
8675 break;
8676 }
8677 if (!qpair->msix) {
8678 ql_log(ql_log_warn, vha, 0x0184,
8679 "Out of MSI-X vectors!.\n");
8680 goto fail_msix;
8681 }
8682
8683 qpair->msix->in_use = 1;
8684 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8685 qpair->pdev = ha->pdev;
8686 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8687 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
8688
8689 mutex_unlock(&ha->mq_lock);
8690
8691 /* Create response queue first */
8692 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
8693 if (!rsp_id) {
8694 ql_log(ql_log_warn, vha, 0x0185,
8695 "Failed to create response queue.\n");
8696 goto fail_rsp;
8697 }
8698
8699 qpair->rsp = ha->rsp_q_map[rsp_id];
8700
8701 /* Create request queue */
8702 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8703 startqp);
8704 if (!req_id) {
8705 ql_log(ql_log_warn, vha, 0x0186,
8706 "Failed to create request queue.\n");
8707 goto fail_req;
8708 }
8709
8710 qpair->req = ha->req_q_map[req_id];
8711 qpair->rsp->req = qpair->req;
8712 qpair->rsp->qpair = qpair;
8713 /* init qpair to this cpu. Will adjust at run time. */
8714 qla_cpu_update(qpair, smp_processor_id());
8715
8716 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8717 if (ha->fw_attributes & BIT_4)
8718 qpair->difdix_supported = 1;
8719 }
8720
8721 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8722 if (!qpair->srb_mempool) {
8723 ql_log(ql_log_warn, vha, 0xd036,
8724 "Failed to create srb mempool for qpair %d\n",
8725 qpair->id);
8726 goto fail_mempool;
8727 }
8728
8729 /* Mark as online */
8730 qpair->online = 1;
8731
8732 if (!vha->flags.qpairs_available)
8733 vha->flags.qpairs_available = 1;
8734
8735 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8736 "Request/Response queue pair created, id %d\n",
8737 qpair->id);
8738 ql_dbg(ql_dbg_init, vha, 0x0187,
8739 "Request/Response queue pair created, id %d\n",
8740 qpair->id);
8741 }
8742 return qpair;
8743
8744 fail_mempool:
8745 fail_req:
8746 qla25xx_delete_rsp_que(vha, qpair->rsp);
8747 fail_rsp:
8748 mutex_lock(&ha->mq_lock);
8749 qpair->msix->in_use = 0;
8750 list_del(&qpair->qp_list_elem);
8751 if (list_empty(&vha->qp_list))
8752 vha->flags.qpairs_available = 0;
8753 fail_msix:
8754 ha->queue_pair_map[qpair_id] = NULL;
8755 clear_bit(qpair_id, ha->qpair_qid_map);
8756 ha->num_qpairs--;
8757 mutex_unlock(&ha->mq_lock);
8758 fail_qid_map:
8759 kfree(qpair);
8760 return NULL;
8761 }
8762
qla2xxx_delete_qpair(struct scsi_qla_host * vha,struct qla_qpair * qpair)8763 int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8764 {
8765 int ret = QLA_FUNCTION_FAILED;
8766 struct qla_hw_data *ha = qpair->hw;
8767
8768 qpair->delete_in_progress = 1;
8769
8770 ret = qla25xx_delete_req_que(vha, qpair->req);
8771 if (ret != QLA_SUCCESS)
8772 goto fail;
8773
8774 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8775 if (ret != QLA_SUCCESS)
8776 goto fail;
8777
8778 mutex_lock(&ha->mq_lock);
8779 ha->queue_pair_map[qpair->id] = NULL;
8780 clear_bit(qpair->id, ha->qpair_qid_map);
8781 ha->num_qpairs--;
8782 list_del(&qpair->qp_list_elem);
8783 if (list_empty(&vha->qp_list)) {
8784 vha->flags.qpairs_available = 0;
8785 vha->flags.qpairs_req_created = 0;
8786 vha->flags.qpairs_rsp_created = 0;
8787 }
8788 mempool_destroy(qpair->srb_mempool);
8789 kfree(qpair);
8790 mutex_unlock(&ha->mq_lock);
8791
8792 return QLA_SUCCESS;
8793 fail:
8794 return ret;
8795 }
8796