1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * R-Car Gen3 THS thermal sensor driver
4 * Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
5 *
6 * Copyright (C) 2016 Renesas Electronics Corporation.
7 * Copyright (C) 2016 Sang Engineering
8 */
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/interrupt.h>
12 #include <linux/io.h>
13 #include <linux/module.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/sys_soc.h>
18 #include <linux/thermal.h>
19
20 #include "thermal_core.h"
21
22 /* Register offsets */
23 #define REG_GEN3_IRQSTR 0x04
24 #define REG_GEN3_IRQMSK 0x08
25 #define REG_GEN3_IRQCTL 0x0C
26 #define REG_GEN3_IRQEN 0x10
27 #define REG_GEN3_IRQTEMP1 0x14
28 #define REG_GEN3_IRQTEMP2 0x18
29 #define REG_GEN3_IRQTEMP3 0x1C
30 #define REG_GEN3_CTSR 0x20
31 #define REG_GEN3_THCTR 0x20
32 #define REG_GEN3_TEMP 0x28
33 #define REG_GEN3_THCODE1 0x50
34 #define REG_GEN3_THCODE2 0x54
35 #define REG_GEN3_THCODE3 0x58
36
37 /* IRQ{STR,MSK,EN} bits */
38 #define IRQ_TEMP1 BIT(0)
39 #define IRQ_TEMP2 BIT(1)
40 #define IRQ_TEMP3 BIT(2)
41 #define IRQ_TEMPD1 BIT(3)
42 #define IRQ_TEMPD2 BIT(4)
43 #define IRQ_TEMPD3 BIT(5)
44
45 /* CTSR bits */
46 #define CTSR_PONM BIT(8)
47 #define CTSR_AOUT BIT(7)
48 #define CTSR_THBGR BIT(5)
49 #define CTSR_VMEN BIT(4)
50 #define CTSR_VMST BIT(1)
51 #define CTSR_THSST BIT(0)
52
53 /* THCTR bits */
54 #define THCTR_PONM BIT(6)
55 #define THCTR_THSST BIT(0)
56
57 #define CTEMP_MASK 0xFFF
58
59 #define MCELSIUS(temp) ((temp) * 1000)
60 #define GEN3_FUSE_MASK 0xFFF
61
62 #define TSC_MAX_NUM 3
63
64 /* Structure for thermal temperature calculation */
65 struct equation_coefs {
66 int a1;
67 int b1;
68 int a2;
69 int b2;
70 };
71
72 struct rcar_gen3_thermal_tsc {
73 void __iomem *base;
74 struct thermal_zone_device *zone;
75 struct equation_coefs coef;
76 int low;
77 int high;
78 };
79
80 struct rcar_gen3_thermal_priv {
81 struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
82 unsigned int num_tscs;
83 void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
84 };
85
rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc * tsc,u32 reg)86 static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
87 u32 reg)
88 {
89 return ioread32(tsc->base + reg);
90 }
91
rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc * tsc,u32 reg,u32 data)92 static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
93 u32 reg, u32 data)
94 {
95 iowrite32(data, tsc->base + reg);
96 }
97
98 /*
99 * Linear approximation for temperature
100 *
101 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
102 *
103 * The constants a and b are calculated using two triplets of int values PTAT
104 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
105 * coded values from driver. The formula to calculate a and b are taken from
106 * BSP and sparsely documented and understood.
107 *
108 * Examining the linear formula and the formula used to calculate constants a
109 * and b while knowing that the span for PTAT and THCODE values are between
110 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
111 * Integer also needs to be signed so that leaves 7 bits for binary
112 * fixed point scaling.
113 */
114
115 #define FIXPT_SHIFT 7
116 #define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
117 #define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
118 #define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
119 #define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
120
121 #define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
122
123 /* no idea where these constants come from */
124 #define TJ_1 116
125 #define TJ_3 -41
126
rcar_gen3_thermal_calc_coefs(struct equation_coefs * coef,int * ptat,int * thcode)127 static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
128 int *ptat, int *thcode)
129 {
130 int tj_2;
131
132 /* TODO: Find documentation and document constant calculation formula */
133
134 /*
135 * Division is not scaled in BSP and if scaled it might overflow
136 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
137 */
138 tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
139 / (ptat[0] - ptat[2])) - FIXPT_INT(41);
140
141 coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
142 tj_2 - FIXPT_INT(TJ_3));
143 coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
144
145 coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
146 tj_2 - FIXPT_INT(TJ_1));
147 coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
148 }
149
rcar_gen3_thermal_round(int temp)150 static int rcar_gen3_thermal_round(int temp)
151 {
152 int result, round_offs;
153
154 round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
155 -RCAR3_THERMAL_GRAN / 2;
156 result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
157 return result * RCAR3_THERMAL_GRAN;
158 }
159
rcar_gen3_thermal_get_temp(void * devdata,int * temp)160 static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
161 {
162 struct rcar_gen3_thermal_tsc *tsc = devdata;
163 int mcelsius, val1, val2;
164 u32 reg;
165
166 /* Read register and convert to mili Celsius */
167 reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
168
169 val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
170 val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
171 mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
172
173 /* Make sure we are inside specifications */
174 if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
175 return -EIO;
176
177 /* Round value to device granularity setting */
178 *temp = rcar_gen3_thermal_round(mcelsius);
179
180 return 0;
181 }
182
rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc * tsc,int mcelsius)183 static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
184 int mcelsius)
185 {
186 int celsius, val1, val2;
187
188 celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
189 val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
190 val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
191
192 return INT_FIXPT((val1 + val2) / 2);
193 }
194
rcar_gen3_thermal_set_trips(void * devdata,int low,int high)195 static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
196 {
197 struct rcar_gen3_thermal_tsc *tsc = devdata;
198
199 low = clamp_val(low, -40000, 120000);
200 high = clamp_val(high, -40000, 120000);
201
202 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
203 rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
204
205 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
206 rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
207
208 tsc->low = low;
209 tsc->high = high;
210
211 return 0;
212 }
213
214 static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
215 .get_temp = rcar_gen3_thermal_get_temp,
216 .set_trips = rcar_gen3_thermal_set_trips,
217 };
218
rcar_thermal_irq_set(struct rcar_gen3_thermal_priv * priv,bool on)219 static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
220 {
221 unsigned int i;
222 u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;
223
224 for (i = 0; i < priv->num_tscs; i++)
225 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
226 }
227
rcar_gen3_thermal_irq(int irq,void * data)228 static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
229 {
230 struct rcar_gen3_thermal_priv *priv = data;
231 u32 status;
232 int i;
233
234 for (i = 0; i < priv->num_tscs; i++) {
235 status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
236 rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
237 if (status)
238 thermal_zone_device_update(priv->tscs[i]->zone,
239 THERMAL_EVENT_UNSPECIFIED);
240 }
241
242 return IRQ_HANDLED;
243 }
244
245 static const struct soc_device_attribute r8a7795es1[] = {
246 { .soc_id = "r8a7795", .revision = "ES1.*" },
247 { /* sentinel */ }
248 };
249
rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc * tsc)250 static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
251 {
252 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
253 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
254
255 usleep_range(1000, 2000);
256
257 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
258
259 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
260 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
261 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
262
263 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
264 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);
265
266 usleep_range(100, 200);
267
268 rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
269 CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
270 CTSR_VMST | CTSR_THSST);
271
272 usleep_range(1000, 2000);
273 }
274
rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc * tsc)275 static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
276 {
277 u32 reg_val;
278
279 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
280 reg_val &= ~THCTR_PONM;
281 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
282
283 usleep_range(1000, 2000);
284
285 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
286 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
287 rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);
288
289 reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
290 reg_val |= THCTR_THSST;
291 rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
292
293 usleep_range(1000, 2000);
294 }
295
296 static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
297 { .compatible = "renesas,r8a7795-thermal", },
298 { .compatible = "renesas,r8a7796-thermal", },
299 { .compatible = "renesas,r8a77965-thermal", },
300 {},
301 };
302 MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
303
rcar_gen3_thermal_remove(struct platform_device * pdev)304 static int rcar_gen3_thermal_remove(struct platform_device *pdev)
305 {
306 struct device *dev = &pdev->dev;
307 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
308
309 rcar_thermal_irq_set(priv, false);
310
311 pm_runtime_put(dev);
312 pm_runtime_disable(dev);
313
314 return 0;
315 }
316
rcar_gen3_thermal_probe(struct platform_device * pdev)317 static int rcar_gen3_thermal_probe(struct platform_device *pdev)
318 {
319 struct rcar_gen3_thermal_priv *priv;
320 struct device *dev = &pdev->dev;
321 struct resource *res;
322 struct thermal_zone_device *zone;
323 int ret, irq, i;
324 char *irqname;
325
326 /* default values if FUSEs are missing */
327 /* TODO: Read values from hardware on supported platforms */
328 int ptat[3] = { 2631, 1509, 435 };
329 int thcode[TSC_MAX_NUM][3] = {
330 { 3397, 2800, 2221 },
331 { 3393, 2795, 2216 },
332 { 3389, 2805, 2237 },
333 };
334
335 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
336 if (!priv)
337 return -ENOMEM;
338
339 priv->thermal_init = rcar_gen3_thermal_init;
340 if (soc_device_match(r8a7795es1))
341 priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
342
343 platform_set_drvdata(pdev, priv);
344
345 /*
346 * Request 2 (of the 3 possible) IRQs, the driver only needs to
347 * to trigger on the low and high trip points of the current
348 * temp window at this point.
349 */
350 for (i = 0; i < 2; i++) {
351 irq = platform_get_irq(pdev, i);
352 if (irq < 0)
353 return irq;
354
355 irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
356 dev_name(dev), i);
357 if (!irqname)
358 return -ENOMEM;
359
360 ret = devm_request_threaded_irq(dev, irq, NULL,
361 rcar_gen3_thermal_irq,
362 IRQF_ONESHOT, irqname, priv);
363 if (ret)
364 return ret;
365 }
366
367 pm_runtime_enable(dev);
368 pm_runtime_get_sync(dev);
369
370 for (i = 0; i < TSC_MAX_NUM; i++) {
371 struct rcar_gen3_thermal_tsc *tsc;
372
373 res = platform_get_resource(pdev, IORESOURCE_MEM, i);
374 if (!res)
375 break;
376
377 tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
378 if (!tsc) {
379 ret = -ENOMEM;
380 goto error_unregister;
381 }
382
383 tsc->base = devm_ioremap_resource(dev, res);
384 if (IS_ERR(tsc->base)) {
385 ret = PTR_ERR(tsc->base);
386 goto error_unregister;
387 }
388
389 priv->tscs[i] = tsc;
390
391 priv->thermal_init(tsc);
392 rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
393
394 zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
395 &rcar_gen3_tz_of_ops);
396 if (IS_ERR(zone)) {
397 dev_err(dev, "Can't register thermal zone\n");
398 ret = PTR_ERR(zone);
399 goto error_unregister;
400 }
401 tsc->zone = zone;
402
403 ret = of_thermal_get_ntrips(tsc->zone);
404 if (ret < 0)
405 goto error_unregister;
406
407 dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
408 }
409
410 priv->num_tscs = i;
411
412 if (!priv->num_tscs) {
413 ret = -ENODEV;
414 goto error_unregister;
415 }
416
417 rcar_thermal_irq_set(priv, true);
418
419 return 0;
420
421 error_unregister:
422 rcar_gen3_thermal_remove(pdev);
423
424 return ret;
425 }
426
rcar_gen3_thermal_suspend(struct device * dev)427 static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
428 {
429 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
430
431 rcar_thermal_irq_set(priv, false);
432
433 return 0;
434 }
435
rcar_gen3_thermal_resume(struct device * dev)436 static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
437 {
438 struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
439 unsigned int i;
440
441 for (i = 0; i < priv->num_tscs; i++) {
442 struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
443
444 priv->thermal_init(tsc);
445 rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
446 }
447
448 rcar_thermal_irq_set(priv, true);
449
450 return 0;
451 }
452
453 static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
454 rcar_gen3_thermal_resume);
455
456 static struct platform_driver rcar_gen3_thermal_driver = {
457 .driver = {
458 .name = "rcar_gen3_thermal",
459 .pm = &rcar_gen3_thermal_pm_ops,
460 .of_match_table = rcar_gen3_thermal_dt_ids,
461 },
462 .probe = rcar_gen3_thermal_probe,
463 .remove = rcar_gen3_thermal_remove,
464 };
465 module_platform_driver(rcar_gen3_thermal_driver);
466
467 MODULE_LICENSE("GPL v2");
468 MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
469 MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
470