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1config USB_DWC3
2	tristate "DesignWare USB3 DRD Core Support"
3	depends on (USB || USB_GADGET) && HAS_DMA
4	select USB_XHCI_PLATFORM if USB_XHCI_HCD
5	help
6	  Say Y or M here if your system has a Dual Role SuperSpeed
7	  USB controller based on the DesignWare USB3 IP Core.
8
9	  If you choose to build this driver is a dynamically linked
10	  module, the module will be called dwc3.ko.
11
12if USB_DWC3
13
14config USB_DWC3_ULPI
15	bool "Register ULPI PHY Interface"
16	depends on USB_ULPI_BUS=y || USB_ULPI_BUS=USB_DWC3
17	help
18	  Select this if you have ULPI type PHY attached to your DWC3
19	  controller.
20
21choice
22	bool "DWC3 Mode Selection"
23	default USB_DWC3_DUAL_ROLE if (USB && USB_GADGET)
24	default USB_DWC3_HOST if (USB && !USB_GADGET)
25	default USB_DWC3_GADGET if (!USB && USB_GADGET)
26
27config USB_DWC3_HOST
28	bool "Host only mode"
29	depends on USB=y || USB=USB_DWC3
30	help
31	  Select this when you want to use DWC3 in host mode only,
32	  thereby the gadget feature will be regressed.
33
34config USB_DWC3_GADGET
35	bool "Gadget only mode"
36	depends on USB_GADGET=y || USB_GADGET=USB_DWC3
37	help
38	  Select this when you want to use DWC3 in gadget mode only,
39	  thereby the host feature will be regressed.
40
41config USB_DWC3_DUAL_ROLE
42	bool "Dual Role mode"
43	depends on ((USB=y || USB=USB_DWC3) && (USB_GADGET=y || USB_GADGET=USB_DWC3))
44	depends on (EXTCON=y || EXTCON=USB_DWC3)
45	help
46	  This is the default mode of working of DWC3 controller where
47	  both host and gadget features are enabled.
48
49endchoice
50
51comment "Platform Glue Driver Support"
52
53config USB_DWC3_OMAP
54	tristate "Texas Instruments OMAP5 and similar Platforms"
55	depends on ARCH_OMAP2PLUS || COMPILE_TEST
56	depends on EXTCON || !EXTCON
57	depends on OF
58	default USB_DWC3
59	help
60	  Some platforms from Texas Instruments like OMAP5, DRA7xxx and
61	  AM437x use this IP for USB2/3 functionality.
62
63	  Say 'Y' or 'M' here if you have one such device
64
65config USB_DWC3_EXYNOS
66	tristate "Samsung Exynos Platform"
67	depends on (ARCH_EXYNOS || COMPILE_TEST) && OF
68	default USB_DWC3
69	help
70	  Recent Exynos5 SoCs ship with one DesignWare Core USB3 IP inside,
71	  say 'Y' or 'M' if you have one such device.
72
73config USB_DWC3_PCI
74	tristate "PCIe-based Platforms"
75	depends on USB_PCI && ACPI
76	default USB_DWC3
77	help
78	  If you're using the DesignWare Core IP with a PCIe (but not HAPS
79	  platform), please say 'Y' or 'M' here.
80
81config USB_DWC3_HAPS
82	tristate "Synopsys PCIe-based HAPS Platforms"
83	depends on USB_PCI
84	default USB_DWC3
85	help
86	  If you're using the DesignWare Core IP with a Synopsys PCIe HAPS
87	  platform, please say 'Y' or 'M' here.
88
89config USB_DWC3_KEYSTONE
90	tristate "Texas Instruments Keystone2 Platforms"
91	depends on ARCH_KEYSTONE || COMPILE_TEST
92	default USB_DWC3
93	help
94	  Support of USB2/3 functionality in TI Keystone2 platforms.
95	  Say 'Y' or 'M' here if you have one such device
96
97config USB_DWC3_OF_SIMPLE
98       tristate "Generic OF Simple Glue Layer"
99       depends on OF && COMMON_CLK
100       default USB_DWC3
101       help
102         Support USB2/3 functionality in simple SoC integrations.
103	 Currently supports Xilinx and Qualcomm DWC USB3 IP.
104	 Say 'Y' or 'M' if you have one such device.
105
106config USB_DWC3_ST
107	tristate "STMicroelectronics Platforms"
108	depends on (ARCH_STI || COMPILE_TEST) && OF
109	default USB_DWC3
110	help
111	  STMicroelectronics SoCs with one DesignWare Core USB3 IP
112	  inside (i.e. STiH407).
113	  Say 'Y' or 'M' if you have one such device.
114
115config USB_DWC3_QCOM
116	tristate "Qualcomm Platform"
117	depends on ARCH_QCOM || COMPILE_TEST
118	depends on EXTCON || !EXTCON
119	depends on OF
120	default USB_DWC3
121	help
122	  Some Qualcomm SoCs use DesignWare Core IP for USB2/3
123	  functionality.
124	  This driver also handles Qscratch wrapper which is needed
125	  for peripheral mode support.
126	  Say 'Y' or 'M' if you have one such device.
127
128endif
129