1 /*
2 * rt5670.c -- RT5670 ALSA SoC audio codec driver
3 *
4 * Copyright 2014 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/i2c.h>
19 #include <linux/platform_device.h>
20 #include <linux/acpi.h>
21 #include <linux/spi/spi.h>
22 #include <linux/dmi.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/jack.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
31 #include <sound/rt5670.h>
32
33 #include "rl6231.h"
34 #include "rt5670.h"
35 #include "rt5670-dsp.h"
36
37 #define RT5670_DEV_GPIO BIT(0)
38 #define RT5670_IN2_DIFF BIT(1)
39 #define RT5670_DMIC_EN BIT(2)
40 #define RT5670_DMIC1_IN2P BIT(3)
41 #define RT5670_DMIC1_GPIO6 BIT(4)
42 #define RT5670_DMIC1_GPIO7 BIT(5)
43 #define RT5670_DMIC2_INR BIT(6)
44 #define RT5670_DMIC2_GPIO8 BIT(7)
45 #define RT5670_DMIC3_GPIO5 BIT(8)
46 #define RT5670_JD_MODE1 BIT(9)
47 #define RT5670_JD_MODE2 BIT(10)
48 #define RT5670_JD_MODE3 BIT(11)
49 #define RT5670_GPIO1_IS_EXT_SPK_EN BIT(12)
50
51 static unsigned long rt5670_quirk;
52 static unsigned int quirk_override;
53 module_param_named(quirk, quirk_override, uint, 0444);
54 MODULE_PARM_DESC(quirk, "Board-specific quirk override");
55
56 #define RT5670_DEVICE_ID 0x6271
57
58 #define RT5670_PR_RANGE_BASE (0xff + 1)
59 #define RT5670_PR_SPACING 0x100
60
61 #define RT5670_PR_BASE (RT5670_PR_RANGE_BASE + (0 * RT5670_PR_SPACING))
62
63 static const struct regmap_range_cfg rt5670_ranges[] = {
64 { .name = "PR", .range_min = RT5670_PR_BASE,
65 .range_max = RT5670_PR_BASE + 0xf8,
66 .selector_reg = RT5670_PRIV_INDEX,
67 .selector_mask = 0xff,
68 .selector_shift = 0x0,
69 .window_start = RT5670_PRIV_DATA,
70 .window_len = 0x1, },
71 };
72
73 static const struct reg_sequence init_list[] = {
74 { RT5670_PR_BASE + 0x14, 0x9a8a },
75 { RT5670_PR_BASE + 0x38, 0x1fe1 },
76 { RT5670_PR_BASE + 0x3d, 0x3640 },
77 { 0x8a, 0x0123 },
78 };
79
80 static const struct reg_default rt5670_reg[] = {
81 { 0x00, 0x0000 },
82 { 0x02, 0x8888 },
83 { 0x03, 0x8888 },
84 { 0x0a, 0x0001 },
85 { 0x0b, 0x0827 },
86 { 0x0c, 0x0000 },
87 { 0x0d, 0x0008 },
88 { 0x0e, 0x0000 },
89 { 0x0f, 0x0808 },
90 { 0x19, 0xafaf },
91 { 0x1a, 0xafaf },
92 { 0x1b, 0x0011 },
93 { 0x1c, 0x2f2f },
94 { 0x1d, 0x2f2f },
95 { 0x1e, 0x0000 },
96 { 0x1f, 0x2f2f },
97 { 0x20, 0x0000 },
98 { 0x26, 0x7860 },
99 { 0x27, 0x7860 },
100 { 0x28, 0x7871 },
101 { 0x29, 0x8080 },
102 { 0x2a, 0x5656 },
103 { 0x2b, 0x5454 },
104 { 0x2c, 0xaaa0 },
105 { 0x2d, 0x0000 },
106 { 0x2e, 0x2f2f },
107 { 0x2f, 0x1002 },
108 { 0x30, 0x0000 },
109 { 0x31, 0x5f00 },
110 { 0x32, 0x0000 },
111 { 0x33, 0x0000 },
112 { 0x34, 0x0000 },
113 { 0x35, 0x0000 },
114 { 0x36, 0x0000 },
115 { 0x37, 0x0000 },
116 { 0x38, 0x0000 },
117 { 0x3b, 0x0000 },
118 { 0x3c, 0x007f },
119 { 0x3d, 0x0000 },
120 { 0x3e, 0x007f },
121 { 0x45, 0xe00f },
122 { 0x4c, 0x5380 },
123 { 0x4f, 0x0073 },
124 { 0x52, 0x00d3 },
125 { 0x53, 0xf000 },
126 { 0x61, 0x0000 },
127 { 0x62, 0x0001 },
128 { 0x63, 0x00c3 },
129 { 0x64, 0x0000 },
130 { 0x65, 0x0001 },
131 { 0x66, 0x0000 },
132 { 0x6f, 0x8000 },
133 { 0x70, 0x8000 },
134 { 0x71, 0x8000 },
135 { 0x72, 0x8000 },
136 { 0x73, 0x7770 },
137 { 0x74, 0x0e00 },
138 { 0x75, 0x1505 },
139 { 0x76, 0x0015 },
140 { 0x77, 0x0c00 },
141 { 0x78, 0x4000 },
142 { 0x79, 0x0123 },
143 { 0x7f, 0x1100 },
144 { 0x80, 0x0000 },
145 { 0x81, 0x0000 },
146 { 0x82, 0x0000 },
147 { 0x83, 0x0000 },
148 { 0x84, 0x0000 },
149 { 0x85, 0x0000 },
150 { 0x86, 0x0004 },
151 { 0x87, 0x0000 },
152 { 0x88, 0x0000 },
153 { 0x89, 0x0000 },
154 { 0x8a, 0x0123 },
155 { 0x8b, 0x0000 },
156 { 0x8c, 0x0003 },
157 { 0x8d, 0x0000 },
158 { 0x8e, 0x0004 },
159 { 0x8f, 0x1100 },
160 { 0x90, 0x0646 },
161 { 0x91, 0x0c06 },
162 { 0x93, 0x0000 },
163 { 0x94, 0x1270 },
164 { 0x95, 0x1000 },
165 { 0x97, 0x0000 },
166 { 0x98, 0x0000 },
167 { 0x99, 0x0000 },
168 { 0x9a, 0x2184 },
169 { 0x9b, 0x010a },
170 { 0x9c, 0x0aea },
171 { 0x9d, 0x000c },
172 { 0x9e, 0x0400 },
173 { 0xae, 0x7000 },
174 { 0xaf, 0x0000 },
175 { 0xb0, 0x7000 },
176 { 0xb1, 0x0000 },
177 { 0xb2, 0x0000 },
178 { 0xb3, 0x001f },
179 { 0xb4, 0x220c },
180 { 0xb5, 0x1f00 },
181 { 0xb6, 0x0000 },
182 { 0xb7, 0x0000 },
183 { 0xbb, 0x0000 },
184 { 0xbc, 0x0000 },
185 { 0xbd, 0x0000 },
186 { 0xbe, 0x0000 },
187 { 0xbf, 0x0000 },
188 { 0xc0, 0x0000 },
189 { 0xc1, 0x0000 },
190 { 0xc2, 0x0000 },
191 { 0xcd, 0x0000 },
192 { 0xce, 0x0000 },
193 { 0xcf, 0x1813 },
194 { 0xd0, 0x0690 },
195 { 0xd1, 0x1c17 },
196 { 0xd3, 0xa220 },
197 { 0xd4, 0x0000 },
198 { 0xd6, 0x0400 },
199 { 0xd9, 0x0809 },
200 { 0xda, 0x0000 },
201 { 0xdb, 0x0001 },
202 { 0xdc, 0x0049 },
203 { 0xdd, 0x0024 },
204 { 0xe6, 0x8000 },
205 { 0xe7, 0x0000 },
206 { 0xec, 0xa200 },
207 { 0xed, 0x0000 },
208 { 0xee, 0xa200 },
209 { 0xef, 0x0000 },
210 { 0xf8, 0x0000 },
211 { 0xf9, 0x0000 },
212 { 0xfa, 0x8010 },
213 { 0xfb, 0x0033 },
214 { 0xfc, 0x0100 },
215 };
216
rt5670_volatile_register(struct device * dev,unsigned int reg)217 static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
218 {
219 int i;
220
221 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
222 if ((reg >= rt5670_ranges[i].window_start &&
223 reg <= rt5670_ranges[i].window_start +
224 rt5670_ranges[i].window_len) ||
225 (reg >= rt5670_ranges[i].range_min &&
226 reg <= rt5670_ranges[i].range_max)) {
227 return true;
228 }
229 }
230
231 switch (reg) {
232 case RT5670_RESET:
233 case RT5670_PDM_DATA_CTRL1:
234 case RT5670_PDM1_DATA_CTRL4:
235 case RT5670_PDM2_DATA_CTRL4:
236 case RT5670_PRIV_DATA:
237 case RT5670_ASRC_5:
238 case RT5670_CJ_CTRL1:
239 case RT5670_CJ_CTRL2:
240 case RT5670_CJ_CTRL3:
241 case RT5670_A_JD_CTRL1:
242 case RT5670_A_JD_CTRL2:
243 case RT5670_VAD_CTRL5:
244 case RT5670_ADC_EQ_CTRL1:
245 case RT5670_EQ_CTRL1:
246 case RT5670_ALC_CTRL_1:
247 case RT5670_IRQ_CTRL2:
248 case RT5670_INT_IRQ_ST:
249 case RT5670_IL_CMD:
250 case RT5670_DSP_CTRL1:
251 case RT5670_DSP_CTRL2:
252 case RT5670_DSP_CTRL3:
253 case RT5670_DSP_CTRL4:
254 case RT5670_DSP_CTRL5:
255 case RT5670_VENDOR_ID:
256 case RT5670_VENDOR_ID1:
257 case RT5670_VENDOR_ID2:
258 return true;
259 default:
260 return false;
261 }
262 }
263
rt5670_readable_register(struct device * dev,unsigned int reg)264 static bool rt5670_readable_register(struct device *dev, unsigned int reg)
265 {
266 int i;
267
268 for (i = 0; i < ARRAY_SIZE(rt5670_ranges); i++) {
269 if ((reg >= rt5670_ranges[i].window_start &&
270 reg <= rt5670_ranges[i].window_start +
271 rt5670_ranges[i].window_len) ||
272 (reg >= rt5670_ranges[i].range_min &&
273 reg <= rt5670_ranges[i].range_max)) {
274 return true;
275 }
276 }
277
278 switch (reg) {
279 case RT5670_RESET:
280 case RT5670_HP_VOL:
281 case RT5670_LOUT1:
282 case RT5670_CJ_CTRL1:
283 case RT5670_CJ_CTRL2:
284 case RT5670_CJ_CTRL3:
285 case RT5670_IN2:
286 case RT5670_INL1_INR1_VOL:
287 case RT5670_DAC1_DIG_VOL:
288 case RT5670_DAC2_DIG_VOL:
289 case RT5670_DAC_CTRL:
290 case RT5670_STO1_ADC_DIG_VOL:
291 case RT5670_MONO_ADC_DIG_VOL:
292 case RT5670_STO2_ADC_DIG_VOL:
293 case RT5670_ADC_BST_VOL1:
294 case RT5670_ADC_BST_VOL2:
295 case RT5670_STO2_ADC_MIXER:
296 case RT5670_STO1_ADC_MIXER:
297 case RT5670_MONO_ADC_MIXER:
298 case RT5670_AD_DA_MIXER:
299 case RT5670_STO_DAC_MIXER:
300 case RT5670_DD_MIXER:
301 case RT5670_DIG_MIXER:
302 case RT5670_DSP_PATH1:
303 case RT5670_DSP_PATH2:
304 case RT5670_DIG_INF1_DATA:
305 case RT5670_DIG_INF2_DATA:
306 case RT5670_PDM_OUT_CTRL:
307 case RT5670_PDM_DATA_CTRL1:
308 case RT5670_PDM1_DATA_CTRL2:
309 case RT5670_PDM1_DATA_CTRL3:
310 case RT5670_PDM1_DATA_CTRL4:
311 case RT5670_PDM2_DATA_CTRL2:
312 case RT5670_PDM2_DATA_CTRL3:
313 case RT5670_PDM2_DATA_CTRL4:
314 case RT5670_REC_L1_MIXER:
315 case RT5670_REC_L2_MIXER:
316 case RT5670_REC_R1_MIXER:
317 case RT5670_REC_R2_MIXER:
318 case RT5670_HPO_MIXER:
319 case RT5670_MONO_MIXER:
320 case RT5670_OUT_L1_MIXER:
321 case RT5670_OUT_R1_MIXER:
322 case RT5670_LOUT_MIXER:
323 case RT5670_PWR_DIG1:
324 case RT5670_PWR_DIG2:
325 case RT5670_PWR_ANLG1:
326 case RT5670_PWR_ANLG2:
327 case RT5670_PWR_MIXER:
328 case RT5670_PWR_VOL:
329 case RT5670_PRIV_INDEX:
330 case RT5670_PRIV_DATA:
331 case RT5670_I2S4_SDP:
332 case RT5670_I2S1_SDP:
333 case RT5670_I2S2_SDP:
334 case RT5670_I2S3_SDP:
335 case RT5670_ADDA_CLK1:
336 case RT5670_ADDA_CLK2:
337 case RT5670_DMIC_CTRL1:
338 case RT5670_DMIC_CTRL2:
339 case RT5670_TDM_CTRL_1:
340 case RT5670_TDM_CTRL_2:
341 case RT5670_TDM_CTRL_3:
342 case RT5670_DSP_CLK:
343 case RT5670_GLB_CLK:
344 case RT5670_PLL_CTRL1:
345 case RT5670_PLL_CTRL2:
346 case RT5670_ASRC_1:
347 case RT5670_ASRC_2:
348 case RT5670_ASRC_3:
349 case RT5670_ASRC_4:
350 case RT5670_ASRC_5:
351 case RT5670_ASRC_7:
352 case RT5670_ASRC_8:
353 case RT5670_ASRC_9:
354 case RT5670_ASRC_10:
355 case RT5670_ASRC_11:
356 case RT5670_ASRC_12:
357 case RT5670_ASRC_13:
358 case RT5670_ASRC_14:
359 case RT5670_DEPOP_M1:
360 case RT5670_DEPOP_M2:
361 case RT5670_DEPOP_M3:
362 case RT5670_CHARGE_PUMP:
363 case RT5670_MICBIAS:
364 case RT5670_A_JD_CTRL1:
365 case RT5670_A_JD_CTRL2:
366 case RT5670_VAD_CTRL1:
367 case RT5670_VAD_CTRL2:
368 case RT5670_VAD_CTRL3:
369 case RT5670_VAD_CTRL4:
370 case RT5670_VAD_CTRL5:
371 case RT5670_ADC_EQ_CTRL1:
372 case RT5670_ADC_EQ_CTRL2:
373 case RT5670_EQ_CTRL1:
374 case RT5670_EQ_CTRL2:
375 case RT5670_ALC_DRC_CTRL1:
376 case RT5670_ALC_DRC_CTRL2:
377 case RT5670_ALC_CTRL_1:
378 case RT5670_ALC_CTRL_2:
379 case RT5670_ALC_CTRL_3:
380 case RT5670_JD_CTRL:
381 case RT5670_IRQ_CTRL1:
382 case RT5670_IRQ_CTRL2:
383 case RT5670_INT_IRQ_ST:
384 case RT5670_GPIO_CTRL1:
385 case RT5670_GPIO_CTRL2:
386 case RT5670_GPIO_CTRL3:
387 case RT5670_SCRABBLE_FUN:
388 case RT5670_SCRABBLE_CTRL:
389 case RT5670_BASE_BACK:
390 case RT5670_MP3_PLUS1:
391 case RT5670_MP3_PLUS2:
392 case RT5670_ADJ_HPF1:
393 case RT5670_ADJ_HPF2:
394 case RT5670_HP_CALIB_AMP_DET:
395 case RT5670_SV_ZCD1:
396 case RT5670_SV_ZCD2:
397 case RT5670_IL_CMD:
398 case RT5670_IL_CMD2:
399 case RT5670_IL_CMD3:
400 case RT5670_DRC_HL_CTRL1:
401 case RT5670_DRC_HL_CTRL2:
402 case RT5670_ADC_MONO_HP_CTRL1:
403 case RT5670_ADC_MONO_HP_CTRL2:
404 case RT5670_ADC_STO2_HP_CTRL1:
405 case RT5670_ADC_STO2_HP_CTRL2:
406 case RT5670_JD_CTRL3:
407 case RT5670_JD_CTRL4:
408 case RT5670_DIG_MISC:
409 case RT5670_DSP_CTRL1:
410 case RT5670_DSP_CTRL2:
411 case RT5670_DSP_CTRL3:
412 case RT5670_DSP_CTRL4:
413 case RT5670_DSP_CTRL5:
414 case RT5670_GEN_CTRL2:
415 case RT5670_GEN_CTRL3:
416 case RT5670_VENDOR_ID:
417 case RT5670_VENDOR_ID1:
418 case RT5670_VENDOR_ID2:
419 return true;
420 default:
421 return false;
422 }
423 }
424
425 /**
426 * rt5670_headset_detect - Detect headset.
427 * @component: SoC audio component device.
428 * @jack_insert: Jack insert or not.
429 *
430 * Detect whether is headset or not when jack inserted.
431 *
432 * Returns detect status.
433 */
434
rt5670_headset_detect(struct snd_soc_component * component,int jack_insert)435 static int rt5670_headset_detect(struct snd_soc_component *component, int jack_insert)
436 {
437 int val;
438 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
439 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
440
441 if (jack_insert) {
442 snd_soc_dapm_force_enable_pin(dapm, "Mic Det Power");
443 snd_soc_dapm_sync(dapm);
444 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x0);
445 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
446 RT5670_CBJ_DET_MODE | RT5670_CBJ_MN_JD,
447 RT5670_CBJ_MN_JD);
448 snd_soc_component_write(component, RT5670_GPIO_CTRL2, 0x0004);
449 snd_soc_component_update_bits(component, RT5670_GPIO_CTRL1,
450 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
451 snd_soc_component_update_bits(component, RT5670_CJ_CTRL1,
452 RT5670_CBJ_BST1_EN, RT5670_CBJ_BST1_EN);
453 snd_soc_component_write(component, RT5670_JD_CTRL3, 0x00f0);
454 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
455 RT5670_CBJ_MN_JD, RT5670_CBJ_MN_JD);
456 snd_soc_component_update_bits(component, RT5670_CJ_CTRL2,
457 RT5670_CBJ_MN_JD, 0);
458 msleep(300);
459 val = snd_soc_component_read32(component, RT5670_CJ_CTRL3) & 0x7;
460 if (val == 0x1 || val == 0x2) {
461 rt5670->jack_type = SND_JACK_HEADSET;
462 /* for push button */
463 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x8);
464 snd_soc_component_update_bits(component, RT5670_IL_CMD, 0x40, 0x40);
465 snd_soc_component_read32(component, RT5670_IL_CMD);
466 } else {
467 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
468 rt5670->jack_type = SND_JACK_HEADPHONE;
469 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
470 snd_soc_dapm_sync(dapm);
471 }
472 } else {
473 snd_soc_component_update_bits(component, RT5670_INT_IRQ_ST, 0x8, 0x0);
474 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3, 0x4, 0x4);
475 rt5670->jack_type = 0;
476 snd_soc_dapm_disable_pin(dapm, "Mic Det Power");
477 snd_soc_dapm_sync(dapm);
478 }
479
480 return rt5670->jack_type;
481 }
482
rt5670_jack_suspend(struct snd_soc_component * component)483 void rt5670_jack_suspend(struct snd_soc_component *component)
484 {
485 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
486
487 rt5670->jack_type_saved = rt5670->jack_type;
488 rt5670_headset_detect(component, 0);
489 }
490 EXPORT_SYMBOL_GPL(rt5670_jack_suspend);
491
rt5670_jack_resume(struct snd_soc_component * component)492 void rt5670_jack_resume(struct snd_soc_component *component)
493 {
494 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
495
496 if (rt5670->jack_type_saved)
497 rt5670_headset_detect(component, 1);
498 }
499 EXPORT_SYMBOL_GPL(rt5670_jack_resume);
500
rt5670_button_detect(struct snd_soc_component * component)501 static int rt5670_button_detect(struct snd_soc_component *component)
502 {
503 int btn_type, val;
504
505 val = snd_soc_component_read32(component, RT5670_IL_CMD);
506 btn_type = val & 0xff80;
507 snd_soc_component_write(component, RT5670_IL_CMD, val);
508 if (btn_type != 0) {
509 msleep(20);
510 val = snd_soc_component_read32(component, RT5670_IL_CMD);
511 snd_soc_component_write(component, RT5670_IL_CMD, val);
512 }
513
514 return btn_type;
515 }
516
rt5670_irq_detection(void * data)517 static int rt5670_irq_detection(void *data)
518 {
519 struct rt5670_priv *rt5670 = (struct rt5670_priv *)data;
520 struct snd_soc_jack_gpio *gpio = &rt5670->hp_gpio;
521 struct snd_soc_jack *jack = rt5670->jack;
522 int val, btn_type, report = jack->status;
523
524 if (rt5670->pdata.jd_mode == 1) /* 2 port */
525 val = snd_soc_component_read32(rt5670->component, RT5670_A_JD_CTRL1) & 0x0070;
526 else
527 val = snd_soc_component_read32(rt5670->component, RT5670_A_JD_CTRL1) & 0x0020;
528
529 switch (val) {
530 /* jack in */
531 case 0x30: /* 2 port */
532 case 0x0: /* 1 port or 2 port */
533 if (rt5670->jack_type == 0) {
534 report = rt5670_headset_detect(rt5670->component, 1);
535 /* for push button and jack out */
536 gpio->debounce_time = 25;
537 break;
538 }
539 btn_type = 0;
540 if (snd_soc_component_read32(rt5670->component, RT5670_INT_IRQ_ST) & 0x4) {
541 /* button pressed */
542 report = SND_JACK_HEADSET;
543 btn_type = rt5670_button_detect(rt5670->component);
544 switch (btn_type) {
545 case 0x2000: /* up */
546 report |= SND_JACK_BTN_1;
547 break;
548 case 0x0400: /* center */
549 report |= SND_JACK_BTN_0;
550 break;
551 case 0x0080: /* down */
552 report |= SND_JACK_BTN_2;
553 break;
554 default:
555 dev_err(rt5670->component->dev,
556 "Unexpected button code 0x%04x\n",
557 btn_type);
558 break;
559 }
560 }
561 if (btn_type == 0)/* button release */
562 report = rt5670->jack_type;
563
564 break;
565 /* jack out */
566 case 0x70: /* 2 port */
567 case 0x10: /* 2 port */
568 case 0x20: /* 1 port */
569 report = 0;
570 snd_soc_component_update_bits(rt5670->component, RT5670_INT_IRQ_ST, 0x1, 0x0);
571 rt5670_headset_detect(rt5670->component, 0);
572 gpio->debounce_time = 150; /* for jack in */
573 break;
574 default:
575 break;
576 }
577
578 return report;
579 }
580
rt5670_set_jack_detect(struct snd_soc_component * component,struct snd_soc_jack * jack)581 int rt5670_set_jack_detect(struct snd_soc_component *component,
582 struct snd_soc_jack *jack)
583 {
584 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
585 int ret;
586
587 rt5670->jack = jack;
588 rt5670->hp_gpio.gpiod_dev = component->dev;
589 rt5670->hp_gpio.name = "headset";
590 rt5670->hp_gpio.report = SND_JACK_HEADSET |
591 SND_JACK_BTN_0 | SND_JACK_BTN_1 | SND_JACK_BTN_2;
592 rt5670->hp_gpio.debounce_time = 150;
593 rt5670->hp_gpio.wake = true;
594 rt5670->hp_gpio.data = (struct rt5670_priv *)rt5670;
595 rt5670->hp_gpio.jack_status_check = rt5670_irq_detection;
596
597 ret = snd_soc_jack_add_gpios(rt5670->jack, 1,
598 &rt5670->hp_gpio);
599 if (ret) {
600 dev_err(component->dev, "Adding jack GPIO failed\n");
601 return ret;
602 }
603
604 return 0;
605 }
606 EXPORT_SYMBOL_GPL(rt5670_set_jack_detect);
607
608 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
609 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
610 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
611 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
612 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
613
614 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
615 static const DECLARE_TLV_DB_RANGE(bst_tlv,
616 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
617 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
618 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
619 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
620 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
621 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
622 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
623 );
624
625 /* Interface data select */
626 static const char * const rt5670_data_select[] = {
627 "Normal", "Swap", "left copy to right", "right copy to left"
628 };
629
630 static SOC_ENUM_SINGLE_DECL(rt5670_if2_dac_enum, RT5670_DIG_INF1_DATA,
631 RT5670_IF2_DAC_SEL_SFT, rt5670_data_select);
632
633 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_enum, RT5670_DIG_INF1_DATA,
634 RT5670_IF2_ADC_SEL_SFT, rt5670_data_select);
635
636 static const struct snd_kcontrol_new rt5670_snd_controls[] = {
637 /* Headphone Output Volume */
638 SOC_DOUBLE("HP Playback Switch", RT5670_HP_VOL,
639 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
640 SOC_DOUBLE_TLV("HP Playback Volume", RT5670_HP_VOL,
641 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
642 39, 1, out_vol_tlv),
643 /* OUTPUT Control */
644 SOC_DOUBLE("OUT Channel Switch", RT5670_LOUT1,
645 RT5670_VOL_L_SFT, RT5670_VOL_R_SFT, 1, 1),
646 SOC_DOUBLE_TLV("OUT Playback Volume", RT5670_LOUT1,
647 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT, 39, 1, out_vol_tlv),
648 /* DAC Digital Volume */
649 SOC_DOUBLE("DAC2 Playback Switch", RT5670_DAC_CTRL,
650 RT5670_M_DAC_L2_VOL_SFT, RT5670_M_DAC_R2_VOL_SFT, 1, 1),
651 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5670_DAC1_DIG_VOL,
652 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
653 175, 0, dac_vol_tlv),
654 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5670_DAC2_DIG_VOL,
655 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
656 175, 0, dac_vol_tlv),
657 /* IN1/IN2 Control */
658 SOC_SINGLE_TLV("IN1 Boost Volume", RT5670_CJ_CTRL1,
659 RT5670_BST_SFT1, 8, 0, bst_tlv),
660 SOC_SINGLE_TLV("IN2 Boost Volume", RT5670_IN2,
661 RT5670_BST_SFT1, 8, 0, bst_tlv),
662 /* INL/INR Volume Control */
663 SOC_DOUBLE_TLV("IN Capture Volume", RT5670_INL1_INR1_VOL,
664 RT5670_INL_VOL_SFT, RT5670_INR_VOL_SFT,
665 31, 1, in_vol_tlv),
666 /* ADC Digital Volume Control */
667 SOC_DOUBLE("ADC Capture Switch", RT5670_STO1_ADC_DIG_VOL,
668 RT5670_L_MUTE_SFT, RT5670_R_MUTE_SFT, 1, 1),
669 SOC_DOUBLE_TLV("ADC Capture Volume", RT5670_STO1_ADC_DIG_VOL,
670 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
671 127, 0, adc_vol_tlv),
672
673 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5670_MONO_ADC_DIG_VOL,
674 RT5670_L_VOL_SFT, RT5670_R_VOL_SFT,
675 127, 0, adc_vol_tlv),
676
677 /* ADC Boost Volume Control */
678 SOC_DOUBLE_TLV("STO1 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
679 RT5670_STO1_ADC_L_BST_SFT, RT5670_STO1_ADC_R_BST_SFT,
680 3, 0, adc_bst_tlv),
681
682 SOC_DOUBLE_TLV("STO2 ADC Boost Gain Volume", RT5670_ADC_BST_VOL1,
683 RT5670_STO2_ADC_L_BST_SFT, RT5670_STO2_ADC_R_BST_SFT,
684 3, 0, adc_bst_tlv),
685
686 SOC_ENUM("ADC IF2 Data Switch", rt5670_if2_adc_enum),
687 SOC_ENUM("DAC IF2 Data Switch", rt5670_if2_dac_enum),
688 };
689
690 /**
691 * set_dmic_clk - Set parameter of dmic.
692 *
693 * @w: DAPM widget.
694 * @kcontrol: The kcontrol of this widget.
695 * @event: Event id.
696 *
697 * Choose dmic clock between 1MHz and 3MHz.
698 * It is better for clock to approximate 3MHz.
699 */
set_dmic_clk(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)700 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
701 struct snd_kcontrol *kcontrol, int event)
702 {
703 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
704 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
705 int idx, rate;
706
707 rate = rt5670->sysclk / rl6231_get_pre_div(rt5670->regmap,
708 RT5670_ADDA_CLK1, RT5670_I2S_PD1_SFT);
709 idx = rl6231_calc_dmic_clk(rate);
710 if (idx < 0)
711 dev_err(component->dev, "Failed to set DMIC clock\n");
712 else
713 snd_soc_component_update_bits(component, RT5670_DMIC_CTRL1,
714 RT5670_DMIC_CLK_MASK, idx << RT5670_DMIC_CLK_SFT);
715 return idx;
716 }
717
is_sys_clk_from_pll(struct snd_soc_dapm_widget * source,struct snd_soc_dapm_widget * sink)718 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
719 struct snd_soc_dapm_widget *sink)
720 {
721 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
722 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
723
724 if (rt5670->sysclk_src == RT5670_SCLK_S_PLL1)
725 return 1;
726 else
727 return 0;
728 }
729
is_using_asrc(struct snd_soc_dapm_widget * source,struct snd_soc_dapm_widget * sink)730 static int is_using_asrc(struct snd_soc_dapm_widget *source,
731 struct snd_soc_dapm_widget *sink)
732 {
733 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
734 unsigned int reg, shift, val;
735
736 switch (source->shift) {
737 case 0:
738 reg = RT5670_ASRC_3;
739 shift = 0;
740 break;
741 case 1:
742 reg = RT5670_ASRC_3;
743 shift = 4;
744 break;
745 case 2:
746 reg = RT5670_ASRC_5;
747 shift = 12;
748 break;
749 case 3:
750 reg = RT5670_ASRC_2;
751 shift = 0;
752 break;
753 case 8:
754 reg = RT5670_ASRC_2;
755 shift = 4;
756 break;
757 case 9:
758 reg = RT5670_ASRC_2;
759 shift = 8;
760 break;
761 case 10:
762 reg = RT5670_ASRC_2;
763 shift = 12;
764 break;
765 default:
766 return 0;
767 }
768
769 val = (snd_soc_component_read32(component, reg) >> shift) & 0xf;
770 switch (val) {
771 case 1:
772 case 2:
773 case 3:
774 case 4:
775 return 1;
776 default:
777 return 0;
778 }
779
780 }
781
can_use_asrc(struct snd_soc_dapm_widget * source,struct snd_soc_dapm_widget * sink)782 static int can_use_asrc(struct snd_soc_dapm_widget *source,
783 struct snd_soc_dapm_widget *sink)
784 {
785 struct snd_soc_component *component = snd_soc_dapm_to_component(source->dapm);
786 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
787
788 if (rt5670->sysclk > rt5670->lrck[RT5670_AIF1] * 384)
789 return 1;
790
791 return 0;
792 }
793
794
795 /**
796 * rt5670_sel_asrc_clk_src - select ASRC clock source for a set of filters
797 * @component: SoC audio component device.
798 * @filter_mask: mask of filters.
799 * @clk_src: clock source
800 *
801 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5670 can
802 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
803 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
804 * ASRC function will track i2s clock and generate a corresponding system clock
805 * for codec. This function provides an API to select the clock source for a
806 * set of filters specified by the mask. And the codec driver will turn on ASRC
807 * for these filters if ASRC is selected as their clock source.
808 */
rt5670_sel_asrc_clk_src(struct snd_soc_component * component,unsigned int filter_mask,unsigned int clk_src)809 int rt5670_sel_asrc_clk_src(struct snd_soc_component *component,
810 unsigned int filter_mask, unsigned int clk_src)
811 {
812 unsigned int asrc2_mask = 0, asrc2_value = 0;
813 unsigned int asrc3_mask = 0, asrc3_value = 0;
814
815 if (clk_src > RT5670_CLK_SEL_SYS3)
816 return -EINVAL;
817
818 if (filter_mask & RT5670_DA_STEREO_FILTER) {
819 asrc2_mask |= RT5670_DA_STO_CLK_SEL_MASK;
820 asrc2_value = (asrc2_value & ~RT5670_DA_STO_CLK_SEL_MASK)
821 | (clk_src << RT5670_DA_STO_CLK_SEL_SFT);
822 }
823
824 if (filter_mask & RT5670_DA_MONO_L_FILTER) {
825 asrc2_mask |= RT5670_DA_MONOL_CLK_SEL_MASK;
826 asrc2_value = (asrc2_value & ~RT5670_DA_MONOL_CLK_SEL_MASK)
827 | (clk_src << RT5670_DA_MONOL_CLK_SEL_SFT);
828 }
829
830 if (filter_mask & RT5670_DA_MONO_R_FILTER) {
831 asrc2_mask |= RT5670_DA_MONOR_CLK_SEL_MASK;
832 asrc2_value = (asrc2_value & ~RT5670_DA_MONOR_CLK_SEL_MASK)
833 | (clk_src << RT5670_DA_MONOR_CLK_SEL_SFT);
834 }
835
836 if (filter_mask & RT5670_AD_STEREO_FILTER) {
837 asrc2_mask |= RT5670_AD_STO1_CLK_SEL_MASK;
838 asrc2_value = (asrc2_value & ~RT5670_AD_STO1_CLK_SEL_MASK)
839 | (clk_src << RT5670_AD_STO1_CLK_SEL_SFT);
840 }
841
842 if (filter_mask & RT5670_AD_MONO_L_FILTER) {
843 asrc3_mask |= RT5670_AD_MONOL_CLK_SEL_MASK;
844 asrc3_value = (asrc3_value & ~RT5670_AD_MONOL_CLK_SEL_MASK)
845 | (clk_src << RT5670_AD_MONOL_CLK_SEL_SFT);
846 }
847
848 if (filter_mask & RT5670_AD_MONO_R_FILTER) {
849 asrc3_mask |= RT5670_AD_MONOR_CLK_SEL_MASK;
850 asrc3_value = (asrc3_value & ~RT5670_AD_MONOR_CLK_SEL_MASK)
851 | (clk_src << RT5670_AD_MONOR_CLK_SEL_SFT);
852 }
853
854 if (filter_mask & RT5670_UP_RATE_FILTER) {
855 asrc3_mask |= RT5670_UP_CLK_SEL_MASK;
856 asrc3_value = (asrc3_value & ~RT5670_UP_CLK_SEL_MASK)
857 | (clk_src << RT5670_UP_CLK_SEL_SFT);
858 }
859
860 if (filter_mask & RT5670_DOWN_RATE_FILTER) {
861 asrc3_mask |= RT5670_DOWN_CLK_SEL_MASK;
862 asrc3_value = (asrc3_value & ~RT5670_DOWN_CLK_SEL_MASK)
863 | (clk_src << RT5670_DOWN_CLK_SEL_SFT);
864 }
865
866 if (asrc2_mask)
867 snd_soc_component_update_bits(component, RT5670_ASRC_2,
868 asrc2_mask, asrc2_value);
869
870 if (asrc3_mask)
871 snd_soc_component_update_bits(component, RT5670_ASRC_3,
872 asrc3_mask, asrc3_value);
873 return 0;
874 }
875 EXPORT_SYMBOL_GPL(rt5670_sel_asrc_clk_src);
876
877 /* Digital Mixer */
878 static const struct snd_kcontrol_new rt5670_sto1_adc_l_mix[] = {
879 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
880 RT5670_M_ADC_L1_SFT, 1, 1),
881 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
882 RT5670_M_ADC_L2_SFT, 1, 1),
883 };
884
885 static const struct snd_kcontrol_new rt5670_sto1_adc_r_mix[] = {
886 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO1_ADC_MIXER,
887 RT5670_M_ADC_R1_SFT, 1, 1),
888 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO1_ADC_MIXER,
889 RT5670_M_ADC_R2_SFT, 1, 1),
890 };
891
892 static const struct snd_kcontrol_new rt5670_sto2_adc_l_mix[] = {
893 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
894 RT5670_M_ADC_L1_SFT, 1, 1),
895 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
896 RT5670_M_ADC_L2_SFT, 1, 1),
897 };
898
899 static const struct snd_kcontrol_new rt5670_sto2_adc_r_mix[] = {
900 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_STO2_ADC_MIXER,
901 RT5670_M_ADC_R1_SFT, 1, 1),
902 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_STO2_ADC_MIXER,
903 RT5670_M_ADC_R2_SFT, 1, 1),
904 };
905
906 static const struct snd_kcontrol_new rt5670_mono_adc_l_mix[] = {
907 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
908 RT5670_M_MONO_ADC_L1_SFT, 1, 1),
909 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
910 RT5670_M_MONO_ADC_L2_SFT, 1, 1),
911 };
912
913 static const struct snd_kcontrol_new rt5670_mono_adc_r_mix[] = {
914 SOC_DAPM_SINGLE("ADC1 Switch", RT5670_MONO_ADC_MIXER,
915 RT5670_M_MONO_ADC_R1_SFT, 1, 1),
916 SOC_DAPM_SINGLE("ADC2 Switch", RT5670_MONO_ADC_MIXER,
917 RT5670_M_MONO_ADC_R2_SFT, 1, 1),
918 };
919
920 static const struct snd_kcontrol_new rt5670_dac_l_mix[] = {
921 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
922 RT5670_M_ADCMIX_L_SFT, 1, 1),
923 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
924 RT5670_M_DAC1_L_SFT, 1, 1),
925 };
926
927 static const struct snd_kcontrol_new rt5670_dac_r_mix[] = {
928 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5670_AD_DA_MIXER,
929 RT5670_M_ADCMIX_R_SFT, 1, 1),
930 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_AD_DA_MIXER,
931 RT5670_M_DAC1_R_SFT, 1, 1),
932 };
933
934 static const struct snd_kcontrol_new rt5670_sto_dac_l_mix[] = {
935 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
936 RT5670_M_DAC_L1_SFT, 1, 1),
937 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_STO_DAC_MIXER,
938 RT5670_M_DAC_L2_SFT, 1, 1),
939 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
940 RT5670_M_DAC_R1_STO_L_SFT, 1, 1),
941 };
942
943 static const struct snd_kcontrol_new rt5670_sto_dac_r_mix[] = {
944 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_STO_DAC_MIXER,
945 RT5670_M_DAC_R1_SFT, 1, 1),
946 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_STO_DAC_MIXER,
947 RT5670_M_DAC_R2_SFT, 1, 1),
948 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_STO_DAC_MIXER,
949 RT5670_M_DAC_L1_STO_R_SFT, 1, 1),
950 };
951
952 static const struct snd_kcontrol_new rt5670_mono_dac_l_mix[] = {
953 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_DD_MIXER,
954 RT5670_M_DAC_L1_MONO_L_SFT, 1, 1),
955 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
956 RT5670_M_DAC_L2_MONO_L_SFT, 1, 1),
957 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
958 RT5670_M_DAC_R2_MONO_L_SFT, 1, 1),
959 };
960
961 static const struct snd_kcontrol_new rt5670_mono_dac_r_mix[] = {
962 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_DD_MIXER,
963 RT5670_M_DAC_R1_MONO_R_SFT, 1, 1),
964 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DD_MIXER,
965 RT5670_M_DAC_R2_MONO_R_SFT, 1, 1),
966 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DD_MIXER,
967 RT5670_M_DAC_L2_MONO_R_SFT, 1, 1),
968 };
969
970 static const struct snd_kcontrol_new rt5670_dig_l_mix[] = {
971 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5670_DIG_MIXER,
972 RT5670_M_STO_L_DAC_L_SFT, 1, 1),
973 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
974 RT5670_M_DAC_L2_DAC_L_SFT, 1, 1),
975 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
976 RT5670_M_DAC_R2_DAC_L_SFT, 1, 1),
977 };
978
979 static const struct snd_kcontrol_new rt5670_dig_r_mix[] = {
980 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5670_DIG_MIXER,
981 RT5670_M_STO_R_DAC_R_SFT, 1, 1),
982 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_DIG_MIXER,
983 RT5670_M_DAC_R2_DAC_R_SFT, 1, 1),
984 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_DIG_MIXER,
985 RT5670_M_DAC_L2_DAC_R_SFT, 1, 1),
986 };
987
988 /* Analog Input Mixer */
989 static const struct snd_kcontrol_new rt5670_rec_l_mix[] = {
990 SOC_DAPM_SINGLE("INL Switch", RT5670_REC_L2_MIXER,
991 RT5670_M_IN_L_RM_L_SFT, 1, 1),
992 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_L2_MIXER,
993 RT5670_M_BST2_RM_L_SFT, 1, 1),
994 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_L2_MIXER,
995 RT5670_M_BST1_RM_L_SFT, 1, 1),
996 };
997
998 static const struct snd_kcontrol_new rt5670_rec_r_mix[] = {
999 SOC_DAPM_SINGLE("INR Switch", RT5670_REC_R2_MIXER,
1000 RT5670_M_IN_R_RM_R_SFT, 1, 1),
1001 SOC_DAPM_SINGLE("BST2 Switch", RT5670_REC_R2_MIXER,
1002 RT5670_M_BST2_RM_R_SFT, 1, 1),
1003 SOC_DAPM_SINGLE("BST1 Switch", RT5670_REC_R2_MIXER,
1004 RT5670_M_BST1_RM_R_SFT, 1, 1),
1005 };
1006
1007 static const struct snd_kcontrol_new rt5670_out_l_mix[] = {
1008 SOC_DAPM_SINGLE("BST1 Switch", RT5670_OUT_L1_MIXER,
1009 RT5670_M_BST1_OM_L_SFT, 1, 1),
1010 SOC_DAPM_SINGLE("INL Switch", RT5670_OUT_L1_MIXER,
1011 RT5670_M_IN_L_OM_L_SFT, 1, 1),
1012 SOC_DAPM_SINGLE("DAC L2 Switch", RT5670_OUT_L1_MIXER,
1013 RT5670_M_DAC_L2_OM_L_SFT, 1, 1),
1014 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_OUT_L1_MIXER,
1015 RT5670_M_DAC_L1_OM_L_SFT, 1, 1),
1016 };
1017
1018 static const struct snd_kcontrol_new rt5670_out_r_mix[] = {
1019 SOC_DAPM_SINGLE("BST2 Switch", RT5670_OUT_R1_MIXER,
1020 RT5670_M_BST2_OM_R_SFT, 1, 1),
1021 SOC_DAPM_SINGLE("INR Switch", RT5670_OUT_R1_MIXER,
1022 RT5670_M_IN_R_OM_R_SFT, 1, 1),
1023 SOC_DAPM_SINGLE("DAC R2 Switch", RT5670_OUT_R1_MIXER,
1024 RT5670_M_DAC_R2_OM_R_SFT, 1, 1),
1025 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_OUT_R1_MIXER,
1026 RT5670_M_DAC_R1_OM_R_SFT, 1, 1),
1027 };
1028
1029 static const struct snd_kcontrol_new rt5670_hpo_mix[] = {
1030 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1031 RT5670_M_DAC1_HM_SFT, 1, 1),
1032 SOC_DAPM_SINGLE("HPVOL Switch", RT5670_HPO_MIXER,
1033 RT5670_M_HPVOL_HM_SFT, 1, 1),
1034 };
1035
1036 static const struct snd_kcontrol_new rt5670_hpvoll_mix[] = {
1037 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1038 RT5670_M_DACL1_HML_SFT, 1, 1),
1039 SOC_DAPM_SINGLE("INL Switch", RT5670_HPO_MIXER,
1040 RT5670_M_INL1_HML_SFT, 1, 1),
1041 };
1042
1043 static const struct snd_kcontrol_new rt5670_hpvolr_mix[] = {
1044 SOC_DAPM_SINGLE("DAC1 Switch", RT5670_HPO_MIXER,
1045 RT5670_M_DACR1_HMR_SFT, 1, 1),
1046 SOC_DAPM_SINGLE("INR Switch", RT5670_HPO_MIXER,
1047 RT5670_M_INR1_HMR_SFT, 1, 1),
1048 };
1049
1050 static const struct snd_kcontrol_new rt5670_lout_mix[] = {
1051 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_LOUT_MIXER,
1052 RT5670_M_DAC_L1_LM_SFT, 1, 1),
1053 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_LOUT_MIXER,
1054 RT5670_M_DAC_R1_LM_SFT, 1, 1),
1055 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5670_LOUT_MIXER,
1056 RT5670_M_OV_L_LM_SFT, 1, 1),
1057 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5670_LOUT_MIXER,
1058 RT5670_M_OV_R_LM_SFT, 1, 1),
1059 };
1060
1061 static const struct snd_kcontrol_new rt5670_hpl_mix[] = {
1062 SOC_DAPM_SINGLE("DAC L1 Switch", RT5670_HPO_MIXER,
1063 RT5670_M_DACL1_HML_SFT, 1, 1),
1064 SOC_DAPM_SINGLE("INL1 Switch", RT5670_HPO_MIXER,
1065 RT5670_M_INL1_HML_SFT, 1, 1),
1066 };
1067
1068 static const struct snd_kcontrol_new rt5670_hpr_mix[] = {
1069 SOC_DAPM_SINGLE("DAC R1 Switch", RT5670_HPO_MIXER,
1070 RT5670_M_DACR1_HMR_SFT, 1, 1),
1071 SOC_DAPM_SINGLE("INR1 Switch", RT5670_HPO_MIXER,
1072 RT5670_M_INR1_HMR_SFT, 1, 1),
1073 };
1074
1075 static const struct snd_kcontrol_new lout_l_enable_control =
1076 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1077 RT5670_L_MUTE_SFT, 1, 1);
1078
1079 static const struct snd_kcontrol_new lout_r_enable_control =
1080 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5670_LOUT1,
1081 RT5670_R_MUTE_SFT, 1, 1);
1082
1083 /* DAC1 L/R source */ /* MX-29 [9:8] [11:10] */
1084 static const char * const rt5670_dac1_src[] = {
1085 "IF1 DAC", "IF2 DAC"
1086 };
1087
1088 static SOC_ENUM_SINGLE_DECL(rt5670_dac1l_enum, RT5670_AD_DA_MIXER,
1089 RT5670_DAC1_L_SEL_SFT, rt5670_dac1_src);
1090
1091 static const struct snd_kcontrol_new rt5670_dac1l_mux =
1092 SOC_DAPM_ENUM("DAC1 L source", rt5670_dac1l_enum);
1093
1094 static SOC_ENUM_SINGLE_DECL(rt5670_dac1r_enum, RT5670_AD_DA_MIXER,
1095 RT5670_DAC1_R_SEL_SFT, rt5670_dac1_src);
1096
1097 static const struct snd_kcontrol_new rt5670_dac1r_mux =
1098 SOC_DAPM_ENUM("DAC1 R source", rt5670_dac1r_enum);
1099
1100 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1101 /* TODO Use SOC_VALUE_ENUM_SINGLE_DECL */
1102 static const char * const rt5670_dac12_src[] = {
1103 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC",
1104 "Bass", "VAD_ADC", "IF4 DAC"
1105 };
1106
1107 static SOC_ENUM_SINGLE_DECL(rt5670_dac2l_enum, RT5670_DAC_CTRL,
1108 RT5670_DAC2_L_SEL_SFT, rt5670_dac12_src);
1109
1110 static const struct snd_kcontrol_new rt5670_dac_l2_mux =
1111 SOC_DAPM_ENUM("DAC2 L source", rt5670_dac2l_enum);
1112
1113 static const char * const rt5670_dacr2_src[] = {
1114 "IF1 DAC", "IF2 DAC", "IF3 DAC", "TxDC DAC", "TxDP ADC", "IF4 DAC"
1115 };
1116
1117 static SOC_ENUM_SINGLE_DECL(rt5670_dac2r_enum, RT5670_DAC_CTRL,
1118 RT5670_DAC2_R_SEL_SFT, rt5670_dacr2_src);
1119
1120 static const struct snd_kcontrol_new rt5670_dac_r2_mux =
1121 SOC_DAPM_ENUM("DAC2 R source", rt5670_dac2r_enum);
1122
1123 /*RxDP source*/ /* MX-2D [15:13] */
1124 static const char * const rt5670_rxdp_src[] = {
1125 "IF2 DAC", "IF1 DAC", "STO1 ADC Mixer", "STO2 ADC Mixer",
1126 "Mono ADC Mixer L", "Mono ADC Mixer R", "DAC1"
1127 };
1128
1129 static SOC_ENUM_SINGLE_DECL(rt5670_rxdp_enum, RT5670_DSP_PATH1,
1130 RT5670_RXDP_SEL_SFT, rt5670_rxdp_src);
1131
1132 static const struct snd_kcontrol_new rt5670_rxdp_mux =
1133 SOC_DAPM_ENUM("DAC2 L source", rt5670_rxdp_enum);
1134
1135 /* MX-2D [1] [0] */
1136 static const char * const rt5670_dsp_bypass_src[] = {
1137 "DSP", "Bypass"
1138 };
1139
1140 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_ul_enum, RT5670_DSP_PATH1,
1141 RT5670_DSP_UL_SFT, rt5670_dsp_bypass_src);
1142
1143 static const struct snd_kcontrol_new rt5670_dsp_ul_mux =
1144 SOC_DAPM_ENUM("DSP UL source", rt5670_dsp_ul_enum);
1145
1146 static SOC_ENUM_SINGLE_DECL(rt5670_dsp_dl_enum, RT5670_DSP_PATH1,
1147 RT5670_DSP_DL_SFT, rt5670_dsp_bypass_src);
1148
1149 static const struct snd_kcontrol_new rt5670_dsp_dl_mux =
1150 SOC_DAPM_ENUM("DSP DL source", rt5670_dsp_dl_enum);
1151
1152 /* Stereo2 ADC source */
1153 /* MX-26 [15] */
1154 static const char * const rt5670_stereo2_adc_lr_src[] = {
1155 "L", "LR"
1156 };
1157
1158 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_lr_enum, RT5670_STO2_ADC_MIXER,
1159 RT5670_STO2_ADC_SRC_SFT, rt5670_stereo2_adc_lr_src);
1160
1161 static const struct snd_kcontrol_new rt5670_sto2_adc_lr_mux =
1162 SOC_DAPM_ENUM("Stereo2 ADC LR source", rt5670_stereo2_adc_lr_enum);
1163
1164 /* Stereo1 ADC source */
1165 /* MX-27 MX-26 [12] */
1166 static const char * const rt5670_stereo_adc1_src[] = {
1167 "DAC MIX", "ADC"
1168 };
1169
1170 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc1_enum, RT5670_STO1_ADC_MIXER,
1171 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1172
1173 static const struct snd_kcontrol_new rt5670_sto_adc_1_mux =
1174 SOC_DAPM_ENUM("Stereo1 ADC 1 Mux", rt5670_stereo1_adc1_enum);
1175
1176 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc1_enum, RT5670_STO2_ADC_MIXER,
1177 RT5670_ADC_1_SRC_SFT, rt5670_stereo_adc1_src);
1178
1179 static const struct snd_kcontrol_new rt5670_sto2_adc_1_mux =
1180 SOC_DAPM_ENUM("Stereo2 ADC 1 Mux", rt5670_stereo2_adc1_enum);
1181
1182
1183 /* MX-27 MX-26 [11] */
1184 static const char * const rt5670_stereo_adc2_src[] = {
1185 "DAC MIX", "DMIC"
1186 };
1187
1188 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc2_enum, RT5670_STO1_ADC_MIXER,
1189 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1190
1191 static const struct snd_kcontrol_new rt5670_sto_adc_2_mux =
1192 SOC_DAPM_ENUM("Stereo1 ADC 2 Mux", rt5670_stereo1_adc2_enum);
1193
1194 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc2_enum, RT5670_STO2_ADC_MIXER,
1195 RT5670_ADC_2_SRC_SFT, rt5670_stereo_adc2_src);
1196
1197 static const struct snd_kcontrol_new rt5670_sto2_adc_2_mux =
1198 SOC_DAPM_ENUM("Stereo2 ADC 2 Mux", rt5670_stereo2_adc2_enum);
1199
1200
1201 /* MX-27 MX26 [10] */
1202 static const char * const rt5670_stereo_adc_src[] = {
1203 "ADC1L ADC2R", "ADC3"
1204 };
1205
1206 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_adc_enum, RT5670_STO1_ADC_MIXER,
1207 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1208
1209 static const struct snd_kcontrol_new rt5670_sto_adc_mux =
1210 SOC_DAPM_ENUM("Stereo1 ADC source", rt5670_stereo1_adc_enum);
1211
1212 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_adc_enum, RT5670_STO2_ADC_MIXER,
1213 RT5670_ADC_SRC_SFT, rt5670_stereo_adc_src);
1214
1215 static const struct snd_kcontrol_new rt5670_sto2_adc_mux =
1216 SOC_DAPM_ENUM("Stereo2 ADC source", rt5670_stereo2_adc_enum);
1217
1218 /* MX-27 MX-26 [9:8] */
1219 static const char * const rt5670_stereo_dmic_src[] = {
1220 "DMIC1", "DMIC2", "DMIC3"
1221 };
1222
1223 static SOC_ENUM_SINGLE_DECL(rt5670_stereo1_dmic_enum, RT5670_STO1_ADC_MIXER,
1224 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1225
1226 static const struct snd_kcontrol_new rt5670_sto1_dmic_mux =
1227 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5670_stereo1_dmic_enum);
1228
1229 static SOC_ENUM_SINGLE_DECL(rt5670_stereo2_dmic_enum, RT5670_STO2_ADC_MIXER,
1230 RT5670_DMIC_SRC_SFT, rt5670_stereo_dmic_src);
1231
1232 static const struct snd_kcontrol_new rt5670_sto2_dmic_mux =
1233 SOC_DAPM_ENUM("Stereo2 DMIC source", rt5670_stereo2_dmic_enum);
1234
1235 /* MX-27 [0] */
1236 static const char * const rt5670_stereo_dmic3_src[] = {
1237 "DMIC3", "PDM ADC"
1238 };
1239
1240 static SOC_ENUM_SINGLE_DECL(rt5670_stereo_dmic3_enum, RT5670_STO1_ADC_MIXER,
1241 RT5670_DMIC3_SRC_SFT, rt5670_stereo_dmic3_src);
1242
1243 static const struct snd_kcontrol_new rt5670_sto_dmic3_mux =
1244 SOC_DAPM_ENUM("Stereo DMIC3 source", rt5670_stereo_dmic3_enum);
1245
1246 /* Mono ADC source */
1247 /* MX-28 [12] */
1248 static const char * const rt5670_mono_adc_l1_src[] = {
1249 "Mono DAC MIXL", "ADC1"
1250 };
1251
1252 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l1_enum, RT5670_MONO_ADC_MIXER,
1253 RT5670_MONO_ADC_L1_SRC_SFT, rt5670_mono_adc_l1_src);
1254
1255 static const struct snd_kcontrol_new rt5670_mono_adc_l1_mux =
1256 SOC_DAPM_ENUM("Mono ADC1 left source", rt5670_mono_adc_l1_enum);
1257 /* MX-28 [11] */
1258 static const char * const rt5670_mono_adc_l2_src[] = {
1259 "Mono DAC MIXL", "DMIC"
1260 };
1261
1262 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_l2_enum, RT5670_MONO_ADC_MIXER,
1263 RT5670_MONO_ADC_L2_SRC_SFT, rt5670_mono_adc_l2_src);
1264
1265 static const struct snd_kcontrol_new rt5670_mono_adc_l2_mux =
1266 SOC_DAPM_ENUM("Mono ADC2 left source", rt5670_mono_adc_l2_enum);
1267
1268 /* MX-28 [9:8] */
1269 static const char * const rt5670_mono_dmic_src[] = {
1270 "DMIC1", "DMIC2", "DMIC3"
1271 };
1272
1273 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_l_enum, RT5670_MONO_ADC_MIXER,
1274 RT5670_MONO_DMIC_L_SRC_SFT, rt5670_mono_dmic_src);
1275
1276 static const struct snd_kcontrol_new rt5670_mono_dmic_l_mux =
1277 SOC_DAPM_ENUM("Mono DMIC left source", rt5670_mono_dmic_l_enum);
1278 /* MX-28 [1:0] */
1279 static SOC_ENUM_SINGLE_DECL(rt5670_mono_dmic_r_enum, RT5670_MONO_ADC_MIXER,
1280 RT5670_MONO_DMIC_R_SRC_SFT, rt5670_mono_dmic_src);
1281
1282 static const struct snd_kcontrol_new rt5670_mono_dmic_r_mux =
1283 SOC_DAPM_ENUM("Mono DMIC Right source", rt5670_mono_dmic_r_enum);
1284 /* MX-28 [4] */
1285 static const char * const rt5670_mono_adc_r1_src[] = {
1286 "Mono DAC MIXR", "ADC2"
1287 };
1288
1289 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r1_enum, RT5670_MONO_ADC_MIXER,
1290 RT5670_MONO_ADC_R1_SRC_SFT, rt5670_mono_adc_r1_src);
1291
1292 static const struct snd_kcontrol_new rt5670_mono_adc_r1_mux =
1293 SOC_DAPM_ENUM("Mono ADC1 right source", rt5670_mono_adc_r1_enum);
1294 /* MX-28 [3] */
1295 static const char * const rt5670_mono_adc_r2_src[] = {
1296 "Mono DAC MIXR", "DMIC"
1297 };
1298
1299 static SOC_ENUM_SINGLE_DECL(rt5670_mono_adc_r2_enum, RT5670_MONO_ADC_MIXER,
1300 RT5670_MONO_ADC_R2_SRC_SFT, rt5670_mono_adc_r2_src);
1301
1302 static const struct snd_kcontrol_new rt5670_mono_adc_r2_mux =
1303 SOC_DAPM_ENUM("Mono ADC2 right source", rt5670_mono_adc_r2_enum);
1304
1305 /* MX-2D [3:2] */
1306 static const char * const rt5670_txdp_slot_src[] = {
1307 "Slot 0-1", "Slot 2-3", "Slot 4-5", "Slot 6-7"
1308 };
1309
1310 static SOC_ENUM_SINGLE_DECL(rt5670_txdp_slot_enum, RT5670_DSP_PATH1,
1311 RT5670_TXDP_SLOT_SEL_SFT, rt5670_txdp_slot_src);
1312
1313 static const struct snd_kcontrol_new rt5670_txdp_slot_mux =
1314 SOC_DAPM_ENUM("TxDP Slot source", rt5670_txdp_slot_enum);
1315
1316 /* MX-2F [15] */
1317 static const char * const rt5670_if1_adc2_in_src[] = {
1318 "IF_ADC2", "VAD_ADC"
1319 };
1320
1321 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in_enum, RT5670_DIG_INF1_DATA,
1322 RT5670_IF1_ADC2_IN_SFT, rt5670_if1_adc2_in_src);
1323
1324 static const struct snd_kcontrol_new rt5670_if1_adc2_in_mux =
1325 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5670_if1_adc2_in_enum);
1326
1327 /* MX-2F [14:12] */
1328 static const char * const rt5670_if2_adc_in_src[] = {
1329 "IF_ADC1", "IF_ADC2", "IF_ADC3", "TxDC_DAC", "TxDP_ADC", "VAD_ADC"
1330 };
1331
1332 static SOC_ENUM_SINGLE_DECL(rt5670_if2_adc_in_enum, RT5670_DIG_INF1_DATA,
1333 RT5670_IF2_ADC_IN_SFT, rt5670_if2_adc_in_src);
1334
1335 static const struct snd_kcontrol_new rt5670_if2_adc_in_mux =
1336 SOC_DAPM_ENUM("IF2 ADC IN source", rt5670_if2_adc_in_enum);
1337
1338 /* MX-30 [5:4] */
1339 static const char * const rt5670_if4_adc_in_src[] = {
1340 "IF_ADC1", "IF_ADC2", "IF_ADC3"
1341 };
1342
1343 static SOC_ENUM_SINGLE_DECL(rt5670_if4_adc_in_enum, RT5670_DIG_INF2_DATA,
1344 RT5670_IF4_ADC_IN_SFT, rt5670_if4_adc_in_src);
1345
1346 static const struct snd_kcontrol_new rt5670_if4_adc_in_mux =
1347 SOC_DAPM_ENUM("IF4 ADC IN source", rt5670_if4_adc_in_enum);
1348
1349 /* MX-31 [15] [13] [11] [9] */
1350 static const char * const rt5670_pdm_src[] = {
1351 "Mono DAC", "Stereo DAC"
1352 };
1353
1354 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_l_enum, RT5670_PDM_OUT_CTRL,
1355 RT5670_PDM1_L_SFT, rt5670_pdm_src);
1356
1357 static const struct snd_kcontrol_new rt5670_pdm1_l_mux =
1358 SOC_DAPM_ENUM("PDM1 L source", rt5670_pdm1_l_enum);
1359
1360 static SOC_ENUM_SINGLE_DECL(rt5670_pdm1_r_enum, RT5670_PDM_OUT_CTRL,
1361 RT5670_PDM1_R_SFT, rt5670_pdm_src);
1362
1363 static const struct snd_kcontrol_new rt5670_pdm1_r_mux =
1364 SOC_DAPM_ENUM("PDM1 R source", rt5670_pdm1_r_enum);
1365
1366 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_l_enum, RT5670_PDM_OUT_CTRL,
1367 RT5670_PDM2_L_SFT, rt5670_pdm_src);
1368
1369 static const struct snd_kcontrol_new rt5670_pdm2_l_mux =
1370 SOC_DAPM_ENUM("PDM2 L source", rt5670_pdm2_l_enum);
1371
1372 static SOC_ENUM_SINGLE_DECL(rt5670_pdm2_r_enum, RT5670_PDM_OUT_CTRL,
1373 RT5670_PDM2_R_SFT, rt5670_pdm_src);
1374
1375 static const struct snd_kcontrol_new rt5670_pdm2_r_mux =
1376 SOC_DAPM_ENUM("PDM2 R source", rt5670_pdm2_r_enum);
1377
1378 /* MX-FA [12] */
1379 static const char * const rt5670_if1_adc1_in1_src[] = {
1380 "IF_ADC1", "IF1_ADC3"
1381 };
1382
1383 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in1_enum, RT5670_DIG_MISC,
1384 RT5670_IF1_ADC1_IN1_SFT, rt5670_if1_adc1_in1_src);
1385
1386 static const struct snd_kcontrol_new rt5670_if1_adc1_in1_mux =
1387 SOC_DAPM_ENUM("IF1 ADC1 IN1 source", rt5670_if1_adc1_in1_enum);
1388
1389 /* MX-FA [11] */
1390 static const char * const rt5670_if1_adc1_in2_src[] = {
1391 "IF1_ADC1_IN1", "IF1_ADC4"
1392 };
1393
1394 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc1_in2_enum, RT5670_DIG_MISC,
1395 RT5670_IF1_ADC1_IN2_SFT, rt5670_if1_adc1_in2_src);
1396
1397 static const struct snd_kcontrol_new rt5670_if1_adc1_in2_mux =
1398 SOC_DAPM_ENUM("IF1 ADC1 IN2 source", rt5670_if1_adc1_in2_enum);
1399
1400 /* MX-FA [10] */
1401 static const char * const rt5670_if1_adc2_in1_src[] = {
1402 "IF1_ADC2_IN", "IF1_ADC4"
1403 };
1404
1405 static SOC_ENUM_SINGLE_DECL(rt5670_if1_adc2_in1_enum, RT5670_DIG_MISC,
1406 RT5670_IF1_ADC2_IN1_SFT, rt5670_if1_adc2_in1_src);
1407
1408 static const struct snd_kcontrol_new rt5670_if1_adc2_in1_mux =
1409 SOC_DAPM_ENUM("IF1 ADC2 IN1 source", rt5670_if1_adc2_in1_enum);
1410
1411 /* MX-9D [9:8] */
1412 static const char * const rt5670_vad_adc_src[] = {
1413 "Sto1 ADC L", "Mono ADC L", "Mono ADC R", "Sto2 ADC L"
1414 };
1415
1416 static SOC_ENUM_SINGLE_DECL(rt5670_vad_adc_enum, RT5670_VAD_CTRL4,
1417 RT5670_VAD_SEL_SFT, rt5670_vad_adc_src);
1418
1419 static const struct snd_kcontrol_new rt5670_vad_adc_mux =
1420 SOC_DAPM_ENUM("VAD ADC source", rt5670_vad_adc_enum);
1421
rt5670_hp_power_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1422 static int rt5670_hp_power_event(struct snd_soc_dapm_widget *w,
1423 struct snd_kcontrol *kcontrol, int event)
1424 {
1425 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1426 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1427
1428 switch (event) {
1429 case SND_SOC_DAPM_POST_PMU:
1430 regmap_update_bits(rt5670->regmap, RT5670_CHARGE_PUMP,
1431 RT5670_PM_HP_MASK, RT5670_PM_HP_HV);
1432 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1433 0x0400, 0x0400);
1434 /* headphone amp power on */
1435 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
1436 RT5670_PWR_HA | RT5670_PWR_FV1 |
1437 RT5670_PWR_FV2, RT5670_PWR_HA |
1438 RT5670_PWR_FV1 | RT5670_PWR_FV2);
1439 /* depop parameters */
1440 regmap_write(rt5670->regmap, RT5670_DEPOP_M2, 0x3100);
1441 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8009);
1442 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1443 RT5670_HP_DCC_INT1, 0x9f00);
1444 mdelay(20);
1445 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1446 break;
1447 case SND_SOC_DAPM_PRE_PMD:
1448 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x0004);
1449 msleep(30);
1450 break;
1451 default:
1452 return 0;
1453 }
1454
1455 return 0;
1456 }
1457
rt5670_hp_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1458 static int rt5670_hp_event(struct snd_soc_dapm_widget *w,
1459 struct snd_kcontrol *kcontrol, int event)
1460 {
1461 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1462 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1463
1464 switch (event) {
1465 case SND_SOC_DAPM_POST_PMU:
1466 /* headphone unmute sequence */
1467 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1468 RT5670_MAMP_INT_REG2, 0xb400);
1469 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1470 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x805d);
1471 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1472 regmap_update_bits(rt5670->regmap, RT5670_GEN_CTRL2,
1473 0x0300, 0x0300);
1474 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1475 RT5670_L_MUTE | RT5670_R_MUTE, 0);
1476 msleep(80);
1477 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1478 break;
1479
1480 case SND_SOC_DAPM_PRE_PMD:
1481 /* headphone mute sequence */
1482 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1483 RT5670_MAMP_INT_REG2, 0xb400);
1484 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0772);
1485 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x803d);
1486 mdelay(10);
1487 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x831d);
1488 mdelay(10);
1489 regmap_update_bits(rt5670->regmap, RT5670_HP_VOL,
1490 RT5670_L_MUTE | RT5670_R_MUTE,
1491 RT5670_L_MUTE | RT5670_R_MUTE);
1492 msleep(20);
1493 regmap_update_bits(rt5670->regmap,
1494 RT5670_GEN_CTRL2, 0x0300, 0x0);
1495 regmap_write(rt5670->regmap, RT5670_DEPOP_M1, 0x8019);
1496 regmap_write(rt5670->regmap, RT5670_DEPOP_M3, 0x0707);
1497 regmap_write(rt5670->regmap, RT5670_PR_BASE +
1498 RT5670_MAMP_INT_REG2, 0xfc00);
1499 break;
1500
1501 default:
1502 return 0;
1503 }
1504
1505 return 0;
1506 }
1507
rt5670_spk_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1508 static int rt5670_spk_event(struct snd_soc_dapm_widget *w,
1509 struct snd_kcontrol *kcontrol, int event)
1510 {
1511 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1512 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
1513
1514 if (!rt5670->pdata.gpio1_is_ext_spk_en)
1515 return 0;
1516
1517 switch (event) {
1518 case SND_SOC_DAPM_POST_PMU:
1519 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1520 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_HI);
1521 break;
1522
1523 case SND_SOC_DAPM_PRE_PMD:
1524 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
1525 RT5670_GP1_OUT_MASK, RT5670_GP1_OUT_LO);
1526 break;
1527
1528 default:
1529 return 0;
1530 }
1531
1532 return 0;
1533 }
1534
rt5670_bst1_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1535 static int rt5670_bst1_event(struct snd_soc_dapm_widget *w,
1536 struct snd_kcontrol *kcontrol, int event)
1537 {
1538 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1539
1540 switch (event) {
1541 case SND_SOC_DAPM_POST_PMU:
1542 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1543 RT5670_PWR_BST1_P, RT5670_PWR_BST1_P);
1544 break;
1545
1546 case SND_SOC_DAPM_PRE_PMD:
1547 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1548 RT5670_PWR_BST1_P, 0);
1549 break;
1550
1551 default:
1552 return 0;
1553 }
1554
1555 return 0;
1556 }
1557
rt5670_bst2_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1558 static int rt5670_bst2_event(struct snd_soc_dapm_widget *w,
1559 struct snd_kcontrol *kcontrol, int event)
1560 {
1561 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1562
1563 switch (event) {
1564 case SND_SOC_DAPM_POST_PMU:
1565 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1566 RT5670_PWR_BST2_P, RT5670_PWR_BST2_P);
1567 break;
1568
1569 case SND_SOC_DAPM_PRE_PMD:
1570 snd_soc_component_update_bits(component, RT5670_PWR_ANLG2,
1571 RT5670_PWR_BST2_P, 0);
1572 break;
1573
1574 default:
1575 return 0;
1576 }
1577
1578 return 0;
1579 }
1580
1581 static const struct snd_soc_dapm_widget rt5670_dapm_widgets[] = {
1582 SND_SOC_DAPM_SUPPLY("PLL1", RT5670_PWR_ANLG2,
1583 RT5670_PWR_PLL_BIT, 0, NULL, 0),
1584 SND_SOC_DAPM_SUPPLY("I2S DSP", RT5670_PWR_DIG2,
1585 RT5670_PWR_I2S_DSP_BIT, 0, NULL, 0),
1586 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5670_PWR_VOL,
1587 RT5670_PWR_MIC_DET_BIT, 0, NULL, 0),
1588
1589 /* ASRC */
1590 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5670_ASRC_1,
1591 11, 0, NULL, 0),
1592 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5670_ASRC_1,
1593 12, 0, NULL, 0),
1594 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5670_ASRC_1,
1595 10, 0, NULL, 0),
1596 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5670_ASRC_1,
1597 9, 0, NULL, 0),
1598 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5670_ASRC_1,
1599 8, 0, NULL, 0),
1600 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5670_ASRC_1,
1601 7, 0, NULL, 0),
1602 SND_SOC_DAPM_SUPPLY_S("DMIC STO2 ASRC", 1, RT5670_ASRC_1,
1603 6, 0, NULL, 0),
1604 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5670_ASRC_1,
1605 5, 0, NULL, 0),
1606 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5670_ASRC_1,
1607 4, 0, NULL, 0),
1608 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5670_ASRC_1,
1609 3, 0, NULL, 0),
1610 SND_SOC_DAPM_SUPPLY_S("ADC STO2 ASRC", 1, RT5670_ASRC_1,
1611 2, 0, NULL, 0),
1612 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5670_ASRC_1,
1613 1, 0, NULL, 0),
1614 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5670_ASRC_1,
1615 0, 0, NULL, 0),
1616
1617 /* Input Side */
1618 /* micbias */
1619 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5670_PWR_ANLG2,
1620 RT5670_PWR_MB1_BIT, 0, NULL, 0),
1621
1622 /* Input Lines */
1623 SND_SOC_DAPM_INPUT("DMIC L1"),
1624 SND_SOC_DAPM_INPUT("DMIC R1"),
1625 SND_SOC_DAPM_INPUT("DMIC L2"),
1626 SND_SOC_DAPM_INPUT("DMIC R2"),
1627 SND_SOC_DAPM_INPUT("DMIC L3"),
1628 SND_SOC_DAPM_INPUT("DMIC R3"),
1629
1630 SND_SOC_DAPM_INPUT("IN1P"),
1631 SND_SOC_DAPM_INPUT("IN1N"),
1632 SND_SOC_DAPM_INPUT("IN2P"),
1633 SND_SOC_DAPM_INPUT("IN2N"),
1634
1635 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1636 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1637 SND_SOC_DAPM_PGA("DMIC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1638
1639 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1640 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1641 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5670_DMIC_CTRL1,
1642 RT5670_DMIC_1_EN_SFT, 0, NULL, 0),
1643 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5670_DMIC_CTRL1,
1644 RT5670_DMIC_2_EN_SFT, 0, NULL, 0),
1645 SND_SOC_DAPM_SUPPLY("DMIC3 Power", RT5670_DMIC_CTRL1,
1646 RT5670_DMIC_3_EN_SFT, 0, NULL, 0),
1647 /* Boost */
1648 SND_SOC_DAPM_PGA_E("BST1", RT5670_PWR_ANLG2, RT5670_PWR_BST1_BIT,
1649 0, NULL, 0, rt5670_bst1_event,
1650 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1651 SND_SOC_DAPM_PGA_E("BST2", RT5670_PWR_ANLG2, RT5670_PWR_BST2_BIT,
1652 0, NULL, 0, rt5670_bst2_event,
1653 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1654 /* Input Volume */
1655 SND_SOC_DAPM_PGA("INL VOL", RT5670_PWR_VOL,
1656 RT5670_PWR_IN_L_BIT, 0, NULL, 0),
1657 SND_SOC_DAPM_PGA("INR VOL", RT5670_PWR_VOL,
1658 RT5670_PWR_IN_R_BIT, 0, NULL, 0),
1659
1660 /* REC Mixer */
1661 SND_SOC_DAPM_MIXER("RECMIXL", RT5670_PWR_MIXER, RT5670_PWR_RM_L_BIT, 0,
1662 rt5670_rec_l_mix, ARRAY_SIZE(rt5670_rec_l_mix)),
1663 SND_SOC_DAPM_MIXER("RECMIXR", RT5670_PWR_MIXER, RT5670_PWR_RM_R_BIT, 0,
1664 rt5670_rec_r_mix, ARRAY_SIZE(rt5670_rec_r_mix)),
1665 /* ADCs */
1666 SND_SOC_DAPM_ADC("ADC 1", NULL, SND_SOC_NOPM, 0, 0),
1667 SND_SOC_DAPM_ADC("ADC 2", NULL, SND_SOC_NOPM, 0, 0),
1668
1669 SND_SOC_DAPM_PGA("ADC 1_2", SND_SOC_NOPM, 0, 0, NULL, 0),
1670
1671 SND_SOC_DAPM_SUPPLY("ADC 1 power", RT5670_PWR_DIG1,
1672 RT5670_PWR_ADC_L_BIT, 0, NULL, 0),
1673 SND_SOC_DAPM_SUPPLY("ADC 2 power", RT5670_PWR_DIG1,
1674 RT5670_PWR_ADC_R_BIT, 0, NULL, 0),
1675 SND_SOC_DAPM_SUPPLY("ADC clock", RT5670_PR_BASE +
1676 RT5670_CHOP_DAC_ADC, 12, 0, NULL, 0),
1677 /* ADC Mux */
1678 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1679 &rt5670_sto1_dmic_mux),
1680 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1681 &rt5670_sto_adc_2_mux),
1682 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1683 &rt5670_sto_adc_2_mux),
1684 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1685 &rt5670_sto_adc_1_mux),
1686 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1687 &rt5670_sto_adc_1_mux),
1688 SND_SOC_DAPM_MUX("Stereo2 DMIC Mux", SND_SOC_NOPM, 0, 0,
1689 &rt5670_sto2_dmic_mux),
1690 SND_SOC_DAPM_MUX("Stereo2 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1691 &rt5670_sto2_adc_2_mux),
1692 SND_SOC_DAPM_MUX("Stereo2 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1693 &rt5670_sto2_adc_2_mux),
1694 SND_SOC_DAPM_MUX("Stereo2 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1695 &rt5670_sto2_adc_1_mux),
1696 SND_SOC_DAPM_MUX("Stereo2 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1697 &rt5670_sto2_adc_1_mux),
1698 SND_SOC_DAPM_MUX("Stereo2 ADC LR Mux", SND_SOC_NOPM, 0, 0,
1699 &rt5670_sto2_adc_lr_mux),
1700 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1701 &rt5670_mono_dmic_l_mux),
1702 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1703 &rt5670_mono_dmic_r_mux),
1704 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1705 &rt5670_mono_adc_l2_mux),
1706 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1707 &rt5670_mono_adc_l1_mux),
1708 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1709 &rt5670_mono_adc_r1_mux),
1710 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1711 &rt5670_mono_adc_r2_mux),
1712 /* ADC Mixer */
1713 SND_SOC_DAPM_SUPPLY("ADC Stereo1 Filter", RT5670_PWR_DIG2,
1714 RT5670_PWR_ADC_S1F_BIT, 0, NULL, 0),
1715 SND_SOC_DAPM_SUPPLY("ADC Stereo2 Filter", RT5670_PWR_DIG2,
1716 RT5670_PWR_ADC_S2F_BIT, 0, NULL, 0),
1717 SND_SOC_DAPM_MIXER("Sto1 ADC MIXL", RT5670_STO1_ADC_DIG_VOL,
1718 RT5670_L_MUTE_SFT, 1, rt5670_sto1_adc_l_mix,
1719 ARRAY_SIZE(rt5670_sto1_adc_l_mix)),
1720 SND_SOC_DAPM_MIXER("Sto1 ADC MIXR", RT5670_STO1_ADC_DIG_VOL,
1721 RT5670_R_MUTE_SFT, 1, rt5670_sto1_adc_r_mix,
1722 ARRAY_SIZE(rt5670_sto1_adc_r_mix)),
1723 SND_SOC_DAPM_MIXER("Sto2 ADC MIXL", SND_SOC_NOPM, 0, 0,
1724 rt5670_sto2_adc_l_mix,
1725 ARRAY_SIZE(rt5670_sto2_adc_l_mix)),
1726 SND_SOC_DAPM_MIXER("Sto2 ADC MIXR", SND_SOC_NOPM, 0, 0,
1727 rt5670_sto2_adc_r_mix,
1728 ARRAY_SIZE(rt5670_sto2_adc_r_mix)),
1729 SND_SOC_DAPM_SUPPLY("ADC Mono Left Filter", RT5670_PWR_DIG2,
1730 RT5670_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1731 SND_SOC_DAPM_MIXER("Mono ADC MIXL", RT5670_MONO_ADC_DIG_VOL,
1732 RT5670_L_MUTE_SFT, 1, rt5670_mono_adc_l_mix,
1733 ARRAY_SIZE(rt5670_mono_adc_l_mix)),
1734 SND_SOC_DAPM_SUPPLY("ADC Mono Right Filter", RT5670_PWR_DIG2,
1735 RT5670_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1736 SND_SOC_DAPM_MIXER("Mono ADC MIXR", RT5670_MONO_ADC_DIG_VOL,
1737 RT5670_R_MUTE_SFT, 1, rt5670_mono_adc_r_mix,
1738 ARRAY_SIZE(rt5670_mono_adc_r_mix)),
1739
1740 /* ADC PGA */
1741 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1742 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1743 SND_SOC_DAPM_PGA("Stereo2 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1744 SND_SOC_DAPM_PGA("Stereo2 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1745 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1746 SND_SOC_DAPM_PGA("Stereo1 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1747 SND_SOC_DAPM_PGA("Stereo2 ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1748 SND_SOC_DAPM_PGA("Mono ADC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1749 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1750 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1751 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1752 SND_SOC_DAPM_PGA("IF_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1753 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1754 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1755 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1756
1757 /* DSP */
1758 SND_SOC_DAPM_PGA("TxDP_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1759 SND_SOC_DAPM_PGA("TxDP_ADC_L", SND_SOC_NOPM, 0, 0, NULL, 0),
1760 SND_SOC_DAPM_PGA("TxDP_ADC_R", SND_SOC_NOPM, 0, 0, NULL, 0),
1761 SND_SOC_DAPM_PGA("TxDC_DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1762
1763 SND_SOC_DAPM_MUX("TDM Data Mux", SND_SOC_NOPM, 0, 0,
1764 &rt5670_txdp_slot_mux),
1765
1766 SND_SOC_DAPM_MUX("DSP UL Mux", SND_SOC_NOPM, 0, 0,
1767 &rt5670_dsp_ul_mux),
1768 SND_SOC_DAPM_MUX("DSP DL Mux", SND_SOC_NOPM, 0, 0,
1769 &rt5670_dsp_dl_mux),
1770
1771 SND_SOC_DAPM_MUX("RxDP Mux", SND_SOC_NOPM, 0, 0,
1772 &rt5670_rxdp_mux),
1773
1774 /* IF2 Mux */
1775 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM, 0, 0,
1776 &rt5670_if2_adc_in_mux),
1777
1778 /* Digital Interface */
1779 SND_SOC_DAPM_SUPPLY("I2S1", RT5670_PWR_DIG1,
1780 RT5670_PWR_I2S1_BIT, 0, NULL, 0),
1781 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1782 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1783 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1784 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1785 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1786 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1787 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1788 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1789 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1790 SND_SOC_DAPM_SUPPLY("I2S2", RT5670_PWR_DIG1,
1791 RT5670_PWR_I2S2_BIT, 0, NULL, 0),
1792 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1793 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1794 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1795 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1796 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1797 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1798
1799 /* Digital Interface Select */
1800 SND_SOC_DAPM_MUX("IF1 ADC1 IN1 Mux", SND_SOC_NOPM, 0, 0,
1801 &rt5670_if1_adc1_in1_mux),
1802 SND_SOC_DAPM_MUX("IF1 ADC1 IN2 Mux", SND_SOC_NOPM, 0, 0,
1803 &rt5670_if1_adc1_in2_mux),
1804 SND_SOC_DAPM_MUX("IF1 ADC2 IN Mux", SND_SOC_NOPM, 0, 0,
1805 &rt5670_if1_adc2_in_mux),
1806 SND_SOC_DAPM_MUX("IF1 ADC2 IN1 Mux", SND_SOC_NOPM, 0, 0,
1807 &rt5670_if1_adc2_in1_mux),
1808 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM, 0, 0,
1809 &rt5670_vad_adc_mux),
1810
1811 /* Audio Interface */
1812 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1813 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1814 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1815 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0,
1816 RT5670_GPIO_CTRL1, RT5670_I2S2_PIN_SFT, 1),
1817
1818 /* Audio DSP */
1819 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1820
1821 /* Output Side */
1822 /* DAC mixer before sound effect */
1823 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1824 rt5670_dac_l_mix, ARRAY_SIZE(rt5670_dac_l_mix)),
1825 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1826 rt5670_dac_r_mix, ARRAY_SIZE(rt5670_dac_r_mix)),
1827 SND_SOC_DAPM_PGA("DAC MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1828
1829 /* DAC2 channel Mux */
1830 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1831 &rt5670_dac_l2_mux),
1832 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1833 &rt5670_dac_r2_mux),
1834 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5670_PWR_DIG1,
1835 RT5670_PWR_DAC_L2_BIT, 0, NULL, 0),
1836 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5670_PWR_DIG1,
1837 RT5670_PWR_DAC_R2_BIT, 0, NULL, 0),
1838
1839 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1l_mux),
1840 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5670_dac1r_mux),
1841
1842 /* DAC Mixer */
1843 SND_SOC_DAPM_SUPPLY("DAC Stereo1 Filter", RT5670_PWR_DIG2,
1844 RT5670_PWR_DAC_S1F_BIT, 0, NULL, 0),
1845 SND_SOC_DAPM_SUPPLY("DAC Mono Left Filter", RT5670_PWR_DIG2,
1846 RT5670_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1847 SND_SOC_DAPM_SUPPLY("DAC Mono Right Filter", RT5670_PWR_DIG2,
1848 RT5670_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1849 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1850 rt5670_sto_dac_l_mix,
1851 ARRAY_SIZE(rt5670_sto_dac_l_mix)),
1852 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1853 rt5670_sto_dac_r_mix,
1854 ARRAY_SIZE(rt5670_sto_dac_r_mix)),
1855 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1856 rt5670_mono_dac_l_mix,
1857 ARRAY_SIZE(rt5670_mono_dac_l_mix)),
1858 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1859 rt5670_mono_dac_r_mix,
1860 ARRAY_SIZE(rt5670_mono_dac_r_mix)),
1861 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1862 rt5670_dig_l_mix,
1863 ARRAY_SIZE(rt5670_dig_l_mix)),
1864 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1865 rt5670_dig_r_mix,
1866 ARRAY_SIZE(rt5670_dig_r_mix)),
1867
1868 /* DACs */
1869 SND_SOC_DAPM_SUPPLY("DAC L1 Power", RT5670_PWR_DIG1,
1870 RT5670_PWR_DAC_L1_BIT, 0, NULL, 0),
1871 SND_SOC_DAPM_SUPPLY("DAC R1 Power", RT5670_PWR_DIG1,
1872 RT5670_PWR_DAC_R1_BIT, 0, NULL, 0),
1873 SND_SOC_DAPM_DAC("DAC L1", NULL, SND_SOC_NOPM, 0, 0),
1874 SND_SOC_DAPM_DAC("DAC R1", NULL, SND_SOC_NOPM, 0, 0),
1875 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5670_PWR_DIG1,
1876 RT5670_PWR_DAC_L2_BIT, 0),
1877
1878 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5670_PWR_DIG1,
1879 RT5670_PWR_DAC_R2_BIT, 0),
1880 /* OUT Mixer */
1881
1882 SND_SOC_DAPM_MIXER("OUT MIXL", RT5670_PWR_MIXER, RT5670_PWR_OM_L_BIT,
1883 0, rt5670_out_l_mix, ARRAY_SIZE(rt5670_out_l_mix)),
1884 SND_SOC_DAPM_MIXER("OUT MIXR", RT5670_PWR_MIXER, RT5670_PWR_OM_R_BIT,
1885 0, rt5670_out_r_mix, ARRAY_SIZE(rt5670_out_r_mix)),
1886 /* Ouput Volume */
1887 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5670_PWR_VOL,
1888 RT5670_PWR_HV_L_BIT, 0,
1889 rt5670_hpvoll_mix, ARRAY_SIZE(rt5670_hpvoll_mix)),
1890 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5670_PWR_VOL,
1891 RT5670_PWR_HV_R_BIT, 0,
1892 rt5670_hpvolr_mix, ARRAY_SIZE(rt5670_hpvolr_mix)),
1893 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1894 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1895 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1896
1897 /* HPO/LOUT/Mono Mixer */
1898 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
1899 rt5670_hpo_mix, ARRAY_SIZE(rt5670_hpo_mix)),
1900 SND_SOC_DAPM_MIXER("LOUT MIX", RT5670_PWR_ANLG1, RT5670_PWR_LM_BIT,
1901 0, rt5670_lout_mix, ARRAY_SIZE(rt5670_lout_mix)),
1902 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM, 0, 0,
1903 rt5670_hp_power_event, SND_SOC_DAPM_POST_PMU |
1904 SND_SOC_DAPM_PRE_PMD),
1905 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5670_PWR_ANLG1,
1906 RT5670_PWR_HP_L_BIT, 0, NULL, 0),
1907 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5670_PWR_ANLG1,
1908 RT5670_PWR_HP_R_BIT, 0, NULL, 0),
1909 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1910 rt5670_hp_event, SND_SOC_DAPM_PRE_PMD |
1911 SND_SOC_DAPM_POST_PMU),
1912 SND_SOC_DAPM_SWITCH("LOUT L Playback", SND_SOC_NOPM, 0, 0,
1913 &lout_l_enable_control),
1914 SND_SOC_DAPM_SWITCH("LOUT R Playback", SND_SOC_NOPM, 0, 0,
1915 &lout_r_enable_control),
1916 SND_SOC_DAPM_PGA("LOUT Amp", SND_SOC_NOPM, 0, 0, NULL, 0),
1917
1918 /* PDM */
1919 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5670_PWR_DIG2,
1920 RT5670_PWR_PDM1_BIT, 0, NULL, 0),
1921
1922 SND_SOC_DAPM_MUX("PDM1 L Mux", RT5670_PDM_OUT_CTRL,
1923 RT5670_M_PDM1_L_SFT, 1, &rt5670_pdm1_l_mux),
1924 SND_SOC_DAPM_MUX("PDM1 R Mux", RT5670_PDM_OUT_CTRL,
1925 RT5670_M_PDM1_R_SFT, 1, &rt5670_pdm1_r_mux),
1926
1927 /* Output Lines */
1928 SND_SOC_DAPM_OUTPUT("HPOL"),
1929 SND_SOC_DAPM_OUTPUT("HPOR"),
1930 SND_SOC_DAPM_OUTPUT("LOUTL"),
1931 SND_SOC_DAPM_OUTPUT("LOUTR"),
1932 };
1933
1934 static const struct snd_soc_dapm_widget rt5670_specific_dapm_widgets[] = {
1935 SND_SOC_DAPM_SUPPLY("PDM2 Power", RT5670_PWR_DIG2,
1936 RT5670_PWR_PDM2_BIT, 0, NULL, 0),
1937 SND_SOC_DAPM_MUX("PDM2 L Mux", RT5670_PDM_OUT_CTRL,
1938 RT5670_M_PDM2_L_SFT, 1, &rt5670_pdm2_l_mux),
1939 SND_SOC_DAPM_MUX("PDM2 R Mux", RT5670_PDM_OUT_CTRL,
1940 RT5670_M_PDM2_R_SFT, 1, &rt5670_pdm2_r_mux),
1941 SND_SOC_DAPM_OUTPUT("PDM1L"),
1942 SND_SOC_DAPM_OUTPUT("PDM1R"),
1943 SND_SOC_DAPM_OUTPUT("PDM2L"),
1944 SND_SOC_DAPM_OUTPUT("PDM2R"),
1945 };
1946
1947 static const struct snd_soc_dapm_widget rt5672_specific_dapm_widgets[] = {
1948 SND_SOC_DAPM_PGA_E("SPO Amp", SND_SOC_NOPM, 0, 0, NULL, 0,
1949 rt5670_spk_event, SND_SOC_DAPM_PRE_PMD |
1950 SND_SOC_DAPM_POST_PMU),
1951 SND_SOC_DAPM_OUTPUT("SPOLP"),
1952 SND_SOC_DAPM_OUTPUT("SPOLN"),
1953 SND_SOC_DAPM_OUTPUT("SPORP"),
1954 SND_SOC_DAPM_OUTPUT("SPORN"),
1955 };
1956
1957 static const struct snd_soc_dapm_route rt5670_dapm_routes[] = {
1958 { "ADC Stereo1 Filter", NULL, "ADC STO1 ASRC", is_using_asrc },
1959 { "ADC Stereo2 Filter", NULL, "ADC STO2 ASRC", is_using_asrc },
1960 { "ADC Mono Left Filter", NULL, "ADC MONO L ASRC", is_using_asrc },
1961 { "ADC Mono Right Filter", NULL, "ADC MONO R ASRC", is_using_asrc },
1962 { "DAC Mono Left Filter", NULL, "DAC MONO L ASRC", is_using_asrc },
1963 { "DAC Mono Right Filter", NULL, "DAC MONO R ASRC", is_using_asrc },
1964 { "DAC Stereo1 Filter", NULL, "DAC STO ASRC", is_using_asrc },
1965 { "Stereo1 DMIC Mux", NULL, "DMIC STO1 ASRC", can_use_asrc },
1966 { "Stereo2 DMIC Mux", NULL, "DMIC STO2 ASRC", can_use_asrc },
1967 { "Mono DMIC L Mux", NULL, "DMIC MONO L ASRC", can_use_asrc },
1968 { "Mono DMIC R Mux", NULL, "DMIC MONO R ASRC", can_use_asrc },
1969
1970 { "I2S1", NULL, "I2S1 ASRC", can_use_asrc},
1971 { "I2S2", NULL, "I2S2 ASRC", can_use_asrc},
1972
1973 { "DMIC1", NULL, "DMIC L1" },
1974 { "DMIC1", NULL, "DMIC R1" },
1975 { "DMIC2", NULL, "DMIC L2" },
1976 { "DMIC2", NULL, "DMIC R2" },
1977 { "DMIC3", NULL, "DMIC L3" },
1978 { "DMIC3", NULL, "DMIC R3" },
1979
1980 { "BST1", NULL, "IN1P" },
1981 { "BST1", NULL, "IN1N" },
1982 { "BST1", NULL, "Mic Det Power" },
1983 { "BST2", NULL, "IN2P" },
1984 { "BST2", NULL, "IN2N" },
1985
1986 { "INL VOL", NULL, "IN2P" },
1987 { "INR VOL", NULL, "IN2N" },
1988
1989 { "RECMIXL", "INL Switch", "INL VOL" },
1990 { "RECMIXL", "BST2 Switch", "BST2" },
1991 { "RECMIXL", "BST1 Switch", "BST1" },
1992
1993 { "RECMIXR", "INR Switch", "INR VOL" },
1994 { "RECMIXR", "BST2 Switch", "BST2" },
1995 { "RECMIXR", "BST1 Switch", "BST1" },
1996
1997 { "ADC 1", NULL, "RECMIXL" },
1998 { "ADC 1", NULL, "ADC 1 power" },
1999 { "ADC 1", NULL, "ADC clock" },
2000 { "ADC 2", NULL, "RECMIXR" },
2001 { "ADC 2", NULL, "ADC 2 power" },
2002 { "ADC 2", NULL, "ADC clock" },
2003
2004 { "DMIC L1", NULL, "DMIC CLK" },
2005 { "DMIC L1", NULL, "DMIC1 Power" },
2006 { "DMIC R1", NULL, "DMIC CLK" },
2007 { "DMIC R1", NULL, "DMIC1 Power" },
2008 { "DMIC L2", NULL, "DMIC CLK" },
2009 { "DMIC L2", NULL, "DMIC2 Power" },
2010 { "DMIC R2", NULL, "DMIC CLK" },
2011 { "DMIC R2", NULL, "DMIC2 Power" },
2012 { "DMIC L3", NULL, "DMIC CLK" },
2013 { "DMIC L3", NULL, "DMIC3 Power" },
2014 { "DMIC R3", NULL, "DMIC CLK" },
2015 { "DMIC R3", NULL, "DMIC3 Power" },
2016
2017 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2018 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2019 { "Stereo1 DMIC Mux", "DMIC3", "DMIC3" },
2020
2021 { "Stereo2 DMIC Mux", "DMIC1", "DMIC1" },
2022 { "Stereo2 DMIC Mux", "DMIC2", "DMIC2" },
2023 { "Stereo2 DMIC Mux", "DMIC3", "DMIC3" },
2024
2025 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2026 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2027 { "Mono DMIC L Mux", "DMIC3", "DMIC L3" },
2028
2029 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2030 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2031 { "Mono DMIC R Mux", "DMIC3", "DMIC R3" },
2032
2033 { "ADC 1_2", NULL, "ADC 1" },
2034 { "ADC 1_2", NULL, "ADC 2" },
2035
2036 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2037 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2038 { "Stereo1 ADC L1 Mux", "ADC", "ADC 1_2" },
2039 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2040
2041 { "Stereo1 ADC R1 Mux", "ADC", "ADC 1_2" },
2042 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2043 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2044 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2045
2046 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2047 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2048 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2049 { "Mono ADC L1 Mux", "ADC1", "ADC 1" },
2050
2051 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2052 { "Mono ADC R1 Mux", "ADC2", "ADC 2" },
2053 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2054 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2055
2056 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2057 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2058 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2059 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2060
2061 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
2062 { "Stereo1 ADC MIXL", NULL, "ADC Stereo1 Filter" },
2063
2064 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
2065 { "Stereo1 ADC MIXR", NULL, "ADC Stereo1 Filter" },
2066 { "ADC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2067
2068 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2069 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2070 { "Mono ADC MIXL", NULL, "ADC Mono Left Filter" },
2071 { "ADC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2072
2073 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2074 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2075 { "Mono ADC MIXR", NULL, "ADC Mono Right Filter" },
2076 { "ADC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2077
2078 { "Stereo2 ADC L2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2079 { "Stereo2 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2080 { "Stereo2 ADC L1 Mux", "ADC", "ADC 1_2" },
2081 { "Stereo2 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2082
2083 { "Stereo2 ADC R1 Mux", "ADC", "ADC 1_2" },
2084 { "Stereo2 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2085 { "Stereo2 ADC R2 Mux", "DMIC", "Stereo2 DMIC Mux" },
2086 { "Stereo2 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2087
2088 { "Sto2 ADC MIXL", "ADC1 Switch", "Stereo2 ADC L1 Mux" },
2089 { "Sto2 ADC MIXL", "ADC2 Switch", "Stereo2 ADC L2 Mux" },
2090 { "Sto2 ADC MIXR", "ADC1 Switch", "Stereo2 ADC R1 Mux" },
2091 { "Sto2 ADC MIXR", "ADC2 Switch", "Stereo2 ADC R2 Mux" },
2092
2093 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXL" },
2094 { "Sto2 ADC LR MIX", NULL, "Sto2 ADC MIXR" },
2095
2096 { "Stereo2 ADC LR Mux", "L", "Sto2 ADC MIXL" },
2097 { "Stereo2 ADC LR Mux", "LR", "Sto2 ADC LR MIX" },
2098
2099 { "Stereo2 ADC MIXL", NULL, "Stereo2 ADC LR Mux" },
2100 { "Stereo2 ADC MIXL", NULL, "ADC Stereo2 Filter" },
2101
2102 { "Stereo2 ADC MIXR", NULL, "Sto2 ADC MIXR" },
2103 { "Stereo2 ADC MIXR", NULL, "ADC Stereo2 Filter" },
2104 { "ADC Stereo2 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2105
2106 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2107 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2108 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2109 { "VAD ADC Mux", "Sto2 ADC L", "Sto2 ADC MIXL" },
2110
2111 { "VAD_ADC", NULL, "VAD ADC Mux" },
2112
2113 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
2114 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
2115 { "IF_ADC2", NULL, "Mono ADC MIXL" },
2116 { "IF_ADC2", NULL, "Mono ADC MIXR" },
2117 { "IF_ADC3", NULL, "Stereo2 ADC MIXL" },
2118 { "IF_ADC3", NULL, "Stereo2 ADC MIXR" },
2119
2120 { "IF1 ADC1 IN1 Mux", "IF_ADC1", "IF_ADC1" },
2121 { "IF1 ADC1 IN1 Mux", "IF1_ADC3", "IF1_ADC3" },
2122
2123 { "IF1 ADC1 IN2 Mux", "IF1_ADC1_IN1", "IF1 ADC1 IN1 Mux" },
2124 { "IF1 ADC1 IN2 Mux", "IF1_ADC4", "TxDP_ADC" },
2125
2126 { "IF1 ADC2 IN Mux", "IF_ADC2", "IF_ADC2" },
2127 { "IF1 ADC2 IN Mux", "VAD_ADC", "VAD_ADC" },
2128
2129 { "IF1 ADC2 IN1 Mux", "IF1_ADC2_IN", "IF1 ADC2 IN Mux" },
2130 { "IF1 ADC2 IN1 Mux", "IF1_ADC4", "TxDP_ADC" },
2131
2132 { "IF1_ADC1" , NULL, "IF1 ADC1 IN2 Mux" },
2133 { "IF1_ADC2" , NULL, "IF1 ADC2 IN1 Mux" },
2134
2135 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXL" },
2136 { "Stereo1 ADC MIX", NULL, "Stereo1 ADC MIXR" },
2137 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXL" },
2138 { "Stereo2 ADC MIX", NULL, "Sto2 ADC MIXR" },
2139 { "Mono ADC MIX", NULL, "Mono ADC MIXL" },
2140 { "Mono ADC MIX", NULL, "Mono ADC MIXR" },
2141
2142 { "RxDP Mux", "IF2 DAC", "IF2 DAC" },
2143 { "RxDP Mux", "IF1 DAC", "IF1 DAC2" },
2144 { "RxDP Mux", "STO1 ADC Mixer", "Stereo1 ADC MIX" },
2145 { "RxDP Mux", "STO2 ADC Mixer", "Stereo2 ADC MIX" },
2146 { "RxDP Mux", "Mono ADC Mixer L", "Mono ADC MIXL" },
2147 { "RxDP Mux", "Mono ADC Mixer R", "Mono ADC MIXR" },
2148 { "RxDP Mux", "DAC1", "DAC MIX" },
2149
2150 { "TDM Data Mux", "Slot 0-1", "Stereo1 ADC MIX" },
2151 { "TDM Data Mux", "Slot 2-3", "Mono ADC MIX" },
2152 { "TDM Data Mux", "Slot 4-5", "Stereo2 ADC MIX" },
2153 { "TDM Data Mux", "Slot 6-7", "IF2 DAC" },
2154
2155 { "DSP UL Mux", "Bypass", "TDM Data Mux" },
2156 { "DSP UL Mux", NULL, "I2S DSP" },
2157 { "DSP DL Mux", "Bypass", "RxDP Mux" },
2158 { "DSP DL Mux", NULL, "I2S DSP" },
2159
2160 { "TxDP_ADC_L", NULL, "DSP UL Mux" },
2161 { "TxDP_ADC_R", NULL, "DSP UL Mux" },
2162 { "TxDC_DAC", NULL, "DSP DL Mux" },
2163
2164 { "TxDP_ADC", NULL, "TxDP_ADC_L" },
2165 { "TxDP_ADC", NULL, "TxDP_ADC_R" },
2166
2167 { "IF1 ADC", NULL, "I2S1" },
2168 { "IF1 ADC", NULL, "IF1_ADC1" },
2169 { "IF1 ADC", NULL, "IF1_ADC2" },
2170 { "IF1 ADC", NULL, "IF_ADC3" },
2171 { "IF1 ADC", NULL, "TxDP_ADC" },
2172
2173 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2174 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2175 { "IF2 ADC Mux", "IF_ADC3", "IF_ADC3" },
2176 { "IF2 ADC Mux", "TxDC_DAC", "TxDC_DAC" },
2177 { "IF2 ADC Mux", "TxDP_ADC", "TxDP_ADC" },
2178 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2179
2180 { "IF2 ADC L", NULL, "IF2 ADC Mux" },
2181 { "IF2 ADC R", NULL, "IF2 ADC Mux" },
2182
2183 { "IF2 ADC", NULL, "I2S2" },
2184 { "IF2 ADC", NULL, "IF2 ADC L" },
2185 { "IF2 ADC", NULL, "IF2 ADC R" },
2186
2187 { "AIF1TX", NULL, "IF1 ADC" },
2188 { "AIF2TX", NULL, "IF2 ADC" },
2189
2190 { "IF1 DAC1", NULL, "AIF1RX" },
2191 { "IF1 DAC2", NULL, "AIF1RX" },
2192 { "IF2 DAC", NULL, "AIF2RX" },
2193
2194 { "IF1 DAC1", NULL, "I2S1" },
2195 { "IF1 DAC2", NULL, "I2S1" },
2196 { "IF2 DAC", NULL, "I2S2" },
2197
2198 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
2199 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
2200 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
2201 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
2202 { "IF2 DAC L", NULL, "IF2 DAC" },
2203 { "IF2 DAC R", NULL, "IF2 DAC" },
2204
2205 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
2206 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2207
2208 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
2209 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2210
2211 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2212 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2213 { "DAC1 MIXL", NULL, "DAC Stereo1 Filter" },
2214 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2215 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2216 { "DAC1 MIXR", NULL, "DAC Stereo1 Filter" },
2217
2218 { "DAC Stereo1 Filter", NULL, "PLL1", is_sys_clk_from_pll },
2219 { "DAC Mono Left Filter", NULL, "PLL1", is_sys_clk_from_pll },
2220 { "DAC Mono Right Filter", NULL, "PLL1", is_sys_clk_from_pll },
2221
2222 { "DAC MIX", NULL, "DAC1 MIXL" },
2223 { "DAC MIX", NULL, "DAC1 MIXR" },
2224
2225 { "Audio DSP", NULL, "DAC1 MIXL" },
2226 { "Audio DSP", NULL, "DAC1 MIXR" },
2227
2228 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
2229 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2230 { "DAC L2 Mux", "TxDC DAC", "TxDC_DAC" },
2231 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2232 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
2233 { "DAC L2 Volume", NULL, "DAC Mono Left Filter" },
2234
2235 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
2236 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2237 { "DAC R2 Mux", "TxDC DAC", "TxDC_DAC" },
2238 { "DAC R2 Mux", "TxDP ADC", "TxDP_ADC" },
2239 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
2240 { "DAC R2 Volume", NULL, "DAC Mono Right Filter" },
2241
2242 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2243 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2244 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2245 { "Stereo DAC MIXL", NULL, "DAC Stereo1 Filter" },
2246 { "Stereo DAC MIXL", NULL, "DAC L1 Power" },
2247 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2248 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2249 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2250 { "Stereo DAC MIXR", NULL, "DAC Stereo1 Filter" },
2251 { "Stereo DAC MIXR", NULL, "DAC R1 Power" },
2252
2253 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2254 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2255 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2256 { "Mono DAC MIXL", NULL, "DAC Mono Left Filter" },
2257 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2258 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2259 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2260 { "Mono DAC MIXR", NULL, "DAC Mono Right Filter" },
2261
2262 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2263 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2264 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2265 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2266 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2267 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2268
2269 { "DAC L1", NULL, "DAC L1 Power" },
2270 { "DAC L1", NULL, "Stereo DAC MIXL" },
2271 { "DAC R1", NULL, "DAC R1 Power" },
2272 { "DAC R1", NULL, "Stereo DAC MIXR" },
2273 { "DAC L2", NULL, "Mono DAC MIXL" },
2274 { "DAC R2", NULL, "Mono DAC MIXR" },
2275
2276 { "OUT MIXL", "BST1 Switch", "BST1" },
2277 { "OUT MIXL", "INL Switch", "INL VOL" },
2278 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2279 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2280
2281 { "OUT MIXR", "BST2 Switch", "BST2" },
2282 { "OUT MIXR", "INR Switch", "INR VOL" },
2283 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2284 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2285
2286 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2287 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2288 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2289 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2290
2291 { "DAC 2", NULL, "DAC L2" },
2292 { "DAC 2", NULL, "DAC R2" },
2293 { "DAC 1", NULL, "DAC L1" },
2294 { "DAC 1", NULL, "DAC R1" },
2295 { "HPOVOL", NULL, "HPOVOL MIXL" },
2296 { "HPOVOL", NULL, "HPOVOL MIXR" },
2297 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2298 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2299
2300 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2301 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2302 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2303 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2304
2305 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2306 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2307 { "PDM1 L Mux", NULL, "PDM1 Power" },
2308 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2309 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2310 { "PDM1 R Mux", NULL, "PDM1 Power" },
2311
2312 { "HP Amp", NULL, "HPO MIX" },
2313 { "HP Amp", NULL, "Mic Det Power" },
2314 { "HPOL", NULL, "HP Amp" },
2315 { "HPOL", NULL, "HP L Amp" },
2316 { "HPOL", NULL, "Improve HP Amp Drv" },
2317 { "HPOR", NULL, "HP Amp" },
2318 { "HPOR", NULL, "HP R Amp" },
2319 { "HPOR", NULL, "Improve HP Amp Drv" },
2320
2321 { "LOUT Amp", NULL, "LOUT MIX" },
2322 { "LOUT L Playback", "Switch", "LOUT Amp" },
2323 { "LOUT R Playback", "Switch", "LOUT Amp" },
2324 { "LOUTL", NULL, "LOUT L Playback" },
2325 { "LOUTR", NULL, "LOUT R Playback" },
2326 { "LOUTL", NULL, "Improve HP Amp Drv" },
2327 { "LOUTR", NULL, "Improve HP Amp Drv" },
2328 };
2329
2330 static const struct snd_soc_dapm_route rt5670_specific_dapm_routes[] = {
2331 { "PDM2 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2332 { "PDM2 L Mux", "Mono DAC", "Mono DAC MIXL" },
2333 { "PDM2 L Mux", NULL, "PDM2 Power" },
2334 { "PDM2 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2335 { "PDM2 R Mux", "Mono DAC", "Mono DAC MIXR" },
2336 { "PDM2 R Mux", NULL, "PDM2 Power" },
2337 { "PDM1L", NULL, "PDM1 L Mux" },
2338 { "PDM1R", NULL, "PDM1 R Mux" },
2339 { "PDM2L", NULL, "PDM2 L Mux" },
2340 { "PDM2R", NULL, "PDM2 R Mux" },
2341 };
2342
2343 static const struct snd_soc_dapm_route rt5672_specific_dapm_routes[] = {
2344 { "SPO Amp", NULL, "PDM1 L Mux" },
2345 { "SPO Amp", NULL, "PDM1 R Mux" },
2346 { "SPOLP", NULL, "SPO Amp" },
2347 { "SPOLN", NULL, "SPO Amp" },
2348 { "SPORP", NULL, "SPO Amp" },
2349 { "SPORN", NULL, "SPO Amp" },
2350 };
2351
rt5670_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)2352 static int rt5670_hw_params(struct snd_pcm_substream *substream,
2353 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2354 {
2355 struct snd_soc_component *component = dai->component;
2356 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2357 unsigned int val_len = 0, val_clk, mask_clk;
2358 int pre_div, bclk_ms, frame_size;
2359
2360 rt5670->lrck[dai->id] = params_rate(params);
2361 pre_div = rl6231_get_clk_info(rt5670->sysclk, rt5670->lrck[dai->id]);
2362 if (pre_div < 0) {
2363 dev_err(component->dev, "Unsupported clock setting %d for DAI %d\n",
2364 rt5670->lrck[dai->id], dai->id);
2365 return -EINVAL;
2366 }
2367 frame_size = snd_soc_params_to_frame_size(params);
2368 if (frame_size < 0) {
2369 dev_err(component->dev, "Unsupported frame size: %d\n", frame_size);
2370 return -EINVAL;
2371 }
2372 bclk_ms = frame_size > 32;
2373 rt5670->bclk[dai->id] = rt5670->lrck[dai->id] * (32 << bclk_ms);
2374
2375 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
2376 rt5670->bclk[dai->id], rt5670->lrck[dai->id]);
2377 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
2378 bclk_ms, pre_div, dai->id);
2379
2380 switch (params_width(params)) {
2381 case 16:
2382 break;
2383 case 20:
2384 val_len |= RT5670_I2S_DL_20;
2385 break;
2386 case 24:
2387 val_len |= RT5670_I2S_DL_24;
2388 break;
2389 case 8:
2390 val_len |= RT5670_I2S_DL_8;
2391 break;
2392 default:
2393 return -EINVAL;
2394 }
2395
2396 switch (dai->id) {
2397 case RT5670_AIF1:
2398 mask_clk = RT5670_I2S_BCLK_MS1_MASK | RT5670_I2S_PD1_MASK;
2399 val_clk = bclk_ms << RT5670_I2S_BCLK_MS1_SFT |
2400 pre_div << RT5670_I2S_PD1_SFT;
2401 snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
2402 RT5670_I2S_DL_MASK, val_len);
2403 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
2404 break;
2405 case RT5670_AIF2:
2406 mask_clk = RT5670_I2S_BCLK_MS2_MASK | RT5670_I2S_PD2_MASK;
2407 val_clk = bclk_ms << RT5670_I2S_BCLK_MS2_SFT |
2408 pre_div << RT5670_I2S_PD2_SFT;
2409 snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
2410 RT5670_I2S_DL_MASK, val_len);
2411 snd_soc_component_update_bits(component, RT5670_ADDA_CLK1, mask_clk, val_clk);
2412 break;
2413 default:
2414 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2415 return -EINVAL;
2416 }
2417
2418 return 0;
2419 }
2420
rt5670_set_dai_fmt(struct snd_soc_dai * dai,unsigned int fmt)2421 static int rt5670_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
2422 {
2423 struct snd_soc_component *component = dai->component;
2424 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2425 unsigned int reg_val = 0;
2426
2427 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2428 case SND_SOC_DAIFMT_CBM_CFM:
2429 rt5670->master[dai->id] = 1;
2430 break;
2431 case SND_SOC_DAIFMT_CBS_CFS:
2432 reg_val |= RT5670_I2S_MS_S;
2433 rt5670->master[dai->id] = 0;
2434 break;
2435 default:
2436 return -EINVAL;
2437 }
2438
2439 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2440 case SND_SOC_DAIFMT_NB_NF:
2441 break;
2442 case SND_SOC_DAIFMT_IB_NF:
2443 reg_val |= RT5670_I2S_BP_INV;
2444 break;
2445 default:
2446 return -EINVAL;
2447 }
2448
2449 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
2450 case SND_SOC_DAIFMT_I2S:
2451 break;
2452 case SND_SOC_DAIFMT_LEFT_J:
2453 reg_val |= RT5670_I2S_DF_LEFT;
2454 break;
2455 case SND_SOC_DAIFMT_DSP_A:
2456 reg_val |= RT5670_I2S_DF_PCM_A;
2457 break;
2458 case SND_SOC_DAIFMT_DSP_B:
2459 reg_val |= RT5670_I2S_DF_PCM_B;
2460 break;
2461 default:
2462 return -EINVAL;
2463 }
2464
2465 switch (dai->id) {
2466 case RT5670_AIF1:
2467 snd_soc_component_update_bits(component, RT5670_I2S1_SDP,
2468 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2469 RT5670_I2S_DF_MASK, reg_val);
2470 break;
2471 case RT5670_AIF2:
2472 snd_soc_component_update_bits(component, RT5670_I2S2_SDP,
2473 RT5670_I2S_MS_MASK | RT5670_I2S_BP_MASK |
2474 RT5670_I2S_DF_MASK, reg_val);
2475 break;
2476 default:
2477 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2478 return -EINVAL;
2479 }
2480 return 0;
2481 }
2482
rt5670_set_codec_sysclk(struct snd_soc_component * component,int clk_id,int source,unsigned int freq,int dir)2483 static int rt5670_set_codec_sysclk(struct snd_soc_component *component, int clk_id,
2484 int source, unsigned int freq, int dir)
2485 {
2486 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2487 unsigned int reg_val = 0;
2488
2489 switch (clk_id) {
2490 case RT5670_SCLK_S_MCLK:
2491 reg_val |= RT5670_SCLK_SRC_MCLK;
2492 break;
2493 case RT5670_SCLK_S_PLL1:
2494 reg_val |= RT5670_SCLK_SRC_PLL1;
2495 break;
2496 case RT5670_SCLK_S_RCCLK:
2497 reg_val |= RT5670_SCLK_SRC_RCCLK;
2498 break;
2499 default:
2500 dev_err(component->dev, "Invalid clock id (%d)\n", clk_id);
2501 return -EINVAL;
2502 }
2503 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2504 RT5670_SCLK_SRC_MASK, reg_val);
2505 rt5670->sysclk = freq;
2506 if (clk_id != RT5670_SCLK_S_RCCLK)
2507 rt5670->sysclk_src = clk_id;
2508
2509 dev_dbg(component->dev, "Sysclk : %dHz clock id : %d\n", freq, clk_id);
2510
2511 return 0;
2512 }
2513
rt5670_set_dai_pll(struct snd_soc_dai * dai,int pll_id,int source,unsigned int freq_in,unsigned int freq_out)2514 static int rt5670_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2515 unsigned int freq_in, unsigned int freq_out)
2516 {
2517 struct snd_soc_component *component = dai->component;
2518 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2519 struct rl6231_pll_code pll_code;
2520 int ret;
2521
2522 if (source == rt5670->pll_src && freq_in == rt5670->pll_in &&
2523 freq_out == rt5670->pll_out)
2524 return 0;
2525
2526 if (!freq_in || !freq_out) {
2527 dev_dbg(component->dev, "PLL disabled\n");
2528
2529 rt5670->pll_in = 0;
2530 rt5670->pll_out = 0;
2531 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2532 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_MCLK);
2533 return 0;
2534 }
2535
2536 switch (source) {
2537 case RT5670_PLL1_S_MCLK:
2538 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2539 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_MCLK);
2540 break;
2541 case RT5670_PLL1_S_BCLK1:
2542 case RT5670_PLL1_S_BCLK2:
2543 case RT5670_PLL1_S_BCLK3:
2544 case RT5670_PLL1_S_BCLK4:
2545 switch (dai->id) {
2546 case RT5670_AIF1:
2547 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2548 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK1);
2549 break;
2550 case RT5670_AIF2:
2551 snd_soc_component_update_bits(component, RT5670_GLB_CLK,
2552 RT5670_PLL1_SRC_MASK, RT5670_PLL1_SRC_BCLK2);
2553 break;
2554 default:
2555 dev_err(component->dev, "Invalid dai->id: %d\n", dai->id);
2556 return -EINVAL;
2557 }
2558 break;
2559 default:
2560 dev_err(component->dev, "Unknown PLL source %d\n", source);
2561 return -EINVAL;
2562 }
2563
2564 ret = rl6231_pll_calc(freq_in, freq_out, &pll_code);
2565 if (ret < 0) {
2566 dev_err(component->dev, "Unsupport input clock %d\n", freq_in);
2567 return ret;
2568 }
2569
2570 dev_dbg(component->dev, "bypass=%d m=%d n=%d k=%d\n",
2571 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2572 pll_code.n_code, pll_code.k_code);
2573
2574 snd_soc_component_write(component, RT5670_PLL_CTRL1,
2575 pll_code.n_code << RT5670_PLL_N_SFT | pll_code.k_code);
2576 snd_soc_component_write(component, RT5670_PLL_CTRL2,
2577 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5670_PLL_M_SFT |
2578 pll_code.m_bp << RT5670_PLL_M_BP_SFT);
2579
2580 rt5670->pll_in = freq_in;
2581 rt5670->pll_out = freq_out;
2582 rt5670->pll_src = source;
2583
2584 return 0;
2585 }
2586
rt5670_set_tdm_slot(struct snd_soc_dai * dai,unsigned int tx_mask,unsigned int rx_mask,int slots,int slot_width)2587 static int rt5670_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2588 unsigned int rx_mask, int slots, int slot_width)
2589 {
2590 struct snd_soc_component *component = dai->component;
2591 unsigned int val = 0;
2592
2593 if (rx_mask || tx_mask)
2594 val |= (1 << 14);
2595
2596 switch (slots) {
2597 case 4:
2598 val |= (1 << 12);
2599 break;
2600 case 6:
2601 val |= (2 << 12);
2602 break;
2603 case 8:
2604 val |= (3 << 12);
2605 break;
2606 case 2:
2607 break;
2608 default:
2609 return -EINVAL;
2610 }
2611
2612 switch (slot_width) {
2613 case 20:
2614 val |= (1 << 10);
2615 break;
2616 case 24:
2617 val |= (2 << 10);
2618 break;
2619 case 32:
2620 val |= (3 << 10);
2621 break;
2622 case 16:
2623 break;
2624 default:
2625 return -EINVAL;
2626 }
2627
2628 snd_soc_component_update_bits(component, RT5670_TDM_CTRL_1, 0x7c00, val);
2629
2630 return 0;
2631 }
2632
rt5670_set_bclk_ratio(struct snd_soc_dai * dai,unsigned int ratio)2633 static int rt5670_set_bclk_ratio(struct snd_soc_dai *dai, unsigned int ratio)
2634 {
2635 struct snd_soc_component *component = dai->component;
2636
2637 dev_dbg(component->dev, "%s ratio=%d\n", __func__, ratio);
2638 if (dai->id != RT5670_AIF1)
2639 return 0;
2640
2641 if ((ratio % 50) == 0)
2642 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
2643 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_50FS);
2644 else
2645 snd_soc_component_update_bits(component, RT5670_GEN_CTRL3,
2646 RT5670_TDM_DATA_MODE_SEL, RT5670_TDM_DATA_MODE_NOR);
2647
2648 return 0;
2649 }
2650
rt5670_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)2651 static int rt5670_set_bias_level(struct snd_soc_component *component,
2652 enum snd_soc_bias_level level)
2653 {
2654 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2655
2656 switch (level) {
2657 case SND_SOC_BIAS_PREPARE:
2658 if (SND_SOC_BIAS_STANDBY == snd_soc_component_get_bias_level(component)) {
2659 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2660 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2661 RT5670_PWR_BG | RT5670_PWR_VREF2,
2662 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2663 RT5670_PWR_BG | RT5670_PWR_VREF2);
2664 mdelay(10);
2665 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2666 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2667 RT5670_PWR_FV1 | RT5670_PWR_FV2);
2668 snd_soc_component_update_bits(component, RT5670_CHARGE_PUMP,
2669 RT5670_OSW_L_MASK | RT5670_OSW_R_MASK,
2670 RT5670_OSW_L_DIS | RT5670_OSW_R_DIS);
2671 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x1);
2672 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2673 RT5670_LDO_SEL_MASK, 0x5);
2674 }
2675 break;
2676 case SND_SOC_BIAS_STANDBY:
2677 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2678 RT5670_PWR_VREF1 | RT5670_PWR_VREF2 |
2679 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2680 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2681 RT5670_LDO_SEL_MASK, 0x3);
2682 break;
2683 case SND_SOC_BIAS_OFF:
2684 if (rt5670->pdata.jd_mode)
2685 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2686 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2687 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2688 RT5670_PWR_FV1 | RT5670_PWR_FV2,
2689 RT5670_PWR_MB | RT5670_PWR_BG);
2690 else
2691 snd_soc_component_update_bits(component, RT5670_PWR_ANLG1,
2692 RT5670_PWR_VREF1 | RT5670_PWR_MB |
2693 RT5670_PWR_BG | RT5670_PWR_VREF2 |
2694 RT5670_PWR_FV1 | RT5670_PWR_FV2, 0);
2695
2696 snd_soc_component_update_bits(component, RT5670_DIG_MISC, 0x1, 0x0);
2697 break;
2698
2699 default:
2700 break;
2701 }
2702
2703 return 0;
2704 }
2705
rt5670_probe(struct snd_soc_component * component)2706 static int rt5670_probe(struct snd_soc_component *component)
2707 {
2708 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2709 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2710
2711 switch (snd_soc_component_read32(component, RT5670_RESET) & RT5670_ID_MASK) {
2712 case RT5670_ID_5670:
2713 case RT5670_ID_5671:
2714 snd_soc_dapm_new_controls(dapm,
2715 rt5670_specific_dapm_widgets,
2716 ARRAY_SIZE(rt5670_specific_dapm_widgets));
2717 snd_soc_dapm_add_routes(dapm,
2718 rt5670_specific_dapm_routes,
2719 ARRAY_SIZE(rt5670_specific_dapm_routes));
2720 break;
2721 case RT5670_ID_5672:
2722 snd_soc_dapm_new_controls(dapm,
2723 rt5672_specific_dapm_widgets,
2724 ARRAY_SIZE(rt5672_specific_dapm_widgets));
2725 snd_soc_dapm_add_routes(dapm,
2726 rt5672_specific_dapm_routes,
2727 ARRAY_SIZE(rt5672_specific_dapm_routes));
2728 break;
2729 default:
2730 dev_err(component->dev,
2731 "The driver is for RT5670 RT5671 or RT5672 only\n");
2732 return -ENODEV;
2733 }
2734 rt5670->component = component;
2735
2736 return 0;
2737 }
2738
rt5670_remove(struct snd_soc_component * component)2739 static void rt5670_remove(struct snd_soc_component *component)
2740 {
2741 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2742
2743 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2744 snd_soc_jack_free_gpios(rt5670->jack, 1, &rt5670->hp_gpio);
2745 }
2746
2747 #ifdef CONFIG_PM
rt5670_suspend(struct snd_soc_component * component)2748 static int rt5670_suspend(struct snd_soc_component *component)
2749 {
2750 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2751
2752 regcache_cache_only(rt5670->regmap, true);
2753 regcache_mark_dirty(rt5670->regmap);
2754 return 0;
2755 }
2756
rt5670_resume(struct snd_soc_component * component)2757 static int rt5670_resume(struct snd_soc_component *component)
2758 {
2759 struct rt5670_priv *rt5670 = snd_soc_component_get_drvdata(component);
2760
2761 regcache_cache_only(rt5670->regmap, false);
2762 regcache_sync(rt5670->regmap);
2763
2764 return 0;
2765 }
2766 #else
2767 #define rt5670_suspend NULL
2768 #define rt5670_resume NULL
2769 #endif
2770
2771 #define RT5670_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2772 #define RT5670_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2773 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2774
2775 static const struct snd_soc_dai_ops rt5670_aif_dai_ops = {
2776 .hw_params = rt5670_hw_params,
2777 .set_fmt = rt5670_set_dai_fmt,
2778 .set_tdm_slot = rt5670_set_tdm_slot,
2779 .set_pll = rt5670_set_dai_pll,
2780 .set_bclk_ratio = rt5670_set_bclk_ratio,
2781 };
2782
2783 static struct snd_soc_dai_driver rt5670_dai[] = {
2784 {
2785 .name = "rt5670-aif1",
2786 .id = RT5670_AIF1,
2787 .playback = {
2788 .stream_name = "AIF1 Playback",
2789 .channels_min = 1,
2790 .channels_max = 2,
2791 .rates = RT5670_STEREO_RATES,
2792 .formats = RT5670_FORMATS,
2793 },
2794 .capture = {
2795 .stream_name = "AIF1 Capture",
2796 .channels_min = 1,
2797 .channels_max = 2,
2798 .rates = RT5670_STEREO_RATES,
2799 .formats = RT5670_FORMATS,
2800 },
2801 .ops = &rt5670_aif_dai_ops,
2802 .symmetric_rates = 1,
2803 },
2804 {
2805 .name = "rt5670-aif2",
2806 .id = RT5670_AIF2,
2807 .playback = {
2808 .stream_name = "AIF2 Playback",
2809 .channels_min = 1,
2810 .channels_max = 2,
2811 .rates = RT5670_STEREO_RATES,
2812 .formats = RT5670_FORMATS,
2813 },
2814 .capture = {
2815 .stream_name = "AIF2 Capture",
2816 .channels_min = 1,
2817 .channels_max = 2,
2818 .rates = RT5670_STEREO_RATES,
2819 .formats = RT5670_FORMATS,
2820 },
2821 .ops = &rt5670_aif_dai_ops,
2822 .symmetric_rates = 1,
2823 },
2824 };
2825
2826 static const struct snd_soc_component_driver soc_component_dev_rt5670 = {
2827 .probe = rt5670_probe,
2828 .remove = rt5670_remove,
2829 .suspend = rt5670_suspend,
2830 .resume = rt5670_resume,
2831 .set_bias_level = rt5670_set_bias_level,
2832 .set_sysclk = rt5670_set_codec_sysclk,
2833 .controls = rt5670_snd_controls,
2834 .num_controls = ARRAY_SIZE(rt5670_snd_controls),
2835 .dapm_widgets = rt5670_dapm_widgets,
2836 .num_dapm_widgets = ARRAY_SIZE(rt5670_dapm_widgets),
2837 .dapm_routes = rt5670_dapm_routes,
2838 .num_dapm_routes = ARRAY_SIZE(rt5670_dapm_routes),
2839 .use_pmdown_time = 1,
2840 .endianness = 1,
2841 .non_legacy_dai_naming = 1,
2842 };
2843
2844 static const struct regmap_config rt5670_regmap = {
2845 .reg_bits = 8,
2846 .val_bits = 16,
2847 .use_single_rw = true,
2848 .max_register = RT5670_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5670_ranges) *
2849 RT5670_PR_SPACING),
2850 .volatile_reg = rt5670_volatile_register,
2851 .readable_reg = rt5670_readable_register,
2852 .cache_type = REGCACHE_RBTREE,
2853 .reg_defaults = rt5670_reg,
2854 .num_reg_defaults = ARRAY_SIZE(rt5670_reg),
2855 .ranges = rt5670_ranges,
2856 .num_ranges = ARRAY_SIZE(rt5670_ranges),
2857 };
2858
2859 static const struct i2c_device_id rt5670_i2c_id[] = {
2860 { "rt5670", 0 },
2861 { "rt5671", 0 },
2862 { "rt5672", 0 },
2863 { }
2864 };
2865 MODULE_DEVICE_TABLE(i2c, rt5670_i2c_id);
2866
2867 #ifdef CONFIG_ACPI
2868 static const struct acpi_device_id rt5670_acpi_match[] = {
2869 { "10EC5670", 0},
2870 { "10EC5672", 0},
2871 { "10EC5640", 0}, /* quirk */
2872 { },
2873 };
2874 MODULE_DEVICE_TABLE(acpi, rt5670_acpi_match);
2875 #endif
2876
rt5670_quirk_cb(const struct dmi_system_id * id)2877 static int rt5670_quirk_cb(const struct dmi_system_id *id)
2878 {
2879 rt5670_quirk = (unsigned long)id->driver_data;
2880 return 1;
2881 }
2882
2883 static const struct dmi_system_id dmi_platform_intel_quirks[] = {
2884 {
2885 .callback = rt5670_quirk_cb,
2886 .ident = "Intel Braswell",
2887 .matches = {
2888 DMI_MATCH(DMI_SYS_VENDOR, "Intel Corporation"),
2889 DMI_MATCH(DMI_BOARD_NAME, "Braswell CRB"),
2890 },
2891 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2892 RT5670_DMIC1_IN2P |
2893 RT5670_DEV_GPIO |
2894 RT5670_JD_MODE1),
2895 },
2896 {
2897 .callback = rt5670_quirk_cb,
2898 .ident = "Dell Wyse 3040",
2899 .matches = {
2900 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2901 DMI_MATCH(DMI_PRODUCT_NAME, "Wyse 3040"),
2902 },
2903 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2904 RT5670_DMIC1_IN2P |
2905 RT5670_DEV_GPIO |
2906 RT5670_JD_MODE1),
2907 },
2908 {
2909 .callback = rt5670_quirk_cb,
2910 .ident = "Lenovo Thinkpad Tablet 10",
2911 .matches = {
2912 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2913 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad 10"),
2914 },
2915 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2916 RT5670_DMIC1_IN2P |
2917 RT5670_DEV_GPIO |
2918 RT5670_JD_MODE1),
2919 },
2920 {
2921 .callback = rt5670_quirk_cb,
2922 .ident = "Lenovo Thinkpad Tablet 10",
2923 .matches = {
2924 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2925 DMI_MATCH(DMI_PRODUCT_VERSION, "ThinkPad Tablet B"),
2926 },
2927 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2928 RT5670_DMIC1_IN2P |
2929 RT5670_DEV_GPIO |
2930 RT5670_JD_MODE1),
2931 },
2932 {
2933 .callback = rt5670_quirk_cb,
2934 .ident = "Lenovo Miix 2 10",
2935 .matches = {
2936 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
2937 DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo Miix 2 10"),
2938 },
2939 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2940 RT5670_DMIC1_IN2P |
2941 RT5670_GPIO1_IS_EXT_SPK_EN |
2942 RT5670_JD_MODE2),
2943 },
2944 {
2945 .callback = rt5670_quirk_cb,
2946 .ident = "Dell Venue 8 Pro 5855",
2947 .matches = {
2948 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
2949 DMI_MATCH(DMI_PRODUCT_NAME, "Venue 8 Pro 5855"),
2950 },
2951 .driver_data = (unsigned long *)(RT5670_DMIC_EN |
2952 RT5670_DMIC2_INR |
2953 RT5670_DEV_GPIO |
2954 RT5670_JD_MODE3),
2955 },
2956 {}
2957 };
2958
rt5670_i2c_probe(struct i2c_client * i2c,const struct i2c_device_id * id)2959 static int rt5670_i2c_probe(struct i2c_client *i2c,
2960 const struct i2c_device_id *id)
2961 {
2962 struct rt5670_platform_data *pdata = dev_get_platdata(&i2c->dev);
2963 struct rt5670_priv *rt5670;
2964 int ret;
2965 unsigned int val;
2966
2967 rt5670 = devm_kzalloc(&i2c->dev,
2968 sizeof(struct rt5670_priv),
2969 GFP_KERNEL);
2970 if (NULL == rt5670)
2971 return -ENOMEM;
2972
2973 i2c_set_clientdata(i2c, rt5670);
2974
2975 if (pdata)
2976 rt5670->pdata = *pdata;
2977
2978 dmi_check_system(dmi_platform_intel_quirks);
2979 if (quirk_override) {
2980 dev_info(&i2c->dev, "Overriding quirk 0x%x => 0x%x\n",
2981 (unsigned int)rt5670_quirk, quirk_override);
2982 rt5670_quirk = quirk_override;
2983 }
2984
2985 if (rt5670_quirk & RT5670_DEV_GPIO) {
2986 rt5670->pdata.dev_gpio = true;
2987 dev_info(&i2c->dev, "quirk dev_gpio\n");
2988 }
2989 if (rt5670_quirk & RT5670_GPIO1_IS_EXT_SPK_EN) {
2990 rt5670->pdata.gpio1_is_ext_spk_en = true;
2991 dev_info(&i2c->dev, "quirk GPIO1 is external speaker enable\n");
2992 }
2993 if (rt5670_quirk & RT5670_IN2_DIFF) {
2994 rt5670->pdata.in2_diff = true;
2995 dev_info(&i2c->dev, "quirk IN2_DIFF\n");
2996 }
2997 if (rt5670_quirk & RT5670_DMIC_EN) {
2998 rt5670->pdata.dmic_en = true;
2999 dev_info(&i2c->dev, "quirk DMIC enabled\n");
3000 }
3001 if (rt5670_quirk & RT5670_DMIC1_IN2P) {
3002 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_IN2P;
3003 dev_info(&i2c->dev, "quirk DMIC1 on IN2P pin\n");
3004 }
3005 if (rt5670_quirk & RT5670_DMIC1_GPIO6) {
3006 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_GPIO6;
3007 dev_info(&i2c->dev, "quirk DMIC1 on GPIO6 pin\n");
3008 }
3009 if (rt5670_quirk & RT5670_DMIC1_GPIO7) {
3010 rt5670->pdata.dmic1_data_pin = RT5670_DMIC_DATA_GPIO7;
3011 dev_info(&i2c->dev, "quirk DMIC1 on GPIO7 pin\n");
3012 }
3013 if (rt5670_quirk & RT5670_DMIC2_INR) {
3014 rt5670->pdata.dmic2_data_pin = RT5670_DMIC_DATA_IN3N;
3015 dev_info(&i2c->dev, "quirk DMIC2 on INR pin\n");
3016 }
3017 if (rt5670_quirk & RT5670_DMIC2_GPIO8) {
3018 rt5670->pdata.dmic2_data_pin = RT5670_DMIC_DATA_GPIO8;
3019 dev_info(&i2c->dev, "quirk DMIC2 on GPIO8 pin\n");
3020 }
3021 if (rt5670_quirk & RT5670_DMIC3_GPIO5) {
3022 rt5670->pdata.dmic3_data_pin = RT5670_DMIC_DATA_GPIO5;
3023 dev_info(&i2c->dev, "quirk DMIC3 on GPIO5 pin\n");
3024 }
3025
3026 if (rt5670_quirk & RT5670_JD_MODE1) {
3027 rt5670->pdata.jd_mode = 1;
3028 dev_info(&i2c->dev, "quirk JD mode 1\n");
3029 }
3030 if (rt5670_quirk & RT5670_JD_MODE2) {
3031 rt5670->pdata.jd_mode = 2;
3032 dev_info(&i2c->dev, "quirk JD mode 2\n");
3033 }
3034 if (rt5670_quirk & RT5670_JD_MODE3) {
3035 rt5670->pdata.jd_mode = 3;
3036 dev_info(&i2c->dev, "quirk JD mode 3\n");
3037 }
3038
3039 rt5670->regmap = devm_regmap_init_i2c(i2c, &rt5670_regmap);
3040 if (IS_ERR(rt5670->regmap)) {
3041 ret = PTR_ERR(rt5670->regmap);
3042 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
3043 ret);
3044 return ret;
3045 }
3046
3047 regmap_read(rt5670->regmap, RT5670_VENDOR_ID2, &val);
3048 if (val != RT5670_DEVICE_ID) {
3049 dev_err(&i2c->dev,
3050 "Device with ID register %#x is not rt5670/72\n", val);
3051 return -ENODEV;
3052 }
3053
3054 regmap_write(rt5670->regmap, RT5670_RESET, 0);
3055 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
3056 RT5670_PWR_HP_L | RT5670_PWR_HP_R |
3057 RT5670_PWR_VREF2, RT5670_PWR_VREF2);
3058 msleep(100);
3059
3060 regmap_write(rt5670->regmap, RT5670_RESET, 0);
3061
3062 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
3063 if (val >= 4)
3064 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
3065 else
3066 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
3067
3068 ret = regmap_register_patch(rt5670->regmap, init_list,
3069 ARRAY_SIZE(init_list));
3070 if (ret != 0)
3071 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
3072
3073 regmap_update_bits(rt5670->regmap, RT5670_DIG_MISC,
3074 RT5670_MCLK_DET, RT5670_MCLK_DET);
3075
3076 if (rt5670->pdata.in2_diff)
3077 regmap_update_bits(rt5670->regmap, RT5670_IN2,
3078 RT5670_IN_DF2, RT5670_IN_DF2);
3079
3080 if (rt5670->pdata.dev_gpio) {
3081 /* for push button */
3082 regmap_write(rt5670->regmap, RT5670_IL_CMD, 0x0000);
3083 regmap_write(rt5670->regmap, RT5670_IL_CMD2, 0x0010);
3084 regmap_write(rt5670->regmap, RT5670_IL_CMD3, 0x0014);
3085 /* for irq */
3086 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3087 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_IRQ);
3088 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
3089 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
3090 }
3091
3092 if (rt5670->pdata.gpio1_is_ext_spk_en) {
3093 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3094 RT5670_GP1_PIN_MASK, RT5670_GP1_PIN_GPIO1);
3095 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL2,
3096 RT5670_GP1_PF_MASK, RT5670_GP1_PF_OUT);
3097 }
3098
3099 if (rt5670->pdata.jd_mode) {
3100 regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
3101 RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
3102 rt5670->sysclk = 0;
3103 rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
3104 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
3105 RT5670_PWR_MB, RT5670_PWR_MB);
3106 regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,
3107 RT5670_PWR_JD1, RT5670_PWR_JD1);
3108 regmap_update_bits(rt5670->regmap, RT5670_IRQ_CTRL1,
3109 RT5670_JD1_1_EN_MASK, RT5670_JD1_1_EN);
3110 regmap_update_bits(rt5670->regmap, RT5670_JD_CTRL3,
3111 RT5670_JD_TRI_CBJ_SEL_MASK |
3112 RT5670_JD_TRI_HPO_SEL_MASK,
3113 RT5670_JD_CBJ_JD1_1 | RT5670_JD_HPO_JD1_1);
3114 switch (rt5670->pdata.jd_mode) {
3115 case 1:
3116 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3117 RT5670_JD1_MODE_MASK,
3118 RT5670_JD1_MODE_0);
3119 break;
3120 case 2:
3121 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3122 RT5670_JD1_MODE_MASK,
3123 RT5670_JD1_MODE_1);
3124 break;
3125 case 3:
3126 regmap_update_bits(rt5670->regmap, RT5670_A_JD_CTRL1,
3127 RT5670_JD1_MODE_MASK,
3128 RT5670_JD1_MODE_2);
3129 break;
3130 default:
3131 break;
3132 }
3133 }
3134
3135 if (rt5670->pdata.dmic_en) {
3136 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3137 RT5670_GP2_PIN_MASK,
3138 RT5670_GP2_PIN_DMIC1_SCL);
3139
3140 switch (rt5670->pdata.dmic1_data_pin) {
3141 case RT5670_DMIC_DATA_IN2P:
3142 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3143 RT5670_DMIC_1_DP_MASK,
3144 RT5670_DMIC_1_DP_IN2P);
3145 break;
3146
3147 case RT5670_DMIC_DATA_GPIO6:
3148 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3149 RT5670_DMIC_1_DP_MASK,
3150 RT5670_DMIC_1_DP_GPIO6);
3151 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3152 RT5670_GP6_PIN_MASK,
3153 RT5670_GP6_PIN_DMIC1_SDA);
3154 break;
3155
3156 case RT5670_DMIC_DATA_GPIO7:
3157 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3158 RT5670_DMIC_1_DP_MASK,
3159 RT5670_DMIC_1_DP_GPIO7);
3160 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3161 RT5670_GP7_PIN_MASK,
3162 RT5670_GP7_PIN_DMIC1_SDA);
3163 break;
3164
3165 default:
3166 break;
3167 }
3168
3169 switch (rt5670->pdata.dmic2_data_pin) {
3170 case RT5670_DMIC_DATA_IN3N:
3171 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3172 RT5670_DMIC_2_DP_MASK,
3173 RT5670_DMIC_2_DP_IN3N);
3174 break;
3175
3176 case RT5670_DMIC_DATA_GPIO8:
3177 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL1,
3178 RT5670_DMIC_2_DP_MASK,
3179 RT5670_DMIC_2_DP_GPIO8);
3180 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3181 RT5670_GP8_PIN_MASK,
3182 RT5670_GP8_PIN_DMIC2_SDA);
3183 break;
3184
3185 default:
3186 break;
3187 }
3188
3189 switch (rt5670->pdata.dmic3_data_pin) {
3190 case RT5670_DMIC_DATA_GPIO5:
3191 regmap_update_bits(rt5670->regmap, RT5670_DMIC_CTRL2,
3192 RT5670_DMIC_3_DP_MASK,
3193 RT5670_DMIC_3_DP_GPIO5);
3194 regmap_update_bits(rt5670->regmap, RT5670_GPIO_CTRL1,
3195 RT5670_GP5_PIN_MASK,
3196 RT5670_GP5_PIN_DMIC3_SDA);
3197 break;
3198
3199 case RT5670_DMIC_DATA_GPIO9:
3200 case RT5670_DMIC_DATA_GPIO10:
3201 dev_err(&i2c->dev,
3202 "Always use GPIO5 as DMIC3 data pin\n");
3203 break;
3204
3205 default:
3206 break;
3207 }
3208
3209 }
3210
3211 pm_runtime_enable(&i2c->dev);
3212 pm_request_idle(&i2c->dev);
3213
3214 ret = devm_snd_soc_register_component(&i2c->dev,
3215 &soc_component_dev_rt5670,
3216 rt5670_dai, ARRAY_SIZE(rt5670_dai));
3217 if (ret < 0)
3218 goto err;
3219
3220 pm_runtime_put(&i2c->dev);
3221
3222 return 0;
3223 err:
3224 pm_runtime_disable(&i2c->dev);
3225
3226 return ret;
3227 }
3228
rt5670_i2c_remove(struct i2c_client * i2c)3229 static int rt5670_i2c_remove(struct i2c_client *i2c)
3230 {
3231 pm_runtime_disable(&i2c->dev);
3232
3233 return 0;
3234 }
3235
3236 static struct i2c_driver rt5670_i2c_driver = {
3237 .driver = {
3238 .name = "rt5670",
3239 .acpi_match_table = ACPI_PTR(rt5670_acpi_match),
3240 },
3241 .probe = rt5670_i2c_probe,
3242 .remove = rt5670_i2c_remove,
3243 .id_table = rt5670_i2c_id,
3244 };
3245
3246 module_i2c_driver(rt5670_i2c_driver);
3247
3248 MODULE_DESCRIPTION("ASoC RT5670 driver");
3249 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3250 MODULE_LICENSE("GPL v2");
3251