1 /*
2 * Generic TXx9 ACLC platform driver
3 *
4 * Copyright (C) 2009 Atsushi Nemoto
5 *
6 * Based on RBTX49xx patch from CELF patch archive.
7 * (C) Copyright TOSHIBA CORPORATION 2004-2006
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/platform_device.h>
17 #include <linux/scatterlist.h>
18 #include <linux/slab.h>
19 #include <linux/dmaengine.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/soc.h>
24 #include "txx9aclc.h"
25
26 #define DRV_NAME "txx9aclc"
27
28 static struct txx9aclc_soc_device {
29 struct txx9aclc_dmadata dmadata[2];
30 } txx9aclc_soc_device;
31
32 /* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
33 static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
34
35 static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
36 struct txx9aclc_dmadata *dmadata);
37
38 static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
39 /*
40 * REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
41 * needs more works for noncoherent MIPS.
42 */
43 .info = SNDRV_PCM_INFO_INTERLEAVED |
44 SNDRV_PCM_INFO_BATCH |
45 SNDRV_PCM_INFO_PAUSE,
46 .period_bytes_min = 1024,
47 .period_bytes_max = 8 * 1024,
48 .periods_min = 2,
49 .periods_max = 4096,
50 .buffer_bytes_max = 32 * 1024,
51 };
52
txx9aclc_pcm_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)53 static int txx9aclc_pcm_hw_params(struct snd_pcm_substream *substream,
54 struct snd_pcm_hw_params *params)
55 {
56 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
57 struct snd_pcm_runtime *runtime = substream->runtime;
58 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
59 struct txx9aclc_dmadata *dmadata = runtime->private_data;
60 int ret;
61
62 ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
63 if (ret < 0)
64 return ret;
65
66 dev_dbg(component->dev,
67 "runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
68 "runtime->min_align %ld\n",
69 (unsigned long)runtime->dma_area,
70 (unsigned long)runtime->dma_addr, runtime->dma_bytes,
71 runtime->min_align);
72 dev_dbg(component->dev,
73 "periods %d period_bytes %d stream %d\n",
74 params_periods(params), params_period_bytes(params),
75 substream->stream);
76
77 dmadata->substream = substream;
78 dmadata->pos = 0;
79 return 0;
80 }
81
txx9aclc_pcm_hw_free(struct snd_pcm_substream * substream)82 static int txx9aclc_pcm_hw_free(struct snd_pcm_substream *substream)
83 {
84 return snd_pcm_lib_free_pages(substream);
85 }
86
txx9aclc_pcm_prepare(struct snd_pcm_substream * substream)87 static int txx9aclc_pcm_prepare(struct snd_pcm_substream *substream)
88 {
89 struct snd_pcm_runtime *runtime = substream->runtime;
90 struct txx9aclc_dmadata *dmadata = runtime->private_data;
91
92 dmadata->dma_addr = runtime->dma_addr;
93 dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
94 dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
95
96 if (dmadata->buffer_bytes == dmadata->period_bytes) {
97 dmadata->frag_bytes = dmadata->period_bytes >> 1;
98 dmadata->frags = 2;
99 } else {
100 dmadata->frag_bytes = dmadata->period_bytes;
101 dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
102 }
103 dmadata->frag_count = 0;
104 dmadata->pos = 0;
105 return 0;
106 }
107
txx9aclc_dma_complete(void * arg)108 static void txx9aclc_dma_complete(void *arg)
109 {
110 struct txx9aclc_dmadata *dmadata = arg;
111 unsigned long flags;
112
113 /* dma completion handler cannot submit new operations */
114 spin_lock_irqsave(&dmadata->dma_lock, flags);
115 if (dmadata->frag_count >= 0) {
116 dmadata->dmacount--;
117 if (!WARN_ON(dmadata->dmacount < 0))
118 tasklet_schedule(&dmadata->tasklet);
119 }
120 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
121 }
122
123 static struct dma_async_tx_descriptor *
txx9aclc_dma_submit(struct txx9aclc_dmadata * dmadata,dma_addr_t buf_dma_addr)124 txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
125 {
126 struct dma_chan *chan = dmadata->dma_chan;
127 struct dma_async_tx_descriptor *desc;
128 struct scatterlist sg;
129
130 sg_init_table(&sg, 1);
131 sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
132 dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
133 sg_dma_address(&sg) = buf_dma_addr;
134 desc = dmaengine_prep_slave_sg(chan, &sg, 1,
135 dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
136 DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
137 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
138 if (!desc) {
139 dev_err(&chan->dev->device, "cannot prepare slave dma\n");
140 return NULL;
141 }
142 desc->callback = txx9aclc_dma_complete;
143 desc->callback_param = dmadata;
144 dmaengine_submit(desc);
145 return desc;
146 }
147
148 #define NR_DMA_CHAIN 2
149
txx9aclc_dma_tasklet(unsigned long data)150 static void txx9aclc_dma_tasklet(unsigned long data)
151 {
152 struct txx9aclc_dmadata *dmadata = (struct txx9aclc_dmadata *)data;
153 struct dma_chan *chan = dmadata->dma_chan;
154 struct dma_async_tx_descriptor *desc;
155 struct snd_pcm_substream *substream = dmadata->substream;
156 u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
157 ACCTL_AUDODMA : ACCTL_AUDIDMA;
158 int i;
159 unsigned long flags;
160
161 spin_lock_irqsave(&dmadata->dma_lock, flags);
162 if (dmadata->frag_count < 0) {
163 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
164 void __iomem *base = drvdata->base;
165
166 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
167 dmaengine_terminate_all(chan);
168 /* first time */
169 for (i = 0; i < NR_DMA_CHAIN; i++) {
170 desc = txx9aclc_dma_submit(dmadata,
171 dmadata->dma_addr + i * dmadata->frag_bytes);
172 if (!desc)
173 return;
174 }
175 dmadata->dmacount = NR_DMA_CHAIN;
176 dma_async_issue_pending(chan);
177 spin_lock_irqsave(&dmadata->dma_lock, flags);
178 __raw_writel(ctlbit, base + ACCTLEN);
179 dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
180 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
181 return;
182 }
183 if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
184 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
185 return;
186 }
187 while (dmadata->dmacount < NR_DMA_CHAIN) {
188 dmadata->dmacount++;
189 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
190 desc = txx9aclc_dma_submit(dmadata,
191 dmadata->dma_addr +
192 dmadata->frag_count * dmadata->frag_bytes);
193 if (!desc)
194 return;
195 dma_async_issue_pending(chan);
196
197 spin_lock_irqsave(&dmadata->dma_lock, flags);
198 dmadata->frag_count++;
199 dmadata->frag_count %= dmadata->frags;
200 dmadata->pos += dmadata->frag_bytes;
201 dmadata->pos %= dmadata->buffer_bytes;
202 if ((dmadata->frag_count * dmadata->frag_bytes) %
203 dmadata->period_bytes == 0)
204 snd_pcm_period_elapsed(substream);
205 }
206 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
207 }
208
txx9aclc_pcm_trigger(struct snd_pcm_substream * substream,int cmd)209 static int txx9aclc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
210 {
211 struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
212 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
213 void __iomem *base = drvdata->base;
214 unsigned long flags;
215 int ret = 0;
216 u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
217 ACCTL_AUDODMA : ACCTL_AUDIDMA;
218
219 spin_lock_irqsave(&dmadata->dma_lock, flags);
220 switch (cmd) {
221 case SNDRV_PCM_TRIGGER_START:
222 dmadata->frag_count = -1;
223 tasklet_schedule(&dmadata->tasklet);
224 break;
225 case SNDRV_PCM_TRIGGER_STOP:
226 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
227 case SNDRV_PCM_TRIGGER_SUSPEND:
228 __raw_writel(ctlbit, base + ACCTLDIS);
229 break;
230 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
231 case SNDRV_PCM_TRIGGER_RESUME:
232 __raw_writel(ctlbit, base + ACCTLEN);
233 break;
234 default:
235 ret = -EINVAL;
236 }
237 spin_unlock_irqrestore(&dmadata->dma_lock, flags);
238 return ret;
239 }
240
241 static snd_pcm_uframes_t
txx9aclc_pcm_pointer(struct snd_pcm_substream * substream)242 txx9aclc_pcm_pointer(struct snd_pcm_substream *substream)
243 {
244 struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
245
246 return bytes_to_frames(substream->runtime, dmadata->pos);
247 }
248
txx9aclc_pcm_open(struct snd_pcm_substream * substream)249 static int txx9aclc_pcm_open(struct snd_pcm_substream *substream)
250 {
251 struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
252 struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
253 int ret;
254
255 ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
256 if (ret)
257 return ret;
258 /* ensure that buffer size is a multiple of period size */
259 ret = snd_pcm_hw_constraint_integer(substream->runtime,
260 SNDRV_PCM_HW_PARAM_PERIODS);
261 if (ret < 0)
262 return ret;
263 substream->runtime->private_data = dmadata;
264 return 0;
265 }
266
txx9aclc_pcm_close(struct snd_pcm_substream * substream)267 static int txx9aclc_pcm_close(struct snd_pcm_substream *substream)
268 {
269 struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
270 struct dma_chan *chan = dmadata->dma_chan;
271
272 dmadata->frag_count = -1;
273 dmaengine_terminate_all(chan);
274 return 0;
275 }
276
277 static const struct snd_pcm_ops txx9aclc_pcm_ops = {
278 .open = txx9aclc_pcm_open,
279 .close = txx9aclc_pcm_close,
280 .ioctl = snd_pcm_lib_ioctl,
281 .hw_params = txx9aclc_pcm_hw_params,
282 .hw_free = txx9aclc_pcm_hw_free,
283 .prepare = txx9aclc_pcm_prepare,
284 .trigger = txx9aclc_pcm_trigger,
285 .pointer = txx9aclc_pcm_pointer,
286 };
287
txx9aclc_pcm_new(struct snd_soc_pcm_runtime * rtd)288 static int txx9aclc_pcm_new(struct snd_soc_pcm_runtime *rtd)
289 {
290 struct snd_card *card = rtd->card->snd_card;
291 struct snd_soc_dai *dai = rtd->cpu_dai;
292 struct snd_pcm *pcm = rtd->pcm;
293 struct snd_soc_component *component = snd_soc_rtdcom_lookup(rtd, DRV_NAME);
294 struct platform_device *pdev = to_platform_device(component->dev);
295 struct txx9aclc_soc_device *dev;
296 struct resource *r;
297 int i;
298 int ret;
299
300 /* at this point onwards the AC97 component has probed and this will be valid */
301 dev = snd_soc_dai_get_drvdata(dai);
302
303 dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
304 dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
305 for (i = 0; i < 2; i++) {
306 r = platform_get_resource(pdev, IORESOURCE_DMA, i);
307 if (!r) {
308 ret = -EBUSY;
309 goto exit;
310 }
311 dev->dmadata[i].dma_res = r;
312 ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
313 if (ret)
314 goto exit;
315 }
316 return snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
317 card->dev, 64 * 1024, 4 * 1024 * 1024);
318
319 exit:
320 for (i = 0; i < 2; i++) {
321 if (dev->dmadata[i].dma_chan)
322 dma_release_channel(dev->dmadata[i].dma_chan);
323 dev->dmadata[i].dma_chan = NULL;
324 }
325 return ret;
326 }
327
filter(struct dma_chan * chan,void * param)328 static bool filter(struct dma_chan *chan, void *param)
329 {
330 struct txx9aclc_dmadata *dmadata = param;
331 char *devname;
332 bool found = false;
333
334 devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
335 (int)dmadata->dma_res->start);
336 if (strcmp(dev_name(chan->device->dev), devname) == 0) {
337 chan->private = &dmadata->dma_slave;
338 found = true;
339 }
340 kfree(devname);
341 return found;
342 }
343
txx9aclc_dma_init(struct txx9aclc_soc_device * dev,struct txx9aclc_dmadata * dmadata)344 static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
345 struct txx9aclc_dmadata *dmadata)
346 {
347 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
348 struct txx9dmac_slave *ds = &dmadata->dma_slave;
349 dma_cap_mask_t mask;
350
351 spin_lock_init(&dmadata->dma_lock);
352
353 ds->reg_width = sizeof(u32);
354 if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
355 ds->tx_reg = drvdata->physbase + ACAUDODAT;
356 ds->rx_reg = 0;
357 } else {
358 ds->tx_reg = 0;
359 ds->rx_reg = drvdata->physbase + ACAUDIDAT;
360 }
361
362 /* Try to grab a DMA channel */
363 dma_cap_zero(mask);
364 dma_cap_set(DMA_SLAVE, mask);
365 dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
366 if (!dmadata->dma_chan) {
367 printk(KERN_ERR
368 "DMA channel for %s is not available\n",
369 dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
370 "playback" : "capture");
371 return -EBUSY;
372 }
373 tasklet_init(&dmadata->tasklet, txx9aclc_dma_tasklet,
374 (unsigned long)dmadata);
375 return 0;
376 }
377
txx9aclc_pcm_probe(struct snd_soc_component * component)378 static int txx9aclc_pcm_probe(struct snd_soc_component *component)
379 {
380 snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
381 return 0;
382 }
383
txx9aclc_pcm_remove(struct snd_soc_component * component)384 static void txx9aclc_pcm_remove(struct snd_soc_component *component)
385 {
386 struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
387 struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
388 void __iomem *base = drvdata->base;
389 int i;
390
391 /* disable all FIFO DMAs */
392 __raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
393 /* dummy R/W to clear pending DMAREQ if any */
394 __raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
395
396 for (i = 0; i < 2; i++) {
397 struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
398 struct dma_chan *chan = dmadata->dma_chan;
399
400 if (chan) {
401 dmadata->frag_count = -1;
402 dmaengine_terminate_all(chan);
403 dma_release_channel(chan);
404 }
405 dev->dmadata[i].dma_chan = NULL;
406 }
407 }
408
409 static const struct snd_soc_component_driver txx9aclc_soc_component = {
410 .name = DRV_NAME,
411 .probe = txx9aclc_pcm_probe,
412 .remove = txx9aclc_pcm_remove,
413 .ops = &txx9aclc_pcm_ops,
414 .pcm_new = txx9aclc_pcm_new,
415 };
416
txx9aclc_soc_platform_probe(struct platform_device * pdev)417 static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
418 {
419 return devm_snd_soc_register_component(&pdev->dev,
420 &txx9aclc_soc_component, NULL, 0);
421 }
422
423 static struct platform_driver txx9aclc_pcm_driver = {
424 .driver = {
425 .name = "txx9aclc-pcm-audio",
426 },
427
428 .probe = txx9aclc_soc_platform_probe,
429 };
430
431 module_platform_driver(txx9aclc_pcm_driver);
432
433 MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
434 MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
435 MODULE_LICENSE("GPL");
436