1 /*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34 #include <linux/bpf.h>
35 #include <linux/etherdevice.h>
36 #include <linux/tcp.h>
37 #include <linux/if_vlan.h>
38 #include <linux/delay.h>
39 #include <linux/slab.h>
40 #include <linux/hash.h>
41 #include <net/ip.h>
42 #include <net/vxlan.h>
43 #include <net/devlink.h>
44
45 #include <linux/mlx4/driver.h>
46 #include <linux/mlx4/device.h>
47 #include <linux/mlx4/cmd.h>
48 #include <linux/mlx4/cq.h>
49
50 #include "mlx4_en.h"
51 #include "en_port.h"
52
53 #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
54 XDP_PACKET_HEADROOM - \
55 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))))
56
mlx4_en_setup_tc(struct net_device * dev,u8 up)57 int mlx4_en_setup_tc(struct net_device *dev, u8 up)
58 {
59 struct mlx4_en_priv *priv = netdev_priv(dev);
60 int i;
61 unsigned int offset = 0;
62
63 if (up && up != MLX4_EN_NUM_UP_HIGH)
64 return -EINVAL;
65
66 netdev_set_num_tc(dev, up);
67 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
68 /* Partition Tx queues evenly amongst UP's */
69 for (i = 0; i < up; i++) {
70 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
71 offset += priv->num_tx_rings_p_up;
72 }
73
74 #ifdef CONFIG_MLX4_EN_DCB
75 if (!mlx4_is_slave(priv->mdev->dev)) {
76 if (up) {
77 if (priv->dcbx_cap)
78 priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
79 } else {
80 priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
81 priv->cee_config.pfc_state = false;
82 }
83 }
84 #endif /* CONFIG_MLX4_EN_DCB */
85
86 return 0;
87 }
88
mlx4_en_alloc_tx_queue_per_tc(struct net_device * dev,u8 tc)89 int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)
90 {
91 struct mlx4_en_priv *priv = netdev_priv(dev);
92 struct mlx4_en_dev *mdev = priv->mdev;
93 struct mlx4_en_port_profile new_prof;
94 struct mlx4_en_priv *tmp;
95 int total_count;
96 int port_up = 0;
97 int err = 0;
98
99 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
100 if (!tmp)
101 return -ENOMEM;
102
103 mutex_lock(&mdev->state_lock);
104 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
105 new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :
106 MLX4_EN_NUM_UP_HIGH;
107 new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *
108 new_prof.num_up;
109 total_count = new_prof.tx_ring_num[TX] + new_prof.tx_ring_num[TX_XDP];
110 if (total_count > MAX_TX_RINGS) {
111 err = -EINVAL;
112 en_err(priv,
113 "Total number of TX and XDP rings (%d) exceeds the maximum supported (%d)\n",
114 total_count, MAX_TX_RINGS);
115 goto out;
116 }
117 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
118 if (err)
119 goto out;
120
121 if (priv->port_up) {
122 port_up = 1;
123 mlx4_en_stop_port(dev, 1);
124 }
125
126 mlx4_en_safe_replace_resources(priv, tmp);
127 if (port_up) {
128 err = mlx4_en_start_port(dev);
129 if (err) {
130 en_err(priv, "Failed starting port for setup TC\n");
131 goto out;
132 }
133 }
134
135 err = mlx4_en_setup_tc(dev, tc);
136 out:
137 mutex_unlock(&mdev->state_lock);
138 kfree(tmp);
139 return err;
140 }
141
__mlx4_en_setup_tc(struct net_device * dev,enum tc_setup_type type,void * type_data)142 static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,
143 void *type_data)
144 {
145 struct tc_mqprio_qopt *mqprio = type_data;
146
147 if (type != TC_SETUP_QDISC_MQPRIO)
148 return -EOPNOTSUPP;
149
150 if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)
151 return -EINVAL;
152
153 mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
154
155 return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);
156 }
157
158 #ifdef CONFIG_RFS_ACCEL
159
160 struct mlx4_en_filter {
161 struct list_head next;
162 struct work_struct work;
163
164 u8 ip_proto;
165 __be32 src_ip;
166 __be32 dst_ip;
167 __be16 src_port;
168 __be16 dst_port;
169
170 int rxq_index;
171 struct mlx4_en_priv *priv;
172 u32 flow_id; /* RFS infrastructure id */
173 int id; /* mlx4_en driver id */
174 u64 reg_id; /* Flow steering API id */
175 u8 activated; /* Used to prevent expiry before filter
176 * is attached
177 */
178 struct hlist_node filter_chain;
179 };
180
181 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
182
mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)183 static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
184 {
185 switch (ip_proto) {
186 case IPPROTO_UDP:
187 return MLX4_NET_TRANS_RULE_ID_UDP;
188 case IPPROTO_TCP:
189 return MLX4_NET_TRANS_RULE_ID_TCP;
190 default:
191 return MLX4_NET_TRANS_RULE_NUM;
192 }
193 };
194
195 /* Must not acquire state_lock, as its corresponding work_sync
196 * is done under it.
197 */
mlx4_en_filter_work(struct work_struct * work)198 static void mlx4_en_filter_work(struct work_struct *work)
199 {
200 struct mlx4_en_filter *filter = container_of(work,
201 struct mlx4_en_filter,
202 work);
203 struct mlx4_en_priv *priv = filter->priv;
204 struct mlx4_spec_list spec_tcp_udp = {
205 .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
206 {
207 .tcp_udp = {
208 .dst_port = filter->dst_port,
209 .dst_port_msk = (__force __be16)-1,
210 .src_port = filter->src_port,
211 .src_port_msk = (__force __be16)-1,
212 },
213 },
214 };
215 struct mlx4_spec_list spec_ip = {
216 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
217 {
218 .ipv4 = {
219 .dst_ip = filter->dst_ip,
220 .dst_ip_msk = (__force __be32)-1,
221 .src_ip = filter->src_ip,
222 .src_ip_msk = (__force __be32)-1,
223 },
224 },
225 };
226 struct mlx4_spec_list spec_eth = {
227 .id = MLX4_NET_TRANS_RULE_ID_ETH,
228 };
229 struct mlx4_net_trans_rule rule = {
230 .list = LIST_HEAD_INIT(rule.list),
231 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
232 .exclusive = 1,
233 .allow_loopback = 1,
234 .promisc_mode = MLX4_FS_REGULAR,
235 .port = priv->port,
236 .priority = MLX4_DOMAIN_RFS,
237 };
238 int rc;
239 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
240
241 if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
242 en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
243 filter->ip_proto);
244 goto ignore;
245 }
246 list_add_tail(&spec_eth.list, &rule.list);
247 list_add_tail(&spec_ip.list, &rule.list);
248 list_add_tail(&spec_tcp_udp.list, &rule.list);
249
250 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
251 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
252 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
253
254 filter->activated = 0;
255
256 if (filter->reg_id) {
257 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
258 if (rc && rc != -ENOENT)
259 en_err(priv, "Error detaching flow. rc = %d\n", rc);
260 }
261
262 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
263 if (rc)
264 en_err(priv, "Error attaching flow. err = %d\n", rc);
265
266 ignore:
267 mlx4_en_filter_rfs_expire(priv);
268
269 filter->activated = 1;
270 }
271
272 static inline struct hlist_head *
filter_hash_bucket(struct mlx4_en_priv * priv,__be32 src_ip,__be32 dst_ip,__be16 src_port,__be16 dst_port)273 filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
274 __be16 src_port, __be16 dst_port)
275 {
276 unsigned long l;
277 int bucket_idx;
278
279 l = (__force unsigned long)src_port |
280 ((__force unsigned long)dst_port << 2);
281 l ^= (__force unsigned long)(src_ip ^ dst_ip);
282
283 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
284
285 return &priv->filter_hash[bucket_idx];
286 }
287
288 static struct mlx4_en_filter *
mlx4_en_filter_alloc(struct mlx4_en_priv * priv,int rxq_index,__be32 src_ip,__be32 dst_ip,u8 ip_proto,__be16 src_port,__be16 dst_port,u32 flow_id)289 mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
290 __be32 dst_ip, u8 ip_proto, __be16 src_port,
291 __be16 dst_port, u32 flow_id)
292 {
293 struct mlx4_en_filter *filter = NULL;
294
295 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
296 if (!filter)
297 return NULL;
298
299 filter->priv = priv;
300 filter->rxq_index = rxq_index;
301 INIT_WORK(&filter->work, mlx4_en_filter_work);
302
303 filter->src_ip = src_ip;
304 filter->dst_ip = dst_ip;
305 filter->ip_proto = ip_proto;
306 filter->src_port = src_port;
307 filter->dst_port = dst_port;
308
309 filter->flow_id = flow_id;
310
311 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
312
313 list_add_tail(&filter->next, &priv->filters);
314 hlist_add_head(&filter->filter_chain,
315 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
316 dst_port));
317
318 return filter;
319 }
320
mlx4_en_filter_free(struct mlx4_en_filter * filter)321 static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
322 {
323 struct mlx4_en_priv *priv = filter->priv;
324 int rc;
325
326 list_del(&filter->next);
327
328 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
329 if (rc && rc != -ENOENT)
330 en_err(priv, "Error detaching flow. rc = %d\n", rc);
331
332 kfree(filter);
333 }
334
335 static inline struct mlx4_en_filter *
mlx4_en_filter_find(struct mlx4_en_priv * priv,__be32 src_ip,__be32 dst_ip,u8 ip_proto,__be16 src_port,__be16 dst_port)336 mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
337 u8 ip_proto, __be16 src_port, __be16 dst_port)
338 {
339 struct mlx4_en_filter *filter;
340 struct mlx4_en_filter *ret = NULL;
341
342 hlist_for_each_entry(filter,
343 filter_hash_bucket(priv, src_ip, dst_ip,
344 src_port, dst_port),
345 filter_chain) {
346 if (filter->src_ip == src_ip &&
347 filter->dst_ip == dst_ip &&
348 filter->ip_proto == ip_proto &&
349 filter->src_port == src_port &&
350 filter->dst_port == dst_port) {
351 ret = filter;
352 break;
353 }
354 }
355
356 return ret;
357 }
358
359 static int
mlx4_en_filter_rfs(struct net_device * net_dev,const struct sk_buff * skb,u16 rxq_index,u32 flow_id)360 mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
361 u16 rxq_index, u32 flow_id)
362 {
363 struct mlx4_en_priv *priv = netdev_priv(net_dev);
364 struct mlx4_en_filter *filter;
365 const struct iphdr *ip;
366 const __be16 *ports;
367 u8 ip_proto;
368 __be32 src_ip;
369 __be32 dst_ip;
370 __be16 src_port;
371 __be16 dst_port;
372 int nhoff = skb_network_offset(skb);
373 int ret = 0;
374
375 if (skb->encapsulation)
376 return -EPROTONOSUPPORT;
377
378 if (skb->protocol != htons(ETH_P_IP))
379 return -EPROTONOSUPPORT;
380
381 ip = (const struct iphdr *)(skb->data + nhoff);
382 if (ip_is_fragment(ip))
383 return -EPROTONOSUPPORT;
384
385 if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
386 return -EPROTONOSUPPORT;
387 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
388
389 ip_proto = ip->protocol;
390 src_ip = ip->saddr;
391 dst_ip = ip->daddr;
392 src_port = ports[0];
393 dst_port = ports[1];
394
395 spin_lock_bh(&priv->filters_lock);
396 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
397 src_port, dst_port);
398 if (filter) {
399 if (filter->rxq_index == rxq_index)
400 goto out;
401
402 filter->rxq_index = rxq_index;
403 } else {
404 filter = mlx4_en_filter_alloc(priv, rxq_index,
405 src_ip, dst_ip, ip_proto,
406 src_port, dst_port, flow_id);
407 if (!filter) {
408 ret = -ENOMEM;
409 goto err;
410 }
411 }
412
413 queue_work(priv->mdev->workqueue, &filter->work);
414
415 out:
416 ret = filter->id;
417 err:
418 spin_unlock_bh(&priv->filters_lock);
419
420 return ret;
421 }
422
mlx4_en_cleanup_filters(struct mlx4_en_priv * priv)423 void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
424 {
425 struct mlx4_en_filter *filter, *tmp;
426 LIST_HEAD(del_list);
427
428 spin_lock_bh(&priv->filters_lock);
429 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
430 list_move(&filter->next, &del_list);
431 hlist_del(&filter->filter_chain);
432 }
433 spin_unlock_bh(&priv->filters_lock);
434
435 list_for_each_entry_safe(filter, tmp, &del_list, next) {
436 cancel_work_sync(&filter->work);
437 mlx4_en_filter_free(filter);
438 }
439 }
440
mlx4_en_filter_rfs_expire(struct mlx4_en_priv * priv)441 static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
442 {
443 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
444 LIST_HEAD(del_list);
445 int i = 0;
446
447 spin_lock_bh(&priv->filters_lock);
448 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
449 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
450 break;
451
452 if (filter->activated &&
453 !work_pending(&filter->work) &&
454 rps_may_expire_flow(priv->dev,
455 filter->rxq_index, filter->flow_id,
456 filter->id)) {
457 list_move(&filter->next, &del_list);
458 hlist_del(&filter->filter_chain);
459 } else
460 last_filter = filter;
461
462 i++;
463 }
464
465 if (last_filter && (&last_filter->next != priv->filters.next))
466 list_move(&priv->filters, &last_filter->next);
467
468 spin_unlock_bh(&priv->filters_lock);
469
470 list_for_each_entry_safe(filter, tmp, &del_list, next)
471 mlx4_en_filter_free(filter);
472 }
473 #endif
474
mlx4_en_vlan_rx_add_vid(struct net_device * dev,__be16 proto,u16 vid)475 static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
476 __be16 proto, u16 vid)
477 {
478 struct mlx4_en_priv *priv = netdev_priv(dev);
479 struct mlx4_en_dev *mdev = priv->mdev;
480 int err;
481 int idx;
482
483 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
484
485 set_bit(vid, priv->active_vlans);
486
487 /* Add VID to port VLAN filter */
488 mutex_lock(&mdev->state_lock);
489 if (mdev->device_up && priv->port_up) {
490 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
491 if (err) {
492 en_err(priv, "Failed configuring VLAN filter\n");
493 goto out;
494 }
495 }
496 err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
497 if (err)
498 en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
499
500 out:
501 mutex_unlock(&mdev->state_lock);
502 return err;
503 }
504
mlx4_en_vlan_rx_kill_vid(struct net_device * dev,__be16 proto,u16 vid)505 static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
506 __be16 proto, u16 vid)
507 {
508 struct mlx4_en_priv *priv = netdev_priv(dev);
509 struct mlx4_en_dev *mdev = priv->mdev;
510 int err = 0;
511
512 en_dbg(HW, priv, "Killing VID:%d\n", vid);
513
514 clear_bit(vid, priv->active_vlans);
515
516 /* Remove VID from port VLAN filter */
517 mutex_lock(&mdev->state_lock);
518 mlx4_unregister_vlan(mdev->dev, priv->port, vid);
519
520 if (mdev->device_up && priv->port_up) {
521 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
522 if (err)
523 en_err(priv, "Failed configuring VLAN filter\n");
524 }
525 mutex_unlock(&mdev->state_lock);
526
527 return err;
528 }
529
mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN+2],u64 src_mac)530 static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
531 {
532 int i;
533 for (i = ETH_ALEN - 1; i >= 0; --i) {
534 dst_mac[i] = src_mac & 0xff;
535 src_mac >>= 8;
536 }
537 memset(&dst_mac[ETH_ALEN], 0, 2);
538 }
539
540
mlx4_en_tunnel_steer_add(struct mlx4_en_priv * priv,unsigned char * addr,int qpn,u64 * reg_id)541 static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
542 int qpn, u64 *reg_id)
543 {
544 int err;
545
546 if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
547 priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
548 return 0; /* do nothing */
549
550 err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
551 MLX4_DOMAIN_NIC, reg_id);
552 if (err) {
553 en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
554 return err;
555 }
556 en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
557 return 0;
558 }
559
560
mlx4_en_uc_steer_add(struct mlx4_en_priv * priv,unsigned char * mac,int * qpn,u64 * reg_id)561 static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
562 unsigned char *mac, int *qpn, u64 *reg_id)
563 {
564 struct mlx4_en_dev *mdev = priv->mdev;
565 struct mlx4_dev *dev = mdev->dev;
566 int err;
567
568 switch (dev->caps.steering_mode) {
569 case MLX4_STEERING_MODE_B0: {
570 struct mlx4_qp qp;
571 u8 gid[16] = {0};
572
573 qp.qpn = *qpn;
574 memcpy(&gid[10], mac, ETH_ALEN);
575 gid[5] = priv->port;
576
577 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
578 break;
579 }
580 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
581 struct mlx4_spec_list spec_eth = { {NULL} };
582 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
583
584 struct mlx4_net_trans_rule rule = {
585 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
586 .exclusive = 0,
587 .allow_loopback = 1,
588 .promisc_mode = MLX4_FS_REGULAR,
589 .priority = MLX4_DOMAIN_NIC,
590 };
591
592 rule.port = priv->port;
593 rule.qpn = *qpn;
594 INIT_LIST_HEAD(&rule.list);
595
596 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
597 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
598 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
599 list_add_tail(&spec_eth.list, &rule.list);
600
601 err = mlx4_flow_attach(dev, &rule, reg_id);
602 break;
603 }
604 default:
605 return -EINVAL;
606 }
607 if (err)
608 en_warn(priv, "Failed Attaching Unicast\n");
609
610 return err;
611 }
612
mlx4_en_uc_steer_release(struct mlx4_en_priv * priv,unsigned char * mac,int qpn,u64 reg_id)613 static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
614 unsigned char *mac, int qpn, u64 reg_id)
615 {
616 struct mlx4_en_dev *mdev = priv->mdev;
617 struct mlx4_dev *dev = mdev->dev;
618
619 switch (dev->caps.steering_mode) {
620 case MLX4_STEERING_MODE_B0: {
621 struct mlx4_qp qp;
622 u8 gid[16] = {0};
623
624 qp.qpn = qpn;
625 memcpy(&gid[10], mac, ETH_ALEN);
626 gid[5] = priv->port;
627
628 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
629 break;
630 }
631 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
632 mlx4_flow_detach(dev, reg_id);
633 break;
634 }
635 default:
636 en_err(priv, "Invalid steering mode.\n");
637 }
638 }
639
mlx4_en_get_qp(struct mlx4_en_priv * priv)640 static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
641 {
642 struct mlx4_en_dev *mdev = priv->mdev;
643 struct mlx4_dev *dev = mdev->dev;
644 int index = 0;
645 int err = 0;
646 int *qpn = &priv->base_qpn;
647 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
648
649 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
650 priv->dev->dev_addr);
651 index = mlx4_register_mac(dev, priv->port, mac);
652 if (index < 0) {
653 err = index;
654 en_err(priv, "Failed adding MAC: %pM\n",
655 priv->dev->dev_addr);
656 return err;
657 }
658
659 en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);
660
661 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
662 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
663 *qpn = base_qpn + index;
664 return 0;
665 }
666
667 err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,
668 MLX4_RES_USAGE_DRIVER);
669 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
670 if (err) {
671 en_err(priv, "Failed to reserve qp for mac registration\n");
672 mlx4_unregister_mac(dev, priv->port, mac);
673 return err;
674 }
675
676 return 0;
677 }
678
mlx4_en_put_qp(struct mlx4_en_priv * priv)679 static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
680 {
681 struct mlx4_en_dev *mdev = priv->mdev;
682 struct mlx4_dev *dev = mdev->dev;
683 int qpn = priv->base_qpn;
684
685 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
686 u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
687 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
688 priv->dev->dev_addr);
689 mlx4_unregister_mac(dev, priv->port, mac);
690 } else {
691 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
692 priv->port, qpn);
693 mlx4_qp_release_range(dev, qpn, 1);
694 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
695 }
696 }
697
mlx4_en_replace_mac(struct mlx4_en_priv * priv,int qpn,unsigned char * new_mac,unsigned char * prev_mac)698 static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
699 unsigned char *new_mac, unsigned char *prev_mac)
700 {
701 struct mlx4_en_dev *mdev = priv->mdev;
702 struct mlx4_dev *dev = mdev->dev;
703 int err = 0;
704 u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
705
706 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
707 struct hlist_head *bucket;
708 unsigned int mac_hash;
709 struct mlx4_mac_entry *entry;
710 struct hlist_node *tmp;
711 u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
712
713 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
714 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
715 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
716 mlx4_en_uc_steer_release(priv, entry->mac,
717 qpn, entry->reg_id);
718 mlx4_unregister_mac(dev, priv->port,
719 prev_mac_u64);
720 hlist_del_rcu(&entry->hlist);
721 synchronize_rcu();
722 memcpy(entry->mac, new_mac, ETH_ALEN);
723 entry->reg_id = 0;
724 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
725 hlist_add_head_rcu(&entry->hlist,
726 &priv->mac_hash[mac_hash]);
727 mlx4_register_mac(dev, priv->port, new_mac_u64);
728 err = mlx4_en_uc_steer_add(priv, new_mac,
729 &qpn,
730 &entry->reg_id);
731 if (err)
732 return err;
733 if (priv->tunnel_reg_id) {
734 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
735 priv->tunnel_reg_id = 0;
736 }
737 err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
738 &priv->tunnel_reg_id);
739 return err;
740 }
741 }
742 return -EINVAL;
743 }
744
745 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
746 }
747
mlx4_en_update_user_mac(struct mlx4_en_priv * priv,unsigned char new_mac[ETH_ALEN+2])748 static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,
749 unsigned char new_mac[ETH_ALEN + 2])
750 {
751 struct mlx4_en_dev *mdev = priv->mdev;
752 int err;
753
754 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))
755 return;
756
757 err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);
758 if (err)
759 en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",
760 new_mac, priv->port, err);
761 }
762
mlx4_en_do_set_mac(struct mlx4_en_priv * priv,unsigned char new_mac[ETH_ALEN+2])763 static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
764 unsigned char new_mac[ETH_ALEN + 2])
765 {
766 int err = 0;
767
768 if (priv->port_up) {
769 /* Remove old MAC and insert the new one */
770 err = mlx4_en_replace_mac(priv, priv->base_qpn,
771 new_mac, priv->current_mac);
772 if (err)
773 en_err(priv, "Failed changing HW MAC address\n");
774 } else
775 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
776
777 if (!err)
778 memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
779
780 return err;
781 }
782
mlx4_en_set_mac(struct net_device * dev,void * addr)783 static int mlx4_en_set_mac(struct net_device *dev, void *addr)
784 {
785 struct mlx4_en_priv *priv = netdev_priv(dev);
786 struct mlx4_en_dev *mdev = priv->mdev;
787 struct sockaddr *saddr = addr;
788 unsigned char new_mac[ETH_ALEN + 2];
789 int err;
790
791 if (!is_valid_ether_addr(saddr->sa_data))
792 return -EADDRNOTAVAIL;
793
794 mutex_lock(&mdev->state_lock);
795 memcpy(new_mac, saddr->sa_data, ETH_ALEN);
796 err = mlx4_en_do_set_mac(priv, new_mac);
797 if (err)
798 goto out;
799
800 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
801 mlx4_en_update_user_mac(priv, new_mac);
802 out:
803 mutex_unlock(&mdev->state_lock);
804
805 return err;
806 }
807
mlx4_en_clear_list(struct net_device * dev)808 static void mlx4_en_clear_list(struct net_device *dev)
809 {
810 struct mlx4_en_priv *priv = netdev_priv(dev);
811 struct mlx4_en_mc_list *tmp, *mc_to_del;
812
813 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
814 list_del(&mc_to_del->list);
815 kfree(mc_to_del);
816 }
817 }
818
mlx4_en_cache_mclist(struct net_device * dev)819 static void mlx4_en_cache_mclist(struct net_device *dev)
820 {
821 struct mlx4_en_priv *priv = netdev_priv(dev);
822 struct netdev_hw_addr *ha;
823 struct mlx4_en_mc_list *tmp;
824
825 mlx4_en_clear_list(dev);
826 netdev_for_each_mc_addr(ha, dev) {
827 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
828 if (!tmp) {
829 mlx4_en_clear_list(dev);
830 return;
831 }
832 memcpy(tmp->addr, ha->addr, ETH_ALEN);
833 list_add_tail(&tmp->list, &priv->mc_list);
834 }
835 }
836
update_mclist_flags(struct mlx4_en_priv * priv,struct list_head * dst,struct list_head * src)837 static void update_mclist_flags(struct mlx4_en_priv *priv,
838 struct list_head *dst,
839 struct list_head *src)
840 {
841 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
842 bool found;
843
844 /* Find all the entries that should be removed from dst,
845 * These are the entries that are not found in src
846 */
847 list_for_each_entry(dst_tmp, dst, list) {
848 found = false;
849 list_for_each_entry(src_tmp, src, list) {
850 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
851 found = true;
852 break;
853 }
854 }
855 if (!found)
856 dst_tmp->action = MCLIST_REM;
857 }
858
859 /* Add entries that exist in src but not in dst
860 * mark them as need to add
861 */
862 list_for_each_entry(src_tmp, src, list) {
863 found = false;
864 list_for_each_entry(dst_tmp, dst, list) {
865 if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
866 dst_tmp->action = MCLIST_NONE;
867 found = true;
868 break;
869 }
870 }
871 if (!found) {
872 new_mc = kmemdup(src_tmp,
873 sizeof(struct mlx4_en_mc_list),
874 GFP_KERNEL);
875 if (!new_mc)
876 return;
877
878 new_mc->action = MCLIST_ADD;
879 list_add_tail(&new_mc->list, dst);
880 }
881 }
882 }
883
mlx4_en_set_rx_mode(struct net_device * dev)884 static void mlx4_en_set_rx_mode(struct net_device *dev)
885 {
886 struct mlx4_en_priv *priv = netdev_priv(dev);
887
888 if (!priv->port_up)
889 return;
890
891 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
892 }
893
mlx4_en_set_promisc_mode(struct mlx4_en_priv * priv,struct mlx4_en_dev * mdev)894 static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
895 struct mlx4_en_dev *mdev)
896 {
897 int err = 0;
898
899 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
900 if (netif_msg_rx_status(priv))
901 en_warn(priv, "Entering promiscuous mode\n");
902 priv->flags |= MLX4_EN_FLAG_PROMISC;
903
904 /* Enable promiscouos mode */
905 switch (mdev->dev->caps.steering_mode) {
906 case MLX4_STEERING_MODE_DEVICE_MANAGED:
907 err = mlx4_flow_steer_promisc_add(mdev->dev,
908 priv->port,
909 priv->base_qpn,
910 MLX4_FS_ALL_DEFAULT);
911 if (err)
912 en_err(priv, "Failed enabling promiscuous mode\n");
913 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
914 break;
915
916 case MLX4_STEERING_MODE_B0:
917 err = mlx4_unicast_promisc_add(mdev->dev,
918 priv->base_qpn,
919 priv->port);
920 if (err)
921 en_err(priv, "Failed enabling unicast promiscuous mode\n");
922
923 /* Add the default qp number as multicast
924 * promisc
925 */
926 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
927 err = mlx4_multicast_promisc_add(mdev->dev,
928 priv->base_qpn,
929 priv->port);
930 if (err)
931 en_err(priv, "Failed enabling multicast promiscuous mode\n");
932 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
933 }
934 break;
935
936 case MLX4_STEERING_MODE_A0:
937 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
938 priv->port,
939 priv->base_qpn,
940 1);
941 if (err)
942 en_err(priv, "Failed enabling promiscuous mode\n");
943 break;
944 }
945
946 /* Disable port multicast filter (unconditionally) */
947 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
948 0, MLX4_MCAST_DISABLE);
949 if (err)
950 en_err(priv, "Failed disabling multicast filter\n");
951 }
952 }
953
mlx4_en_clear_promisc_mode(struct mlx4_en_priv * priv,struct mlx4_en_dev * mdev)954 static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
955 struct mlx4_en_dev *mdev)
956 {
957 int err = 0;
958
959 if (netif_msg_rx_status(priv))
960 en_warn(priv, "Leaving promiscuous mode\n");
961 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
962
963 /* Disable promiscouos mode */
964 switch (mdev->dev->caps.steering_mode) {
965 case MLX4_STEERING_MODE_DEVICE_MANAGED:
966 err = mlx4_flow_steer_promisc_remove(mdev->dev,
967 priv->port,
968 MLX4_FS_ALL_DEFAULT);
969 if (err)
970 en_err(priv, "Failed disabling promiscuous mode\n");
971 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
972 break;
973
974 case MLX4_STEERING_MODE_B0:
975 err = mlx4_unicast_promisc_remove(mdev->dev,
976 priv->base_qpn,
977 priv->port);
978 if (err)
979 en_err(priv, "Failed disabling unicast promiscuous mode\n");
980 /* Disable Multicast promisc */
981 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
982 err = mlx4_multicast_promisc_remove(mdev->dev,
983 priv->base_qpn,
984 priv->port);
985 if (err)
986 en_err(priv, "Failed disabling multicast promiscuous mode\n");
987 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
988 }
989 break;
990
991 case MLX4_STEERING_MODE_A0:
992 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
993 priv->port,
994 priv->base_qpn, 0);
995 if (err)
996 en_err(priv, "Failed disabling promiscuous mode\n");
997 break;
998 }
999 }
1000
mlx4_en_do_multicast(struct mlx4_en_priv * priv,struct net_device * dev,struct mlx4_en_dev * mdev)1001 static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
1002 struct net_device *dev,
1003 struct mlx4_en_dev *mdev)
1004 {
1005 struct mlx4_en_mc_list *mclist, *tmp;
1006 u64 mcast_addr = 0;
1007 u8 mc_list[16] = {0};
1008 int err = 0;
1009
1010 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
1011 if (dev->flags & IFF_ALLMULTI) {
1012 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1013 0, MLX4_MCAST_DISABLE);
1014 if (err)
1015 en_err(priv, "Failed disabling multicast filter\n");
1016
1017 /* Add the default qp number as multicast promisc */
1018 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
1019 switch (mdev->dev->caps.steering_mode) {
1020 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1021 err = mlx4_flow_steer_promisc_add(mdev->dev,
1022 priv->port,
1023 priv->base_qpn,
1024 MLX4_FS_MC_DEFAULT);
1025 break;
1026
1027 case MLX4_STEERING_MODE_B0:
1028 err = mlx4_multicast_promisc_add(mdev->dev,
1029 priv->base_qpn,
1030 priv->port);
1031 break;
1032
1033 case MLX4_STEERING_MODE_A0:
1034 break;
1035 }
1036 if (err)
1037 en_err(priv, "Failed entering multicast promisc mode\n");
1038 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
1039 }
1040 } else {
1041 /* Disable Multicast promisc */
1042 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1043 switch (mdev->dev->caps.steering_mode) {
1044 case MLX4_STEERING_MODE_DEVICE_MANAGED:
1045 err = mlx4_flow_steer_promisc_remove(mdev->dev,
1046 priv->port,
1047 MLX4_FS_MC_DEFAULT);
1048 break;
1049
1050 case MLX4_STEERING_MODE_B0:
1051 err = mlx4_multicast_promisc_remove(mdev->dev,
1052 priv->base_qpn,
1053 priv->port);
1054 break;
1055
1056 case MLX4_STEERING_MODE_A0:
1057 break;
1058 }
1059 if (err)
1060 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1061 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1062 }
1063
1064 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1065 0, MLX4_MCAST_DISABLE);
1066 if (err)
1067 en_err(priv, "Failed disabling multicast filter\n");
1068
1069 /* Flush mcast filter and init it with broadcast address */
1070 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
1071 1, MLX4_MCAST_CONFIG);
1072
1073 /* Update multicast list - we cache all addresses so they won't
1074 * change while HW is updated holding the command semaphor */
1075 netif_addr_lock_bh(dev);
1076 mlx4_en_cache_mclist(dev);
1077 netif_addr_unlock_bh(dev);
1078 list_for_each_entry(mclist, &priv->mc_list, list) {
1079 mcast_addr = mlx4_mac_to_u64(mclist->addr);
1080 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
1081 mcast_addr, 0, MLX4_MCAST_CONFIG);
1082 }
1083 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
1084 0, MLX4_MCAST_ENABLE);
1085 if (err)
1086 en_err(priv, "Failed enabling multicast filter\n");
1087
1088 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
1089 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1090 if (mclist->action == MCLIST_REM) {
1091 /* detach this address and delete from list */
1092 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1093 mc_list[5] = priv->port;
1094 err = mlx4_multicast_detach(mdev->dev,
1095 priv->rss_map.indir_qp,
1096 mc_list,
1097 MLX4_PROT_ETH,
1098 mclist->reg_id);
1099 if (err)
1100 en_err(priv, "Fail to detach multicast address\n");
1101
1102 if (mclist->tunnel_reg_id) {
1103 err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
1104 if (err)
1105 en_err(priv, "Failed to detach multicast address\n");
1106 }
1107
1108 /* remove from list */
1109 list_del(&mclist->list);
1110 kfree(mclist);
1111 } else if (mclist->action == MCLIST_ADD) {
1112 /* attach the address */
1113 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1114 /* needed for B0 steering support */
1115 mc_list[5] = priv->port;
1116 err = mlx4_multicast_attach(mdev->dev,
1117 priv->rss_map.indir_qp,
1118 mc_list,
1119 priv->port, 0,
1120 MLX4_PROT_ETH,
1121 &mclist->reg_id);
1122 if (err)
1123 en_err(priv, "Fail to attach multicast address\n");
1124
1125 err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
1126 &mclist->tunnel_reg_id);
1127 if (err)
1128 en_err(priv, "Failed to attach multicast address\n");
1129 }
1130 }
1131 }
1132 }
1133
mlx4_en_do_uc_filter(struct mlx4_en_priv * priv,struct net_device * dev,struct mlx4_en_dev * mdev)1134 static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1135 struct net_device *dev,
1136 struct mlx4_en_dev *mdev)
1137 {
1138 struct netdev_hw_addr *ha;
1139 struct mlx4_mac_entry *entry;
1140 struct hlist_node *tmp;
1141 bool found;
1142 u64 mac;
1143 int err = 0;
1144 struct hlist_head *bucket;
1145 unsigned int i;
1146 int removed = 0;
1147 u32 prev_flags;
1148
1149 /* Note that we do not need to protect our mac_hash traversal with rcu,
1150 * since all modification code is protected by mdev->state_lock
1151 */
1152
1153 /* find what to remove */
1154 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1155 bucket = &priv->mac_hash[i];
1156 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1157 found = false;
1158 netdev_for_each_uc_addr(ha, dev) {
1159 if (ether_addr_equal_64bits(entry->mac,
1160 ha->addr)) {
1161 found = true;
1162 break;
1163 }
1164 }
1165
1166 /* MAC address of the port is not in uc list */
1167 if (ether_addr_equal_64bits(entry->mac,
1168 priv->current_mac))
1169 found = true;
1170
1171 if (!found) {
1172 mac = mlx4_mac_to_u64(entry->mac);
1173 mlx4_en_uc_steer_release(priv, entry->mac,
1174 priv->base_qpn,
1175 entry->reg_id);
1176 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1177
1178 hlist_del_rcu(&entry->hlist);
1179 kfree_rcu(entry, rcu);
1180 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1181 entry->mac, priv->port);
1182 ++removed;
1183 }
1184 }
1185 }
1186
1187 /* if we didn't remove anything, there is no use in trying to add
1188 * again once we are in a forced promisc mode state
1189 */
1190 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1191 return;
1192
1193 prev_flags = priv->flags;
1194 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1195
1196 /* find what to add */
1197 netdev_for_each_uc_addr(ha, dev) {
1198 found = false;
1199 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
1200 hlist_for_each_entry(entry, bucket, hlist) {
1201 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1202 found = true;
1203 break;
1204 }
1205 }
1206
1207 if (!found) {
1208 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1209 if (!entry) {
1210 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1211 ha->addr, priv->port);
1212 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1213 break;
1214 }
1215 mac = mlx4_mac_to_u64(ha->addr);
1216 memcpy(entry->mac, ha->addr, ETH_ALEN);
1217 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1218 if (err < 0) {
1219 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1220 ha->addr, priv->port, err);
1221 kfree(entry);
1222 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1223 break;
1224 }
1225 err = mlx4_en_uc_steer_add(priv, ha->addr,
1226 &priv->base_qpn,
1227 &entry->reg_id);
1228 if (err) {
1229 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1230 ha->addr, priv->port, err);
1231 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1232 kfree(entry);
1233 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1234 break;
1235 } else {
1236 unsigned int mac_hash;
1237 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1238 ha->addr, priv->port);
1239 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1240 bucket = &priv->mac_hash[mac_hash];
1241 hlist_add_head_rcu(&entry->hlist, bucket);
1242 }
1243 }
1244 }
1245
1246 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1247 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1248 priv->port);
1249 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1250 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1251 priv->port);
1252 }
1253 }
1254
mlx4_en_do_set_rx_mode(struct work_struct * work)1255 static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1256 {
1257 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1258 rx_mode_task);
1259 struct mlx4_en_dev *mdev = priv->mdev;
1260 struct net_device *dev = priv->dev;
1261
1262 mutex_lock(&mdev->state_lock);
1263 if (!mdev->device_up) {
1264 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1265 goto out;
1266 }
1267 if (!priv->port_up) {
1268 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1269 goto out;
1270 }
1271
1272 if (!netif_carrier_ok(dev)) {
1273 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1274 if (priv->port_state.link_state) {
1275 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1276 netif_carrier_on(dev);
1277 en_dbg(LINK, priv, "Link Up\n");
1278 }
1279 }
1280 }
1281
1282 if (dev->priv_flags & IFF_UNICAST_FLT)
1283 mlx4_en_do_uc_filter(priv, dev, mdev);
1284
1285 /* Promsicuous mode: disable all filters */
1286 if ((dev->flags & IFF_PROMISC) ||
1287 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
1288 mlx4_en_set_promisc_mode(priv, mdev);
1289 goto out;
1290 }
1291
1292 /* Not in promiscuous mode */
1293 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1294 mlx4_en_clear_promisc_mode(priv, mdev);
1295
1296 mlx4_en_do_multicast(priv, dev, mdev);
1297 out:
1298 mutex_unlock(&mdev->state_lock);
1299 }
1300
mlx4_en_set_rss_steer_rules(struct mlx4_en_priv * priv)1301 static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
1302 {
1303 u64 reg_id;
1304 int err = 0;
1305 int *qpn = &priv->base_qpn;
1306 struct mlx4_mac_entry *entry;
1307
1308 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, ®_id);
1309 if (err)
1310 return err;
1311
1312 err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
1313 &priv->tunnel_reg_id);
1314 if (err)
1315 goto tunnel_err;
1316
1317 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1318 if (!entry) {
1319 err = -ENOMEM;
1320 goto alloc_err;
1321 }
1322
1323 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
1324 memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
1325 entry->reg_id = reg_id;
1326 hlist_add_head_rcu(&entry->hlist,
1327 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
1328
1329 return 0;
1330
1331 alloc_err:
1332 if (priv->tunnel_reg_id)
1333 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1334
1335 tunnel_err:
1336 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
1337 return err;
1338 }
1339
mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv * priv)1340 static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
1341 {
1342 u64 mac;
1343 unsigned int i;
1344 int qpn = priv->base_qpn;
1345 struct hlist_head *bucket;
1346 struct hlist_node *tmp;
1347 struct mlx4_mac_entry *entry;
1348
1349 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1350 bucket = &priv->mac_hash[i];
1351 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
1352 mac = mlx4_mac_to_u64(entry->mac);
1353 en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
1354 entry->mac);
1355 mlx4_en_uc_steer_release(priv, entry->mac,
1356 qpn, entry->reg_id);
1357
1358 mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
1359 hlist_del_rcu(&entry->hlist);
1360 kfree_rcu(entry, rcu);
1361 }
1362 }
1363
1364 if (priv->tunnel_reg_id) {
1365 mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
1366 priv->tunnel_reg_id = 0;
1367 }
1368 }
1369
mlx4_en_tx_timeout(struct net_device * dev,unsigned int txqueue)1370 static void mlx4_en_tx_timeout(struct net_device *dev, unsigned int txqueue)
1371 {
1372 struct mlx4_en_priv *priv = netdev_priv(dev);
1373 struct mlx4_en_dev *mdev = priv->mdev;
1374 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][txqueue];
1375
1376 if (netif_msg_timer(priv))
1377 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
1378
1379 en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
1380 txqueue, tx_ring->qpn, tx_ring->sp_cqn,
1381 tx_ring->cons, tx_ring->prod);
1382
1383 priv->port_stats.tx_timeout++;
1384 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state)) {
1385 en_dbg(DRV, priv, "Scheduling port restart\n");
1386 queue_work(mdev->workqueue, &priv->restart_task);
1387 }
1388 }
1389
1390
1391 static void
mlx4_en_get_stats64(struct net_device * dev,struct rtnl_link_stats64 * stats)1392 mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
1393 {
1394 struct mlx4_en_priv *priv = netdev_priv(dev);
1395
1396 spin_lock_bh(&priv->stats_lock);
1397 mlx4_en_fold_software_stats(dev);
1398 netdev_stats_to_stats64(stats, &dev->stats);
1399 spin_unlock_bh(&priv->stats_lock);
1400 }
1401
mlx4_en_set_default_moderation(struct mlx4_en_priv * priv)1402 static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1403 {
1404 struct mlx4_en_cq *cq;
1405 int i, t;
1406
1407 /* If we haven't received a specific coalescing setting
1408 * (module param), we set the moderation parameters as follows:
1409 * - moder_cnt is set to the number of mtu sized packets to
1410 * satisfy our coalescing target.
1411 * - moder_time is set to a fixed value.
1412 */
1413 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
1414 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
1415 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1416 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
1417 en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1418 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
1419
1420 /* Setup cq moderation params */
1421 for (i = 0; i < priv->rx_ring_num; i++) {
1422 cq = priv->rx_cq[i];
1423 cq->moder_cnt = priv->rx_frames;
1424 cq->moder_time = priv->rx_usecs;
1425 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1426 priv->last_moder_packets[i] = 0;
1427 priv->last_moder_bytes[i] = 0;
1428 }
1429
1430 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1431 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1432 cq = priv->tx_cq[t][i];
1433 cq->moder_cnt = priv->tx_frames;
1434 cq->moder_time = priv->tx_usecs;
1435 }
1436 }
1437
1438 /* Reset auto-moderation params */
1439 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1440 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1441 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1442 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1443 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
1444 priv->adaptive_rx_coal = 1;
1445 priv->last_moder_jiffies = 0;
1446 priv->last_moder_tx_packets = 0;
1447 }
1448
mlx4_en_auto_moderation(struct mlx4_en_priv * priv)1449 static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1450 {
1451 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
1452 u32 pkt_rate_high, pkt_rate_low;
1453 struct mlx4_en_cq *cq;
1454 unsigned long packets;
1455 unsigned long rate;
1456 unsigned long avg_pkt_size;
1457 unsigned long rx_packets;
1458 unsigned long rx_bytes;
1459 unsigned long rx_pkt_diff;
1460 int moder_time;
1461 int ring, err;
1462
1463 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1464 return;
1465
1466 pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
1467 pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
1468
1469 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1470 rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
1471 rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
1472
1473 rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
1474 packets = rx_pkt_diff;
1475 rate = packets * HZ / period;
1476 avg_pkt_size = packets ? (rx_bytes -
1477 priv->last_moder_bytes[ring]) / packets : 0;
1478
1479 /* Apply auto-moderation only when packet rate
1480 * exceeds a rate that it matters */
1481 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1482 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
1483 if (rate <= pkt_rate_low)
1484 moder_time = priv->rx_usecs_low;
1485 else if (rate >= pkt_rate_high)
1486 moder_time = priv->rx_usecs_high;
1487 else
1488 moder_time = (rate - pkt_rate_low) *
1489 (priv->rx_usecs_high - priv->rx_usecs_low) /
1490 (pkt_rate_high - pkt_rate_low) +
1491 priv->rx_usecs_low;
1492 } else {
1493 moder_time = priv->rx_usecs_low;
1494 }
1495
1496 cq = priv->rx_cq[ring];
1497 if (moder_time != priv->last_moder_time[ring] ||
1498 cq->moder_cnt != priv->rx_frames) {
1499 priv->last_moder_time[ring] = moder_time;
1500 cq->moder_time = moder_time;
1501 cq->moder_cnt = priv->rx_frames;
1502 err = mlx4_en_set_cq_moder(priv, cq);
1503 if (err)
1504 en_err(priv, "Failed modifying moderation for cq:%d\n",
1505 ring);
1506 }
1507 priv->last_moder_packets[ring] = rx_packets;
1508 priv->last_moder_bytes[ring] = rx_bytes;
1509 }
1510
1511 priv->last_moder_jiffies = jiffies;
1512 }
1513
mlx4_en_do_get_stats(struct work_struct * work)1514 static void mlx4_en_do_get_stats(struct work_struct *work)
1515 {
1516 struct delayed_work *delay = to_delayed_work(work);
1517 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1518 stats_task);
1519 struct mlx4_en_dev *mdev = priv->mdev;
1520 int err;
1521
1522 mutex_lock(&mdev->state_lock);
1523 if (mdev->device_up) {
1524 if (priv->port_up) {
1525 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1526 if (err)
1527 en_dbg(HW, priv, "Could not update stats\n");
1528
1529 mlx4_en_auto_moderation(priv);
1530 }
1531
1532 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1533 }
1534 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
1535 mlx4_en_do_set_mac(priv, priv->current_mac);
1536 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1537 }
1538 mutex_unlock(&mdev->state_lock);
1539 }
1540
1541 /* mlx4_en_service_task - Run service task for tasks that needed to be done
1542 * periodically
1543 */
mlx4_en_service_task(struct work_struct * work)1544 static void mlx4_en_service_task(struct work_struct *work)
1545 {
1546 struct delayed_work *delay = to_delayed_work(work);
1547 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1548 service_task);
1549 struct mlx4_en_dev *mdev = priv->mdev;
1550
1551 mutex_lock(&mdev->state_lock);
1552 if (mdev->device_up) {
1553 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1554 mlx4_en_ptp_overflow_check(mdev);
1555
1556 mlx4_en_recover_from_oom(priv);
1557 queue_delayed_work(mdev->workqueue, &priv->service_task,
1558 SERVICE_TASK_DELAY);
1559 }
1560 mutex_unlock(&mdev->state_lock);
1561 }
1562
mlx4_en_linkstate(struct work_struct * work)1563 static void mlx4_en_linkstate(struct work_struct *work)
1564 {
1565 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1566 linkstate_task);
1567 struct mlx4_en_dev *mdev = priv->mdev;
1568 int linkstate = priv->link_state;
1569
1570 mutex_lock(&mdev->state_lock);
1571 /* If observable port state changed set carrier state and
1572 * report to system log */
1573 if (priv->last_link_state != linkstate) {
1574 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
1575 en_info(priv, "Link Down\n");
1576 netif_carrier_off(priv->dev);
1577 } else {
1578 en_info(priv, "Link Up\n");
1579 netif_carrier_on(priv->dev);
1580 }
1581 }
1582 priv->last_link_state = linkstate;
1583 mutex_unlock(&mdev->state_lock);
1584 }
1585
mlx4_en_init_affinity_hint(struct mlx4_en_priv * priv,int ring_idx)1586 static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1587 {
1588 struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
1589 int numa_node = priv->mdev->dev->numa_node;
1590
1591 if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
1592 return -ENOMEM;
1593
1594 cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
1595 ring->affinity_mask);
1596 return 0;
1597 }
1598
mlx4_en_free_affinity_hint(struct mlx4_en_priv * priv,int ring_idx)1599 static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
1600 {
1601 free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
1602 }
1603
mlx4_en_init_recycle_ring(struct mlx4_en_priv * priv,int tx_ring_idx)1604 static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
1605 int tx_ring_idx)
1606 {
1607 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
1608 int rr_index = tx_ring_idx;
1609
1610 tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
1611 tx_ring->recycle_ring = priv->rx_ring[rr_index];
1612 en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
1613 TX_XDP, tx_ring_idx, rr_index);
1614 }
1615
mlx4_en_start_port(struct net_device * dev)1616 int mlx4_en_start_port(struct net_device *dev)
1617 {
1618 struct mlx4_en_priv *priv = netdev_priv(dev);
1619 struct mlx4_en_dev *mdev = priv->mdev;
1620 struct mlx4_en_cq *cq;
1621 struct mlx4_en_tx_ring *tx_ring;
1622 int rx_index = 0;
1623 int err = 0;
1624 int i, t;
1625 int j;
1626 u8 mc_list[16] = {0};
1627
1628 if (priv->port_up) {
1629 en_dbg(DRV, priv, "start port called while port already up\n");
1630 return 0;
1631 }
1632
1633 INIT_LIST_HEAD(&priv->mc_list);
1634 INIT_LIST_HEAD(&priv->curr_list);
1635 INIT_LIST_HEAD(&priv->ethtool_list);
1636 memset(&priv->ethtool_rules[0], 0,
1637 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
1638
1639 /* Calculate Rx buf size */
1640 dev->mtu = min(dev->mtu, priv->max_mtu);
1641 mlx4_en_calc_rx_buf(dev);
1642 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
1643
1644 /* Configure rx cq's and rings */
1645 err = mlx4_en_activate_rx_rings(priv);
1646 if (err) {
1647 en_err(priv, "Failed to activate RX rings\n");
1648 return err;
1649 }
1650 for (i = 0; i < priv->rx_ring_num; i++) {
1651 cq = priv->rx_cq[i];
1652
1653 err = mlx4_en_init_affinity_hint(priv, i);
1654 if (err) {
1655 en_err(priv, "Failed preparing IRQ affinity hint\n");
1656 goto cq_err;
1657 }
1658
1659 err = mlx4_en_activate_cq(priv, cq, i);
1660 if (err) {
1661 en_err(priv, "Failed activating Rx CQ\n");
1662 mlx4_en_free_affinity_hint(priv, i);
1663 goto cq_err;
1664 }
1665
1666 for (j = 0; j < cq->size; j++) {
1667 struct mlx4_cqe *cqe = NULL;
1668
1669 cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
1670 priv->cqe_factor;
1671 cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1672 }
1673
1674 err = mlx4_en_set_cq_moder(priv, cq);
1675 if (err) {
1676 en_err(priv, "Failed setting cq moderation parameters\n");
1677 mlx4_en_deactivate_cq(priv, cq);
1678 mlx4_en_free_affinity_hint(priv, i);
1679 goto cq_err;
1680 }
1681 mlx4_en_arm_cq(priv, cq);
1682 priv->rx_ring[i]->cqn = cq->mcq.cqn;
1683 ++rx_index;
1684 }
1685
1686 /* Set qp number */
1687 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
1688 err = mlx4_en_get_qp(priv);
1689 if (err) {
1690 en_err(priv, "Failed getting eth qp\n");
1691 goto cq_err;
1692 }
1693 mdev->mac_removed[priv->port] = 0;
1694
1695 priv->counter_index =
1696 mlx4_get_default_counter_index(mdev->dev, priv->port);
1697
1698 err = mlx4_en_config_rss_steer(priv);
1699 if (err) {
1700 en_err(priv, "Failed configuring rss steering\n");
1701 goto mac_err;
1702 }
1703
1704 err = mlx4_en_create_drop_qp(priv);
1705 if (err)
1706 goto rss_err;
1707
1708 /* Configure tx cq's and rings */
1709 for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
1710 u8 num_tx_rings_p_up = t == TX ?
1711 priv->num_tx_rings_p_up : priv->tx_ring_num[t];
1712
1713 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1714 /* Configure cq */
1715 cq = priv->tx_cq[t][i];
1716 err = mlx4_en_activate_cq(priv, cq, i);
1717 if (err) {
1718 en_err(priv, "Failed allocating Tx CQ\n");
1719 goto tx_err;
1720 }
1721 err = mlx4_en_set_cq_moder(priv, cq);
1722 if (err) {
1723 en_err(priv, "Failed setting cq moderation parameters\n");
1724 mlx4_en_deactivate_cq(priv, cq);
1725 goto tx_err;
1726 }
1727 en_dbg(DRV, priv,
1728 "Resetting index of collapsed CQ:%d to -1\n", i);
1729 cq->buf->wqe_index = cpu_to_be16(0xffff);
1730
1731 /* Configure ring */
1732 tx_ring = priv->tx_ring[t][i];
1733 err = mlx4_en_activate_tx_ring(priv, tx_ring,
1734 cq->mcq.cqn,
1735 i / num_tx_rings_p_up);
1736 if (err) {
1737 en_err(priv, "Failed allocating Tx ring\n");
1738 mlx4_en_deactivate_cq(priv, cq);
1739 goto tx_err;
1740 }
1741 clear_bit(MLX4_EN_TX_RING_STATE_RECOVERING, &tx_ring->state);
1742 if (t != TX_XDP) {
1743 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
1744 tx_ring->recycle_ring = NULL;
1745
1746 /* Arm CQ for TX completions */
1747 mlx4_en_arm_cq(priv, cq);
1748
1749 } else {
1750 mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring);
1751 mlx4_en_init_recycle_ring(priv, i);
1752 /* XDP TX CQ should never be armed */
1753 }
1754
1755 /* Set initial ownership of all Tx TXBBs to SW (1) */
1756 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1757 *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
1758 }
1759 }
1760
1761 /* Configure port */
1762 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1763 priv->rx_skb_size + ETH_FCS_LEN,
1764 priv->prof->tx_pause,
1765 priv->prof->tx_ppp,
1766 priv->prof->rx_pause,
1767 priv->prof->rx_ppp);
1768 if (err) {
1769 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1770 priv->port, err);
1771 goto tx_err;
1772 }
1773
1774 err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
1775 if (err) {
1776 en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
1777 dev->mtu, priv->port, err);
1778 goto tx_err;
1779 }
1780
1781 /* Set default qp number */
1782 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1783 if (err) {
1784 en_err(priv, "Failed setting default qp numbers\n");
1785 goto tx_err;
1786 }
1787
1788 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
1789 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
1790 if (err) {
1791 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
1792 err);
1793 goto tx_err;
1794 }
1795 }
1796
1797 /* Init port */
1798 en_dbg(HW, priv, "Initializing port\n");
1799 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1800 if (err) {
1801 en_err(priv, "Failed Initializing port\n");
1802 goto tx_err;
1803 }
1804
1805 /* Set Unicast and VXLAN steering rules */
1806 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
1807 mlx4_en_set_rss_steer_rules(priv))
1808 mlx4_warn(mdev, "Failed setting steering rules\n");
1809
1810 /* Attach rx QP to bradcast address */
1811 eth_broadcast_addr(&mc_list[10]);
1812 mc_list[5] = priv->port; /* needed for B0 steering support */
1813 if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1814 priv->port, 0, MLX4_PROT_ETH,
1815 &priv->broadcast_id))
1816 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1817
1818 /* Must redo promiscuous mode setup. */
1819 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1820
1821 /* Schedule multicast task to populate multicast list */
1822 queue_work(mdev->workqueue, &priv->rx_mode_task);
1823
1824 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1825 udp_tunnel_nic_reset_ntf(dev);
1826
1827 priv->port_up = true;
1828
1829 /* Process all completions if exist to prevent
1830 * the queues freezing if they are full
1831 */
1832 for (i = 0; i < priv->rx_ring_num; i++) {
1833 local_bh_disable();
1834 napi_schedule(&priv->rx_cq[i]->napi);
1835 local_bh_enable();
1836 }
1837
1838 clear_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state);
1839 netif_tx_start_all_queues(dev);
1840 netif_device_attach(dev);
1841
1842 return 0;
1843
1844 tx_err:
1845 if (t == MLX4_EN_NUM_TX_TYPES) {
1846 t--;
1847 i = priv->tx_ring_num[t];
1848 }
1849 while (t >= 0) {
1850 while (i--) {
1851 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1852 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1853 }
1854 if (!t--)
1855 break;
1856 i = priv->tx_ring_num[t];
1857 }
1858 mlx4_en_destroy_drop_qp(priv);
1859 rss_err:
1860 mlx4_en_release_rss_steer(priv);
1861 mac_err:
1862 mlx4_en_put_qp(priv);
1863 cq_err:
1864 while (rx_index--) {
1865 mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
1866 mlx4_en_free_affinity_hint(priv, rx_index);
1867 }
1868 for (i = 0; i < priv->rx_ring_num; i++)
1869 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
1870
1871 return err; /* need to close devices */
1872 }
1873
1874
mlx4_en_stop_port(struct net_device * dev,int detach)1875 void mlx4_en_stop_port(struct net_device *dev, int detach)
1876 {
1877 struct mlx4_en_priv *priv = netdev_priv(dev);
1878 struct mlx4_en_dev *mdev = priv->mdev;
1879 struct mlx4_en_mc_list *mclist, *tmp;
1880 struct ethtool_flow_id *flow, *tmp_flow;
1881 int i, t;
1882 u8 mc_list[16] = {0};
1883
1884 if (!priv->port_up) {
1885 en_dbg(DRV, priv, "stop port called while port already down\n");
1886 return;
1887 }
1888
1889 /* close port*/
1890 mlx4_CLOSE_PORT(mdev->dev, priv->port);
1891
1892 /* Synchronize with tx routine */
1893 netif_tx_lock_bh(dev);
1894 if (detach)
1895 netif_device_detach(dev);
1896 netif_tx_stop_all_queues(dev);
1897 netif_tx_unlock_bh(dev);
1898
1899 netif_tx_disable(dev);
1900
1901 spin_lock_bh(&priv->stats_lock);
1902 mlx4_en_fold_software_stats(dev);
1903 /* Set port as not active */
1904 priv->port_up = false;
1905 spin_unlock_bh(&priv->stats_lock);
1906
1907 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
1908
1909 /* Promsicuous mode */
1910 if (mdev->dev->caps.steering_mode ==
1911 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1912 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1913 MLX4_EN_FLAG_MC_PROMISC);
1914 mlx4_flow_steer_promisc_remove(mdev->dev,
1915 priv->port,
1916 MLX4_FS_ALL_DEFAULT);
1917 mlx4_flow_steer_promisc_remove(mdev->dev,
1918 priv->port,
1919 MLX4_FS_MC_DEFAULT);
1920 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1921 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1922
1923 /* Disable promiscouos mode */
1924 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1925 priv->port);
1926
1927 /* Disable Multicast promisc */
1928 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1929 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1930 priv->port);
1931 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1932 }
1933 }
1934
1935 /* Detach All multicasts */
1936 eth_broadcast_addr(&mc_list[10]);
1937 mc_list[5] = priv->port; /* needed for B0 steering support */
1938 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,
1939 MLX4_PROT_ETH, priv->broadcast_id);
1940 list_for_each_entry(mclist, &priv->curr_list, list) {
1941 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1942 mc_list[5] = priv->port;
1943 mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,
1944 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1945 if (mclist->tunnel_reg_id)
1946 mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
1947 }
1948 mlx4_en_clear_list(dev);
1949 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1950 list_del(&mclist->list);
1951 kfree(mclist);
1952 }
1953
1954 /* Flush multicast filter */
1955 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1956
1957 /* Remove flow steering rules for the port*/
1958 if (mdev->dev->caps.steering_mode ==
1959 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1960 ASSERT_RTNL();
1961 list_for_each_entry_safe(flow, tmp_flow,
1962 &priv->ethtool_list, list) {
1963 mlx4_flow_detach(mdev->dev, flow->id);
1964 list_del(&flow->list);
1965 }
1966 }
1967
1968 mlx4_en_destroy_drop_qp(priv);
1969
1970 /* Free TX Rings */
1971 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
1972 for (i = 0; i < priv->tx_ring_num[t]; i++) {
1973 mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
1974 mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
1975 }
1976 }
1977 msleep(10);
1978
1979 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
1980 for (i = 0; i < priv->tx_ring_num[t]; i++)
1981 mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
1982
1983 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
1984 mlx4_en_delete_rss_steer_rules(priv);
1985
1986 /* Free RSS qps */
1987 mlx4_en_release_rss_steer(priv);
1988
1989 /* Unregister Mac address for the port */
1990 mlx4_en_put_qp(priv);
1991 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
1992 mdev->mac_removed[priv->port] = 1;
1993
1994 /* Free RX Rings */
1995 for (i = 0; i < priv->rx_ring_num; i++) {
1996 struct mlx4_en_cq *cq = priv->rx_cq[i];
1997
1998 napi_synchronize(&cq->napi);
1999 mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
2000 mlx4_en_deactivate_cq(priv, cq);
2001
2002 mlx4_en_free_affinity_hint(priv, i);
2003 }
2004 }
2005
mlx4_en_restart(struct work_struct * work)2006 static void mlx4_en_restart(struct work_struct *work)
2007 {
2008 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
2009 restart_task);
2010 struct mlx4_en_dev *mdev = priv->mdev;
2011 struct net_device *dev = priv->dev;
2012
2013 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
2014
2015 rtnl_lock();
2016 mutex_lock(&mdev->state_lock);
2017 if (priv->port_up) {
2018 mlx4_en_stop_port(dev, 1);
2019 if (mlx4_en_start_port(dev))
2020 en_err(priv, "Failed restarting port %d\n", priv->port);
2021 }
2022 mutex_unlock(&mdev->state_lock);
2023 rtnl_unlock();
2024 }
2025
mlx4_en_clear_stats(struct net_device * dev)2026 static void mlx4_en_clear_stats(struct net_device *dev)
2027 {
2028 struct mlx4_en_priv *priv = netdev_priv(dev);
2029 struct mlx4_en_dev *mdev = priv->mdev;
2030 struct mlx4_en_tx_ring **tx_ring;
2031 int i;
2032
2033 if (!mlx4_is_slave(mdev->dev))
2034 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
2035 en_dbg(HW, priv, "Failed dumping statistics\n");
2036
2037 memset(&priv->pstats, 0, sizeof(priv->pstats));
2038 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
2039 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
2040 memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
2041 memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
2042 memset(&priv->rx_priority_flowstats, 0,
2043 sizeof(priv->rx_priority_flowstats));
2044 memset(&priv->tx_priority_flowstats, 0,
2045 sizeof(priv->tx_priority_flowstats));
2046 memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
2047
2048 tx_ring = priv->tx_ring[TX];
2049 for (i = 0; i < priv->tx_ring_num[TX]; i++) {
2050 tx_ring[i]->bytes = 0;
2051 tx_ring[i]->packets = 0;
2052 tx_ring[i]->tx_csum = 0;
2053 tx_ring[i]->tx_dropped = 0;
2054 tx_ring[i]->queue_stopped = 0;
2055 tx_ring[i]->wake_queue = 0;
2056 tx_ring[i]->tso_packets = 0;
2057 tx_ring[i]->xmit_more = 0;
2058 }
2059 for (i = 0; i < priv->rx_ring_num; i++) {
2060 priv->rx_ring[i]->bytes = 0;
2061 priv->rx_ring[i]->packets = 0;
2062 priv->rx_ring[i]->csum_ok = 0;
2063 priv->rx_ring[i]->csum_none = 0;
2064 priv->rx_ring[i]->csum_complete = 0;
2065 }
2066 }
2067
mlx4_en_open(struct net_device * dev)2068 static int mlx4_en_open(struct net_device *dev)
2069 {
2070 struct mlx4_en_priv *priv = netdev_priv(dev);
2071 struct mlx4_en_dev *mdev = priv->mdev;
2072 int err = 0;
2073
2074 mutex_lock(&mdev->state_lock);
2075
2076 if (!mdev->device_up) {
2077 en_err(priv, "Cannot open - device down/disabled\n");
2078 err = -EBUSY;
2079 goto out;
2080 }
2081
2082 /* Reset HW statistics and SW counters */
2083 mlx4_en_clear_stats(dev);
2084
2085 err = mlx4_en_start_port(dev);
2086 if (err)
2087 en_err(priv, "Failed starting port:%d\n", priv->port);
2088
2089 out:
2090 mutex_unlock(&mdev->state_lock);
2091 return err;
2092 }
2093
2094
mlx4_en_close(struct net_device * dev)2095 static int mlx4_en_close(struct net_device *dev)
2096 {
2097 struct mlx4_en_priv *priv = netdev_priv(dev);
2098 struct mlx4_en_dev *mdev = priv->mdev;
2099
2100 en_dbg(IFDOWN, priv, "Close port called\n");
2101
2102 mutex_lock(&mdev->state_lock);
2103
2104 mlx4_en_stop_port(dev, 0);
2105 netif_carrier_off(dev);
2106
2107 mutex_unlock(&mdev->state_lock);
2108 return 0;
2109 }
2110
mlx4_en_free_resources(struct mlx4_en_priv * priv)2111 static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
2112 {
2113 int i, t;
2114
2115 #ifdef CONFIG_RFS_ACCEL
2116 priv->dev->rx_cpu_rmap = NULL;
2117 #endif
2118
2119 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2120 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2121 if (priv->tx_ring[t] && priv->tx_ring[t][i])
2122 mlx4_en_destroy_tx_ring(priv,
2123 &priv->tx_ring[t][i]);
2124 if (priv->tx_cq[t] && priv->tx_cq[t][i])
2125 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2126 }
2127 kfree(priv->tx_ring[t]);
2128 kfree(priv->tx_cq[t]);
2129 }
2130
2131 for (i = 0; i < priv->rx_ring_num; i++) {
2132 if (priv->rx_ring[i])
2133 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2134 priv->prof->rx_ring_size, priv->stride);
2135 if (priv->rx_cq[i])
2136 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2137 }
2138
2139 }
2140
mlx4_en_alloc_resources(struct mlx4_en_priv * priv)2141 static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
2142 {
2143 struct mlx4_en_port_profile *prof = priv->prof;
2144 int i, t;
2145 int node;
2146
2147 /* Create tx Rings */
2148 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2149 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2150 node = cpu_to_node(i % num_online_cpus());
2151 if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
2152 prof->tx_ring_size, i, t, node))
2153 goto err;
2154
2155 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
2156 prof->tx_ring_size,
2157 TXBB_SIZE, node, i))
2158 goto err;
2159 }
2160 }
2161
2162 /* Create rx Rings */
2163 for (i = 0; i < priv->rx_ring_num; i++) {
2164 node = cpu_to_node(i % num_online_cpus());
2165 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
2166 prof->rx_ring_size, i, RX, node))
2167 goto err;
2168
2169 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
2170 prof->rx_ring_size, priv->stride,
2171 node, i))
2172 goto err;
2173
2174 }
2175
2176 #ifdef CONFIG_RFS_ACCEL
2177 priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
2178 #endif
2179
2180 return 0;
2181
2182 err:
2183 en_err(priv, "Failed to allocate NIC resources\n");
2184 for (i = 0; i < priv->rx_ring_num; i++) {
2185 if (priv->rx_ring[i])
2186 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
2187 prof->rx_ring_size,
2188 priv->stride);
2189 if (priv->rx_cq[i])
2190 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
2191 }
2192 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2193 for (i = 0; i < priv->tx_ring_num[t]; i++) {
2194 if (priv->tx_ring[t][i])
2195 mlx4_en_destroy_tx_ring(priv,
2196 &priv->tx_ring[t][i]);
2197 if (priv->tx_cq[t][i])
2198 mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
2199 }
2200 }
2201 return -ENOMEM;
2202 }
2203
2204
mlx4_en_copy_priv(struct mlx4_en_priv * dst,struct mlx4_en_priv * src,struct mlx4_en_port_profile * prof)2205 static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
2206 struct mlx4_en_priv *src,
2207 struct mlx4_en_port_profile *prof)
2208 {
2209 int t;
2210
2211 memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
2212 sizeof(dst->hwtstamp_config));
2213 dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;
2214 dst->rx_ring_num = prof->rx_ring_num;
2215 dst->flags = prof->flags;
2216 dst->mdev = src->mdev;
2217 dst->port = src->port;
2218 dst->dev = src->dev;
2219 dst->prof = prof;
2220 dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2221 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2222
2223 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2224 dst->tx_ring_num[t] = prof->tx_ring_num[t];
2225 if (!dst->tx_ring_num[t])
2226 continue;
2227
2228 dst->tx_ring[t] = kcalloc(MAX_TX_RINGS,
2229 sizeof(struct mlx4_en_tx_ring *),
2230 GFP_KERNEL);
2231 if (!dst->tx_ring[t])
2232 goto err_free_tx;
2233
2234 dst->tx_cq[t] = kcalloc(MAX_TX_RINGS,
2235 sizeof(struct mlx4_en_cq *),
2236 GFP_KERNEL);
2237 if (!dst->tx_cq[t]) {
2238 kfree(dst->tx_ring[t]);
2239 goto err_free_tx;
2240 }
2241 }
2242
2243 return 0;
2244
2245 err_free_tx:
2246 while (t--) {
2247 kfree(dst->tx_ring[t]);
2248 kfree(dst->tx_cq[t]);
2249 }
2250 return -ENOMEM;
2251 }
2252
mlx4_en_update_priv(struct mlx4_en_priv * dst,struct mlx4_en_priv * src)2253 static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
2254 struct mlx4_en_priv *src)
2255 {
2256 int t;
2257 memcpy(dst->rx_ring, src->rx_ring,
2258 sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
2259 memcpy(dst->rx_cq, src->rx_cq,
2260 sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
2261 memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
2262 sizeof(dst->hwtstamp_config));
2263 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2264 dst->tx_ring_num[t] = src->tx_ring_num[t];
2265 dst->tx_ring[t] = src->tx_ring[t];
2266 dst->tx_cq[t] = src->tx_cq[t];
2267 }
2268 dst->num_tx_rings_p_up = src->num_tx_rings_p_up;
2269 dst->rx_ring_num = src->rx_ring_num;
2270 memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
2271 }
2272
mlx4_en_try_alloc_resources(struct mlx4_en_priv * priv,struct mlx4_en_priv * tmp,struct mlx4_en_port_profile * prof,bool carry_xdp_prog)2273 int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
2274 struct mlx4_en_priv *tmp,
2275 struct mlx4_en_port_profile *prof,
2276 bool carry_xdp_prog)
2277 {
2278 struct bpf_prog *xdp_prog;
2279 int i, t;
2280
2281 mlx4_en_copy_priv(tmp, priv, prof);
2282
2283 if (mlx4_en_alloc_resources(tmp)) {
2284 en_warn(priv,
2285 "%s: Resource allocation failed, using previous configuration\n",
2286 __func__);
2287 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
2288 kfree(tmp->tx_ring[t]);
2289 kfree(tmp->tx_cq[t]);
2290 }
2291 return -ENOMEM;
2292 }
2293
2294 /* All rx_rings has the same xdp_prog. Pick the first one. */
2295 xdp_prog = rcu_dereference_protected(
2296 priv->rx_ring[0]->xdp_prog,
2297 lockdep_is_held(&priv->mdev->state_lock));
2298
2299 if (xdp_prog && carry_xdp_prog) {
2300 bpf_prog_add(xdp_prog, tmp->rx_ring_num);
2301 for (i = 0; i < tmp->rx_ring_num; i++)
2302 rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
2303 xdp_prog);
2304 }
2305
2306 return 0;
2307 }
2308
mlx4_en_safe_replace_resources(struct mlx4_en_priv * priv,struct mlx4_en_priv * tmp)2309 void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
2310 struct mlx4_en_priv *tmp)
2311 {
2312 mlx4_en_free_resources(priv);
2313 mlx4_en_update_priv(priv, tmp);
2314 }
2315
mlx4_en_destroy_netdev(struct net_device * dev)2316 void mlx4_en_destroy_netdev(struct net_device *dev)
2317 {
2318 struct mlx4_en_priv *priv = netdev_priv(dev);
2319 struct mlx4_en_dev *mdev = priv->mdev;
2320
2321 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
2322
2323 /* Unregister device - this will close the port if it was up */
2324 if (priv->registered) {
2325 devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
2326 priv->port));
2327 unregister_netdev(dev);
2328 }
2329
2330 if (priv->allocated)
2331 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
2332
2333 cancel_delayed_work(&priv->stats_task);
2334 cancel_delayed_work(&priv->service_task);
2335 /* flush any pending task for this netdev */
2336 flush_workqueue(mdev->workqueue);
2337
2338 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2339 mlx4_en_remove_timestamp(mdev);
2340
2341 /* Detach the netdev so tasks would not attempt to access it */
2342 mutex_lock(&mdev->state_lock);
2343 mdev->pndev[priv->port] = NULL;
2344 mdev->upper[priv->port] = NULL;
2345
2346 #ifdef CONFIG_RFS_ACCEL
2347 mlx4_en_cleanup_filters(priv);
2348 #endif
2349
2350 mlx4_en_free_resources(priv);
2351 mutex_unlock(&mdev->state_lock);
2352
2353 free_netdev(dev);
2354 }
2355
mlx4_en_check_xdp_mtu(struct net_device * dev,int mtu)2356 static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
2357 {
2358 struct mlx4_en_priv *priv = netdev_priv(dev);
2359
2360 if (mtu > MLX4_EN_MAX_XDP_MTU) {
2361 en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
2362 mtu, MLX4_EN_MAX_XDP_MTU);
2363 return false;
2364 }
2365
2366 return true;
2367 }
2368
mlx4_en_change_mtu(struct net_device * dev,int new_mtu)2369 static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
2370 {
2371 struct mlx4_en_priv *priv = netdev_priv(dev);
2372 struct mlx4_en_dev *mdev = priv->mdev;
2373 int err = 0;
2374
2375 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
2376 dev->mtu, new_mtu);
2377
2378 if (priv->tx_ring_num[TX_XDP] &&
2379 !mlx4_en_check_xdp_mtu(dev, new_mtu))
2380 return -EOPNOTSUPP;
2381
2382 dev->mtu = new_mtu;
2383
2384 if (netif_running(dev)) {
2385 mutex_lock(&mdev->state_lock);
2386 if (!mdev->device_up) {
2387 /* NIC is probably restarting - let restart task reset
2388 * the port */
2389 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
2390 } else {
2391 mlx4_en_stop_port(dev, 1);
2392 err = mlx4_en_start_port(dev);
2393 if (err) {
2394 en_err(priv, "Failed restarting port:%d\n",
2395 priv->port);
2396 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING,
2397 &priv->state))
2398 queue_work(mdev->workqueue, &priv->restart_task);
2399 }
2400 }
2401 mutex_unlock(&mdev->state_lock);
2402 }
2403 return 0;
2404 }
2405
mlx4_en_hwtstamp_set(struct net_device * dev,struct ifreq * ifr)2406 static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
2407 {
2408 struct mlx4_en_priv *priv = netdev_priv(dev);
2409 struct mlx4_en_dev *mdev = priv->mdev;
2410 struct hwtstamp_config config;
2411
2412 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
2413 return -EFAULT;
2414
2415 /* reserved for future extensions */
2416 if (config.flags)
2417 return -EINVAL;
2418
2419 /* device doesn't support time stamping */
2420 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
2421 return -EINVAL;
2422
2423 /* TX HW timestamp */
2424 switch (config.tx_type) {
2425 case HWTSTAMP_TX_OFF:
2426 case HWTSTAMP_TX_ON:
2427 break;
2428 default:
2429 return -ERANGE;
2430 }
2431
2432 /* RX HW timestamp */
2433 switch (config.rx_filter) {
2434 case HWTSTAMP_FILTER_NONE:
2435 break;
2436 case HWTSTAMP_FILTER_ALL:
2437 case HWTSTAMP_FILTER_SOME:
2438 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
2439 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
2440 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
2441 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
2442 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
2443 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
2444 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
2445 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
2446 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
2447 case HWTSTAMP_FILTER_PTP_V2_EVENT:
2448 case HWTSTAMP_FILTER_PTP_V2_SYNC:
2449 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
2450 case HWTSTAMP_FILTER_NTP_ALL:
2451 config.rx_filter = HWTSTAMP_FILTER_ALL;
2452 break;
2453 default:
2454 return -ERANGE;
2455 }
2456
2457 if (mlx4_en_reset_config(dev, config, dev->features)) {
2458 config.tx_type = HWTSTAMP_TX_OFF;
2459 config.rx_filter = HWTSTAMP_FILTER_NONE;
2460 }
2461
2462 return copy_to_user(ifr->ifr_data, &config,
2463 sizeof(config)) ? -EFAULT : 0;
2464 }
2465
mlx4_en_hwtstamp_get(struct net_device * dev,struct ifreq * ifr)2466 static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
2467 {
2468 struct mlx4_en_priv *priv = netdev_priv(dev);
2469
2470 return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
2471 sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
2472 }
2473
mlx4_en_ioctl(struct net_device * dev,struct ifreq * ifr,int cmd)2474 static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2475 {
2476 switch (cmd) {
2477 case SIOCSHWTSTAMP:
2478 return mlx4_en_hwtstamp_set(dev, ifr);
2479 case SIOCGHWTSTAMP:
2480 return mlx4_en_hwtstamp_get(dev, ifr);
2481 default:
2482 return -EOPNOTSUPP;
2483 }
2484 }
2485
mlx4_en_fix_features(struct net_device * netdev,netdev_features_t features)2486 static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
2487 netdev_features_t features)
2488 {
2489 struct mlx4_en_priv *en_priv = netdev_priv(netdev);
2490 struct mlx4_en_dev *mdev = en_priv->mdev;
2491
2492 /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
2493 * enable/disable make sure S-TAG flag is always in same state as
2494 * C-TAG.
2495 */
2496 if (features & NETIF_F_HW_VLAN_CTAG_RX &&
2497 !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
2498 features |= NETIF_F_HW_VLAN_STAG_RX;
2499 else
2500 features &= ~NETIF_F_HW_VLAN_STAG_RX;
2501
2502 return features;
2503 }
2504
mlx4_en_set_features(struct net_device * netdev,netdev_features_t features)2505 static int mlx4_en_set_features(struct net_device *netdev,
2506 netdev_features_t features)
2507 {
2508 struct mlx4_en_priv *priv = netdev_priv(netdev);
2509 bool reset = false;
2510 int ret = 0;
2511
2512 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
2513 en_info(priv, "Turn %s RX-FCS\n",
2514 (features & NETIF_F_RXFCS) ? "ON" : "OFF");
2515 reset = true;
2516 }
2517
2518 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
2519 u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
2520
2521 en_info(priv, "Turn %s RX-ALL\n",
2522 ignore_fcs_value ? "ON" : "OFF");
2523 ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
2524 priv->port, ignore_fcs_value);
2525 if (ret)
2526 return ret;
2527 }
2528
2529 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
2530 en_info(priv, "Turn %s RX vlan strip offload\n",
2531 (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
2532 reset = true;
2533 }
2534
2535 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
2536 en_info(priv, "Turn %s TX vlan strip offload\n",
2537 (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
2538
2539 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
2540 en_info(priv, "Turn %s TX S-VLAN strip offload\n",
2541 (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
2542
2543 if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
2544 en_info(priv, "Turn %s loopback\n",
2545 (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
2546 mlx4_en_update_loopback_state(netdev, features);
2547 }
2548
2549 if (reset) {
2550 ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
2551 features);
2552 if (ret)
2553 return ret;
2554 }
2555
2556 return 0;
2557 }
2558
mlx4_en_set_vf_mac(struct net_device * dev,int queue,u8 * mac)2559 static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2560 {
2561 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2562 struct mlx4_en_dev *mdev = en_priv->mdev;
2563
2564 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
2565 }
2566
mlx4_en_set_vf_vlan(struct net_device * dev,int vf,u16 vlan,u8 qos,__be16 vlan_proto)2567 static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
2568 __be16 vlan_proto)
2569 {
2570 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2571 struct mlx4_en_dev *mdev = en_priv->mdev;
2572
2573 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
2574 vlan_proto);
2575 }
2576
mlx4_en_set_vf_rate(struct net_device * dev,int vf,int min_tx_rate,int max_tx_rate)2577 static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
2578 int max_tx_rate)
2579 {
2580 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2581 struct mlx4_en_dev *mdev = en_priv->mdev;
2582
2583 return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
2584 max_tx_rate);
2585 }
2586
mlx4_en_set_vf_spoofchk(struct net_device * dev,int vf,bool setting)2587 static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
2588 {
2589 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2590 struct mlx4_en_dev *mdev = en_priv->mdev;
2591
2592 return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
2593 }
2594
mlx4_en_get_vf_config(struct net_device * dev,int vf,struct ifla_vf_info * ivf)2595 static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
2596 {
2597 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2598 struct mlx4_en_dev *mdev = en_priv->mdev;
2599
2600 return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
2601 }
2602
mlx4_en_set_vf_link_state(struct net_device * dev,int vf,int link_state)2603 static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
2604 {
2605 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2606 struct mlx4_en_dev *mdev = en_priv->mdev;
2607
2608 return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
2609 }
2610
mlx4_en_get_vf_stats(struct net_device * dev,int vf,struct ifla_vf_stats * vf_stats)2611 static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
2612 struct ifla_vf_stats *vf_stats)
2613 {
2614 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2615 struct mlx4_en_dev *mdev = en_priv->mdev;
2616
2617 return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
2618 }
2619
2620 #define PORT_ID_BYTE_LEN 8
mlx4_en_get_phys_port_id(struct net_device * dev,struct netdev_phys_item_id * ppid)2621 static int mlx4_en_get_phys_port_id(struct net_device *dev,
2622 struct netdev_phys_item_id *ppid)
2623 {
2624 struct mlx4_en_priv *priv = netdev_priv(dev);
2625 struct mlx4_dev *mdev = priv->mdev->dev;
2626 int i;
2627 u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
2628
2629 if (!phys_port_id)
2630 return -EOPNOTSUPP;
2631
2632 ppid->id_len = sizeof(phys_port_id);
2633 for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
2634 ppid->id[i] = phys_port_id & 0xff;
2635 phys_port_id >>= 8;
2636 }
2637 return 0;
2638 }
2639
mlx4_udp_tunnel_sync(struct net_device * dev,unsigned int table)2640 static int mlx4_udp_tunnel_sync(struct net_device *dev, unsigned int table)
2641 {
2642 struct mlx4_en_priv *priv = netdev_priv(dev);
2643 struct udp_tunnel_info ti;
2644 int ret;
2645
2646 udp_tunnel_nic_get_port(dev, table, 0, &ti);
2647 priv->vxlan_port = ti.port;
2648
2649 ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
2650 if (ret)
2651 return ret;
2652
2653 return mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
2654 VXLAN_STEER_BY_OUTER_MAC,
2655 !!priv->vxlan_port);
2656 }
2657
2658 static const struct udp_tunnel_nic_info mlx4_udp_tunnels = {
2659 .sync_table = mlx4_udp_tunnel_sync,
2660 .flags = UDP_TUNNEL_NIC_INFO_MAY_SLEEP |
2661 UDP_TUNNEL_NIC_INFO_IPV4_ONLY,
2662 .tables = {
2663 { .n_entries = 1, .tunnel_types = UDP_TUNNEL_TYPE_VXLAN, },
2664 },
2665 };
2666
mlx4_en_features_check(struct sk_buff * skb,struct net_device * dev,netdev_features_t features)2667 static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
2668 struct net_device *dev,
2669 netdev_features_t features)
2670 {
2671 features = vlan_features_check(skb, features);
2672 features = vxlan_features_check(skb, features);
2673
2674 /* The ConnectX-3 doesn't support outer IPv6 checksums but it does
2675 * support inner IPv6 checksums and segmentation so we need to
2676 * strip that feature if this is an IPv6 encapsulated frame.
2677 */
2678 if (skb->encapsulation &&
2679 (skb->ip_summed == CHECKSUM_PARTIAL)) {
2680 struct mlx4_en_priv *priv = netdev_priv(dev);
2681
2682 if (!priv->vxlan_port ||
2683 (ip_hdr(skb)->version != 4) ||
2684 (udp_hdr(skb)->dest != priv->vxlan_port))
2685 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2686 }
2687
2688 return features;
2689 }
2690
mlx4_en_set_tx_maxrate(struct net_device * dev,int queue_index,u32 maxrate)2691 static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
2692 {
2693 struct mlx4_en_priv *priv = netdev_priv(dev);
2694 struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
2695 struct mlx4_update_qp_params params;
2696 int err;
2697
2698 if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
2699 return -EOPNOTSUPP;
2700
2701 /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
2702 if (maxrate >> 12) {
2703 params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
2704 params.rate_val = maxrate / 1000;
2705 } else if (maxrate) {
2706 params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
2707 params.rate_val = maxrate;
2708 } else { /* zero serves to revoke the QP rate-limitation */
2709 params.rate_unit = 0;
2710 params.rate_val = 0;
2711 }
2712
2713 err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
2714 ¶ms);
2715 return err;
2716 }
2717
mlx4_xdp_set(struct net_device * dev,struct bpf_prog * prog)2718 static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
2719 {
2720 struct mlx4_en_priv *priv = netdev_priv(dev);
2721 struct mlx4_en_dev *mdev = priv->mdev;
2722 struct mlx4_en_port_profile new_prof;
2723 struct bpf_prog *old_prog;
2724 struct mlx4_en_priv *tmp;
2725 int tx_changed = 0;
2726 int xdp_ring_num;
2727 int port_up = 0;
2728 int err;
2729 int i;
2730
2731 xdp_ring_num = prog ? priv->rx_ring_num : 0;
2732
2733 /* No need to reconfigure buffers when simply swapping the
2734 * program for a new one.
2735 */
2736 if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
2737 if (prog)
2738 bpf_prog_add(prog, priv->rx_ring_num - 1);
2739
2740 mutex_lock(&mdev->state_lock);
2741 for (i = 0; i < priv->rx_ring_num; i++) {
2742 old_prog = rcu_dereference_protected(
2743 priv->rx_ring[i]->xdp_prog,
2744 lockdep_is_held(&mdev->state_lock));
2745 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2746 if (old_prog)
2747 bpf_prog_put(old_prog);
2748 }
2749 mutex_unlock(&mdev->state_lock);
2750 return 0;
2751 }
2752
2753 if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
2754 return -EOPNOTSUPP;
2755
2756 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
2757 if (!tmp)
2758 return -ENOMEM;
2759
2760 if (prog)
2761 bpf_prog_add(prog, priv->rx_ring_num - 1);
2762
2763 mutex_lock(&mdev->state_lock);
2764 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
2765 new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
2766
2767 if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
2768 tx_changed = 1;
2769 new_prof.tx_ring_num[TX] =
2770 MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
2771 en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
2772 }
2773
2774 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
2775 if (err) {
2776 if (prog)
2777 bpf_prog_sub(prog, priv->rx_ring_num - 1);
2778 goto unlock_out;
2779 }
2780
2781 if (priv->port_up) {
2782 port_up = 1;
2783 mlx4_en_stop_port(dev, 1);
2784 }
2785
2786 mlx4_en_safe_replace_resources(priv, tmp);
2787 if (tx_changed)
2788 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
2789
2790 for (i = 0; i < priv->rx_ring_num; i++) {
2791 old_prog = rcu_dereference_protected(
2792 priv->rx_ring[i]->xdp_prog,
2793 lockdep_is_held(&mdev->state_lock));
2794 rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
2795 if (old_prog)
2796 bpf_prog_put(old_prog);
2797 }
2798
2799 if (port_up) {
2800 err = mlx4_en_start_port(dev);
2801 if (err) {
2802 en_err(priv, "Failed starting port %d for XDP change\n",
2803 priv->port);
2804 if (!test_and_set_bit(MLX4_EN_STATE_FLAG_RESTARTING, &priv->state))
2805 queue_work(mdev->workqueue, &priv->restart_task);
2806 }
2807 }
2808
2809 unlock_out:
2810 mutex_unlock(&mdev->state_lock);
2811 kfree(tmp);
2812 return err;
2813 }
2814
mlx4_xdp(struct net_device * dev,struct netdev_bpf * xdp)2815 static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp)
2816 {
2817 switch (xdp->command) {
2818 case XDP_SETUP_PROG:
2819 return mlx4_xdp_set(dev, xdp->prog);
2820 default:
2821 return -EINVAL;
2822 }
2823 }
2824
2825 static const struct net_device_ops mlx4_netdev_ops = {
2826 .ndo_open = mlx4_en_open,
2827 .ndo_stop = mlx4_en_close,
2828 .ndo_start_xmit = mlx4_en_xmit,
2829 .ndo_select_queue = mlx4_en_select_queue,
2830 .ndo_get_stats64 = mlx4_en_get_stats64,
2831 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2832 .ndo_set_mac_address = mlx4_en_set_mac,
2833 .ndo_validate_addr = eth_validate_addr,
2834 .ndo_change_mtu = mlx4_en_change_mtu,
2835 .ndo_do_ioctl = mlx4_en_ioctl,
2836 .ndo_tx_timeout = mlx4_en_tx_timeout,
2837 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2838 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2839 .ndo_set_features = mlx4_en_set_features,
2840 .ndo_fix_features = mlx4_en_fix_features,
2841 .ndo_setup_tc = __mlx4_en_setup_tc,
2842 #ifdef CONFIG_RFS_ACCEL
2843 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2844 #endif
2845 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2846 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
2847 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
2848 .ndo_features_check = mlx4_en_features_check,
2849 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2850 .ndo_bpf = mlx4_xdp,
2851 };
2852
2853 static const struct net_device_ops mlx4_netdev_ops_master = {
2854 .ndo_open = mlx4_en_open,
2855 .ndo_stop = mlx4_en_close,
2856 .ndo_start_xmit = mlx4_en_xmit,
2857 .ndo_select_queue = mlx4_en_select_queue,
2858 .ndo_get_stats64 = mlx4_en_get_stats64,
2859 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2860 .ndo_set_mac_address = mlx4_en_set_mac,
2861 .ndo_validate_addr = eth_validate_addr,
2862 .ndo_change_mtu = mlx4_en_change_mtu,
2863 .ndo_tx_timeout = mlx4_en_tx_timeout,
2864 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2865 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2866 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
2867 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
2868 .ndo_set_vf_rate = mlx4_en_set_vf_rate,
2869 .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
2870 .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
2871 .ndo_get_vf_stats = mlx4_en_get_vf_stats,
2872 .ndo_get_vf_config = mlx4_en_get_vf_config,
2873 .ndo_set_features = mlx4_en_set_features,
2874 .ndo_fix_features = mlx4_en_fix_features,
2875 .ndo_setup_tc = __mlx4_en_setup_tc,
2876 #ifdef CONFIG_RFS_ACCEL
2877 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2878 #endif
2879 .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
2880 .ndo_udp_tunnel_add = udp_tunnel_nic_add_port,
2881 .ndo_udp_tunnel_del = udp_tunnel_nic_del_port,
2882 .ndo_features_check = mlx4_en_features_check,
2883 .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
2884 .ndo_bpf = mlx4_xdp,
2885 };
2886
2887 struct mlx4_en_bond {
2888 struct work_struct work;
2889 struct mlx4_en_priv *priv;
2890 int is_bonded;
2891 struct mlx4_port_map port_map;
2892 };
2893
mlx4_en_bond_work(struct work_struct * work)2894 static void mlx4_en_bond_work(struct work_struct *work)
2895 {
2896 struct mlx4_en_bond *bond = container_of(work,
2897 struct mlx4_en_bond,
2898 work);
2899 int err = 0;
2900 struct mlx4_dev *dev = bond->priv->mdev->dev;
2901
2902 if (bond->is_bonded) {
2903 if (!mlx4_is_bonded(dev)) {
2904 err = mlx4_bond(dev);
2905 if (err)
2906 en_err(bond->priv, "Fail to bond device\n");
2907 }
2908 if (!err) {
2909 err = mlx4_port_map_set(dev, &bond->port_map);
2910 if (err)
2911 en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
2912 bond->port_map.port1,
2913 bond->port_map.port2,
2914 err);
2915 }
2916 } else if (mlx4_is_bonded(dev)) {
2917 err = mlx4_unbond(dev);
2918 if (err)
2919 en_err(bond->priv, "Fail to unbond device\n");
2920 }
2921 dev_put(bond->priv->dev);
2922 kfree(bond);
2923 }
2924
mlx4_en_queue_bond_work(struct mlx4_en_priv * priv,int is_bonded,u8 v2p_p1,u8 v2p_p2)2925 static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
2926 u8 v2p_p1, u8 v2p_p2)
2927 {
2928 struct mlx4_en_bond *bond = NULL;
2929
2930 bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
2931 if (!bond)
2932 return -ENOMEM;
2933
2934 INIT_WORK(&bond->work, mlx4_en_bond_work);
2935 bond->priv = priv;
2936 bond->is_bonded = is_bonded;
2937 bond->port_map.port1 = v2p_p1;
2938 bond->port_map.port2 = v2p_p2;
2939 dev_hold(priv->dev);
2940 queue_work(priv->mdev->workqueue, &bond->work);
2941 return 0;
2942 }
2943
mlx4_en_netdev_event(struct notifier_block * this,unsigned long event,void * ptr)2944 int mlx4_en_netdev_event(struct notifier_block *this,
2945 unsigned long event, void *ptr)
2946 {
2947 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
2948 u8 port = 0;
2949 struct mlx4_en_dev *mdev;
2950 struct mlx4_dev *dev;
2951 int i, num_eth_ports = 0;
2952 bool do_bond = true;
2953 struct mlx4_en_priv *priv;
2954 u8 v2p_port1 = 0;
2955 u8 v2p_port2 = 0;
2956
2957 if (!net_eq(dev_net(ndev), &init_net))
2958 return NOTIFY_DONE;
2959
2960 mdev = container_of(this, struct mlx4_en_dev, nb);
2961 dev = mdev->dev;
2962
2963 /* Go into this mode only when two network devices set on two ports
2964 * of the same mlx4 device are slaves of the same bonding master
2965 */
2966 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
2967 ++num_eth_ports;
2968 if (!port && (mdev->pndev[i] == ndev))
2969 port = i;
2970 mdev->upper[i] = mdev->pndev[i] ?
2971 netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
2972 /* condition not met: network device is a slave */
2973 if (!mdev->upper[i])
2974 do_bond = false;
2975 if (num_eth_ports < 2)
2976 continue;
2977 /* condition not met: same master */
2978 if (mdev->upper[i] != mdev->upper[i-1])
2979 do_bond = false;
2980 }
2981 /* condition not met: 2 salves */
2982 do_bond = (num_eth_ports == 2) ? do_bond : false;
2983
2984 /* handle only events that come with enough info */
2985 if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
2986 return NOTIFY_DONE;
2987
2988 priv = netdev_priv(ndev);
2989 if (do_bond) {
2990 struct netdev_notifier_bonding_info *notifier_info = ptr;
2991 struct netdev_bonding_info *bonding_info =
2992 ¬ifier_info->bonding_info;
2993
2994 /* required mode 1, 2 or 4 */
2995 if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
2996 (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
2997 (bonding_info->master.bond_mode != BOND_MODE_8023AD))
2998 do_bond = false;
2999
3000 /* require exactly 2 slaves */
3001 if (bonding_info->master.num_slaves != 2)
3002 do_bond = false;
3003
3004 /* calc v2p */
3005 if (do_bond) {
3006 if (bonding_info->master.bond_mode ==
3007 BOND_MODE_ACTIVEBACKUP) {
3008 /* in active-backup mode virtual ports are
3009 * mapped to the physical port of the active
3010 * slave */
3011 if (bonding_info->slave.state ==
3012 BOND_STATE_BACKUP) {
3013 if (port == 1) {
3014 v2p_port1 = 2;
3015 v2p_port2 = 2;
3016 } else {
3017 v2p_port1 = 1;
3018 v2p_port2 = 1;
3019 }
3020 } else { /* BOND_STATE_ACTIVE */
3021 if (port == 1) {
3022 v2p_port1 = 1;
3023 v2p_port2 = 1;
3024 } else {
3025 v2p_port1 = 2;
3026 v2p_port2 = 2;
3027 }
3028 }
3029 } else { /* Active-Active */
3030 /* in active-active mode a virtual port is
3031 * mapped to the native physical port if and only
3032 * if the physical port is up */
3033 __s8 link = bonding_info->slave.link;
3034
3035 if (port == 1)
3036 v2p_port2 = 2;
3037 else
3038 v2p_port1 = 1;
3039 if ((link == BOND_LINK_UP) ||
3040 (link == BOND_LINK_FAIL)) {
3041 if (port == 1)
3042 v2p_port1 = 1;
3043 else
3044 v2p_port2 = 2;
3045 } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
3046 if (port == 1)
3047 v2p_port1 = 2;
3048 else
3049 v2p_port2 = 1;
3050 }
3051 }
3052 }
3053 }
3054
3055 mlx4_en_queue_bond_work(priv, do_bond,
3056 v2p_port1, v2p_port2);
3057
3058 return NOTIFY_DONE;
3059 }
3060
mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev * dev,struct mlx4_en_stats_bitmap * stats_bitmap,u8 rx_ppp,u8 rx_pause,u8 tx_ppp,u8 tx_pause)3061 void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
3062 struct mlx4_en_stats_bitmap *stats_bitmap,
3063 u8 rx_ppp, u8 rx_pause,
3064 u8 tx_ppp, u8 tx_pause)
3065 {
3066 int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
3067
3068 if (!mlx4_is_slave(dev) &&
3069 (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
3070 mutex_lock(&stats_bitmap->mutex);
3071 bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
3072
3073 if (rx_ppp)
3074 bitmap_set(stats_bitmap->bitmap, last_i,
3075 NUM_FLOW_PRIORITY_STATS_RX);
3076 last_i += NUM_FLOW_PRIORITY_STATS_RX;
3077
3078 if (rx_pause && !(rx_ppp))
3079 bitmap_set(stats_bitmap->bitmap, last_i,
3080 NUM_FLOW_STATS_RX);
3081 last_i += NUM_FLOW_STATS_RX;
3082
3083 if (tx_ppp)
3084 bitmap_set(stats_bitmap->bitmap, last_i,
3085 NUM_FLOW_PRIORITY_STATS_TX);
3086 last_i += NUM_FLOW_PRIORITY_STATS_TX;
3087
3088 if (tx_pause && !(tx_ppp))
3089 bitmap_set(stats_bitmap->bitmap, last_i,
3090 NUM_FLOW_STATS_TX);
3091 last_i += NUM_FLOW_STATS_TX;
3092
3093 mutex_unlock(&stats_bitmap->mutex);
3094 }
3095 }
3096
mlx4_en_set_stats_bitmap(struct mlx4_dev * dev,struct mlx4_en_stats_bitmap * stats_bitmap,u8 rx_ppp,u8 rx_pause,u8 tx_ppp,u8 tx_pause)3097 void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
3098 struct mlx4_en_stats_bitmap *stats_bitmap,
3099 u8 rx_ppp, u8 rx_pause,
3100 u8 tx_ppp, u8 tx_pause)
3101 {
3102 int last_i = 0;
3103
3104 mutex_init(&stats_bitmap->mutex);
3105 bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
3106
3107 if (mlx4_is_slave(dev)) {
3108 bitmap_set(stats_bitmap->bitmap, last_i +
3109 MLX4_FIND_NETDEV_STAT(rx_packets), 1);
3110 bitmap_set(stats_bitmap->bitmap, last_i +
3111 MLX4_FIND_NETDEV_STAT(tx_packets), 1);
3112 bitmap_set(stats_bitmap->bitmap, last_i +
3113 MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
3114 bitmap_set(stats_bitmap->bitmap, last_i +
3115 MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
3116 bitmap_set(stats_bitmap->bitmap, last_i +
3117 MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
3118 bitmap_set(stats_bitmap->bitmap, last_i +
3119 MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
3120 } else {
3121 bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
3122 }
3123 last_i += NUM_MAIN_STATS;
3124
3125 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
3126 last_i += NUM_PORT_STATS;
3127
3128 if (mlx4_is_master(dev))
3129 bitmap_set(stats_bitmap->bitmap, last_i,
3130 NUM_PF_STATS);
3131 last_i += NUM_PF_STATS;
3132
3133 mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
3134 rx_ppp, rx_pause,
3135 tx_ppp, tx_pause);
3136 last_i += NUM_FLOW_STATS;
3137
3138 if (!mlx4_is_slave(dev))
3139 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
3140 last_i += NUM_PKT_STATS;
3141
3142 bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
3143 last_i += NUM_XDP_STATS;
3144
3145 if (!mlx4_is_slave(dev))
3146 bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS);
3147 last_i += NUM_PHY_STATS;
3148 }
3149
mlx4_en_init_netdev(struct mlx4_en_dev * mdev,int port,struct mlx4_en_port_profile * prof)3150 int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
3151 struct mlx4_en_port_profile *prof)
3152 {
3153 struct net_device *dev;
3154 struct mlx4_en_priv *priv;
3155 int i, t;
3156 int err;
3157
3158 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
3159 MAX_TX_RINGS, MAX_RX_RINGS);
3160 if (dev == NULL)
3161 return -ENOMEM;
3162
3163 netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
3164 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
3165
3166 SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
3167 dev->dev_port = port - 1;
3168
3169 /*
3170 * Initialize driver private data
3171 */
3172
3173 priv = netdev_priv(dev);
3174 memset(priv, 0, sizeof(struct mlx4_en_priv));
3175 priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
3176 spin_lock_init(&priv->stats_lock);
3177 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
3178 INIT_WORK(&priv->restart_task, mlx4_en_restart);
3179 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
3180 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
3181 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
3182 #ifdef CONFIG_RFS_ACCEL
3183 INIT_LIST_HEAD(&priv->filters);
3184 spin_lock_init(&priv->filters_lock);
3185 #endif
3186
3187 priv->dev = dev;
3188 priv->mdev = mdev;
3189 priv->ddev = &mdev->pdev->dev;
3190 priv->prof = prof;
3191 priv->port = port;
3192 priv->port_up = false;
3193 priv->flags = prof->flags;
3194 priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
3195 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
3196 MLX4_WQE_CTRL_SOLICITED);
3197 priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up;
3198 priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
3199 netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
3200
3201 for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
3202 priv->tx_ring_num[t] = prof->tx_ring_num[t];
3203 if (!priv->tx_ring_num[t])
3204 continue;
3205
3206 priv->tx_ring[t] = kcalloc(MAX_TX_RINGS,
3207 sizeof(struct mlx4_en_tx_ring *),
3208 GFP_KERNEL);
3209 if (!priv->tx_ring[t]) {
3210 err = -ENOMEM;
3211 goto out;
3212 }
3213 priv->tx_cq[t] = kcalloc(MAX_TX_RINGS,
3214 sizeof(struct mlx4_en_cq *),
3215 GFP_KERNEL);
3216 if (!priv->tx_cq[t]) {
3217 err = -ENOMEM;
3218 goto out;
3219 }
3220 }
3221 priv->rx_ring_num = prof->rx_ring_num;
3222 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
3223 priv->cqe_size = mdev->dev->caps.cqe_size;
3224 priv->mac_index = -1;
3225 priv->msg_enable = MLX4_EN_MSG_LEVEL;
3226 #ifdef CONFIG_MLX4_EN_DCB
3227 if (!mlx4_is_slave(priv->mdev->dev)) {
3228 u8 prio;
3229
3230 for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
3231 priv->ets.prio_tc[prio] = prio;
3232 priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR;
3233 }
3234
3235 priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
3236 DCB_CAP_DCBX_VER_IEEE;
3237 priv->flags |= MLX4_EN_DCB_ENABLED;
3238 priv->cee_config.pfc_state = false;
3239
3240 for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
3241 priv->cee_config.dcb_pfc[i] = pfc_disabled;
3242
3243 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
3244 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
3245 } else {
3246 en_info(priv, "enabling only PFC DCB ops\n");
3247 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
3248 }
3249 }
3250 #endif
3251
3252 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
3253 INIT_HLIST_HEAD(&priv->mac_hash[i]);
3254
3255 /* Query for default mac and max mtu */
3256 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
3257
3258 if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
3259 MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
3260 priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
3261
3262 /* Set default MAC */
3263 dev->addr_len = ETH_ALEN;
3264 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
3265 if (!is_valid_ether_addr(dev->dev_addr)) {
3266 en_err(priv, "Port: %d, invalid mac burned: %pM, quitting\n",
3267 priv->port, dev->dev_addr);
3268 err = -EINVAL;
3269 goto out;
3270 } else if (mlx4_is_slave(priv->mdev->dev) &&
3271 (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
3272 /* Random MAC was assigned in mlx4_slave_cap
3273 * in mlx4_core module
3274 */
3275 dev->addr_assign_type |= NET_ADDR_RANDOM;
3276 en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
3277 }
3278
3279 memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
3280
3281 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
3282 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
3283 err = mlx4_en_alloc_resources(priv);
3284 if (err)
3285 goto out;
3286
3287 /* Initialize time stamping config */
3288 priv->hwtstamp_config.flags = 0;
3289 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
3290 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
3291
3292 /* Allocate page for receive rings */
3293 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
3294 MLX4_EN_PAGE_SIZE);
3295 if (err) {
3296 en_err(priv, "Failed to allocate page for rx qps\n");
3297 goto out;
3298 }
3299 priv->allocated = 1;
3300
3301 /*
3302 * Initialize netdev entry points
3303 */
3304 if (mlx4_is_master(priv->mdev->dev))
3305 dev->netdev_ops = &mlx4_netdev_ops_master;
3306 else
3307 dev->netdev_ops = &mlx4_netdev_ops;
3308 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
3309 netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
3310 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3311
3312 dev->ethtool_ops = &mlx4_en_ethtool_ops;
3313
3314 /*
3315 * Set driver features
3316 */
3317 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
3318 if (mdev->LSO_support)
3319 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
3320
3321 if (mdev->dev->caps.tunnel_offload_mode ==
3322 MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3323 dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
3324 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3325 NETIF_F_GSO_PARTIAL;
3326 dev->features |= NETIF_F_GSO_UDP_TUNNEL |
3327 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3328 NETIF_F_GSO_PARTIAL;
3329 dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
3330 dev->hw_enc_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3331 NETIF_F_RXCSUM |
3332 NETIF_F_TSO | NETIF_F_TSO6 |
3333 NETIF_F_GSO_UDP_TUNNEL |
3334 NETIF_F_GSO_UDP_TUNNEL_CSUM |
3335 NETIF_F_GSO_PARTIAL;
3336
3337 dev->udp_tunnel_nic_info = &mlx4_udp_tunnels;
3338 }
3339
3340 dev->vlan_features = dev->hw_features;
3341
3342 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
3343 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
3344 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
3345 NETIF_F_HW_VLAN_CTAG_FILTER;
3346 dev->hw_features |= NETIF_F_LOOPBACK |
3347 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
3348
3349 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
3350 dev->features |= NETIF_F_HW_VLAN_STAG_RX |
3351 NETIF_F_HW_VLAN_STAG_FILTER;
3352 dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
3353 }
3354
3355 if (mlx4_is_slave(mdev->dev)) {
3356 bool vlan_offload_disabled;
3357 int phv;
3358
3359 err = get_phv_bit(mdev->dev, port, &phv);
3360 if (!err && phv) {
3361 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3362 priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
3363 }
3364 err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
3365 &vlan_offload_disabled);
3366 if (!err && vlan_offload_disabled) {
3367 dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3368 NETIF_F_HW_VLAN_CTAG_RX |
3369 NETIF_F_HW_VLAN_STAG_TX |
3370 NETIF_F_HW_VLAN_STAG_RX);
3371 dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
3372 NETIF_F_HW_VLAN_CTAG_RX |
3373 NETIF_F_HW_VLAN_STAG_TX |
3374 NETIF_F_HW_VLAN_STAG_RX);
3375 }
3376 } else {
3377 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
3378 !(mdev->dev->caps.flags2 &
3379 MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
3380 dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
3381 }
3382
3383 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
3384 dev->hw_features |= NETIF_F_RXFCS;
3385
3386 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
3387 dev->hw_features |= NETIF_F_RXALL;
3388
3389 if (mdev->dev->caps.steering_mode ==
3390 MLX4_STEERING_MODE_DEVICE_MANAGED &&
3391 mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
3392 dev->hw_features |= NETIF_F_NTUPLE;
3393
3394 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
3395 dev->priv_flags |= IFF_UNICAST_FLT;
3396
3397 /* Setting a default hash function value */
3398 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
3399 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3400 } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
3401 priv->rss_hash_fn = ETH_RSS_HASH_XOR;
3402 } else {
3403 en_warn(priv,
3404 "No RSS hash capabilities exposed, using Toeplitz\n");
3405 priv->rss_hash_fn = ETH_RSS_HASH_TOP;
3406 }
3407
3408 /* MTU range: 68 - hw-specific max */
3409 dev->min_mtu = ETH_MIN_MTU;
3410 dev->max_mtu = priv->max_mtu;
3411
3412 mdev->pndev[port] = dev;
3413 mdev->upper[port] = NULL;
3414
3415 netif_carrier_off(dev);
3416 mlx4_en_set_default_moderation(priv);
3417
3418 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
3419 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
3420
3421 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
3422
3423 /* Configure port */
3424 mlx4_en_calc_rx_buf(dev);
3425 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
3426 priv->rx_skb_size + ETH_FCS_LEN,
3427 prof->tx_pause, prof->tx_ppp,
3428 prof->rx_pause, prof->rx_ppp);
3429 if (err) {
3430 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
3431 priv->port, err);
3432 goto out;
3433 }
3434
3435 if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
3436 err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
3437 if (err) {
3438 en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
3439 err);
3440 goto out;
3441 }
3442 }
3443
3444 /* Init port */
3445 en_warn(priv, "Initializing port\n");
3446 err = mlx4_INIT_PORT(mdev->dev, priv->port);
3447 if (err) {
3448 en_err(priv, "Failed Initializing port\n");
3449 goto out;
3450 }
3451 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
3452
3453 /* Initialize time stamp mechanism */
3454 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
3455 mlx4_en_init_timestamp(mdev);
3456
3457 queue_delayed_work(mdev->workqueue, &priv->service_task,
3458 SERVICE_TASK_DELAY);
3459
3460 mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
3461 mdev->profile.prof[priv->port].rx_ppp,
3462 mdev->profile.prof[priv->port].rx_pause,
3463 mdev->profile.prof[priv->port].tx_ppp,
3464 mdev->profile.prof[priv->port].tx_pause);
3465
3466 err = register_netdev(dev);
3467 if (err) {
3468 en_err(priv, "Netdev registration failed for port %d\n", port);
3469 goto out;
3470 }
3471
3472 priv->registered = 1;
3473 devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
3474 dev);
3475
3476 return 0;
3477
3478 out:
3479 mlx4_en_destroy_netdev(dev);
3480 return err;
3481 }
3482
mlx4_en_reset_config(struct net_device * dev,struct hwtstamp_config ts_config,netdev_features_t features)3483 int mlx4_en_reset_config(struct net_device *dev,
3484 struct hwtstamp_config ts_config,
3485 netdev_features_t features)
3486 {
3487 struct mlx4_en_priv *priv = netdev_priv(dev);
3488 struct mlx4_en_dev *mdev = priv->mdev;
3489 struct mlx4_en_port_profile new_prof;
3490 struct mlx4_en_priv *tmp;
3491 int port_up = 0;
3492 int err = 0;
3493
3494 if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
3495 priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
3496 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3497 !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
3498 return 0; /* Nothing to change */
3499
3500 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
3501 (features & NETIF_F_HW_VLAN_CTAG_RX) &&
3502 (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
3503 en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
3504 return -EINVAL;
3505 }
3506
3507 tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
3508 if (!tmp)
3509 return -ENOMEM;
3510
3511 mutex_lock(&mdev->state_lock);
3512
3513 memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
3514 memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
3515
3516 err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
3517 if (err)
3518 goto out;
3519
3520 if (priv->port_up) {
3521 port_up = 1;
3522 mlx4_en_stop_port(dev, 1);
3523 }
3524
3525 mlx4_en_safe_replace_resources(priv, tmp);
3526
3527 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
3528 if (features & NETIF_F_HW_VLAN_CTAG_RX)
3529 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3530 else
3531 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3532 } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
3533 /* RX time-stamping is OFF, update the RX vlan offload
3534 * to the latest wanted state
3535 */
3536 if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
3537 dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3538 else
3539 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3540 }
3541
3542 if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
3543 if (features & NETIF_F_RXFCS)
3544 dev->features |= NETIF_F_RXFCS;
3545 else
3546 dev->features &= ~NETIF_F_RXFCS;
3547 }
3548
3549 /* RX vlan offload and RX time-stamping can't co-exist !
3550 * Regardless of the caller's choice,
3551 * Turn Off RX vlan offload in case of time-stamping is ON
3552 */
3553 if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
3554 if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
3555 en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
3556 dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
3557 }
3558
3559 if (port_up) {
3560 err = mlx4_en_start_port(dev);
3561 if (err)
3562 en_err(priv, "Failed starting port\n");
3563 }
3564
3565 if (!err)
3566 err = mlx4_en_moderation_update(priv);
3567 out:
3568 mutex_unlock(&mdev->state_lock);
3569 kfree(tmp);
3570 if (!err)
3571 netdev_features_change(dev);
3572 return err;
3573 }
3574