1/* 2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved. 3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without modification, 6 * are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, this list of 9 * conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list 12 * of conditions and the following disclaimer in the documentation and/or other materials 13 * provided with the distribution. 14 * 15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used 16 * to endorse or promote products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31.syntax unified 32.arch armv7e-m 33.fpu fpv4-sp-d16 34.thumb 35 36.equ OS_FPU_CPACR, 0xE000ED88 37.equ OS_FPU_CPACR_ENABLE, 0x00F00000 38.equ OS_NVIC_INT_CTRL, 0xE000ED04 39.equ OS_NVIC_SYSPRI2, 0xE000ED20 40.equ OS_NVIC_PENDSV_PRI, 0xF0F00000 41.equ OS_NVIC_PENDSVSET, 0x10000000 42.equ OS_TASK_STATUS_RUNNING, 0x0010 43 44 .section .text 45 .thumb 46 47.macro SIGNAL_CONTEXT_RESTORE 48 push {r12, lr} 49 blx OsSignalTaskContextRestore 50 pop {r12, lr} 51 cmp r0, #0 52 mov r1, r0 53 bne SignalContextRestore 54.endm 55 56 .type HalStartToRun, %function 57 .global HalStartToRun 58HalStartToRun: 59 .fnstart 60 .cantunwind 61 62 ldr r4, =OS_NVIC_SYSPRI2 63 ldr r5, =OS_NVIC_PENDSV_PRI 64 str r5, [r4] 65 66 mov r0, #2 67 msr CONTROL, r0 68 69 ldr r1, =g_losTask 70 ldr r0, [r1, #4] 71 ldr r12, [r0] 72 73 ldr.w r1, =OS_FPU_CPACR 74 ldr r1, [r1] 75 and r1, r1, #OS_FPU_CPACR_ENABLE 76 cmp r1, #OS_FPU_CPACR_ENABLE 77 bne __DisabledFPU 78 add r12, r12, #100 79 80 ldmfd r12!, {R0-R7} 81 add r12, r12, #72 82 msr psp, r12 83 vpush {s0} 84 vpop {s0} 85 mov lr, r5 86 cpsie i 87 bx r6 88 89__DisabledFPU: 90 add r12, r12, #36 91 92 ldmfd r12!, {r0-r7} 93 msr psp, r12 94 mov lr, r5 95 cpsie I 96 bx r6 97 98 .fnend 99 100 .type ArchIntLock, %function 101 .global ArchIntLock 102ArchIntLock: 103 .fnstart 104 .cantunwind 105 106 MRS R0, PRIMASK 107 CPSID I 108 BX LR 109 .fnend 110 111 .type ArchIntUnLock, %function 112 .global ArchIntUnLock 113ArchIntUnLock: 114 .fnstart 115 .cantunwind 116 117 MRS R0, PRIMASK 118 CPSIE I 119 BX LR 120 .fnend 121 122 .type ArchIntRestore, %function 123 .global ArchIntRestore 124ArchIntRestore: 125 .fnstart 126 .cantunwind 127 128 MSR PRIMASK, R0 129 BX LR 130 .fnend 131 132 .type ArchTaskSchedule, %function 133 .global ArchTaskSchedule 134ArchTaskSchedule: 135 .fnstart 136 .cantunwind 137 138 ldr r0, =OS_NVIC_INT_CTRL 139 ldr r1, =OS_NVIC_PENDSVSET 140 str r1, [r0] 141 bx lr 142 dsb 143 isb 144 .fnend 145 146 .type HalPendSV, %function 147 .global HalPendSV 148HalPendSV: 149 .fnstart 150 .cantunwind 151 152 mrs r12, PRIMASK 153 cpsid I 154 155HalTaskSwitch: 156 SIGNAL_CONTEXT_RESTORE 157 158 push {r12, lr} 159 blx OsSchedTaskSwitch 160 pop {r12, lr} 161 cmp r0, #0 162 mov r0, lr 163 bne TaskContextSwitch 164 msr PRIMASK, r12 165 bx lr 166 167TaskContextSwitch: 168 mov lr, r0 169 mrs r0, psp 170 171 stmfd r0!, {r4-r12} 172 ldr.w r3, =OS_FPU_CPACR 173 ldr r3, [r3] 174 and r3, r3, #OS_FPU_CPACR_ENABLE 175 cmp r3, #OS_FPU_CPACR_ENABLE 176 bne __DisabledFPU1 177 vstmdb r0!, {d8-d15} 178 179__DisabledFPU1: 180 ldr r5, =g_losTask 181 ldr r6, [r5] 182 str r0, [r6] 183 184 ldr r0, [r5, #4] 185 str r0, [r5] 186 ldr r1, [r0] 187 188SignalContextRestore: 189 ldr.w r3, =OS_FPU_CPACR 190 ldr r3, [r3] 191 and r3, r3, #OS_FPU_CPACR_ENABLE 192 cmp r3, #OS_FPU_CPACR_ENABLE 193 bne __DisabledFPU2 194 vldmia r1!, {d8-d15} 195 196__DisabledFPU2: 197 ldmfd r1!, {r4-r12} 198 msr psp, r1 199 200 msr PRIMASK, r12 201 202 bx lr 203 .fnend 204