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1 /*
2  * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3  * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without modification,
6  * are permitted provided that the following conditions are met:
7  *
8  * 1. Redistributions of source code must retain the above copyright notice, this list of
9  *    conditions and the following disclaimer.
10  *
11  * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12  *    of conditions and the following disclaimer in the documentation and/or other materials
13  *    provided with the distribution.
14  *
15  * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16  *    to endorse or promote products derived from this software without specific prior written
17  *    permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include "los_interrupt.h"
33 #include "securec.h"
34 #include <stdarg.h>
35 #include "los_arch_interrupt.h"
36 #include "los_context.h"
37 #include "los_debug.h"
38 #include "los_hook.h"
39 #include "los_task.h"
40 #include "los_sched.h"
41 #include "los_memory.h"
42 #include "los_membox.h"
43 
44 UINT32 g_intCount = 0;
45 
46 #ifdef __ICCARM__
47 #pragma location = ".data.vector"
48 #pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
49 #elif defined(__CC_ARM) || defined(__GNUC__)
50 LITE_OS_SEC_VEC
51 #endif
52 /* *
53  * @ingroup los_hwi
54  * Hardware interrupt form mapping handling function array.
55  */
56 STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
57 
58 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
59 
60 typedef struct {
61     HWI_PROC_FUNC pfnHandler;
62     VOID *pParm;
63 } HWI_HANDLER_FUNC;
64 
65 /* *
66  * @ingroup los_hwi
67  * Hardware interrupt handler form mapping handling function array.
68  */
69 STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
70 
71 /* *
72  * @ingroup los_hwi
73  * Set interrupt vector table.
74  */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector,VOID * arg)75 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
76 {
77     if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
78         g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
79         g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
80         g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
81     }
82 }
83 
84 #else
85 /* *
86  * @ingroup los_hwi
87  * hardware interrupt handler form mapping handling function array.
88  */
89 STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
90 
91 /* *
92  * @ingroup los_hwi
93  * Set interrupt vector table.
94  */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector)95 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
96 {
97     if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
98         g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
99         g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
100     }
101 }
102 #endif
103 
SysTick_Handler(VOID)104 WEAK VOID SysTick_Handler(VOID)
105 {
106     return;
107 }
108 
109 /* ****************************************************************************
110  Function    : HwiNumGet
111  Description : Get an interrupt number
112  Input       : None
113  Output      : None
114  Return      : Interrupt Indexes number
115  **************************************************************************** */
HwiNumGet(VOID)116 STATIC UINT32 HwiNumGet(VOID)
117 {
118     return __get_IPSR();
119 }
120 
HwiUnmask(HWI_HANDLE_T hwiNum)121 STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
122 {
123     if (hwiNum >= OS_HWI_MAX_NUM) {
124         return OS_ERRNO_HWI_NUM_INVALID;
125     }
126 
127     NVIC_EnableIRQ((IRQn_Type)hwiNum);
128 
129     return LOS_OK;
130 }
131 
HwiMask(HWI_HANDLE_T hwiNum)132 STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
133 {
134     if (hwiNum >= OS_HWI_MAX_NUM) {
135         return OS_ERRNO_HWI_NUM_INVALID;
136     }
137 
138     NVIC_DisableIRQ((IRQn_Type)hwiNum);
139 
140     return LOS_OK;
141 }
142 
HwiSetPriority(HWI_HANDLE_T hwiNum,UINT8 priority)143 STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
144 {
145     if (hwiNum >= OS_HWI_MAX_NUM) {
146         return OS_ERRNO_HWI_NUM_INVALID;
147     }
148 
149     if (priority > OS_HWI_PRIO_LOWEST) {
150         return OS_ERRNO_HWI_PRIO_INVALID;
151     }
152 
153     NVIC_SetPriority((IRQn_Type)hwiNum, priority);
154 
155     return LOS_OK;
156 }
157 
HwiPending(HWI_HANDLE_T hwiNum)158 STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
159 {
160     if (hwiNum >= OS_HWI_MAX_NUM) {
161         return OS_ERRNO_HWI_NUM_INVALID;
162     }
163 
164     NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
165 
166     return LOS_OK;
167 }
168 
HwiClear(HWI_HANDLE_T hwiNum)169 STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
170 {
171     if (hwiNum >= OS_HWI_MAX_NUM) {
172         return OS_ERRNO_HWI_NUM_INVALID;
173     }
174 
175     NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
176 
177     return LOS_OK;
178 }
179 
180 HwiControllerOps g_archHwiOps = {
181     .enableIrq      = HwiUnmask,
182     .disableIrq     = HwiMask,
183     .setIrqPriority = HwiSetPriority,
184     .getCurIrqNum   = HwiNumGet,
185     .triggerIrq     = HwiPending,
186     .clearIrq       = HwiClear,
187 };
188 
ArchIsIntActive(VOID)189 inline UINT32 ArchIsIntActive(VOID)
190 {
191     return (g_intCount > 0);
192 }
193 /* ****************************************************************************
194  Function    : HalHwiDefaultHandler
195  Description : default handler of the hardware interrupt
196  Input       : None
197  Output      : None
198  Return      : None
199  **************************************************************************** */
200 /*lint -e529*/
HalHwiDefaultHandler(VOID)201 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
202 {
203     PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
204     while (1) {}
205 }
206 
HalPreInterruptHandler(UINT32 arg)207 WEAK VOID HalPreInterruptHandler(UINT32 arg)
208 {
209     (VOID)arg;
210     return;
211 }
212 
HalAftInterruptHandler(UINT32 arg)213 WEAK VOID HalAftInterruptHandler(UINT32 arg)
214 {
215     (VOID)arg;
216     return;
217 }
218 
219 /* ****************************************************************************
220  Function    : HalInterrupt
221  Description : Hardware interrupt entry function
222  Input       : None
223  Output      : None
224  Return      : None
225  **************************************************************************** */
HalInterrupt(VOID)226 LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
227 {
228     UINT32 hwiIndex;
229     UINT32 intSave;
230 
231 #if (LOSCFG_KERNEL_RUNSTOP == 1)
232     SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
233 #endif
234 
235     intSave = LOS_IntLock();
236     g_intCount++;
237     LOS_IntRestore(intSave);
238 
239     hwiIndex = HwiNumGet();
240 
241     OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
242 
243     HalPreInterruptHandler(hwiIndex);
244 
245 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
246     if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
247         g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
248     }
249 #else
250     if (g_hwiHandlerForm[hwiIndex] != 0) {
251         g_hwiHandlerForm[hwiIndex]();
252     }
253 #endif
254 
255     HalAftInterruptHandler(hwiIndex);
256 
257     OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
258 
259     intSave = LOS_IntLock();
260     g_intCount--;
261     LOS_IntRestore(intSave);
262 }
263 
264 /* ****************************************************************************
265  Function    : ArchHwiCreate
266  Description : create hardware interrupt
267  Input       : hwiNum   --- hwi num to create
268                hwiPrio  --- priority of the hwi
269                hwiMode  --- unused
270                hwiHandler --- hwi handler
271                irqParam --- param of the hwi handler
272  Output      : None
273  Return      : LOS_OK on success or error code on failure
274  **************************************************************************** */
ArchHwiCreate(HWI_HANDLE_T hwiNum,HWI_PRIOR_T hwiPrio,HWI_MODE_T hwiMode,HWI_PROC_FUNC hwiHandler,HwiIrqParam * irqParam)275 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
276                                            HWI_PRIOR_T hwiPrio,
277                                            HWI_MODE_T hwiMode,
278                                            HWI_PROC_FUNC hwiHandler,
279                                            HwiIrqParam *irqParam)
280 {
281     (VOID)hwiMode;
282     UINT32 intSave;
283 
284     if (hwiHandler == NULL) {
285         return OS_ERRNO_HWI_PROC_FUNC_NULL;
286     }
287 
288     if (hwiNum >= OS_HWI_MAX_NUM) {
289         return OS_ERRNO_HWI_NUM_INVALID;
290     }
291 
292     if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
293         return OS_ERRNO_HWI_ALREADY_CREATED;
294     }
295 
296     if (hwiPrio > OS_HWI_PRIO_LOWEST) {
297         return OS_ERRNO_HWI_PRIO_INVALID;
298     }
299 
300     intSave = LOS_IntLock();
301 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
302     if (irqParam != NULL) {
303         OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
304     } else {
305         OsSetVector(hwiNum, hwiHandler, NULL);
306     }
307 #else
308     (VOID)irqParam;
309     OsSetVector(hwiNum, hwiHandler);
310 #endif
311     HwiUnmask((IRQn_Type)hwiNum);
312     HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
313 
314     LOS_IntRestore(intSave);
315 
316     return LOS_OK;
317 }
318 
319 /* ****************************************************************************
320  Function    : ArchHwiDelete
321  Description : Delete hardware interrupt
322  Input       : hwiNum   --- hwi num to delete
323                irqParam --- param of the hwi handler
324  Output      : None
325  Return      : LOS_OK on success or error code on failure
326  **************************************************************************** */
ArchHwiDelete(HWI_HANDLE_T hwiNum,HwiIrqParam * irqParam)327 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
328 {
329     (VOID)irqParam;
330     UINT32 intSave;
331 
332     if (hwiNum >= OS_HWI_MAX_NUM) {
333         return OS_ERRNO_HWI_NUM_INVALID;
334     }
335 
336     NVIC_DisableIRQ((IRQn_Type)hwiNum);
337 
338     intSave = LOS_IntLock();
339 
340     g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
341 
342     LOS_IntRestore(intSave);
343 
344     return LOS_OK;
345 }
346 
347 #define FAULT_STATUS_REG_BIT            32
348 #define USGFAULT                        (1 << 18)
349 #define BUSFAULT                        (1 << 17)
350 #define MEMFAULT                        (1 << 16)
351 #define DIV0FAULT                       (1 << 4)
352 #define UNALIGNFAULT                    (1 << 3)
353 #define HARDFAULT_IRQN                  (-13)
354 
355 ExcInfo g_excInfo = {0};
356 
357 UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
358     0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
359     0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
360     0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
361     0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
362 };
363 
364 #if (LOSCFG_KERNEL_PRINTF != 0)
OsExcNvicDump(VOID)365 STATIC VOID OsExcNvicDump(VOID)
366 {
367 #define OS_NR_NVIC_EXC_DUMP_TYPES   7
368     UINT32 *base = NULL;
369     UINT32 len, i, j;
370     UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
371         OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
372         OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
373     };
374     UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
375         OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
376         OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
377         OS_NVIC_INT_CTRL_SIZE
378     };
379     CHAR strRgEnable[] = "enable";
380     CHAR strRgPending[] = "pending";
381     CHAR strRgActive[] = "active";
382     CHAR strRgPriority[] = "priority";
383     CHAR strRgException[] = "exception";
384     CHAR strRgShcsr[] = "shcsr";
385     CHAR strRgIntCtrl[] = "control";
386     CHAR *strRgs[] = {
387         strRgEnable, strRgPending, strRgActive, strRgPriority,
388         strRgException, strRgShcsr, strRgIntCtrl
389     };
390 
391     PRINTK("\r\nOS exception NVIC dump:\n");
392     for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
393         base = (UINT32 *)rgNvicBases[i];
394         len = rgNvicLens[i];
395         PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
396         len = (len >> 2); /* 2: Gets the next register offset */
397         for (j = 0; j < len; j++) {
398             PRINTK("0x%x ", *(base + j));
399             if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
400                 PRINTK("\n");
401             }
402         }
403         PRINTK("\n");
404     }
405 }
406 
OsExcTypeInfo(const ExcInfo * excInfo)407 STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
408 {
409     CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
410 
411     PRINTK("Type      = %d\n", excInfo->type);
412     PRINTK("ThrdPid   = %d\n", excInfo->thrdPid);
413     PRINTK("Phase     = %s\n", phaseStr[excInfo->phase]);
414     PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
415 }
416 
OsExcCurTaskInfo(const ExcInfo * excInfo)417 STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
418 {
419     PRINTK("Current task info:\n");
420     if (excInfo->phase == OS_EXC_IN_TASK) {
421         LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
422         PRINTK("Task name = %s\n", taskCB->taskName);
423         PRINTK("Task ID   = %d\n", taskCB->taskID);
424         PRINTK("Task SP   = %p\n", taskCB->stackPointer);
425         PRINTK("Task ST   = 0x%x\n", taskCB->topOfStack);
426         PRINTK("Task SS   = 0x%x\n", taskCB->stackSize);
427     } else if (excInfo->phase == OS_EXC_IN_HWI) {
428         PRINTK("Exception occur in interrupt phase!\n");
429     } else {
430         PRINTK("Exception occur in system init phase!\n");
431     }
432 }
433 
OsExcRegInfo(const ExcInfo * excInfo)434 STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
435 {
436     PRINTK("Exception reg dump:\n");
437     PRINTK("PC        = 0x%x\n", excInfo->context->uwPC);
438     PRINTK("LR        = 0x%x\n", excInfo->context->uwLR);
439     PRINTK("SP        = 0x%x\n", excInfo->context->uwSP);
440     PRINTK("R0        = 0x%x\n", excInfo->context->uwR0);
441     PRINTK("R1        = 0x%x\n", excInfo->context->uwR1);
442     PRINTK("R2        = 0x%x\n", excInfo->context->uwR2);
443     PRINTK("R3        = 0x%x\n", excInfo->context->uwR3);
444     PRINTK("R4        = 0x%x\n", excInfo->context->uwR4);
445     PRINTK("R5        = 0x%x\n", excInfo->context->uwR5);
446     PRINTK("R6        = 0x%x\n", excInfo->context->uwR6);
447     PRINTK("R7        = 0x%x\n", excInfo->context->uwR7);
448     PRINTK("R8        = 0x%x\n", excInfo->context->uwR8);
449     PRINTK("R9        = 0x%x\n", excInfo->context->uwR9);
450     PRINTK("R10       = 0x%x\n", excInfo->context->uwR10);
451     PRINTK("R11       = 0x%x\n", excInfo->context->uwR11);
452     PRINTK("R12       = 0x%x\n", excInfo->context->uwR12);
453     PRINTK("PriMask   = 0x%x\n", excInfo->context->uwPriMask);
454     PRINTK("xPSR      = 0x%x\n", excInfo->context->uwxPSR);
455 }
456 
457 #if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(const ExcInfo * excInfo)458 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
459 {
460     UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
461     UINT32 index;
462 
463     OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
464 
465     PRINTK("----- backtrace start -----\n");
466     for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
467         if (LR[index] == 0) {
468             break;
469         }
470         PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
471     }
472     PRINTK("----- backtrace end -----\n");
473 }
474 #endif
475 
OsExcMemPoolCheckInfo(VOID)476 STATIC VOID OsExcMemPoolCheckInfo(VOID)
477 {
478     PRINTK("\r\nmemory pools check:\n");
479 #if (LOSCFG_PLATFORM_EXC == 1)
480     MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
481     UINT32 errCnt;
482     UINT32 i;
483 
484     (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
485 
486     errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
487     if (errCnt < OS_SYS_MEM_NUM) {
488         errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
489     }
490 
491     if (errCnt == 0) {
492         PRINTK("all memory pool check passed!\n");
493         return;
494     }
495 
496     for (i = 0; i < errCnt; i++) {
497         PRINTK("pool num    = %d\n", i);
498         PRINTK("pool type   = %d\n", memExcInfo[i].type);
499         PRINTK("pool addr   = 0x%x\n", memExcInfo[i].startAddr);
500         PRINTK("pool size   = 0x%x\n", memExcInfo[i].size);
501         PRINTK("pool free   = 0x%x\n", memExcInfo[i].free);
502         PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
503         PRINTK("pool error node addr  = 0x%x\n", memExcInfo[i].errorAddr);
504         PRINTK("pool error node len   = 0x%x\n", memExcInfo[i].errorLen);
505         PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
506     }
507 #endif
508     UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
509     if (ret == LOS_OK) {
510         PRINTK("system heap memcheck over, all passed!\n");
511     }
512 
513     PRINTK("memory pool check end!\n");
514 }
515 #endif
516 
OsExcInfoDisplay(const ExcInfo * excInfo)517 STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
518 {
519 #if (LOSCFG_KERNEL_PRINTF != 0)
520     PRINTK("*************Exception Information**************\n");
521     OsExcTypeInfo(excInfo);
522     OsExcCurTaskInfo(excInfo);
523     OsExcRegInfo(excInfo);
524 #if (LOSCFG_KERNEL_BACKTRACE == 1)
525     OsExcBackTraceInfo(excInfo);
526 #endif
527     OsGetAllTskInfo();
528     OsExcNvicDump();
529     OsExcMemPoolCheckInfo();
530 #endif
531 }
532 
HalExcHandleEntry(UINT32 excType,UINT32 faultAddr,UINT32 pid,EXC_CONTEXT_S * excBufAddr)533 LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
534 {
535     UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
536     g_intCount++;
537     g_excInfo.nestCnt++;
538 
539     g_excInfo.type = excType & OS_NULL_SHORT;
540 
541     if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
542         g_excInfo.faultAddr = faultAddr;
543     } else {
544         g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
545     }
546     if (g_losTask.runTask != NULL) {
547         if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
548             g_excInfo.phase = OS_EXC_IN_HWI;
549             g_excInfo.thrdPid = pid;
550         } else {
551             g_excInfo.phase = OS_EXC_IN_TASK;
552             g_excInfo.thrdPid = g_losTask.runTask->taskID;
553         }
554     } else {
555         g_excInfo.phase = OS_EXC_IN_INIT;
556         g_excInfo.thrdPid = OS_NULL_INT;
557     }
558     if (excType & OS_EXC_FLAG_NO_FLOAT) {
559         g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
560     } else {
561         g_excInfo.context = excBufAddr;
562     }
563 
564     OsDoExcHook(EXC_INTERRUPT);
565     OsExcInfoDisplay(&g_excInfo);
566     ArchSysExit();
567 }
568 
569 /* ****************************************************************************
570  Function    : HalHwiInit
571  Description : initialization of the hardware interrupt
572  Input       : None
573  Output      : None
574  Return      : None
575  **************************************************************************** */
HalHwiInit(VOID)576 LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
577 {
578 #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
579     UINT32 index;
580     g_hwiForm[0] = 0;             /* [0] Top of Stack */
581     g_hwiForm[1] = (HWI_PROC_FUNC)Reset_Handler; /* [1] reset */
582     for (index = 2; index < OS_VECTOR_CNT; index++) { /* 2: The starting position of the interrupt */
583         g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
584     }
585     /* Exception handler register */
586     g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT]   = (HWI_PROC_FUNC)HalExcNMI;
587     g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT]        = (HWI_PROC_FUNC)HalExcHardFault;
588     g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
589     g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT]         = (HWI_PROC_FUNC)HalExcBusFault;
590     g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT]       = (HWI_PROC_FUNC)HalExcUsageFault;
591     g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT]           = (HWI_PROC_FUNC)HalExcSvcCall;
592     g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT]           = (HWI_PROC_FUNC)HalPendSV;
593     g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT]          = (HWI_PROC_FUNC)SysTick_Handler;
594 
595     /* Interrupt vector table location */
596     SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
597 #endif
598 #if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
599     NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
600 #endif
601 
602     /* Enable USGFAULT, BUSFAULT, MEMFAULT */
603     *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
604 
605     /* Enable DIV 0 and unaligned exception */
606 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
607     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
608 #else
609     *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT);
610 #endif
611 
612     return;
613 }
614 
615