1 /*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 * conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
13 * provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31 #include "los_interrupt.h"
32 #include <stdarg.h>
33 #include "securec.h"
34 #include "los_context.h"
35 #include "los_arch_interrupt.h"
36 #include "los_debug.h"
37 #include "los_hook.h"
38 #include "los_task.h"
39 #include "los_sched.h"
40 #include "los_memory.h"
41 #include "los_membox.h"
42
43 UINT32 g_intCount = 0;
44
45 /* *
46 * @ingroup los_hwi
47 * Hardware interrupt form mapping handling function array.
48 */
49 STATIC HWI_PROC_FUNC __attribute__((aligned(LOSCFG_ARCH_HWI_VECTOR_ALIGN))) g_hwiForm[OS_VECTOR_CNT] = {0};
50
51 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
52
53 typedef struct {
54 HWI_PROC_FUNC pfnHandler;
55 VOID *pParm;
56 } HWI_HANDLER_FUNC;
57
58 /* *
59 * @ingroup los_hwi
60 * Hardware interrupt handler form mapping handling function array.
61 */
62 STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
63
64 /* *
65 * @ingroup los_hwi
66 * Set interrupt vector table.
67 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector,VOID * arg)68 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
69 {
70 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
71 g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
72 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
73 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
74 }
75 }
76
77 #else
78 /* *
79 * @ingroup los_hwi
80 * hardware interrupt handler form mapping handling function array.
81 */
82 STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
83
84 /* *
85 * @ingroup los_hwi
86 * Set interrupt vector table.
87 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector)88 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
89 {
90 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
91 g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
92 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
93 }
94 }
95 #endif
96
97 /* ****************************************************************************
98 Function : HwiNumGet
99 Description : Get an interrupt number
100 Input : None
101 Output : None
102 Return : Interrupt Indexes number
103 **************************************************************************** */
HwiNumGet(VOID)104 STATIC UINT32 HwiNumGet(VOID)
105 {
106 return __get_IPSR();
107 }
108
HwiUnmask(HWI_HANDLE_T hwiNum)109 STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
110 {
111 if (hwiNum >= OS_HWI_MAX_NUM) {
112 return OS_ERRNO_HWI_NUM_INVALID;
113 }
114
115 NVIC_EnableIRQ((IRQn_Type)hwiNum);
116
117 return LOS_OK;
118 }
119
HwiMask(HWI_HANDLE_T hwiNum)120 STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
121 {
122 if (hwiNum >= OS_HWI_MAX_NUM) {
123 return OS_ERRNO_HWI_NUM_INVALID;
124 }
125
126 NVIC_DisableIRQ((IRQn_Type)hwiNum);
127
128 return LOS_OK;
129 }
130
HwiSetPriority(HWI_HANDLE_T hwiNum,UINT8 priority)131 STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
132 {
133 if (hwiNum >= OS_HWI_MAX_NUM) {
134 return OS_ERRNO_HWI_NUM_INVALID;
135 }
136
137 if (priority > OS_HWI_PRIO_LOWEST) {
138 return OS_ERRNO_HWI_PRIO_INVALID;
139 }
140
141 NVIC_SetPriority((IRQn_Type)hwiNum, priority);
142
143 return LOS_OK;
144 }
145
HwiPending(HWI_HANDLE_T hwiNum)146 STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
147 {
148 if (hwiNum >= OS_HWI_MAX_NUM) {
149 return OS_ERRNO_HWI_NUM_INVALID;
150 }
151
152 NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
153
154 return LOS_OK;
155 }
156
HwiClear(HWI_HANDLE_T hwiNum)157 STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
158 {
159 if (hwiNum >= OS_HWI_MAX_NUM) {
160 return OS_ERRNO_HWI_NUM_INVALID;
161 }
162
163 NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
164
165 return LOS_OK;
166 }
167
168 HwiControllerOps g_archHwiOps = {
169 .enableIrq = HwiUnmask,
170 .disableIrq = HwiMask,
171 .setIrqPriority = HwiSetPriority,
172 .getCurIrqNum = HwiNumGet,
173 .triggerIrq = HwiPending,
174 .clearIrq = HwiClear,
175 };
176
ArchIsIntActive(VOID)177 inline UINT32 ArchIsIntActive(VOID)
178 {
179 return (g_intCount > 0);
180 }
181 /* ****************************************************************************
182 Function : HalHwiDefaultHandler
183 Description : default handler of the hardware interrupt
184 Input : None
185 Output : None
186 Return : None
187 **************************************************************************** */
HalHwiDefaultHandler(VOID)188 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
189 {
190 PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
191 while (1) {}
192 }
193
HalPreInterruptHandler(UINT32 arg)194 WEAK VOID HalPreInterruptHandler(UINT32 arg)
195 {
196 (VOID)arg;
197 return;
198 }
199
HalAftInterruptHandler(UINT32 arg)200 WEAK VOID HalAftInterruptHandler(UINT32 arg)
201 {
202 (VOID)arg;
203 return;
204 }
205
206 /* ****************************************************************************
207 Function : HalInterrupt
208 Description : Hardware interrupt entry function
209 Input : None
210 Output : None
211 Return : None
212 **************************************************************************** */
HalInterrupt(VOID)213 LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
214 {
215 UINT32 hwiIndex;
216 UINT32 intSave;
217
218 #if (LOSCFG_KERNEL_RUNSTOP == 1)
219 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
220 #endif
221
222 intSave = LOS_IntLock();
223 g_intCount++;
224 LOS_IntRestore(intSave);
225
226 hwiIndex = HwiNumGet();
227
228 OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
229
230 HalPreInterruptHandler(hwiIndex);
231
232 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
233 if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
234 g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
235 }
236 #else
237 if (g_hwiHandlerForm[hwiIndex] != 0) {
238 g_hwiHandlerForm[hwiIndex]();
239 }
240 #endif
241
242 HalAftInterruptHandler(hwiIndex);
243
244 OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
245
246 intSave = LOS_IntLock();
247 g_intCount--;
248 LOS_IntRestore(intSave);
249 }
250
251 /* ****************************************************************************
252 Function : ArchHwiCreate
253 Description : create hardware interrupt
254 Input : hwiNum --- hwi num to create
255 hwiPrio --- priority of the hwi
256 hwiMode --- unused
257 hwiHandler --- hwi handler
258 irqParam --- param of the hwi handler
259 Output : None
260 Return : LOS_OK on success or error code on failure
261 **************************************************************************** */
ArchHwiCreate(HWI_HANDLE_T hwiNum,HWI_PRIOR_T hwiPrio,HWI_MODE_T hwiMode,HWI_PROC_FUNC hwiHandler,HwiIrqParam * irqParam)262 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
263 HWI_PRIOR_T hwiPrio,
264 HWI_MODE_T hwiMode,
265 HWI_PROC_FUNC hwiHandler,
266 HwiIrqParam *irqParam)
267 {
268 (VOID)hwiMode;
269 UINT32 intSave;
270
271 if (hwiHandler == NULL) {
272 return OS_ERRNO_HWI_PROC_FUNC_NULL;
273 }
274
275 if (hwiNum >= OS_HWI_MAX_NUM) {
276 return OS_ERRNO_HWI_NUM_INVALID;
277 }
278
279 if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
280 return OS_ERRNO_HWI_ALREADY_CREATED;
281 }
282
283 if (hwiPrio > OS_HWI_PRIO_LOWEST) {
284 return OS_ERRNO_HWI_PRIO_INVALID;
285 }
286
287 intSave = LOS_IntLock();
288 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
289 if (irqParam != NULL) {
290 OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
291 } else {
292 OsSetVector(hwiNum, hwiHandler, NULL);
293 }
294 #else
295 (VOID)irqParam;
296 OsSetVector(hwiNum, hwiHandler);
297 #endif
298 HwiUnmask((IRQn_Type)hwiNum);
299 HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
300
301 LOS_IntRestore(intSave);
302
303 return LOS_OK;
304 }
305
306 /* ****************************************************************************
307 Function : ArchHwiDelete
308 Description : Delete hardware interrupt
309 Input : hwiNum --- hwi num to delete
310 irqParam --- param of the hwi handler
311 Output : None
312 Return : LOS_OK on success or error code on failure
313 **************************************************************************** */
ArchHwiDelete(HWI_HANDLE_T hwiNum,HwiIrqParam * irqParam)314 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
315 {
316 (VOID)irqParam;
317 UINT32 intSave;
318
319 if (hwiNum >= OS_HWI_MAX_NUM) {
320 return OS_ERRNO_HWI_NUM_INVALID;
321 }
322
323 NVIC_DisableIRQ((IRQn_Type)hwiNum);
324
325 intSave = LOS_IntLock();
326
327 g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
328
329 LOS_IntRestore(intSave);
330
331 return LOS_OK;
332 }
333
334 #define FAULT_STATUS_REG_BIT 32
335 #define USGFAULT (1 << 18)
336 #define BUSFAULT (1 << 17)
337 #define MEMFAULT (1 << 16)
338 #define DIV0FAULT (1 << 4)
339 #define UNALIGNFAULT (1 << 3)
340 #define HARDFAULT_IRQN (-13)
341
342 ExcInfo g_excInfo = {0};
343
344 UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
345 0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
346 0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
347 0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
348 0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
349 };
350
351 #if (LOSCFG_KERNEL_PRINTF != 0)
OsExcNvicDump(VOID)352 STATIC VOID OsExcNvicDump(VOID)
353 {
354 #define OS_NR_NVIC_EXC_DUMP_TYPES 7
355 UINT32 *base = NULL;
356 UINT32 len, i, j;
357 UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
358 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
359 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
360 };
361 UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
362 OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
363 OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
364 OS_NVIC_INT_CTRL_SIZE
365 };
366 CHAR strRgEnable[] = "enable";
367 CHAR strRgPending[] = "pending";
368 CHAR strRgActive[] = "active";
369 CHAR strRgPriority[] = "priority";
370 CHAR strRgException[] = "exception";
371 CHAR strRgShcsr[] = "shcsr";
372 CHAR strRgIntCtrl[] = "control";
373 CHAR *strRgs[] = {
374 strRgEnable, strRgPending, strRgActive, strRgPriority,
375 strRgException, strRgShcsr, strRgIntCtrl
376 };
377
378 PRINTK("\r\nOS exception NVIC dump:\n");
379 for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
380 base = (UINT32 *)rgNvicBases[i];
381 len = rgNvicLens[i];
382 PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
383 len = (len >> 2); /* 2: Gets the next register offset */
384 for (j = 0; j < len; j++) {
385 PRINTK("0x%x ", *(base + j));
386 if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
387 PRINTK("\n");
388 }
389 }
390 PRINTK("\n");
391 }
392 }
393
OsExcTypeInfo(const ExcInfo * excInfo)394 STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
395 {
396 CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
397
398 PRINTK("Type = %d\n", excInfo->type);
399 PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
400 PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
401 PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
402 }
403
OsExcCurTaskInfo(const ExcInfo * excInfo)404 STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
405 {
406 PRINTK("Current task info:\n");
407 if (excInfo->phase == OS_EXC_IN_TASK) {
408 LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
409 PRINTK("Task name = %s\n", taskCB->taskName);
410 PRINTK("Task ID = %d\n", taskCB->taskID);
411 PRINTK("Task SP = %p\n", taskCB->stackPointer);
412 PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
413 PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
414 } else if (excInfo->phase == OS_EXC_IN_HWI) {
415 PRINTK("Exception occur in interrupt phase!\n");
416 } else {
417 PRINTK("Exception occur in system init phase!\n");
418 }
419 }
420
OsExcRegInfo(const ExcInfo * excInfo)421 STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
422 {
423 PRINTK("Exception reg dump:\n");
424 PRINTK("PC = 0x%x\n", excInfo->context->uwPC);
425 PRINTK("LR = 0x%x\n", excInfo->context->uwLR);
426 PRINTK("SP = 0x%x\n", excInfo->context->uwSP);
427 PRINTK("R0 = 0x%x\n", excInfo->context->uwR0);
428 PRINTK("R1 = 0x%x\n", excInfo->context->uwR1);
429 PRINTK("R2 = 0x%x\n", excInfo->context->uwR2);
430 PRINTK("R3 = 0x%x\n", excInfo->context->uwR3);
431 PRINTK("R4 = 0x%x\n", excInfo->context->uwR4);
432 PRINTK("R5 = 0x%x\n", excInfo->context->uwR5);
433 PRINTK("R6 = 0x%x\n", excInfo->context->uwR6);
434 PRINTK("R7 = 0x%x\n", excInfo->context->uwR7);
435 PRINTK("R8 = 0x%x\n", excInfo->context->uwR8);
436 PRINTK("R9 = 0x%x\n", excInfo->context->uwR9);
437 PRINTK("R10 = 0x%x\n", excInfo->context->uwR10);
438 PRINTK("R11 = 0x%x\n", excInfo->context->uwR11);
439 PRINTK("R12 = 0x%x\n", excInfo->context->uwR12);
440 PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask);
441 PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR);
442 }
443
444 #if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(const ExcInfo * excInfo)445 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
446 {
447 UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
448 UINT32 index;
449
450 OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
451
452 PRINTK("----- backtrace start -----\n");
453 for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
454 if (LR[index] == 0) {
455 break;
456 }
457 PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
458 }
459 PRINTK("----- backtrace end -----\n");
460 }
461 #endif
462
OsExcMemPoolCheckInfo(VOID)463 STATIC VOID OsExcMemPoolCheckInfo(VOID)
464 {
465 PRINTK("\r\nmemory pools check:\n");
466 #if (LOSCFG_PLATFORM_EXC == 1)
467 MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
468 UINT32 errCnt;
469 UINT32 i;
470
471 (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
472
473 errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
474 if (errCnt < OS_SYS_MEM_NUM) {
475 errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
476 }
477
478 if (errCnt == 0) {
479 PRINTK("all memory pool check passed!\n");
480 return;
481 }
482
483 for (i = 0; i < errCnt; i++) {
484 PRINTK("pool num = %d\n", i);
485 PRINTK("pool type = %d\n", memExcInfo[i].type);
486 PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
487 PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
488 PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
489 PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
490 PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
491 PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
492 PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
493 }
494 #endif
495 UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
496 if (ret == LOS_OK) {
497 PRINTK("system heap memcheck over, all passed!\n");
498 }
499
500 PRINTK("memory pool check end!\n");
501 }
502 #endif
503
OsExcInfoDisplay(const ExcInfo * excInfo)504 STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
505 {
506 #if (LOSCFG_KERNEL_PRINTF != 0)
507 PRINTK("*************Exception Information**************\n");
508 OsExcTypeInfo(excInfo);
509 OsExcCurTaskInfo(excInfo);
510 OsExcRegInfo(excInfo);
511 #if (LOSCFG_KERNEL_BACKTRACE == 1)
512 OsExcBackTraceInfo(excInfo);
513 #endif
514 OsGetAllTskInfo();
515 OsExcNvicDump();
516 OsExcMemPoolCheckInfo();
517 #endif
518 }
519
HalExcHandleEntry(UINT32 excType,UINT32 faultAddr,UINT32 pid,EXC_CONTEXT_S * excBufAddr)520 LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
521 {
522 UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
523 g_intCount++;
524 g_excInfo.nestCnt++;
525
526 g_excInfo.type = excType & OS_NULL_SHORT;
527
528 if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
529 g_excInfo.faultAddr = faultAddr;
530 } else {
531 g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
532 }
533 if (g_losTask.runTask != NULL) {
534 if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
535 g_excInfo.phase = OS_EXC_IN_HWI;
536 g_excInfo.thrdPid = pid;
537 } else {
538 g_excInfo.phase = OS_EXC_IN_TASK;
539 g_excInfo.thrdPid = g_losTask.runTask->taskID;
540 }
541 } else {
542 g_excInfo.phase = OS_EXC_IN_INIT;
543 g_excInfo.thrdPid = OS_NULL_INT;
544 }
545 if (excType & OS_EXC_FLAG_NO_FLOAT) {
546 g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
547 } else {
548 g_excInfo.context = excBufAddr;
549 }
550
551 OsDoExcHook(EXC_INTERRUPT);
552 OsExcInfoDisplay(&g_excInfo);
553 ArchSysExit();
554 }
555
556 /* ****************************************************************************
557 Function : HalHwiInit
558 Description : initialization of the hardware interrupt
559 Input : None
560 Output : None
561 Return : None
562 **************************************************************************** */
HalHwiInit(VOID)563 LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
564 {
565 #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
566 UINT32 index;
567 g_hwiForm[0] = 0; /* [0] Top of Stack */
568 g_hwiForm[1] = (HWI_PROC_FUNC)Reset_Handler; /* [1] reset */
569 for (index = 2; index < OS_VECTOR_CNT; index++) { /* 2: The starting position of the interrupt */
570 g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
571 }
572 /* Exception handler register */
573 g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcNMI;
574 g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcHardFault;
575 g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
576 g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcBusFault;
577 g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcUsageFault;
578 g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcSvcCall;
579 g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalPendSV;
580 g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)SysTick_Handler;
581
582 /* Interrupt vector table location */
583 SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
584 #endif
585 #if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
586 NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
587 #endif
588
589 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
590 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
591
592 /* Enable DIV 0 and unaligned exception */
593 #ifdef LOSCFG_ARCH_UNALIGNED_EXC
594 *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
595 #else
596 *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT);
597 #endif
598
599 return;
600 }
601
602