1 /*
2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without modification,
6 * are permitted provided that the following conditions are met:
7 *
8 * 1. Redistributions of source code must retain the above copyright notice, this list of
9 * conditions and the following disclaimer.
10 *
11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list
12 * of conditions and the following disclaimer in the documentation and/or other materials
13 * provided with the distribution.
14 *
15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used
16 * to endorse or promote products derived from this software without specific prior written
17 * permission.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "los_interrupt.h"
33 #include "securec.h"
34 #include <stdarg.h>
35 #include "los_arch_interrupt.h"
36 #include "los_context.h"
37 #include "los_debug.h"
38 #include "los_hook.h"
39 #include "los_task.h"
40 #include "los_sched.h"
41 #include "los_memory.h"
42 #include "los_membox.h"
43
44 UINT32 g_intCount = 0;
45
46 #pragma location = ".data.vector"
47 #pragma data_alignment = LOSCFG_ARCH_HWI_VECTOR_ALIGN
48 /* *
49 * @ingroup los_hwi
50 * Hardware interrupt form mapping handling function array.
51 */
52 STATIC HWI_PROC_FUNC g_hwiForm[OS_VECTOR_CNT] = {0};
53
54 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
55
56 typedef struct {
57 HWI_PROC_FUNC pfnHandler;
58 VOID *pParm;
59 } HWI_HANDLER_FUNC;
60
61 /* *
62 * @ingroup los_hwi
63 * Hardware interrupt handler form mapping handling function array.
64 */
65 STATIC HWI_HANDLER_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {{ (HWI_PROC_FUNC)0, (HWI_ARG_T)0 }};
66
67 /* *
68 * @ingroup los_hwi
69 * Set interrupt vector table.
70 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector,VOID * arg)71 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector, VOID *arg)
72 {
73 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
74 g_hwiForm[num + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalInterrupt;
75 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pfnHandler = vector;
76 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT].pParm = arg;
77 }
78 }
79
80 #else
81 /* *
82 * @ingroup los_hwi
83 * hardware interrupt handler form mapping handling function array.
84 */
85 STATIC HWI_PROC_FUNC g_hwiHandlerForm[OS_VECTOR_CNT] = {0};
86
87 /* *
88 * @ingroup los_hwi
89 * Set interrupt vector table.
90 */
OsSetVector(UINT32 num,HWI_PROC_FUNC vector)91 VOID OsSetVector(UINT32 num, HWI_PROC_FUNC vector)
92 {
93 if ((num + OS_SYS_VECTOR_CNT) < OS_VECTOR_CNT) {
94 g_hwiForm[num + OS_SYS_VECTOR_CNT] = HalInterrupt;
95 g_hwiHandlerForm[num + OS_SYS_VECTOR_CNT] = vector;
96 }
97 }
98 #endif
99
SysTick_Handler(VOID)100 WEAK VOID SysTick_Handler(VOID)
101 {
102 return;
103 }
104
105 /* ****************************************************************************
106 Function : HwiNumGet
107 Description : Get an interrupt number
108 Input : None
109 Output : None
110 Return : Interrupt Indexes number
111 **************************************************************************** */
HwiNumGet(VOID)112 STATIC UINT32 HwiNumGet(VOID)
113 {
114 return __get_IPSR();
115 }
116
HwiUnmask(HWI_HANDLE_T hwiNum)117 STATIC UINT32 HwiUnmask(HWI_HANDLE_T hwiNum)
118 {
119 if (hwiNum >= OS_HWI_MAX_NUM) {
120 return OS_ERRNO_HWI_NUM_INVALID;
121 }
122
123 NVIC_EnableIRQ((IRQn_Type)hwiNum);
124
125 return LOS_OK;
126 }
127
HwiMask(HWI_HANDLE_T hwiNum)128 STATIC UINT32 HwiMask(HWI_HANDLE_T hwiNum)
129 {
130 if (hwiNum >= OS_HWI_MAX_NUM) {
131 return OS_ERRNO_HWI_NUM_INVALID;
132 }
133
134 NVIC_DisableIRQ((IRQn_Type)hwiNum);
135
136 return LOS_OK;
137 }
138
HwiSetPriority(HWI_HANDLE_T hwiNum,UINT8 priority)139 STATIC UINT32 HwiSetPriority(HWI_HANDLE_T hwiNum, UINT8 priority)
140 {
141 if (hwiNum >= OS_HWI_MAX_NUM) {
142 return OS_ERRNO_HWI_NUM_INVALID;
143 }
144
145 if (priority > OS_HWI_PRIO_LOWEST) {
146 return OS_ERRNO_HWI_PRIO_INVALID;
147 }
148
149 NVIC_SetPriority((IRQn_Type)hwiNum, priority);
150
151 return LOS_OK;
152 }
153
HwiPending(HWI_HANDLE_T hwiNum)154 STATIC UINT32 HwiPending(HWI_HANDLE_T hwiNum)
155 {
156 if (hwiNum >= OS_HWI_MAX_NUM) {
157 return OS_ERRNO_HWI_NUM_INVALID;
158 }
159
160 NVIC_SetPendingIRQ((IRQn_Type)hwiNum);
161
162 return LOS_OK;
163 }
164
HwiClear(HWI_HANDLE_T hwiNum)165 STATIC UINT32 HwiClear(HWI_HANDLE_T hwiNum)
166 {
167 if (hwiNum >= OS_HWI_MAX_NUM) {
168 return OS_ERRNO_HWI_NUM_INVALID;
169 }
170
171 NVIC_ClearPendingIRQ((IRQn_Type)hwiNum);
172
173 return LOS_OK;
174 }
175
176 HwiControllerOps g_archHwiOps = {
177 .enableIrq = HwiUnmask,
178 .disableIrq = HwiMask,
179 .setIrqPriority = HwiSetPriority,
180 .getCurIrqNum = HwiNumGet,
181 .triggerIrq = HwiPending,
182 .clearIrq = HwiClear,
183 };
184
ArchIsIntActive(VOID)185 inline UINT32 ArchIsIntActive(VOID)
186 {
187 return (g_intCount > 0);
188 }
189 /* ****************************************************************************
190 Function : HalHwiDefaultHandler
191 Description : default handler of the hardware interrupt
192 Input : None
193 Output : None
194 Return : None
195 **************************************************************************** */
196 /*lint -e529*/
HalHwiDefaultHandler(VOID)197 LITE_OS_SEC_TEXT_MINOR VOID HalHwiDefaultHandler(VOID)
198 {
199 PRINT_ERR("%s irqnum:%u\n", __FUNCTION__, HwiNumGet());
200 while (1) {}
201 }
202
HalPreInterruptHandler(UINT32 arg)203 WEAK VOID HalPreInterruptHandler(UINT32 arg)
204 {
205 (VOID)arg;
206 return;
207 }
208
HalAftInterruptHandler(UINT32 arg)209 WEAK VOID HalAftInterruptHandler(UINT32 arg)
210 {
211 (VOID)arg;
212 return;
213 }
214
215 /* ****************************************************************************
216 Function : HalInterrupt
217 Description : Hardware interrupt entry function
218 Input : None
219 Output : None
220 Return : None
221 **************************************************************************** */
HalInterrupt(VOID)222 LITE_OS_SEC_TEXT VOID HalInterrupt(VOID)
223 {
224 UINT32 hwiIndex;
225 UINT32 intSave;
226
227 #if (LOSCFG_KERNEL_RUNSTOP == 1)
228 SCB->SCR &= (UINT32) ~((UINT32)SCB_SCR_SLEEPDEEP_Msk);
229 #endif
230
231 intSave = LOS_IntLock();
232 g_intCount++;
233 LOS_IntRestore(intSave);
234
235 hwiIndex = HwiNumGet();
236
237 OsHookCall(LOS_HOOK_TYPE_ISR_ENTER, hwiIndex);
238
239 HalPreInterruptHandler(hwiIndex);
240
241 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
242 if (g_hwiHandlerForm[hwiIndex].pfnHandler != 0) {
243 g_hwiHandlerForm[hwiIndex].pfnHandler((VOID *)g_hwiHandlerForm[hwiIndex].pParm);
244 }
245 #else
246 if (g_hwiHandlerForm[hwiIndex] != 0) {
247 g_hwiHandlerForm[hwiIndex]();
248 }
249 #endif
250
251 HalAftInterruptHandler(hwiIndex);
252
253 OsHookCall(LOS_HOOK_TYPE_ISR_EXIT, hwiIndex);
254
255 intSave = LOS_IntLock();
256 g_intCount--;
257 LOS_IntRestore(intSave);
258 }
259
260 /* ****************************************************************************
261 Function : ArchHwiCreate
262 Description : create hardware interrupt
263 Input : hwiNum --- hwi num to create
264 hwiPrio --- priority of the hwi
265 hwiMode --- unused
266 hwiHandler --- hwi handler
267 irqParam --- param of the hwi handler
268 Output : None
269 Return : LOS_OK on success or error code on failure
270 **************************************************************************** */
ArchHwiCreate(HWI_HANDLE_T hwiNum,HWI_PRIOR_T hwiPrio,HWI_MODE_T hwiMode,HWI_PROC_FUNC hwiHandler,HwiIrqParam * irqParam)271 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiCreate(HWI_HANDLE_T hwiNum,
272 HWI_PRIOR_T hwiPrio,
273 HWI_MODE_T hwiMode,
274 HWI_PROC_FUNC hwiHandler,
275 HwiIrqParam *irqParam)
276 {
277 (VOID)hwiMode;
278 UINT32 intSave;
279
280 if (hwiHandler == NULL) {
281 return OS_ERRNO_HWI_PROC_FUNC_NULL;
282 }
283
284 if (hwiNum >= OS_HWI_MAX_NUM) {
285 return OS_ERRNO_HWI_NUM_INVALID;
286 }
287
288 if (g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] != (HWI_PROC_FUNC)HalHwiDefaultHandler) {
289 return OS_ERRNO_HWI_ALREADY_CREATED;
290 }
291
292 if (hwiPrio > OS_HWI_PRIO_LOWEST) {
293 return OS_ERRNO_HWI_PRIO_INVALID;
294 }
295
296 intSave = LOS_IntLock();
297 #if (LOSCFG_PLATFORM_HWI_WITH_ARG == 1)
298 if (irqParam != NULL) {
299 OsSetVector(hwiNum, hwiHandler, irqParam->pDevId);
300 } else {
301 OsSetVector(hwiNum, hwiHandler, NULL);
302 }
303 #else
304 (VOID)irqParam;
305 OsSetVector(hwiNum, hwiHandler);
306 #endif
307 HwiUnmask((IRQn_Type)hwiNum);
308 HwiSetPriority((IRQn_Type)hwiNum, hwiPrio);
309
310 LOS_IntRestore(intSave);
311
312 return LOS_OK;
313 }
314
315 /* ****************************************************************************
316 Function : ArchHwiDelete
317 Description : Delete hardware interrupt
318 Input : hwiNum --- hwi num to delete
319 irqParam --- param of the hwi handler
320 Output : None
321 Return : LOS_OK on success or error code on failure
322 **************************************************************************** */
ArchHwiDelete(HWI_HANDLE_T hwiNum,HwiIrqParam * irqParam)323 LITE_OS_SEC_TEXT_INIT UINT32 ArchHwiDelete(HWI_HANDLE_T hwiNum, HwiIrqParam *irqParam)
324 {
325 (VOID)irqParam;
326 UINT32 intSave;
327
328 if (hwiNum >= OS_HWI_MAX_NUM) {
329 return OS_ERRNO_HWI_NUM_INVALID;
330 }
331
332 NVIC_DisableIRQ((IRQn_Type)hwiNum);
333
334 intSave = LOS_IntLock();
335
336 g_hwiForm[hwiNum + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
337
338 LOS_IntRestore(intSave);
339
340 return LOS_OK;
341 }
342
343 #define FAULT_STATUS_REG_BIT 32
344 #define USGFAULT (1 << 18)
345 #define BUSFAULT (1 << 17)
346 #define MEMFAULT (1 << 16)
347 #define DIV0FAULT (1 << 4)
348 #define UNALIGNFAULT (1 << 3)
349 #define HARDFAULT_IRQN (-13)
350
351 ExcInfo g_excInfo = {0};
352
353 UINT8 g_uwExcTbl[FAULT_STATUS_REG_BIT] = {
354 0, 0, 0, 0, 0, 0, OS_EXC_UF_DIVBYZERO, OS_EXC_UF_UNALIGNED,
355 0, 0, 0, 0, OS_EXC_UF_NOCP, OS_EXC_UF_INVPC, OS_EXC_UF_INVSTATE, OS_EXC_UF_UNDEFINSTR,
356 0, 0, 0, OS_EXC_BF_STKERR, OS_EXC_BF_UNSTKERR, OS_EXC_BF_IMPRECISERR, OS_EXC_BF_PRECISERR, OS_EXC_BF_IBUSERR,
357 0, 0, 0, OS_EXC_MF_MSTKERR, OS_EXC_MF_MUNSTKERR, 0, OS_EXC_MF_DACCVIOL, OS_EXC_MF_IACCVIOL
358 };
359
360 #if (LOSCFG_KERNEL_PRINTF != 0)
OsExcNvicDump(VOID)361 STATIC VOID OsExcNvicDump(VOID)
362 {
363 #define OS_NR_NVIC_EXC_DUMP_TYPES 7
364 UINT32 *base = NULL;
365 UINT32 len, i, j;
366 UINT32 rgNvicBases[OS_NR_NVIC_EXC_DUMP_TYPES] = {
367 OS_NVIC_SETENA_BASE, OS_NVIC_SETPEND_BASE, OS_NVIC_INT_ACT_BASE,
368 OS_NVIC_PRI_BASE, OS_NVIC_EXCPRI_BASE, OS_NVIC_SHCSR, OS_NVIC_INT_CTRL
369 };
370 UINT32 rgNvicLens[OS_NR_NVIC_EXC_DUMP_TYPES] = {
371 OS_NVIC_INT_ENABLE_SIZE, OS_NVIC_INT_PEND_SIZE, OS_NVIC_INT_ACT_SIZE,
372 OS_NVIC_INT_PRI_SIZE, OS_NVIC_EXCPRI_SIZE, OS_NVIC_SHCSR_SIZE,
373 OS_NVIC_INT_CTRL_SIZE
374 };
375 CHAR strRgEnable[] = "enable";
376 CHAR strRgPending[] = "pending";
377 CHAR strRgActive[] = "active";
378 CHAR strRgPriority[] = "priority";
379 CHAR strRgException[] = "exception";
380 CHAR strRgShcsr[] = "shcsr";
381 CHAR strRgIntCtrl[] = "control";
382 CHAR *strRgs[] = {
383 strRgEnable, strRgPending, strRgActive, strRgPriority,
384 strRgException, strRgShcsr, strRgIntCtrl
385 };
386
387 PRINTK("\r\nOS exception NVIC dump:\n");
388 for (i = 0; i < OS_NR_NVIC_EXC_DUMP_TYPES; i++) {
389 base = (UINT32 *)rgNvicBases[i];
390 len = rgNvicLens[i];
391 PRINTK("interrupt %s register, base address: %p, size: 0x%x\n", strRgs[i], base, len);
392 len = (len >> 2); /* 2: Gets the next register offset */
393 for (j = 0; j < len; j++) {
394 PRINTK("0x%x ", *(base + j));
395 if ((j != 0) && ((j % 16) == 0)) { /* 16: print wrap line */
396 PRINTK("\n");
397 }
398 }
399 PRINTK("\n");
400 }
401 }
402
OsExcTypeInfo(const ExcInfo * excInfo)403 STATIC VOID OsExcTypeInfo(const ExcInfo *excInfo)
404 {
405 CHAR *phaseStr[] = {"exc in init", "exc in task", "exc in hwi"};
406
407 PRINTK("Type = %d\n", excInfo->type);
408 PRINTK("ThrdPid = %d\n", excInfo->thrdPid);
409 PRINTK("Phase = %s\n", phaseStr[excInfo->phase]);
410 PRINTK("FaultAddr = 0x%x\n", excInfo->faultAddr);
411 }
412
OsExcCurTaskInfo(const ExcInfo * excInfo)413 STATIC VOID OsExcCurTaskInfo(const ExcInfo *excInfo)
414 {
415 PRINTK("Current task info:\n");
416 if (excInfo->phase == OS_EXC_IN_TASK) {
417 LosTaskCB *taskCB = OS_TCB_FROM_TID(LOS_CurTaskIDGet());
418 PRINTK("Task name = %s\n", taskCB->taskName);
419 PRINTK("Task ID = %d\n", taskCB->taskID);
420 PRINTK("Task SP = %p\n", taskCB->stackPointer);
421 PRINTK("Task ST = 0x%x\n", taskCB->topOfStack);
422 PRINTK("Task SS = 0x%x\n", taskCB->stackSize);
423 } else if (excInfo->phase == OS_EXC_IN_HWI) {
424 PRINTK("Exception occur in interrupt phase!\n");
425 } else {
426 PRINTK("Exception occur in system init phase!\n");
427 }
428 }
429
OsExcRegInfo(const ExcInfo * excInfo)430 STATIC VOID OsExcRegInfo(const ExcInfo *excInfo)
431 {
432 PRINTK("Exception reg dump:\n");
433 PRINTK("PC = 0x%x\n", excInfo->context->uwPC);
434 PRINTK("LR = 0x%x\n", excInfo->context->uwLR);
435 PRINTK("SP = 0x%x\n", excInfo->context->uwSP);
436 PRINTK("R0 = 0x%x\n", excInfo->context->uwR0);
437 PRINTK("R1 = 0x%x\n", excInfo->context->uwR1);
438 PRINTK("R2 = 0x%x\n", excInfo->context->uwR2);
439 PRINTK("R3 = 0x%x\n", excInfo->context->uwR3);
440 PRINTK("R4 = 0x%x\n", excInfo->context->uwR4);
441 PRINTK("R5 = 0x%x\n", excInfo->context->uwR5);
442 PRINTK("R6 = 0x%x\n", excInfo->context->uwR6);
443 PRINTK("R7 = 0x%x\n", excInfo->context->uwR7);
444 PRINTK("R8 = 0x%x\n", excInfo->context->uwR8);
445 PRINTK("R9 = 0x%x\n", excInfo->context->uwR9);
446 PRINTK("R10 = 0x%x\n", excInfo->context->uwR10);
447 PRINTK("R11 = 0x%x\n", excInfo->context->uwR11);
448 PRINTK("R12 = 0x%x\n", excInfo->context->uwR12);
449 PRINTK("PriMask = 0x%x\n", excInfo->context->uwPriMask);
450 PRINTK("xPSR = 0x%x\n", excInfo->context->uwxPSR);
451 }
452
453 #if (LOSCFG_KERNEL_BACKTRACE == 1)
OsExcBackTraceInfo(const ExcInfo * excInfo)454 STATIC VOID OsExcBackTraceInfo(const ExcInfo *excInfo)
455 {
456 UINTPTR LR[LOSCFG_BACKTRACE_DEPTH] = {0};
457 UINT32 index;
458
459 OsBackTraceHookCall(LR, LOSCFG_BACKTRACE_DEPTH, 0, excInfo->context->uwSP);
460
461 PRINTK("----- backtrace start -----\n");
462 for (index = 0; index < LOSCFG_BACKTRACE_DEPTH; index++) {
463 if (LR[index] == 0) {
464 break;
465 }
466 PRINTK("backtrace %d -- lr = 0x%x\n", index, LR[index]);
467 }
468 PRINTK("----- backtrace end -----\n");
469 }
470 #endif
471
OsExcMemPoolCheckInfo(VOID)472 STATIC VOID OsExcMemPoolCheckInfo(VOID)
473 {
474 PRINTK("\r\nmemory pools check:\n");
475 #if (LOSCFG_PLATFORM_EXC == 1)
476 MemInfoCB memExcInfo[OS_SYS_MEM_NUM];
477 UINT32 errCnt;
478 UINT32 i;
479
480 (VOID)memset_s(memExcInfo, sizeof(memExcInfo), 0, sizeof(memExcInfo));
481
482 errCnt = OsMemExcInfoGet(OS_SYS_MEM_NUM, memExcInfo);
483 if (errCnt < OS_SYS_MEM_NUM) {
484 errCnt += OsMemboxExcInfoGet(OS_SYS_MEM_NUM - errCnt, memExcInfo + errCnt);
485 }
486
487 if (errCnt == 0) {
488 PRINTK("all memory pool check passed!\n");
489 return;
490 }
491
492 for (i = 0; i < errCnt; i++) {
493 PRINTK("pool num = %d\n", i);
494 PRINTK("pool type = %d\n", memExcInfo[i].type);
495 PRINTK("pool addr = 0x%x\n", memExcInfo[i].startAddr);
496 PRINTK("pool size = 0x%x\n", memExcInfo[i].size);
497 PRINTK("pool free = 0x%x\n", memExcInfo[i].free);
498 PRINTK("pool blkNum = %d\n", memExcInfo[i].blockSize);
499 PRINTK("pool error node addr = 0x%x\n", memExcInfo[i].errorAddr);
500 PRINTK("pool error node len = 0x%x\n", memExcInfo[i].errorLen);
501 PRINTK("pool error node owner = %d\n", memExcInfo[i].errorOwner);
502 }
503 #endif
504 UINT32 ret = LOS_MemIntegrityCheck(LOSCFG_SYS_HEAP_ADDR);
505 if (ret == LOS_OK) {
506 PRINTK("system heap memcheck over, all passed!\n");
507 }
508
509 PRINTK("memory pool check end!\n");
510 }
511 #endif
512
OsExcInfoDisplay(const ExcInfo * excInfo)513 STATIC VOID OsExcInfoDisplay(const ExcInfo *excInfo)
514 {
515 #if (LOSCFG_KERNEL_PRINTF != 0)
516 PRINTK("*************Exception Information**************\n");
517 OsExcTypeInfo(excInfo);
518 OsExcCurTaskInfo(excInfo);
519 OsExcRegInfo(excInfo);
520 #if (LOSCFG_KERNEL_BACKTRACE == 1)
521 OsExcBackTraceInfo(excInfo);
522 #endif
523 OsGetAllTskInfo();
524 OsExcNvicDump();
525 OsExcMemPoolCheckInfo();
526 #endif
527 }
528
HalExcHandleEntry(UINT32 excType,UINT32 faultAddr,UINT32 pid,EXC_CONTEXT_S * excBufAddr)529 LITE_OS_SEC_TEXT_INIT VOID HalExcHandleEntry(UINT32 excType, UINT32 faultAddr, UINT32 pid, EXC_CONTEXT_S *excBufAddr)
530 {
531 UINT16 tmpFlag = (excType >> 16) & OS_NULL_SHORT; /* 16: Get Exception Type */
532 g_intCount++;
533 g_excInfo.nestCnt++;
534
535 g_excInfo.type = excType & OS_NULL_SHORT;
536
537 if (tmpFlag & OS_EXC_FLAG_FAULTADDR_VALID) {
538 g_excInfo.faultAddr = faultAddr;
539 } else {
540 g_excInfo.faultAddr = OS_EXC_IMPRECISE_ACCESS_ADDR;
541 }
542 if (g_losTask.runTask != NULL) {
543 if (tmpFlag & OS_EXC_FLAG_IN_HWI) {
544 g_excInfo.phase = OS_EXC_IN_HWI;
545 g_excInfo.thrdPid = pid;
546 } else {
547 g_excInfo.phase = OS_EXC_IN_TASK;
548 g_excInfo.thrdPid = g_losTask.runTask->taskID;
549 }
550 } else {
551 g_excInfo.phase = OS_EXC_IN_INIT;
552 g_excInfo.thrdPid = OS_NULL_INT;
553 }
554 if (excType & OS_EXC_FLAG_NO_FLOAT) {
555 g_excInfo.context = (EXC_CONTEXT_S *)((CHAR *)excBufAddr - LOS_OFF_SET_OF(EXC_CONTEXT_S, uwR4));
556 } else {
557 g_excInfo.context = excBufAddr;
558 }
559
560 OsDoExcHook(EXC_INTERRUPT);
561 OsExcInfoDisplay(&g_excInfo);
562 ArchSysExit();
563 }
564
565 /* ****************************************************************************
566 Function : HalHwiInit
567 Description : initialization of the hardware interrupt
568 Input : None
569 Output : None
570 Return : None
571 **************************************************************************** */
HalHwiInit(VOID)572 LITE_OS_SEC_TEXT_INIT VOID HalHwiInit(VOID)
573 {
574 #if (LOSCFG_USE_SYSTEM_DEFINED_INTERRUPT == 1)
575 UINT32 index;
576 g_hwiForm[0] = 0; /* [0] Top of Stack */
577 g_hwiForm[1] = (HWI_PROC_FUNC)Reset_Handler; /* [1] reset */
578 for (index = 2; index < OS_VECTOR_CNT; index++) { /* 2: The starting position of the interrupt */
579 g_hwiForm[index] = (HWI_PROC_FUNC)HalHwiDefaultHandler;
580 }
581 /* Exception handler register */
582 g_hwiForm[NonMaskableInt_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcNMI;
583 g_hwiForm[HARDFAULT_IRQN + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcHardFault;
584 g_hwiForm[MemoryManagement_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcMemFault;
585 g_hwiForm[BusFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcBusFault;
586 g_hwiForm[UsageFault_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcUsageFault;
587 g_hwiForm[SVCall_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalExcSvcCall;
588 g_hwiForm[PendSV_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)HalPendSV;
589 g_hwiForm[SysTick_IRQn + OS_SYS_VECTOR_CNT] = (HWI_PROC_FUNC)SysTick_Handler;
590
591 /* Interrupt vector table location */
592 SCB->VTOR = (UINT32)(UINTPTR)g_hwiForm;
593 #endif
594 #if (__CORTEX_M >= 0x03U) /* only for Cortex-M3 and above */
595 NVIC_SetPriorityGrouping(OS_NVIC_AIRCR_PRIGROUP);
596 #endif
597
598 /* Enable USGFAULT, BUSFAULT, MEMFAULT */
599 *(volatile UINT32 *)OS_NVIC_SHCSR |= (USGFAULT | BUSFAULT | MEMFAULT);
600
601 /* Enable DIV 0 and unaligned exception */
602 *(volatile UINT32 *)OS_NVIC_CCR |= (DIV0FAULT | UNALIGNFAULT);
603
604 return;
605 }
606
607