1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2// 3// Copyright 2014-2019 Soeren Moch <smoch@web.de> 4 5/dts-v1/; 6 7#include "imx6q.dtsi" 8#include <dt-bindings/gpio/gpio.h> 9#include <dt-bindings/input/input.h> 10 11/ { 12 model = "TBS2910 Matrix ARM mini PC"; 13 compatible = "tbs,imx6q-tbs2910", "fsl,imx6q"; 14 15 chosen { 16 stdout-path = &uart1; 17 }; 18 19 aliases { 20 mmc0 = &usdhc2; 21 mmc1 = &usdhc3; 22 mmc2 = &usdhc4; 23 usb0 = &usbotg; 24 }; 25 26 memory@10000000 { 27 device_type = "memory"; 28 reg = <0x10000000 0x80000000>; 29 }; 30 31 fan { 32 compatible = "gpio-fan"; 33 pinctrl-names = "default"; 34 pinctrl-0 = <&pinctrl_gpio_fan>; 35 gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>; 36 gpio-fan,speed-map = <0 0 37 3000 1>; 38 }; 39 40 ir_recv { 41 compatible = "gpio-ir-receiver"; 42 gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; 43 pinctrl-names = "default"; 44 pinctrl-0 = <&pinctrl_ir>; 45 }; 46 47 leds { 48 compatible = "gpio-leds"; 49 pinctrl-names = "default"; 50 pinctrl-0 = <&pinctrl_gpio_leds>; 51 52 blue { 53 label = "blue_status_led"; 54 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 55 default-state = "keep"; 56 }; 57 }; 58 59 reg_2p5v: regulator-2p5v { 60 compatible = "regulator-fixed"; 61 regulator-name = "2P5V"; 62 regulator-min-microvolt = <2500000>; 63 regulator-max-microvolt = <2500000>; 64 }; 65 66 reg_3p3v: regulator-3p3v { 67 compatible = "regulator-fixed"; 68 regulator-name = "3P3V"; 69 regulator-min-microvolt = <3300000>; 70 regulator-max-microvolt = <3300000>; 71 }; 72 73 reg_5p0v: regulator-5p0v { 74 compatible = "regulator-fixed"; 75 regulator-name = "5P0V"; 76 regulator-min-microvolt = <5000000>; 77 regulator-max-microvolt = <5000000>; 78 }; 79 80 sound-sgtl5000 { 81 audio-codec = <&sgtl5000>; 82 audio-routing = 83 "MIC_IN", "Mic Jack", 84 "Mic Jack", "Mic Bias", 85 "Headphone Jack", "HP_OUT"; 86 compatible = "fsl,imx-audio-sgtl5000"; 87 model = "On-board Codec"; 88 mux-ext-port = <3>; 89 mux-int-port = <1>; 90 ssi-controller = <&ssi1>; 91 }; 92 93 sound-spdif { 94 compatible = "fsl,imx-audio-spdif"; 95 model = "On-board SPDIF"; 96 spdif-controller = <&spdif>; 97 spdif-out; 98 }; 99}; 100 101&audmux { 102 status = "okay"; 103}; 104 105&fec { 106 pinctrl-names = "default"; 107 pinctrl-0 = <&pinctrl_enet>; 108 phy-mode = "rgmii-id"; 109 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 110 status = "okay"; 111}; 112 113&hdmi { 114 pinctrl-names = "default"; 115 pinctrl-0 = <&pinctrl_hdmi>; 116 ddc-i2c-bus = <&i2c2>; 117 status = "okay"; 118}; 119 120&i2c1 { 121 clock-frequency = <100000>; 122 pinctrl-names = "default"; 123 pinctrl-0 = <&pinctrl_i2c1>; 124 status = "okay"; 125 126 sgtl5000: sgtl5000@a { 127 clocks = <&clks IMX6QDL_CLK_CKO>; 128 compatible = "fsl,sgtl5000"; 129 pinctrl-names = "default"; 130 pinctrl-0 = <&pinctrl_sgtl5000>; 131 reg = <0x0a>; 132 VDDA-supply = <®_2p5v>; 133 VDDIO-supply = <®_3p3v>; 134 }; 135}; 136 137&i2c2 { 138 clock-frequency = <100000>; 139 pinctrl-names = "default"; 140 pinctrl-0 = <&pinctrl_i2c2>; 141 status = "okay"; 142}; 143 144&i2c3 { 145 clock-frequency = <100000>; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&pinctrl_i2c3>; 148 status = "okay"; 149 150 rtc: ds1307@68 { 151 compatible = "dallas,ds1307"; 152 reg = <0x68>; 153 }; 154}; 155 156&pcie { 157 pinctrl-names = "default"; 158 pinctrl-0 = <&pinctrl_pcie>; 159 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 160 status = "okay"; 161}; 162 163&sata { 164 fsl,transmit-level-mV = <1104>; 165 fsl,transmit-boost-mdB = <3330>; 166 fsl,transmit-atten-16ths = <16>; 167 fsl,receive-eq-mdB = <3000>; 168 status = "okay"; 169}; 170 171&snvs_poweroff { 172 status = "okay"; 173}; 174 175&spdif { 176 pinctrl-names = "default"; 177 pinctrl-0 = <&pinctrl_spdif>; 178 status = "okay"; 179}; 180 181&ssi1 { 182 status = "okay"; 183}; 184 185&uart1 { 186 pinctrl-names = "default"; 187 pinctrl-0 = <&pinctrl_uart1>; 188 status = "okay"; 189}; 190 191&uart2 { 192 pinctrl-names = "default"; 193 pinctrl-0 = <&pinctrl_uart2>; 194 status = "okay"; 195}; 196 197&usbh1 { 198 vbus-supply = <®_5p0v>; 199 status = "okay"; 200}; 201 202&usbotg { 203 vbus-supply = <®_5p0v>; 204 pinctrl-names = "default"; 205 pinctrl-0 = <&pinctrl_usbotg>; 206 disable-over-current; 207 status = "okay"; 208}; 209 210&usdhc2 { 211 pinctrl-names = "default"; 212 pinctrl-0 = <&pinctrl_usdhc2>; 213 bus-width = <4>; 214 cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 215 vmmc-supply = <®_3p3v>; 216 vqmmc-supply = <®_3p3v>; 217 voltage-ranges = <3300 3300>; 218 no-1-8-v; 219 status = "okay"; 220}; 221 222&usdhc3 { 223 pinctrl-names = "default"; 224 pinctrl-0 = <&pinctrl_usdhc3>; 225 bus-width = <4>; 226 cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 227 wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; 228 vmmc-supply = <®_3p3v>; 229 vqmmc-supply = <®_3p3v>; 230 voltage-ranges = <3300 3300>; 231 no-1-8-v; 232 status = "okay"; 233}; 234 235&usdhc4 { 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_usdhc4>; 238 bus-width = <8>; 239 vmmc-supply = <®_3p3v>; 240 vqmmc-supply = <®_3p3v>; 241 voltage-ranges = <3300 3300>; 242 non-removable; 243 no-1-8-v; 244 status = "okay"; 245}; 246 247&iomuxc { 248 pinctrl_enet: enetgrp { 249 fsl,pins = < 250 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 251 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 252 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 253 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 254 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 255 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 256 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 257 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 258 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 259 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 260 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 261 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 262 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 263 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 264 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 265 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 266 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b059 267 >; 268 }; 269 270 pinctrl_gpio_fan: gpiofangrp { 271 fsl,pins = < 272 MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x130b1 273 >; 274 }; 275 276 pinctrl_gpio_leds: gpioledsgrp { 277 fsl,pins = < 278 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x130b1 279 >; 280 }; 281 282 pinctrl_hdmi: hdmigrp { 283 fsl,pins = < 284 MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 285 >; 286 }; 287 288 pinctrl_i2c1: i2c1grp { 289 fsl,pins = < 290 MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 291 MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 292 >; 293 }; 294 295 pinctrl_i2c2: i2c2grp { 296 fsl,pins = < 297 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 298 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 299 >; 300 }; 301 302 pinctrl_i2c3: i2c3grp { 303 fsl,pins = < 304 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 305 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 306 >; 307 }; 308 309 pinctrl_ir: irgrp { 310 fsl,pins = < 311 MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x17059 312 >; 313 }; 314 315 pinctrl_pcie: pciegrp { 316 fsl,pins = < 317 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x17059 318 >; 319 }; 320 321 pinctrl_sgtl5000: sgtl5000grp { 322 fsl,pins = < 323 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 324 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 325 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 326 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 327 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 328 >; 329 }; 330 331 pinctrl_spdif: spdifgrp { 332 fsl,pins = <MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x13091 333 >; 334 }; 335 336 pinctrl_uart1: uart1grp { 337 fsl,pins = < 338 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 339 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 340 >; 341 }; 342 343 pinctrl_uart2: uart2grp { 344 fsl,pins = < 345 MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 346 MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 347 >; 348 }; 349 350 pinctrl_usbotg: usbotggrp { 351 fsl,pins = < 352 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 353 >; 354 }; 355 356 pinctrl_usdhc2: usdhc2grp { 357 fsl,pins = < 358 MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 359 MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 360 MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 361 MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 362 MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 363 MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 364 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x17059 365 >; 366 }; 367 368 pinctrl_usdhc3: usdhc3grp { 369 fsl,pins = < 370 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 371 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 372 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 373 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 374 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 375 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 376 MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x17059 377 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x17059 378 >; 379 }; 380 381 pinctrl_usdhc4: usdhc4grp { 382 fsl,pins = < 383 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 384 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 385 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 386 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 387 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 388 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 389 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 390 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 391 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 392 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 393 >; 394 }; 395}; 396