1 /*
2 * linux/include/asm-arm/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 */
20 #ifndef __ASM_ARM_IO_H
21 #define __ASM_ARM_IO_H
22
23 #ifdef __KERNEL__
24
25 #include <linux/types.h>
26 #include <linux/kernel.h>
27 #include <asm/byteorder.h>
28 #include <asm/memory.h>
29 #include <asm/barriers.h>
30 #if 0 /* XXX###XXX */
31 #include <asm/arch/hardware.h>
32 #endif /* XXX###XXX */
33
sync(void)34 static inline void sync(void)
35 {
36 }
37
38 /*
39 * Generic virtual read/write. Note that we don't support half-word
40 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
41 * to the architecture specific code.
42 */
43 #define __arch_getb(a) (*(volatile unsigned char *)(a))
44 #define __arch_getw(a) (*(volatile unsigned short *)(a))
45 #define __arch_getl(a) (*(volatile unsigned int *)(a))
46 #define __arch_getq(a) (*(volatile unsigned long long *)(a))
47
48 #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
49 #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
50 #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
51 #define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v))
52
__raw_writesb(unsigned long addr,const void * data,int bytelen)53 static inline void __raw_writesb(unsigned long addr, const void *data,
54 int bytelen)
55 {
56 uint8_t *buf = (uint8_t *)data;
57 while(bytelen--)
58 __arch_putb(*buf++, addr);
59 }
60
__raw_writesw(unsigned long addr,const void * data,int wordlen)61 static inline void __raw_writesw(unsigned long addr, const void *data,
62 int wordlen)
63 {
64 uint16_t *buf = (uint16_t *)data;
65 while(wordlen--)
66 __arch_putw(*buf++, addr);
67 }
68
__raw_writesl(unsigned long addr,const void * data,int longlen)69 static inline void __raw_writesl(unsigned long addr, const void *data,
70 int longlen)
71 {
72 uint32_t *buf = (uint32_t *)data;
73 while(longlen--)
74 __arch_putl(*buf++, addr);
75 }
76
__raw_readsb(unsigned long addr,void * data,int bytelen)77 static inline void __raw_readsb(unsigned long addr, void *data, int bytelen)
78 {
79 uint8_t *buf = (uint8_t *)data;
80 while(bytelen--)
81 *buf++ = __arch_getb(addr);
82 }
83
__raw_readsw(unsigned long addr,void * data,int wordlen)84 static inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
85 {
86 uint16_t *buf = (uint16_t *)data;
87 while(wordlen--)
88 *buf++ = __arch_getw(addr);
89 }
90
__raw_readsl(unsigned long addr,void * data,int longlen)91 static inline void __raw_readsl(unsigned long addr, void *data, int longlen)
92 {
93 uint32_t *buf = (uint32_t *)data;
94 while(longlen--)
95 *buf++ = __arch_getl(addr);
96 }
97
98 #define __raw_writeb(v,a) __arch_putb(v,a)
99 #define __raw_writew(v,a) __arch_putw(v,a)
100 #define __raw_writel(v,a) __arch_putl(v,a)
101 #define __raw_writeq(v,a) __arch_putq(v,a)
102
103 #define __raw_readb(a) __arch_getb(a)
104 #define __raw_readw(a) __arch_getw(a)
105 #define __raw_readl(a) __arch_getl(a)
106 #define __raw_readq(a) __arch_getq(a)
107
108 /*
109 * TODO: The kernel offers some more advanced versions of barriers, it might
110 * have some advantages to use them instead of the simple one here.
111 */
112 #define mb() dsb()
113 #define __iormb() dmb()
114 #define __iowmb() dmb()
115
116 #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; })
117 #define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
118 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
119 #define writeq(v,c) ({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
120
121 #define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; })
122 #define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; })
123 #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
124 #define readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; })
125
126 /*
127 * Relaxed I/O memory access primitives. These follow the Device memory
128 * ordering rules but do not guarantee any ordering relative to Normal memory
129 * accesses.
130 */
131 #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
132 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
133 __raw_readw(c)); __r; })
134 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
135 __raw_readl(c)); __r; })
136 #define readq_relaxed(c) ({ u64 __r = le64_to_cpu((__force __le64) \
137 __raw_readq(c)); __r; })
138
139 #define writeb_relaxed(v, c) ((void)__raw_writeb((v), (c)))
140 #define writew_relaxed(v, c) ((void)__raw_writew((__force u16) \
141 cpu_to_le16(v), (c)))
142 #define writel_relaxed(v, c) ((void)__raw_writel((__force u32) \
143 cpu_to_le32(v), (c)))
144 #define writeq_relaxed(v, c) ((void)__raw_writeq((__force u64) \
145 cpu_to_le64(v), (c)))
146
147 /*
148 * The compiler seems to be incapable of optimising constants
149 * properly. Spell it out to the compiler in some cases.
150 * These are only valid for small values of "off" (< 1<<12)
151 */
152 #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
153 #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
154 #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
155
156 #define __raw_base_readb(base,off) __arch_base_getb(base,off)
157 #define __raw_base_readw(base,off) __arch_base_getw(base,off)
158 #define __raw_base_readl(base,off) __arch_base_getl(base,off)
159
160 /*
161 * Clear and set bits in one shot. These macros can be used to clear and
162 * set multiple bits in a register using a single call. These macros can
163 * also be used to set a multiple-bit bit pattern using a mask, by
164 * specifying the mask in the 'clear' parameter and the new bit pattern
165 * in the 'set' parameter.
166 */
167
168 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a)
169 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a))
170
171 #define out_le64(a,v) out_arch(q,le64,a,v)
172 #define out_le32(a,v) out_arch(l,le32,a,v)
173 #define out_le16(a,v) out_arch(w,le16,a,v)
174
175 #define in_le64(a) in_arch(q,le64,a)
176 #define in_le32(a) in_arch(l,le32,a)
177 #define in_le16(a) in_arch(w,le16,a)
178
179 #define out_be32(a,v) out_arch(l,be32,a,v)
180 #define out_be16(a,v) out_arch(w,be16,a,v)
181
182 #define in_be32(a) in_arch(l,be32,a)
183 #define in_be16(a) in_arch(w,be16,a)
184
185 #define out_32(a,v) __raw_writel(v,a)
186 #define out_16(a,v) __raw_writew(v,a)
187 #define out_8(a,v) __raw_writeb(v,a)
188
189 #define in_32(a) __raw_readl(a)
190 #define in_16(a) __raw_readw(a)
191 #define in_8(a) __raw_readb(a)
192
193 #define clrbits(type, addr, clear) \
194 out_##type((addr), in_##type(addr) & ~(clear))
195
196 #define setbits(type, addr, set) \
197 out_##type((addr), in_##type(addr) | (set))
198
199 #define clrsetbits(type, addr, clear, set) \
200 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
201
202 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
203 #define setbits_be32(addr, set) setbits(be32, addr, set)
204 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
205
206 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
207 #define setbits_le32(addr, set) setbits(le32, addr, set)
208 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
209
210 #define clrbits_32(addr, clear) clrbits(32, addr, clear)
211 #define setbits_32(addr, set) setbits(32, addr, set)
212 #define clrsetbits_32(addr, clear, set) clrsetbits(32, addr, clear, set)
213
214 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
215 #define setbits_be16(addr, set) setbits(be16, addr, set)
216 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
217
218 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
219 #define setbits_le16(addr, set) setbits(le16, addr, set)
220 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
221
222 #define clrbits_16(addr, clear) clrbits(16, addr, clear)
223 #define setbits_16(addr, set) setbits(16, addr, set)
224 #define clrsetbits_16(addr, clear, set) clrsetbits(16, addr, clear, set)
225
226 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
227 #define setbits_8(addr, set) setbits(8, addr, set)
228 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
229
230 /*
231 * Now, pick up the machine-defined IO definitions
232 */
233 #if 0 /* XXX###XXX */
234 #include <asm/arch/io.h>
235 #endif /* XXX###XXX */
236
237 /*
238 * IO port access primitives
239 * -------------------------
240 *
241 * The ARM doesn't have special IO access instructions; all IO is memory
242 * mapped. Note that these are defined to perform little endian accesses
243 * only. Their primary purpose is to access PCI and ISA peripherals.
244 *
245 * Note that for a big endian machine, this implies that the following
246 * big endian mode connectivity is in place, as described by numerous
247 * ARM documents:
248 *
249 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
250 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
251 *
252 * The machine specific io.h include defines __io to translate an "IO"
253 * address to a memory address.
254 *
255 * Note that we prevent GCC re-ordering or caching values in expressions
256 * by introducing sequence points into the in*() definitions. Note that
257 * __raw_* do not guarantee this behaviour.
258 *
259 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
260 */
261 #ifdef __io
262 #define outb(v,p) __raw_writeb(v,__io(p))
263 #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
264 #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
265
266 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
267 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
268 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
269
270 #define outsb(p,d,l) __raw_writesb(__io(p),d,l)
271 #define outsw(p,d,l) __raw_writesw(__io(p),d,l)
272 #define outsl(p,d,l) __raw_writesl(__io(p),d,l)
273
274 #define insb(p,d,l) __raw_readsb(__io(p),d,l)
275 #define insw(p,d,l) __raw_readsw(__io(p),d,l)
276 #define insl(p,d,l) __raw_readsl(__io(p),d,l)
277 #endif
278
279 #define outb_p(val,port) outb((val),(port))
280 #define outw_p(val,port) outw((val),(port))
281 #define outl_p(val,port) outl((val),(port))
282 #define inb_p(port) inb((port))
283 #define inw_p(port) inw((port))
284 #define inl_p(port) inl((port))
285
286 #define outsb_p(port,from,len) outsb(port,from,len)
287 #define outsw_p(port,from,len) outsw(port,from,len)
288 #define outsl_p(port,from,len) outsl(port,from,len)
289 #define insb_p(port,to,len) insb(port,to,len)
290 #define insw_p(port,to,len) insw(port,to,len)
291 #define insl_p(port,to,len) insl(port,to,len)
292
293 #define writesl(a, d, s) __raw_writesl((unsigned long)a, d, s)
294 #define readsl(a, d, s) __raw_readsl((unsigned long)a, d, s)
295 #define writesw(a, d, s) __raw_writesw((unsigned long)a, d, s)
296 #define readsw(a, d, s) __raw_readsw((unsigned long)a, d, s)
297 #define writesb(a, d, s) __raw_writesb((unsigned long)a, d, s)
298 #define readsb(a, d, s) __raw_readsb((unsigned long)a, d, s)
299
300 /*
301 * DMA-consistent mapping functions. These allocate/free a region of
302 * uncached, unwrite-buffered mapped memory space for use with DMA
303 * devices. This is the "generic" version. The PCI specific version
304 * is in pci.h
305 */
306 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
307 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
308 extern void consistent_sync(void *vaddr, size_t size, int rw);
309
310 /*
311 * String version of IO memory access ops:
312 */
313 extern void _memcpy_fromio(void *, unsigned long, size_t);
314 extern void _memcpy_toio(unsigned long, const void *, size_t);
315 extern void _memset_io(unsigned long, int, size_t);
316
317 extern void __readwrite_bug(const char *fn);
318
319 /* Optimized copy functions to read from/write to IO sapce */
320 #ifdef CONFIG_ARM64
321 /*
322 * Copy data from IO memory space to "real" memory space.
323 */
324 static inline
__memcpy_fromio(void * to,const volatile void __iomem * from,size_t count)325 void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count)
326 {
327 while (count && !IS_ALIGNED((unsigned long)from, 8)) {
328 *(u8 *)to = __raw_readb(from);
329 from++;
330 to++;
331 count--;
332 }
333
334 while (count >= 8) {
335 *(u64 *)to = __raw_readq(from);
336 from += 8;
337 to += 8;
338 count -= 8;
339 }
340
341 while (count) {
342 *(u8 *)to = __raw_readb(from);
343 from++;
344 to++;
345 count--;
346 }
347 }
348
349 /*
350 * Copy data from "real" memory space to IO memory space.
351 */
352 static inline
__memcpy_toio(volatile void __iomem * to,const void * from,size_t count)353 void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count)
354 {
355 while (count && !IS_ALIGNED((unsigned long)to, 8)) {
356 __raw_writeb(*(u8 *)from, to);
357 from++;
358 to++;
359 count--;
360 }
361
362 while (count >= 8) {
363 __raw_writeq(*(u64 *)from, to);
364 from += 8;
365 to += 8;
366 count -= 8;
367 }
368
369 while (count) {
370 __raw_writeb(*(u8 *)from, to);
371 from++;
372 to++;
373 count--;
374 }
375 }
376
377 /*
378 * "memset" on IO memory space.
379 */
380 static inline
__memset_io(volatile void __iomem * dst,int c,size_t count)381 void __memset_io(volatile void __iomem *dst, int c, size_t count)
382 {
383 u64 qc = (u8)c;
384
385 qc |= qc << 8;
386 qc |= qc << 16;
387 qc |= qc << 32;
388
389 while (count && !IS_ALIGNED((unsigned long)dst, 8)) {
390 __raw_writeb(c, dst);
391 dst++;
392 count--;
393 }
394
395 while (count >= 8) {
396 __raw_writeq(qc, dst);
397 dst += 8;
398 count -= 8;
399 }
400
401 while (count) {
402 __raw_writeb(c, dst);
403 dst++;
404 count--;
405 }
406 }
407 #endif /* CONFIG_ARM64 */
408
409 #ifdef CONFIG_ARM64
410 #define memset_io(a, b, c) __memset_io((a), (b), (c))
411 #define memcpy_fromio(a, b, c) __memcpy_fromio((a), (b), (c))
412 #define memcpy_toio(a, b, c) __memcpy_toio((a), (b), (c))
413 #else
414 #define memset_io(a, b, c) memset((void *)(a), (b), (c))
415 #define memcpy_fromio(a, b, c) memcpy((a), (void *)(b), (c))
416 #define memcpy_toio(a, b, c) memcpy((void *)(a), (b), (c))
417 #endif
418
419 /*
420 * If this architecture has ISA IO, then define the isa_read/isa_write
421 * macros.
422 */
423 #ifdef __mem_isa
424
425 #define isa_readb(addr) __raw_readb(__mem_isa(addr))
426 #define isa_readw(addr) __raw_readw(__mem_isa(addr))
427 #define isa_readl(addr) __raw_readl(__mem_isa(addr))
428 #define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
429 #define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
430 #define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
431 #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
432 #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
433 #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
434
435 #define isa_eth_io_copy_and_sum(a,b,c,d) \
436 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
437
438 static inline int
isa_check_signature(unsigned long io_addr,const unsigned char * signature,int length)439 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
440 int length)
441 {
442 int retval = 0;
443 do {
444 if (isa_readb(io_addr) != *signature)
445 goto out;
446 io_addr++;
447 signature++;
448 length--;
449 } while (length);
450 retval = 1;
451 out:
452 return retval;
453 }
454
455 #else /* __mem_isa */
456
457 #define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
458 #define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
459 #define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
460 #define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
461 #define isa_writew(val,addr) __readwrite_bug("isa_writew")
462 #define isa_writel(val,addr) __readwrite_bug("isa_writel")
463 #define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
464 #define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
465 #define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
466
467 #define isa_eth_io_copy_and_sum(a,b,c,d) \
468 __readwrite_bug("isa_eth_io_copy_and_sum")
469
470 #define isa_check_signature(io,sig,len) (0)
471
472 #endif /* __mem_isa */
473 #endif /* __KERNEL__ */
474
475 #include <asm-generic/io.h>
476 #include <iotrace.h>
477
478 #endif /* __ASM_ARM_IO_H */
479