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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2018 Marek Behun <marek.behun@nic.cz>
4  */
5 
6 #include <common.h>
7 #include <init.h>
8 #include <asm/gpio.h>
9 #include <asm/io.h>
10 #include <dm.h>
11 #include <clk.h>
12 #include <env.h>
13 #include <spi.h>
14 #include <mvebu/comphy.h>
15 #include <miiphy.h>
16 #include <linux/string.h>
17 #include <linux/libfdt.h>
18 #include <fdt_support.h>
19 
20 #include "mox_sp.h"
21 
22 #define MAX_MOX_MODULES		10
23 
24 #define MOX_MODULE_SFP		0x1
25 #define MOX_MODULE_PCI		0x2
26 #define MOX_MODULE_TOPAZ	0x3
27 #define MOX_MODULE_PERIDOT	0x4
28 #define MOX_MODULE_USB3		0x5
29 #define MOX_MODULE_PASSPCI	0x6
30 
31 #define ARMADA_37XX_NB_GPIO_SEL	0xd0013830
32 #define ARMADA_37XX_SPI_CTRL	0xd0010600
33 #define ARMADA_37XX_SPI_CFG	0xd0010604
34 #define ARMADA_37XX_SPI_DOUT	0xd0010608
35 #define ARMADA_37XX_SPI_DIN	0xd001060c
36 
37 #define PCIE_PATH	"/soc/pcie@d0070000"
38 
39 DECLARE_GLOBAL_DATA_PTR;
40 
dram_init(void)41 int dram_init(void)
42 {
43 	gd->ram_base = 0;
44 	gd->ram_size = (phys_size_t)get_ram_size(0, 0x40000000);
45 
46 	return 0;
47 }
48 
dram_init_banksize(void)49 int dram_init_banksize(void)
50 {
51 	gd->bd->bi_dram[0].start = (phys_addr_t)0;
52 	gd->bd->bi_dram[0].size = gd->ram_size;
53 
54 	return 0;
55 }
56 
57 #if defined(CONFIG_OF_BOARD_FIXUP)
board_fix_fdt(void * blob)58 int board_fix_fdt(void *blob)
59 {
60 	u8 topology[MAX_MOX_MODULES];
61 	int i, size, node;
62 	bool enable;
63 
64 	/*
65 	 * SPI driver is not loaded in driver model yet, but we have to find out
66 	 * if pcie should be enabled in U-Boot's device tree. Therefore we have
67 	 * to read SPI by reading/writing SPI registers directly
68 	 */
69 
70 	writel(0x563fa, ARMADA_37XX_NB_GPIO_SEL);
71 	writel(0x10df, ARMADA_37XX_SPI_CFG);
72 	writel(0x2005b, ARMADA_37XX_SPI_CTRL);
73 
74 	while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
75 		udelay(1);
76 
77 	for (i = 0; i < MAX_MOX_MODULES; ++i) {
78 		writel(0x0, ARMADA_37XX_SPI_DOUT);
79 
80 		while (!(readl(ARMADA_37XX_SPI_CTRL) & 0x2))
81 			udelay(1);
82 
83 		topology[i] = readl(ARMADA_37XX_SPI_DIN) & 0xff;
84 		if (topology[i] == 0xff)
85 			break;
86 
87 		topology[i] &= 0xf;
88 	}
89 
90 	size = i;
91 
92 	writel(0x5b, ARMADA_37XX_SPI_CTRL);
93 
94 	if (size > 1 && (topology[1] == MOX_MODULE_PCI ||
95 			 topology[1] == MOX_MODULE_USB3 ||
96 			 topology[1] == MOX_MODULE_PASSPCI))
97 		enable = true;
98 	else
99 		enable = false;
100 
101 	node = fdt_path_offset(blob, PCIE_PATH);
102 
103 	if (node < 0) {
104 		printf("Cannot find PCIe node in U-Boot's device tree!\n");
105 		return 0;
106 	}
107 
108 	if (fdt_setprop_string(blob, node, "status",
109 			       enable ? "okay" : "disabled") < 0) {
110 		printf("Cannot %s PCIe in U-Boot's device tree!\n",
111 		       enable ? "enable" : "disable");
112 		return 0;
113 	}
114 
115 	return 0;
116 }
117 #endif
118 
board_init(void)119 int board_init(void)
120 {
121 	/* address of boot parameters */
122 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
123 
124 	return 0;
125 }
126 
mox_do_spi(u8 * in,u8 * out,size_t size)127 static int mox_do_spi(u8 *in, u8 *out, size_t size)
128 {
129 	struct spi_slave *slave;
130 	struct udevice *dev;
131 	int ret;
132 
133 	ret = spi_get_bus_and_cs(0, 1, 1000000, SPI_CPHA | SPI_CPOL,
134 				 "spi_generic_drv", "moxtet@1", &dev,
135 				 &slave);
136 	if (ret)
137 		goto fail;
138 
139 	ret = spi_claim_bus(slave);
140 	if (ret)
141 		goto fail_free;
142 
143 	ret = spi_xfer(slave, size * 8, out, in, SPI_XFER_ONCE);
144 
145 	spi_release_bus(slave);
146 fail_free:
147 	spi_free_slave(slave);
148 fail:
149 	return ret;
150 }
151 
mox_get_topology(const u8 ** ptopology,int * psize,int * pis_sd)152 static int mox_get_topology(const u8 **ptopology, int *psize, int *pis_sd)
153 {
154 	static int is_sd;
155 	static u8 topology[MAX_MOX_MODULES - 1];
156 	static int size;
157 	u8 din[MAX_MOX_MODULES], dout[MAX_MOX_MODULES];
158 	int ret, i;
159 
160 	if (size) {
161 		if (ptopology)
162 			*ptopology = topology;
163 		if (psize)
164 			*psize = size;
165 		if (pis_sd)
166 			*pis_sd = is_sd;
167 		return 0;
168 	}
169 
170 	memset(din, 0, MAX_MOX_MODULES);
171 	memset(dout, 0, MAX_MOX_MODULES);
172 
173 	ret = mox_do_spi(din, dout, MAX_MOX_MODULES);
174 	if (ret)
175 		return ret;
176 
177 	if (din[0] == 0x10)
178 		is_sd = 1;
179 	else if (din[0] == 0x00)
180 		is_sd = 0;
181 	else
182 		return -ENODEV;
183 
184 	for (i = 1; i < MAX_MOX_MODULES && din[i] != 0xff; ++i)
185 		topology[i - 1] = din[i] & 0xf;
186 	size = i - 1;
187 
188 	if (ptopology)
189 		*ptopology = topology;
190 	if (psize)
191 		*psize = size;
192 	if (pis_sd)
193 		*pis_sd = is_sd;
194 
195 	return 0;
196 }
197 
comphy_update_map(struct comphy_map * serdes_map,int count)198 int comphy_update_map(struct comphy_map *serdes_map, int count)
199 {
200 	int ret, i, size, sfpindex = -1, swindex = -1;
201 	const u8 *topology;
202 
203 	ret = mox_get_topology(&topology, &size, NULL);
204 	if (ret)
205 		return ret;
206 
207 	for (i = 0; i < size; ++i) {
208 		if (topology[i] == MOX_MODULE_SFP && sfpindex == -1)
209 			sfpindex = i;
210 		else if ((topology[i] == MOX_MODULE_TOPAZ ||
211 			  topology[i] == MOX_MODULE_PERIDOT) &&
212 			 swindex == -1)
213 			swindex = i;
214 	}
215 
216 	if (sfpindex >= 0 && swindex >= 0) {
217 		if (sfpindex < swindex)
218 			serdes_map[0].speed = PHY_SPEED_1_25G;
219 		else
220 			serdes_map[0].speed = PHY_SPEED_3_125G;
221 	} else if (sfpindex >= 0) {
222 		serdes_map[0].speed = PHY_SPEED_1_25G;
223 	} else if (swindex >= 0) {
224 		serdes_map[0].speed = PHY_SPEED_3_125G;
225 	}
226 
227 	return 0;
228 }
229 
230 #define SW_SMI_CMD_R(d, r)	(0x9800 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
231 #define SW_SMI_CMD_W(d, r)	(0x9400 | (((d) & 0x1f) << 5) | ((r) & 0x1f))
232 
sw_multi_read(struct mii_dev * bus,int sw,int dev,int reg)233 static int sw_multi_read(struct mii_dev *bus, int sw, int dev, int reg)
234 {
235 	bus->write(bus, sw, 0, 0, SW_SMI_CMD_R(dev, reg));
236 	mdelay(5);
237 	return bus->read(bus, sw, 0, 1);
238 }
239 
sw_multi_write(struct mii_dev * bus,int sw,int dev,int reg,u16 val)240 static void sw_multi_write(struct mii_dev *bus, int sw, int dev, int reg,
241 			   u16 val)
242 {
243 	bus->write(bus, sw, 0, 1, val);
244 	bus->write(bus, sw, 0, 0, SW_SMI_CMD_W(dev, reg));
245 	mdelay(5);
246 }
247 
sw_scratch_read(struct mii_dev * bus,int sw,int reg)248 static int sw_scratch_read(struct mii_dev *bus, int sw, int reg)
249 {
250 	sw_multi_write(bus, sw, 0x1c, 0x1a, (reg & 0x7f) << 8);
251 	return sw_multi_read(bus, sw, 0x1c, 0x1a) & 0xff;
252 }
253 
sw_led_write(struct mii_dev * bus,int sw,int port,int reg,u16 val)254 static void sw_led_write(struct mii_dev *bus, int sw, int port, int reg,
255 			 u16 val)
256 {
257 	sw_multi_write(bus, sw, port, 0x16, 0x8000 | ((reg & 7) << 12)
258 					    | (val & 0x7ff));
259 }
260 
sw_blink_leds(struct mii_dev * bus,int peridot,int topaz)261 static void sw_blink_leds(struct mii_dev *bus, int peridot, int topaz)
262 {
263 	int i, p;
264 	struct {
265 		int port;
266 		u16 val;
267 		int wait;
268 	} regs[] = {
269 		{ 2, 0xef, 1 }, { 2, 0xfe, 1 }, { 2, 0x33, 0 },
270 		{ 4, 0xef, 1 }, { 4, 0xfe, 1 }, { 4, 0x33, 0 },
271 		{ 3, 0xfe, 1 }, { 3, 0xef, 1 }, { 3, 0x33, 0 },
272 		{ 1, 0xfe, 1 }, { 1, 0xef, 1 }, { 1, 0x33, 0 }
273 	};
274 
275 	for (i = 0; i < 12; ++i) {
276 		for (p = 0; p < peridot; ++p) {
277 			sw_led_write(bus, 0x10 + p, regs[i].port, 0,
278 				     regs[i].val);
279 			sw_led_write(bus, 0x10 + p, regs[i].port + 4, 0,
280 				     regs[i].val);
281 		}
282 		if (topaz) {
283 			sw_led_write(bus, 0x2, 0x10 + regs[i].port, 0,
284 				     regs[i].val);
285 		}
286 
287 		if (regs[i].wait)
288 			mdelay(75);
289 	}
290 }
291 
check_switch_address(struct mii_dev * bus,int addr)292 static void check_switch_address(struct mii_dev *bus, int addr)
293 {
294 	if (sw_scratch_read(bus, addr, 0x70) >> 3 != addr)
295 		printf("Check of switch MDIO address failed for 0x%02x\n",
296 		       addr);
297 }
298 
299 static int sfp, pci, topaz, peridot, usb, passpci;
300 static int sfp_pos, peridot_pos[3];
301 static int module_count;
302 
configure_peridots(struct gpio_desc * reset_gpio)303 static int configure_peridots(struct gpio_desc *reset_gpio)
304 {
305 	int i, ret;
306 	u8 dout[MAX_MOX_MODULES];
307 
308 	memset(dout, 0, MAX_MOX_MODULES);
309 
310 	/* set addresses of Peridot modules */
311 	for (i = 0; i < peridot; ++i)
312 		dout[module_count - peridot_pos[i]] = (~i) & 3;
313 
314 	/*
315 	 * if there is a SFP module connected to the last Peridot module, set
316 	 * the P10_SMODE to 1 for the Peridot module
317 	 */
318 	if (sfp)
319 		dout[module_count - peridot_pos[i - 1]] |= 1 << 3;
320 
321 	dm_gpio_set_value(reset_gpio, 1);
322 	mdelay(10);
323 
324 	ret = mox_do_spi(NULL, dout, module_count + 1);
325 
326 	mdelay(10);
327 	dm_gpio_set_value(reset_gpio, 0);
328 
329 	mdelay(50);
330 
331 	return ret;
332 }
333 
get_reset_gpio(struct gpio_desc * reset_gpio)334 static int get_reset_gpio(struct gpio_desc *reset_gpio)
335 {
336 	int node;
337 
338 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "cznic,moxtet");
339 	if (node < 0) {
340 		printf("Cannot find Moxtet bus device node!\n");
341 		return -1;
342 	}
343 
344 	gpio_request_by_name_nodev(offset_to_ofnode(node), "reset-gpios", 0,
345 				   reset_gpio, GPIOD_IS_OUT);
346 
347 	if (!dm_gpio_is_valid(reset_gpio)) {
348 		printf("Cannot find reset GPIO for Moxtet bus!\n");
349 		return -1;
350 	}
351 
352 	return 0;
353 }
354 
misc_init_r(void)355 int misc_init_r(void)
356 {
357 	int ret;
358 	u8 mac1[6], mac2[6];
359 
360 	ret = mbox_sp_get_board_info(NULL, mac1, mac2, NULL, NULL);
361 	if (ret < 0) {
362 		printf("Cannot read data from OTP!\n");
363 		return 0;
364 	}
365 
366 	if (is_valid_ethaddr(mac1) && !env_get("ethaddr"))
367 		eth_env_set_enetaddr("ethaddr", mac1);
368 
369 	if (is_valid_ethaddr(mac2) && !env_get("eth1addr"))
370 		eth_env_set_enetaddr("eth1addr", mac2);
371 
372 	return 0;
373 }
374 
mox_print_info(void)375 static void mox_print_info(void)
376 {
377 	int ret, board_version, ram_size;
378 	u64 serial_number;
379 	const char *pub_key;
380 
381 	ret = mbox_sp_get_board_info(&serial_number, NULL, NULL, &board_version,
382 				     &ram_size);
383 	if (ret < 0)
384 		return;
385 
386 	printf("Turris Mox:\n");
387 	printf("  Board version: %i\n", board_version);
388 	printf("  RAM size: %i MiB\n", ram_size);
389 	printf("  Serial Number: %016llX\n", serial_number);
390 
391 	pub_key = mox_sp_get_ecdsa_public_key();
392 	if (pub_key)
393 		printf("  ECDSA Public Key: %s\n", pub_key);
394 	else
395 		printf("Cannot read ECDSA Public Key\n");
396 }
397 
last_stage_init(void)398 int last_stage_init(void)
399 {
400 	int ret, i;
401 	const u8 *topology;
402 	int is_sd;
403 	struct mii_dev *bus;
404 	struct gpio_desc reset_gpio = {};
405 
406 	mox_print_info();
407 
408 	ret = mox_get_topology(&topology, &module_count, &is_sd);
409 	if (ret) {
410 		printf("Cannot read module topology!\n");
411 		return 0;
412 	}
413 
414 	printf("  SD/eMMC version: %s\n", is_sd ? "SD" : "eMMC");
415 
416 	if (module_count)
417 		printf("Module Topology:\n");
418 
419 	for (i = 0; i < module_count; ++i) {
420 		switch (topology[i]) {
421 		case MOX_MODULE_SFP:
422 			printf("% 4i: SFP Module\n", i + 1);
423 			break;
424 		case MOX_MODULE_PCI:
425 			printf("% 4i: Mini-PCIe Module\n", i + 1);
426 			break;
427 		case MOX_MODULE_TOPAZ:
428 			printf("% 4i: Topaz Switch Module (4-port)\n", i + 1);
429 			break;
430 		case MOX_MODULE_PERIDOT:
431 			printf("% 4i: Peridot Switch Module (8-port)\n", i + 1);
432 			break;
433 		case MOX_MODULE_USB3:
434 			printf("% 4i: USB 3.0 Module (4 ports)\n", i + 1);
435 			break;
436 		case MOX_MODULE_PASSPCI:
437 			printf("% 4i: Passthrough Mini-PCIe Module\n", i + 1);
438 			break;
439 		default:
440 			printf("% 4i: unknown (ID %i)\n", i + 1, topology[i]);
441 		}
442 	}
443 
444 	/* now check if modules are connected in supported mode */
445 
446 	for (i = 0; i < module_count; ++i) {
447 		switch (topology[i]) {
448 		case MOX_MODULE_SFP:
449 			if (sfp) {
450 				printf("Error: Only one SFP module is supported!\n");
451 			} else if (topaz) {
452 				printf("Error: SFP module cannot be connected after Topaz Switch module!\n");
453 			} else {
454 				sfp_pos = i;
455 				++sfp;
456 			}
457 			break;
458 		case MOX_MODULE_PCI:
459 			if (pci) {
460 				printf("Error: Only one Mini-PCIe module is supported!\n");
461 			} else if (usb) {
462 				printf("Error: Mini-PCIe module cannot come after USB 3.0 module!\n");
463 			} else if (i && (i != 1 || !passpci)) {
464 				printf("Error: Mini-PCIe module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
465 			} else {
466 				++pci;
467 			}
468 			break;
469 		case MOX_MODULE_TOPAZ:
470 			if (topaz) {
471 				printf("Error: Only one Topaz module is supported!\n");
472 			} else if (peridot >= 3) {
473 				printf("Error: At most two Peridot modules can come before Topaz module!\n");
474 			} else {
475 				++topaz;
476 			}
477 			break;
478 		case MOX_MODULE_PERIDOT:
479 			if (sfp || topaz) {
480 				printf("Error: Peridot module must come before SFP or Topaz module!\n");
481 			} else if (peridot >= 3) {
482 				printf("Error: At most three Peridot modules are supported!\n");
483 			} else {
484 				peridot_pos[peridot] = i;
485 				++peridot;
486 			}
487 			break;
488 		case MOX_MODULE_USB3:
489 			if (pci) {
490 				printf("Error: USB 3.0 module cannot come after Mini-PCIe module!\n");
491 			} else if (usb) {
492 				printf("Error: Only one USB 3.0 module is supported!\n");
493 			} else if (i && (i != 1 || !passpci)) {
494 				printf("Error: USB 3.0 module should be the first connected module or come right after Passthrough Mini-PCIe module!\n");
495 			} else {
496 				++usb;
497 			}
498 			break;
499 		case MOX_MODULE_PASSPCI:
500 			if (passpci) {
501 				printf("Error: Only one Passthrough Mini-PCIe module is supported!\n");
502 			} else if (i != 0) {
503 				printf("Error: Passthrough Mini-PCIe module should be the first connected module!\n");
504 			} else {
505 				++passpci;
506 			}
507 		}
508 	}
509 
510 	/* now configure modules */
511 
512 	if (get_reset_gpio(&reset_gpio) < 0)
513 		return 0;
514 
515 	if (peridot > 0) {
516 		if (configure_peridots(&reset_gpio) < 0) {
517 			printf("Cannot configure Peridot modules!\n");
518 			peridot = 0;
519 		}
520 	} else {
521 		dm_gpio_set_value(&reset_gpio, 1);
522 		mdelay(50);
523 		dm_gpio_set_value(&reset_gpio, 0);
524 		mdelay(50);
525 	}
526 
527 	if (peridot || topaz) {
528 		/*
529 		 * now check if the addresses are set by reading Scratch & Misc
530 		 * register 0x70 of Peridot (and potentially Topaz) modules
531 		 */
532 
533 		bus = miiphy_get_dev_by_name("neta@30000");
534 		if (!bus) {
535 			printf("Cannot get MDIO bus device!\n");
536 		} else {
537 			for (i = 0; i < peridot; ++i)
538 				check_switch_address(bus, 0x10 + i);
539 
540 			if (topaz)
541 				check_switch_address(bus, 0x2);
542 
543 			sw_blink_leds(bus, peridot, topaz);
544 		}
545 	}
546 
547 	printf("\n");
548 
549 	return 0;
550 }
551