1 /*
2 * hi3521dv200.c
3 *
4 * The board init for hisilicon
5 *
6 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 *
21 */
22 #include <config.h>
23 #include <common.h>
24 #include <asm/io.h>
25 #include <asm/arch/platform.h>
26 #include <spi_flash.h>
27 #include <linux/mtd/mtd.h>
28 #include <nand.h>
29 #include <netdev.h>
30 #include <mmc.h>
31 #include <asm/sections.h>
32 #include <sdhci.h>
33 #include <hicpu_common.h>
34 #include <asm/mach-types.h>
35
36 #ifndef CONFIG_SYS_DCACHE_OFF
enable_caches(void)37 void enable_caches(void)
38 {
39 /* Enable D-cache. I-cache is already enabled in start.S */
40 dcache_enable();
41 }
42 #endif
43 static int boot_media = BOOT_MEDIA_UNKNOWN;
44
45
46 #if defined(CONFIG_SHOW_BOOT_PROGRESS)
show_boot_progress(int progress)47 void show_boot_progress(int progress)
48 {
49 printf("Boot reached stage %d\n", progress);
50 }
51 #endif
52
53 #define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
54
delay(unsigned long loops)55 static inline void delay(unsigned long loops)
56 {
57 __asm__ volatile("1:\n"
58 "subs %0, %1, #1\n"
59 "bne 1b" : "=r"(loops) : "0"(loops));
60 }
61
62 /* get uboot start media. */
get_boot_media(void)63 int get_boot_media(void)
64 {
65 return boot_media;
66 }
67
get_text_base(void)68 int get_text_base(void)
69 {
70 return CONFIG_SYS_TEXT_BASE;
71 }
72
boot_flag_init(void)73 static void boot_flag_init(void)
74 {
75 unsigned int regval, boot_mode;
76
77 /* get boot mode */
78 regval = __raw_readl(SYS_CTRL_REG_BASE + REG_SYSSTAT);
79 boot_mode = get_sys_boot_mode(regval);
80
81 switch (boot_mode) {
82 /* [3:2] 00b - boot from Spi Nor device */
83 case BOOT_FROM_SPI:
84 boot_media = BOOT_MEDIA_SPIFLASH;
85 break;
86 /* [3:2] 01b - boot from Spi Nand device */
87 case BOOT_FROM_SPI_NAND:
88 boot_media = BOOT_MEDIA_NAND;
89 break;
90 /* [3:2] 11b - boot from emmc */
91 case BOOT_FROM_EMMC:
92 boot_media = BOOT_MEDIA_EMMC;
93 break;
94 default:
95 boot_media = BOOT_MEDIA_UNKNOWN;
96 break;
97 }
98 }
99
board_early_init_f(void)100 int board_early_init_f(void)
101 {
102 return 0;
103 }
104
is_auto_update(void)105 int is_auto_update(void)
106 {
107 #if (defined CONFIG_AUTO_USB_UPDATE)
108 /* to add some judgement if neccessary */
109 return 1;/* update enable */
110
111 #else
112 return 0;
113 #endif
114 }
115
misc_init_r(void)116 int misc_init_r(void)
117 {
118 #ifdef CONFIG_RANDOM_ETHADDR
119 random_init_r();
120 #endif
121 env_set("verify", "n");
122
123 #if (CONFIG_AUTO_UPDATE == 1)
124 /* auto update flag */
125 if (is_auto_update())
126 do_auto_update();
127 #endif
128 return 0;
129 }
130
board_init(void)131 int board_init(void)
132 {
133 DECLARE_GLOBAL_DATA_PTR;
134
135 gd->bd->bi_arch_number = MACH_TYPE_HI3521DV200;
136 gd->bd->bi_boot_params = CFG_BOOT_PARAMS;
137
138 boot_flag_init();
139
140 return 0;
141 }
142
dram_init(void)143 int dram_init(void)
144 {
145 DECLARE_GLOBAL_DATA_PTR;
146
147 gd->ram_size = PHYS_SDRAM_1_SIZE;
148 return 0;
149 }
150
reset_cpu(ulong addr)151 void reset_cpu(ulong addr)
152 {
153 writel(0x12345678, REG_BASE_SCTL + REG_SC_SYSRES);
154 while (1);
155 }
156
timer_init(void)157 int timer_init(void)
158 {
159 /*
160 **Under uboot, 0xffffffff is set to load register,
161 ** timer_clk = BUSCLK/2/256.
162 ** e.g. BUSCLK = 50M, it will roll back after 0xffffffff/timer_clk
163 ** = 43980s = 12hours
164 **/
165 __raw_writel(0, CFG_TIMERBASE + REG_TIMER_CONTROL);
166 __raw_writel(~0, CFG_TIMERBASE + REG_TIMER_RELOAD);
167
168 /*32 bit, periodic*/
169 __raw_writel(CFG_TIMER_CTRL, CFG_TIMERBASE + REG_TIMER_CONTROL);
170
171 return 0;
172 }
173
board_eth_init(bd_t * bis)174 int board_eth_init(bd_t *bis)
175 {
176 int rc = 0;
177
178 #ifdef CONFIG_HISFV300_ETH
179 rc = hieth_initialize(bis);
180 #endif
181
182 return rc;
183 }
184
185 #ifdef CONFIG_GENERIC_MMC
board_mmc_init(bd_t * bis)186 int board_mmc_init(bd_t *bis)
187 {
188 int ret = 0;
189
190 #ifdef CONFIG_HISI_SDHCI
191 #ifdef CONFIG_EMMC
192 ret = hisi_sdhci_add_port(0, EMMC_BASE_REG, MMC_TYPE_MMC);
193 if (!ret) {
194 ret = hisi_mmc_init(0);
195 if (ret)
196 printf("No EMMC device found !\n");
197 }
198 #endif
199
200 #ifdef CONFIG_AUTO_SD_UPDATE
201 ret = hisi_sdhci_add_port(1, SDIO0_BASE_REG, MMC_TYPE_SD);
202 if (ret)
203 return ret;
204
205 ret = hisi_mmc_init(0);
206 if (ret)
207 printf("No SD device found !\n");
208 #endif
209 #endif
210 return ret;
211 }
212 #endif
213 #ifdef CONFIG_ARMV7_NONSEC
smp_set_core_boot_addr(unsigned long addr,int corenr)214 void smp_set_core_boot_addr(unsigned long addr, int corenr)
215 {
216 }
217
smp_kick_all_cpus(void)218 void smp_kick_all_cpus(void)
219 {
220 }
221
smp_waitloop(unsigned previous_address)222 void smp_waitloop(unsigned previous_address)
223 {
224 }
225 #endif
226
227