1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2019 Linaro Ltd. 4 * Copyright (C) 2016 NXP Semiconductors 5 */ 6 7 #include <asm/arch/clock.h> 8 #include <asm/arch/imx-regs.h> 9 #include <asm/arch/mx7-pins.h> 10 #include <asm/arch/sys_proto.h> 11 #include <asm/mach-imx/iomux-v3.h> 12 #include <asm/io.h> 13 #include <common.h> 14 #include <linux/sizes.h> 15 16 DECLARE_GLOBAL_DATA_PTR; 17 18 #define UART_PAD_CTRL (PAD_CTL_DSE_3P3V_49OHM | \ 19 PAD_CTL_PUS_PU100KOHM | PAD_CTL_HYS) 20 21 static iomux_v3_cfg_t const meerkat96_pads[] = { 22 /* UART6 as debug serial */ 23 MX7D_PAD_SD1_CD_B__UART6_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), 24 MX7D_PAD_SD1_WP__UART6_DCE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), 25 /* WDOG1 for reset */ 26 MX7D_PAD_GPIO1_IO00__WDOG1_WDOG_B | MUX_PAD_CTRL(NO_PAD_CTRL), 27 }; 28 dram_init(void)29int dram_init(void) 30 { 31 gd->ram_size = PHYS_SDRAM_SIZE; 32 33 return 0; 34 } 35 board_early_init_f(void)36int board_early_init_f(void) 37 { 38 imx_iomux_v3_setup_multiple_pads(meerkat96_pads, 39 ARRAY_SIZE(meerkat96_pads)); 40 41 return 0; 42 } 43 board_init(void)44int board_init(void) 45 { 46 /* address of boot parameters */ 47 gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; 48 49 return 0; 50 } 51 checkboard(void)52int checkboard(void) 53 { 54 char *mode; 55 56 if (IS_ENABLED(CONFIG_ARMV7_BOOT_SEC_DEFAULT)) 57 mode = "secure"; 58 else 59 mode = "non-secure"; 60 61 printf("Board: i.MX7D Meerkat96 in %s mode\n", mode); 62 63 return 0; 64 } 65 board_late_init(void)66int board_late_init(void) 67 { 68 set_wdog_reset((struct wdog_regs *)WDOG1_BASE_ADDR); 69 70 return 0; 71 } 72