1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * NXP PPC SATA platform driver
4 *
5 * (C) Copyright 2019 NXP, Inc.
6 *
7 */
8 #include <common.h>
9 #include <cpu_func.h>
10 #include <asm/fsl_serdes.h>
11 #include <dm/lists.h>
12 #include <dm.h>
13 #include <ahci.h>
14 #include <scsi.h>
15 #include <libata.h>
16 #include <sata.h>
17 #include <malloc.h>
18 #include <memalign.h>
19 #include <fis.h>
20
21 #include "fsl_sata.h"
22
23 struct fsl_ahci_priv {
24 u32 base;
25 u32 flag;
26 u32 number;
27 fsl_sata_t *fsl_sata;
28 };
29
fsl_ahci_bind(struct udevice * dev)30 static int fsl_ahci_bind(struct udevice *dev)
31 {
32 return device_bind_driver(dev, "fsl_ahci_scsi", "fsl_ahci_scsi", NULL);
33 }
34
fsl_ahci_ofdata_to_platdata(struct udevice * dev)35 static int fsl_ahci_ofdata_to_platdata(struct udevice *dev)
36 {
37 struct fsl_ahci_priv *priv = dev_get_priv(dev);
38
39 priv->number = dev_read_u32_default(dev, "sata-number", -1);
40 priv->flag = dev_read_u32_default(dev, "sata-fpdma", -1);
41
42 priv->base = dev_read_addr(dev);
43 if (priv->base == FDT_ADDR_T_NONE)
44 return -EINVAL;
45
46 return 0;
47 }
48
ata_wait_register(unsigned __iomem * addr,u32 mask,u32 val,u32 timeout_msec)49 static int ata_wait_register(unsigned __iomem *addr, u32 mask,
50 u32 val, u32 timeout_msec)
51 {
52 int i;
53
54 for (i = 0; ((in_le32(addr) & mask) != val) && i < timeout_msec; i++)
55 mdelay(1);
56
57 return (i < timeout_msec) ? 0 : -1;
58 }
59
fsl_sata_dump_sfis(struct sata_fis_d2h * s)60 static void fsl_sata_dump_sfis(struct sata_fis_d2h *s)
61 {
62 printf("Status FIS dump:\n\r");
63 printf("fis_type: %02x\n\r", s->fis_type);
64 printf("pm_port_i: %02x\n\r", s->pm_port_i);
65 printf("status: %02x\n\r", s->status);
66 printf("error: %02x\n\r", s->error);
67 printf("lba_low: %02x\n\r", s->lba_low);
68 printf("lba_mid: %02x\n\r", s->lba_mid);
69 printf("lba_high: %02x\n\r", s->lba_high);
70 printf("device: %02x\n\r", s->device);
71 printf("lba_low_exp: %02x\n\r", s->lba_low_exp);
72 printf("lba_mid_exp: %02x\n\r", s->lba_mid_exp);
73 printf("lba_high_exp: %02x\n\r", s->lba_high_exp);
74 printf("res1: %02x\n\r", s->res1);
75 printf("sector_count: %02x\n\r", s->sector_count);
76 printf("sector_count_exp: %02x\n\r", s->sector_count_exp);
77 }
78
fsl_sata_dump_regs(fsl_sata_reg_t __iomem * reg)79 static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem *reg)
80 {
81 printf("\n\rSATA: %08x\n\r", (u32)reg);
82 printf("CQR: %08x\n\r", in_le32(®->cqr));
83 printf("CAR: %08x\n\r", in_le32(®->car));
84 printf("CCR: %08x\n\r", in_le32(®->ccr));
85 printf("CER: %08x\n\r", in_le32(®->cer));
86 printf("CQR: %08x\n\r", in_le32(®->cqr));
87 printf("DER: %08x\n\r", in_le32(®->der));
88 printf("CHBA: %08x\n\r", in_le32(®->chba));
89 printf("HStatus: %08x\n\r", in_le32(®->hstatus));
90 printf("HControl: %08x\n\r", in_le32(®->hcontrol));
91 printf("CQPMP: %08x\n\r", in_le32(®->cqpmp));
92 printf("SIG: %08x\n\r", in_le32(®->sig));
93 printf("ICC: %08x\n\r", in_le32(®->icc));
94 printf("SStatus: %08x\n\r", in_le32(®->sstatus));
95 printf("SError: %08x\n\r", in_le32(®->serror));
96 printf("SControl: %08x\n\r", in_le32(®->scontrol));
97 printf("SNotification: %08x\n\r", in_le32(®->snotification));
98 printf("TransCfg: %08x\n\r", in_le32(®->transcfg));
99 printf("TransStatus: %08x\n\r", in_le32(®->transstatus));
100 printf("LinkCfg: %08x\n\r", in_le32(®->linkcfg));
101 printf("LinkCfg1: %08x\n\r", in_le32(®->linkcfg1));
102 printf("LinkCfg2: %08x\n\r", in_le32(®->linkcfg2));
103 printf("LinkStatus: %08x\n\r", in_le32(®->linkstatus));
104 printf("LinkStatus1: %08x\n\r", in_le32(®->linkstatus1));
105 printf("PhyCtrlCfg: %08x\n\r", in_le32(®->phyctrlcfg));
106 printf("SYSPR: %08x\n\r", in_be32(®->syspr));
107 }
108
init_sata(struct fsl_ahci_priv * priv)109 static int init_sata(struct fsl_ahci_priv *priv)
110 {
111 int i;
112 u32 cda;
113 u32 val32;
114 u32 sig;
115 fsl_sata_t *sata;
116 u32 length, align;
117 cmd_hdr_tbl_t *cmd_hdr;
118 fsl_sata_reg_t __iomem *reg;
119
120 int dev = priv->number;
121
122 if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
123 printf("the sata index %d is out of ranges\n\r", dev);
124 return -EINVAL;
125 }
126
127 #ifdef CONFIG_MPC85xx
128 if (dev == 0 && (!is_serdes_configured(SATA1))) {
129 printf("SATA%d [dev = %d] is not enabled\n", dev + 1, dev);
130 return -EINVAL;
131 }
132 if (dev == 1 && (!is_serdes_configured(SATA2))) {
133 printf("SATA%d [dev = %d] is not enabled\n", dev + 1, dev);
134 return -EINVAL;
135 }
136 #endif
137
138 /* Allocate SATA device driver struct */
139 sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t));
140 if (!sata) {
141 printf("alloc the sata device struct failed\n\r");
142 return -ENOMEM;
143 }
144 /* Zero all of the device driver struct */
145 memset((void *)sata, 0, sizeof(fsl_sata_t));
146
147 sata->dma_flag = priv->flag;
148 snprintf(sata->name, 12, "SATA%d", dev);
149
150 /* Set the controller register base address to device struct */
151 reg = (fsl_sata_reg_t *)priv->base;
152 sata->reg_base = reg;
153
154 /* Allocate the command header table, 4 bytes aligned */
155 length = sizeof(struct cmd_hdr_tbl);
156 align = SATA_HC_CMD_HDR_TBL_ALIGN;
157 sata->cmd_hdr_tbl_offset = (void *)malloc(length + align);
158 if (!sata->cmd_hdr_tbl_offset) {
159 printf("alloc the command header failed\n\r");
160 return -ENOMEM;
161 }
162
163 cmd_hdr = (cmd_hdr_tbl_t *)(((u32)sata->cmd_hdr_tbl_offset + align)
164 & ~(align - 1));
165 sata->cmd_hdr = cmd_hdr;
166
167 /* Zero all of the command header table */
168 memset((void *)sata->cmd_hdr_tbl_offset, 0, length + align);
169
170 /* Allocate command descriptor for all command */
171 length = sizeof(struct cmd_desc) * SATA_HC_MAX_CMD;
172 align = SATA_HC_CMD_DESC_ALIGN;
173 sata->cmd_desc_offset = (void *)malloc(length + align);
174 if (!sata->cmd_desc_offset) {
175 printf("alloc the command descriptor failed\n\r");
176 return -ENOMEM;
177 }
178 sata->cmd_desc = (cmd_desc_t *)(((u32)sata->cmd_desc_offset + align)
179 & ~(align - 1));
180 /* Zero all of command descriptor */
181 memset((void *)sata->cmd_desc_offset, 0, length + align);
182
183 /* Link the command descriptor to command header */
184 for (i = 0; i < SATA_HC_MAX_CMD; i++) {
185 cda = ((u32)sata->cmd_desc + SATA_HC_CMD_DESC_SIZE * i)
186 & ~(CMD_HDR_CDA_ALIGN - 1);
187 cmd_hdr->cmd_slot[i].cda = cpu_to_le32(cda);
188 }
189
190 /* To have safe state, force the controller offline */
191 val32 = in_le32(®->hcontrol);
192 val32 &= ~HCONTROL_ONOFF;
193 val32 |= HCONTROL_FORCE_OFFLINE;
194 out_le32(®->hcontrol, val32);
195
196 /* Wait the controller offline */
197 ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000);
198
199 /* Set the command header base address to CHBA register to tell DMA */
200 out_le32(®->chba, (u32)cmd_hdr & ~0x3);
201
202 /* Snoop for the command header */
203 val32 = in_le32(®->hcontrol);
204 val32 |= HCONTROL_HDR_SNOOP;
205 out_le32(®->hcontrol, val32);
206
207 /* Disable all of interrupts */
208 val32 = in_le32(®->hcontrol);
209 val32 &= ~HCONTROL_INT_EN_ALL;
210 out_le32(®->hcontrol, val32);
211
212 /* Clear all of interrupts */
213 val32 = in_le32(®->hstatus);
214 out_le32(®->hstatus, val32);
215
216 /* Set the ICC, no interrupt coalescing */
217 out_le32(®->icc, 0x01000000);
218
219 /* No PM attatched, the SATA device direct connect */
220 out_le32(®->cqpmp, 0);
221
222 /* Clear SError register */
223 val32 = in_le32(®->serror);
224 out_le32(®->serror, val32);
225
226 /* Clear CER register */
227 val32 = in_le32(®->cer);
228 out_le32(®->cer, val32);
229
230 /* Clear DER register */
231 val32 = in_le32(®->der);
232 out_le32(®->der, val32);
233
234 /* No device detection or initialization action requested */
235 out_le32(®->scontrol, 0x00000300);
236
237 /* Configure the transport layer, default value */
238 out_le32(®->transcfg, 0x08000016);
239
240 /* Configure the link layer, default value */
241 out_le32(®->linkcfg, 0x0000ff34);
242
243 /* Bring the controller online */
244 val32 = in_le32(®->hcontrol);
245 val32 |= HCONTROL_ONOFF;
246 out_le32(®->hcontrol, val32);
247
248 mdelay(100);
249
250 /* print sata device name */
251 printf("%s ", sata->name);
252
253 /* Wait PHY RDY signal changed for 500ms */
254 ata_wait_register(®->hstatus, HSTATUS_PHY_RDY,
255 HSTATUS_PHY_RDY, 500);
256
257 /* Check PHYRDY */
258 val32 = in_le32(®->hstatus);
259 if (val32 & HSTATUS_PHY_RDY) {
260 sata->link = 1;
261 } else {
262 sata->link = 0;
263 printf("(No RDY)\n\r");
264 return -EINVAL;
265 }
266
267 /* Wait for signature updated, which is 1st D2H */
268 ata_wait_register(®->hstatus, HSTATUS_SIGNATURE,
269 HSTATUS_SIGNATURE, 10000);
270
271 if (val32 & HSTATUS_SIGNATURE) {
272 sig = in_le32(®->sig);
273 debug("Signature updated, the sig =%08x\n\r", sig);
274 sata->ata_device_type = ata_dev_classify(sig);
275 }
276
277 /* Check the speed */
278 val32 = in_le32(®->sstatus);
279 if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN1)
280 printf("(1.5 Gbps)\n\r");
281 else if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN2)
282 printf("(3 Gbps)\n\r");
283
284 priv->fsl_sata = sata;
285
286 return 0;
287 }
288
fsl_ata_exec_ata_cmd(struct fsl_sata * sata,struct sata_fis_h2d * cfis,int is_ncq,int tag,u8 * buffer,u32 len)289 static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata,
290 struct sata_fis_h2d *cfis,
291 int is_ncq, int tag,
292 u8 *buffer, u32 len)
293 {
294 cmd_hdr_entry_t *cmd_hdr;
295 cmd_desc_t *cmd_desc;
296 sata_fis_h2d_t *h2d;
297 prd_entry_t *prde;
298 u32 ext_c_ddc;
299 u32 prde_count;
300 u32 val32;
301 u32 ttl;
302 u32 der;
303 int i;
304
305 fsl_sata_reg_t *reg = sata->reg_base;
306
307 /* Check xfer length */
308 if (len > SATA_HC_MAX_XFER_LEN) {
309 printf("max transfer length is 64MB\n\r");
310 return 0;
311 }
312
313 /* Setup the command descriptor */
314 cmd_desc = sata->cmd_desc + tag;
315
316 /* Get the pointer cfis of command descriptor */
317 h2d = (sata_fis_h2d_t *)cmd_desc->cfis;
318
319 /* Zero the cfis of command descriptor */
320 memset((void *)h2d, 0, SATA_HC_CMD_DESC_CFIS_SIZE);
321
322 /* Copy the cfis from user to command descriptor */
323 h2d->fis_type = cfis->fis_type;
324 h2d->pm_port_c = cfis->pm_port_c;
325 h2d->command = cfis->command;
326
327 h2d->features = cfis->features;
328 h2d->features_exp = cfis->features_exp;
329
330 h2d->lba_low = cfis->lba_low;
331 h2d->lba_mid = cfis->lba_mid;
332 h2d->lba_high = cfis->lba_high;
333 h2d->lba_low_exp = cfis->lba_low_exp;
334 h2d->lba_mid_exp = cfis->lba_mid_exp;
335 h2d->lba_high_exp = cfis->lba_high_exp;
336
337 if (!is_ncq) {
338 h2d->sector_count = cfis->sector_count;
339 h2d->sector_count_exp = cfis->sector_count_exp;
340 } else { /* NCQ */
341 h2d->sector_count = (u8)(tag << 3);
342 }
343
344 h2d->device = cfis->device;
345 h2d->control = cfis->control;
346
347 /* Setup the PRD table */
348 prde = (prd_entry_t *)cmd_desc->prdt;
349 memset((void *)prde, 0, sizeof(struct prdt));
350
351 prde_count = 0;
352 ttl = len;
353 for (i = 0; i < SATA_HC_MAX_PRD_DIRECT; i++) {
354 if (!len)
355 break;
356 prde->dba = cpu_to_le32((u32)buffer & ~0x3);
357 debug("dba = %08x\n\r", (u32)buffer);
358
359 if (len < PRD_ENTRY_MAX_XFER_SZ) {
360 ext_c_ddc = PRD_ENTRY_DATA_SNOOP | len;
361 debug("ext_c_ddc1 = %08x, len = %08x\n\r",
362 ext_c_ddc, len);
363 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
364 prde_count++;
365 prde++;
366 } else {
367 ext_c_ddc = PRD_ENTRY_DATA_SNOOP; /* 4M bytes */
368 debug("ext_c_ddc2 = %08x, len = %08x\n\r",
369 ext_c_ddc, len);
370 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
371 buffer += PRD_ENTRY_MAX_XFER_SZ;
372 len -= PRD_ENTRY_MAX_XFER_SZ;
373 prde_count++;
374 prde++;
375 }
376 }
377
378 /* Setup the command slot of cmd hdr */
379 cmd_hdr = (cmd_hdr_entry_t *)&sata->cmd_hdr->cmd_slot[tag];
380
381 cmd_hdr->cda = cpu_to_le32((u32)cmd_desc & ~0x3);
382
383 val32 = prde_count << CMD_HDR_PRD_ENTRY_SHIFT;
384 val32 |= sizeof(sata_fis_h2d_t);
385 cmd_hdr->prde_fis_len = cpu_to_le32(val32);
386
387 cmd_hdr->ttl = cpu_to_le32(ttl);
388
389 if (!is_ncq)
390 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP;
391 else
392 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP |
393 CMD_HDR_ATTR_FPDMA;
394
395 tag &= CMD_HDR_ATTR_TAG;
396 val32 |= tag;
397
398 debug("attribute = %08x\n\r", val32);
399 cmd_hdr->attribute = cpu_to_le32(val32);
400
401 /* Make sure cmd desc and cmd slot valid before command issue */
402 sync();
403
404 /* PMP*/
405 val32 = (u32)(h2d->pm_port_c & 0x0f);
406 out_le32(®->cqpmp, val32);
407
408 /* Wait no active */
409 if (ata_wait_register(®->car, (1 << tag), 0, 10000))
410 printf("Wait no active time out\n\r");
411
412 /* Issue command */
413 if (!(in_le32(®->cqr) & (1 << tag))) {
414 val32 = 1 << tag;
415 out_le32(®->cqr, val32);
416 }
417
418 /* Wait command completed for 10s */
419 if (ata_wait_register(®->ccr, (1 << tag), (1 << tag), 10000)) {
420 if (!is_ncq)
421 printf("Non-NCQ command time out\n\r");
422 else
423 printf("NCQ command time out\n\r");
424 }
425
426 val32 = in_le32(®->cer);
427
428 if (val32) {
429 fsl_sata_dump_sfis((struct sata_fis_d2h *)cmd_desc->sfis);
430 printf("CE at device\n\r");
431 fsl_sata_dump_regs(reg);
432 der = in_le32(®->der);
433 out_le32(®->cer, val32);
434 out_le32(®->der, der);
435 }
436
437 /* Clear complete flags */
438 val32 = in_le32(®->ccr);
439 out_le32(®->ccr, val32);
440
441 return len;
442 }
443
fsl_sata_exec_cmd(struct fsl_sata * sata,struct sata_fis_h2d * cfis,enum cmd_type command_type,int tag,u8 * buffer,u32 len)444 static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,
445 enum cmd_type command_type, int tag, u8 *buffer,
446 u32 len)
447 {
448 int rc;
449
450 if (tag > SATA_HC_MAX_CMD || tag < 0) {
451 printf("tag is out of range, tag=%d\n\r", tag);
452 return -1;
453 }
454
455 switch (command_type) {
456 case CMD_ATA:
457 rc = fsl_ata_exec_ata_cmd(sata, cfis, 0, tag, buffer, len);
458 return rc;
459 case CMD_NCQ:
460 rc = fsl_ata_exec_ata_cmd(sata, cfis, 1, tag, buffer, len);
461 return rc;
462 case CMD_ATAPI:
463 case CMD_VENDOR_BIST:
464 case CMD_BIST:
465 printf("not support now\n\r");
466 return -1;
467 default:
468 break;
469 }
470
471 return -1;
472 }
473
fsl_sata_identify(fsl_sata_t * sata,u16 * id)474 static void fsl_sata_identify(fsl_sata_t *sata, u16 *id)
475 {
476 struct sata_fis_h2d h2d, *cfis = &h2d;
477
478 memset(cfis, 0, sizeof(struct sata_fis_h2d));
479
480 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
481 cfis->pm_port_c = 0x80; /* is command */
482 cfis->command = ATA_CMD_ID_ATA;
483
484 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, (u8 *)id, ATA_ID_WORDS * 2);
485 ata_swap_buf_le16(id, ATA_ID_WORDS);
486 }
487
fsl_sata_xfer_mode(fsl_sata_t * sata,u16 * id)488 static void fsl_sata_xfer_mode(fsl_sata_t *sata, u16 *id)
489 {
490 sata->pio = id[ATA_ID_PIO_MODES];
491 sata->mwdma = id[ATA_ID_MWDMA_MODES];
492 sata->udma = id[ATA_ID_UDMA_MODES];
493 debug("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio,
494 sata->mwdma, sata->udma);
495 }
496
fsl_sata_init_wcache(fsl_sata_t * sata,u16 * id)497 static void fsl_sata_init_wcache(fsl_sata_t *sata, u16 *id)
498 {
499 if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
500 sata->wcache = 1;
501 if (ata_id_has_flush(id))
502 sata->flush = 1;
503 if (ata_id_has_flush_ext(id))
504 sata->flush_ext = 1;
505 }
506
fsl_sata_set_features(fsl_sata_t * sata)507 static void fsl_sata_set_features(fsl_sata_t *sata)
508 {
509 struct sata_fis_h2d h2d, *cfis = &h2d;
510 u8 udma_cap;
511
512 memset(cfis, 0, sizeof(struct sata_fis_h2d));
513
514 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
515 cfis->pm_port_c = 0x80; /* is command */
516 cfis->command = ATA_CMD_SET_FEATURES;
517 cfis->features = SETFEATURES_XFER;
518
519 /* First check the device capablity */
520 udma_cap = (u8)(sata->udma & 0xff);
521 debug("udma_cap %02x\n\r", udma_cap);
522
523 if (udma_cap == ATA_UDMA6)
524 cfis->sector_count = XFER_UDMA_6;
525 if (udma_cap == ATA_UDMA5)
526 cfis->sector_count = XFER_UDMA_5;
527 if (udma_cap == ATA_UDMA4)
528 cfis->sector_count = XFER_UDMA_4;
529 if (udma_cap == ATA_UDMA3)
530 cfis->sector_count = XFER_UDMA_3;
531
532 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
533 }
534
fsl_sata_rw_cmd(fsl_sata_t * sata,u32 start,u32 blkcnt,u8 * buffer,int is_write)535 static u32 fsl_sata_rw_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt,
536 u8 *buffer, int is_write)
537 {
538 struct sata_fis_h2d h2d, *cfis = &h2d;
539 u32 block;
540
541 block = start;
542
543 memset(cfis, 0, sizeof(struct sata_fis_h2d));
544
545 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
546 cfis->pm_port_c = 0x80; /* is command */
547 cfis->command = (is_write) ? ATA_CMD_WRITE : ATA_CMD_READ;
548 cfis->device = ATA_LBA;
549
550 cfis->device |= (block >> 24) & 0xf;
551 cfis->lba_high = (block >> 16) & 0xff;
552 cfis->lba_mid = (block >> 8) & 0xff;
553 cfis->lba_low = block & 0xff;
554 cfis->sector_count = (u8)(blkcnt & 0xff);
555
556 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer,
557 ATA_SECT_SIZE * blkcnt);
558 return blkcnt;
559 }
560
fsl_sata_flush_cache(fsl_sata_t * sata)561 static void fsl_sata_flush_cache(fsl_sata_t *sata)
562 {
563 struct sata_fis_h2d h2d, *cfis = &h2d;
564
565 memset(cfis, 0, sizeof(struct sata_fis_h2d));
566
567 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
568 cfis->pm_port_c = 0x80; /* is command */
569 cfis->command = ATA_CMD_FLUSH;
570
571 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
572 }
573
fsl_sata_rw_cmd_ext(fsl_sata_t * sata,u32 start,u32 blkcnt,u8 * buffer,int is_write)574 static u32 fsl_sata_rw_cmd_ext(fsl_sata_t *sata, u32 start,
575 u32 blkcnt, u8 *buffer, int is_write)
576 {
577 struct sata_fis_h2d h2d, *cfis = &h2d;
578 u64 block;
579
580 block = (u64)start;
581
582 memset(cfis, 0, sizeof(struct sata_fis_h2d));
583
584 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
585 cfis->pm_port_c = 0x80; /* is command */
586
587 cfis->command = (is_write) ? ATA_CMD_WRITE_EXT
588 : ATA_CMD_READ_EXT;
589
590 cfis->lba_high_exp = (block >> 40) & 0xff;
591 cfis->lba_mid_exp = (block >> 32) & 0xff;
592 cfis->lba_low_exp = (block >> 24) & 0xff;
593 cfis->lba_high = (block >> 16) & 0xff;
594 cfis->lba_mid = (block >> 8) & 0xff;
595 cfis->lba_low = block & 0xff;
596 cfis->device = ATA_LBA;
597 cfis->sector_count_exp = (blkcnt >> 8) & 0xff;
598 cfis->sector_count = blkcnt & 0xff;
599
600 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer,
601 ATA_SECT_SIZE * blkcnt);
602 return blkcnt;
603 }
604
fsl_sata_rw_ncq_cmd(fsl_sata_t * sata,u32 start,u32 blkcnt,u8 * buffer,int is_write)605 static u32 fsl_sata_rw_ncq_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt,
606 u8 *buffer,
607 int is_write)
608 {
609 struct sata_fis_h2d h2d, *cfis = &h2d;
610 int ncq_channel;
611 u64 block;
612
613 if (sata->lba48 != 1) {
614 printf("execute FPDMA command on non-LBA48 hard disk\n\r");
615 return -1;
616 }
617
618 block = (u64)start;
619
620 memset(cfis, 0, sizeof(struct sata_fis_h2d));
621
622 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
623 cfis->pm_port_c = 0x80; /* is command */
624
625 cfis->command = (is_write) ? ATA_CMD_FPDMA_WRITE
626 : ATA_CMD_FPDMA_READ;
627
628 cfis->lba_high_exp = (block >> 40) & 0xff;
629 cfis->lba_mid_exp = (block >> 32) & 0xff;
630 cfis->lba_low_exp = (block >> 24) & 0xff;
631 cfis->lba_high = (block >> 16) & 0xff;
632 cfis->lba_mid = (block >> 8) & 0xff;
633 cfis->lba_low = block & 0xff;
634
635 cfis->device = ATA_LBA;
636 cfis->features_exp = (blkcnt >> 8) & 0xff;
637 cfis->features = blkcnt & 0xff;
638
639 if (sata->queue_depth >= SATA_HC_MAX_CMD)
640 ncq_channel = SATA_HC_MAX_CMD - 1;
641 else
642 ncq_channel = sata->queue_depth - 1;
643
644 /* Use the latest queue */
645 fsl_sata_exec_cmd(sata, cfis, CMD_NCQ, ncq_channel, buffer,
646 ATA_SECT_SIZE * blkcnt);
647 return blkcnt;
648 }
649
fsl_sata_flush_cache_ext(fsl_sata_t * sata)650 static void fsl_sata_flush_cache_ext(fsl_sata_t *sata)
651 {
652 struct sata_fis_h2d h2d, *cfis = &h2d;
653
654 memset(cfis, 0, sizeof(struct sata_fis_h2d));
655
656 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
657 cfis->pm_port_c = 0x80; /* is command */
658 cfis->command = ATA_CMD_FLUSH_EXT;
659
660 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
661 }
662
ata_low_level_rw_lba48(fsl_sata_t * sata,u32 blknr,lbaint_t blkcnt,const void * buffer,int is_write)663 static u32 ata_low_level_rw_lba48(fsl_sata_t *sata, u32 blknr, lbaint_t blkcnt,
664 const void *buffer, int is_write)
665 {
666 u32 start, blks;
667 u8 *addr;
668 int max_blks;
669
670 start = blknr;
671 blks = blkcnt;
672 addr = (u8 *)buffer;
673
674 max_blks = ATA_MAX_SECTORS_LBA48;
675 do {
676 if (blks > max_blks) {
677 if (sata->dma_flag != FLAGS_FPDMA)
678 fsl_sata_rw_cmd_ext(sata, start, max_blks,
679 addr, is_write);
680 else
681 fsl_sata_rw_ncq_cmd(sata, start, max_blks,
682 addr, is_write);
683 start += max_blks;
684 blks -= max_blks;
685 addr += ATA_SECT_SIZE * max_blks;
686 } else {
687 if (sata->dma_flag != FLAGS_FPDMA)
688 fsl_sata_rw_cmd_ext(sata, start, blks,
689 addr, is_write);
690 else
691 fsl_sata_rw_ncq_cmd(sata, start, blks,
692 addr, is_write);
693 start += blks;
694 blks = 0;
695 addr += ATA_SECT_SIZE * blks;
696 }
697 } while (blks != 0);
698
699 return blks;
700 }
701
ata_low_level_rw_lba28(fsl_sata_t * sata,u32 blknr,u32 blkcnt,const void * buffer,int is_write)702 static u32 ata_low_level_rw_lba28(fsl_sata_t *sata, u32 blknr, u32 blkcnt,
703 const void *buffer, int is_write)
704 {
705 u32 start, blks;
706 u8 *addr;
707 int max_blks;
708
709 start = blknr;
710 blks = blkcnt;
711 addr = (u8 *)buffer;
712
713 max_blks = ATA_MAX_SECTORS;
714 do {
715 if (blks > max_blks) {
716 fsl_sata_rw_cmd(sata, start, max_blks, addr, is_write);
717 start += max_blks;
718 blks -= max_blks;
719 addr += ATA_SECT_SIZE * max_blks;
720 } else {
721 fsl_sata_rw_cmd(sata, start, blks, addr, is_write);
722 start += blks;
723 blks = 0;
724 addr += ATA_SECT_SIZE * blks;
725 }
726 } while (blks != 0);
727
728 return blks;
729 }
730
731 /*
732 * SATA interface between low level driver and command layer
733 */
sata_read(fsl_sata_t * sata,ulong blknr,lbaint_t blkcnt,void * buffer)734 static int sata_read(fsl_sata_t *sata, ulong blknr, lbaint_t blkcnt,
735 void *buffer)
736 {
737 u32 rc;
738
739 if (sata->lba48)
740 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer,
741 READ_CMD);
742 else
743 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer,
744 READ_CMD);
745 return rc;
746 }
747
sata_write(fsl_sata_t * sata,ulong blknr,lbaint_t blkcnt,const void * buffer)748 static int sata_write(fsl_sata_t *sata, ulong blknr, lbaint_t blkcnt,
749 const void *buffer)
750 {
751 u32 rc;
752
753 if (sata->lba48) {
754 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer,
755 WRITE_CMD);
756 if (sata->wcache && sata->flush_ext)
757 fsl_sata_flush_cache_ext(sata);
758 } else {
759 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer,
760 WRITE_CMD);
761 if (sata->wcache && sata->flush)
762 fsl_sata_flush_cache(sata);
763 }
764
765 return rc;
766 }
767
sata_getinfo(fsl_sata_t * sata,u16 * id)768 int sata_getinfo(fsl_sata_t *sata, u16 *id)
769 {
770 /* if no detected link */
771 if (!sata->link)
772 return -EINVAL;
773
774 #ifdef CONFIG_LBA48
775 /* Check if support LBA48 */
776 if (ata_id_has_lba48(id)) {
777 sata->lba48 = 1;
778 debug("Device support LBA48\n\r");
779 } else {
780 debug("Device supports LBA28\n\r");
781 }
782 #endif
783
784 /* Get the NCQ queue depth from device */
785 sata->queue_depth = ata_id_queue_depth(id);
786
787 /* Get the xfer mode from device */
788 fsl_sata_xfer_mode(sata, id);
789
790 /* Get the write cache status from device */
791 fsl_sata_init_wcache(sata, id);
792
793 /* Set the xfer mode to highest speed */
794 fsl_sata_set_features(sata);
795
796 return 0;
797 }
798
fsl_scsi_exec(fsl_sata_t * sata,struct scsi_cmd * pccb,bool is_write)799 static int fsl_scsi_exec(fsl_sata_t *sata, struct scsi_cmd *pccb,
800 bool is_write)
801 {
802 int ret;
803 u32 temp;
804 u16 blocks = 0;
805 lbaint_t start = 0;
806 u8 *buffer = pccb->pdata;
807
808 /* Retrieve the base LBA number from the ccb structure. */
809 if (pccb->cmd[0] == SCSI_READ16) {
810 memcpy(&start, pccb->cmd + 2, 8);
811 start = be64_to_cpu(start);
812 } else {
813 memcpy(&temp, pccb->cmd + 2, 4);
814 start = be32_to_cpu(temp);
815 }
816
817 if (pccb->cmd[0] == SCSI_READ16)
818 blocks = (((u16)pccb->cmd[13]) << 8) | ((u16)pccb->cmd[14]);
819 else
820 blocks = (((u16)pccb->cmd[7]) << 8) | ((u16)pccb->cmd[8]);
821
822 debug("scsi_ahci: %s %u blocks starting from lba 0x" LBAFU "\n",
823 is_write ? "write" : "read", blocks, start);
824
825 if (is_write)
826 ret = sata_write(sata, start, blocks, buffer);
827 else
828 ret = sata_read(sata, start, blocks, buffer);
829
830 return ret;
831 }
832
fsl_ata_id_strcpy(u16 * target,u16 * src,int len)833 static char *fsl_ata_id_strcpy(u16 *target, u16 *src, int len)
834 {
835 int i;
836
837 for (i = 0; i < len / 2; i++)
838 target[i] = src[i];
839
840 return (char *)target;
841 }
842
fsl_ata_scsiop_inquiry(struct ahci_uc_priv * uc_priv,struct scsi_cmd * pccb,fsl_sata_t * sata)843 static int fsl_ata_scsiop_inquiry(struct ahci_uc_priv *uc_priv,
844 struct scsi_cmd *pccb,
845 fsl_sata_t *sata)
846 {
847 u8 port;
848 u16 *idbuf;
849
850 ALLOC_CACHE_ALIGN_BUFFER(u16, tmpid, ATA_ID_WORDS);
851
852 /* Clean ccb data buffer */
853 memset(pccb->pdata, 0, pccb->datalen);
854
855 if (pccb->datalen <= 35)
856 return 0;
857
858 /* Read id from sata */
859 port = pccb->target;
860
861 fsl_sata_identify(sata, (u16 *)tmpid);
862
863 if (!uc_priv->ataid[port]) {
864 uc_priv->ataid[port] = malloc(ATA_ID_WORDS * 2);
865 if (!uc_priv->ataid[port]) {
866 printf("%s: No memory for ataid[port]\n", __func__);
867 return -ENOMEM;
868 }
869 }
870
871 idbuf = uc_priv->ataid[port];
872
873 memcpy(idbuf, tmpid, ATA_ID_WORDS * 2);
874
875 memcpy(&pccb->pdata[8], "ATA ", 8);
876 fsl_ata_id_strcpy((u16 *)&pccb->pdata[16], &idbuf[ATA_ID_PROD], 16);
877 fsl_ata_id_strcpy((u16 *)&pccb->pdata[32], &idbuf[ATA_ID_FW_REV], 4);
878
879 sata_getinfo(sata, (u16 *)idbuf);
880 #ifdef DEBUG
881 ata_dump_id(idbuf);
882 #endif
883 return 0;
884 }
885
886 /*
887 * SCSI READ CAPACITY10 command operation.
888 */
fsl_ata_scsiop_read_capacity10(struct ahci_uc_priv * uc_priv,struct scsi_cmd * pccb)889 static int fsl_ata_scsiop_read_capacity10(struct ahci_uc_priv *uc_priv,
890 struct scsi_cmd *pccb)
891 {
892 u32 cap;
893 u64 cap64;
894 u32 block_size;
895
896 if (!uc_priv->ataid[pccb->target]) {
897 printf("scsi_ahci: SCSI READ CAPACITY10 command failure.");
898 printf("\tNo ATA info!\n");
899 printf("\tPlease run SCSI command INQUIRY first!\n");
900 return -EPERM;
901 }
902
903 cap64 = ata_id_n_sectors(uc_priv->ataid[pccb->target]);
904 if (cap64 > 0x100000000ULL)
905 cap64 = 0xffffffff;
906
907 cap = cpu_to_be32(cap64);
908 memcpy(pccb->pdata, &cap, sizeof(cap));
909
910 block_size = cpu_to_be32((u32)512);
911 memcpy(&pccb->pdata[4], &block_size, 4);
912
913 return 0;
914 }
915
916 /*
917 * SCSI READ CAPACITY16 command operation.
918 */
fsl_ata_scsiop_read_capacity16(struct ahci_uc_priv * uc_priv,struct scsi_cmd * pccb)919 static int fsl_ata_scsiop_read_capacity16(struct ahci_uc_priv *uc_priv,
920 struct scsi_cmd *pccb)
921 {
922 u64 cap;
923 u64 block_size;
924
925 if (!uc_priv->ataid[pccb->target]) {
926 printf("scsi_ahci: SCSI READ CAPACITY16 command failure.");
927 printf("\tNo ATA info!\n");
928 printf("\tPlease run SCSI command INQUIRY first!\n");
929 return -EPERM;
930 }
931
932 cap = ata_id_n_sectors(uc_priv->ataid[pccb->target]);
933 cap = cpu_to_be64(cap);
934 memcpy(pccb->pdata, &cap, sizeof(cap));
935
936 block_size = cpu_to_be64((u64)512);
937 memcpy(&pccb->pdata[8], &block_size, 8);
938
939 return 0;
940 }
941
942 /*
943 * SCSI TEST UNIT READY command operation.
944 */
fsl_ata_scsiop_test_unit_ready(struct ahci_uc_priv * uc_priv,struct scsi_cmd * pccb)945 static int fsl_ata_scsiop_test_unit_ready(struct ahci_uc_priv *uc_priv,
946 struct scsi_cmd *pccb)
947 {
948 return (uc_priv->ataid[pccb->target]) ? 0 : -EPERM;
949 }
950
fsl_ahci_scsi_exec(struct udevice * dev,struct scsi_cmd * pccb)951 static int fsl_ahci_scsi_exec(struct udevice *dev, struct scsi_cmd *pccb)
952 {
953 struct ahci_uc_priv *uc_priv = dev_get_uclass_priv(dev->parent);
954 struct fsl_ahci_priv *priv = dev_get_priv(dev->parent);
955 fsl_sata_t *sata = priv->fsl_sata;
956 int ret;
957
958 switch (pccb->cmd[0]) {
959 case SCSI_READ16:
960 case SCSI_READ10:
961 ret = fsl_scsi_exec(sata, pccb, 0);
962 break;
963 case SCSI_WRITE10:
964 ret = fsl_scsi_exec(sata, pccb, 1);
965 break;
966 case SCSI_RD_CAPAC10:
967 ret = fsl_ata_scsiop_read_capacity10(uc_priv, pccb);
968 break;
969 case SCSI_RD_CAPAC16:
970 ret = fsl_ata_scsiop_read_capacity16(uc_priv, pccb);
971 break;
972 case SCSI_TST_U_RDY:
973 ret = fsl_ata_scsiop_test_unit_ready(uc_priv, pccb);
974 break;
975 case SCSI_INQUIRY:
976 ret = fsl_ata_scsiop_inquiry(uc_priv, pccb, sata);
977 break;
978 default:
979 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
980 return -ENOTSUPP;
981 }
982
983 if (ret) {
984 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
985 return ret;
986 }
987
988 return 0;
989 }
990
fsl_ahci_probe(struct udevice * dev)991 static int fsl_ahci_probe(struct udevice *dev)
992 {
993 struct fsl_ahci_priv *priv = dev_get_priv(dev);
994 struct udevice *child_dev;
995 struct scsi_platdata *uc_plat;
996
997 device_find_first_child(dev, &child_dev);
998 if (!child_dev)
999 return -ENODEV;
1000 uc_plat = dev_get_uclass_platdata(child_dev);
1001 uc_plat->base = priv->base;
1002 uc_plat->max_lun = 1;
1003 uc_plat->max_id = 1;
1004
1005 return init_sata(priv);
1006 }
1007
1008 struct scsi_ops fsl_scsi_ops = {
1009 .exec = fsl_ahci_scsi_exec,
1010 };
1011
1012 static const struct udevice_id fsl_ahci_ids[] = {
1013 { .compatible = "fsl,pq-sata-v2" },
1014 { }
1015 };
1016
1017 U_BOOT_DRIVER(fsl_ahci_scsi) = {
1018 .name = "fsl_ahci_scsi",
1019 .id = UCLASS_SCSI,
1020 .ops = &fsl_scsi_ops,
1021 };
1022
1023 U_BOOT_DRIVER(fsl_ahci) = {
1024 .name = "fsl_ahci",
1025 .id = UCLASS_AHCI,
1026 .of_match = fsl_ahci_ids,
1027 .bind = fsl_ahci_bind,
1028 .ofdata_to_platdata = fsl_ahci_ofdata_to_platdata,
1029 .probe = fsl_ahci_probe,
1030 .priv_auto_alloc_size = sizeof(struct fsl_ahci_priv),
1031 };
1032