1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright 2019 NXP
4 */
5
6 #include <common.h>
7 #include <cpu.h>
8 #include <dm.h>
9 #include <thermal.h>
10 #include <asm/arch/sci/sci.h>
11 #include <asm/arch/sys_proto.h>
12 #include <asm/arch-imx/cpu.h>
13 #include <asm/armv8/cpu.h>
14
15 DECLARE_GLOBAL_DATA_PTR;
16
17 struct cpu_imx_platdata {
18 const char *name;
19 const char *rev;
20 const char *type;
21 u32 cpurev;
22 u32 freq_mhz;
23 };
24
get_imx8_type(u32 imxtype)25 const char *get_imx8_type(u32 imxtype)
26 {
27 switch (imxtype) {
28 case MXC_CPU_IMX8QXP:
29 case MXC_CPU_IMX8QXP_A0:
30 return "QXP";
31 case MXC_CPU_IMX8QM:
32 return "QM";
33 default:
34 return "??";
35 }
36 }
37
get_imx8_rev(u32 rev)38 const char *get_imx8_rev(u32 rev)
39 {
40 switch (rev) {
41 case CHIP_REV_A:
42 return "A";
43 case CHIP_REV_B:
44 return "B";
45 default:
46 return "?";
47 }
48 }
49
get_core_name(void)50 const char *get_core_name(void)
51 {
52 if (is_cortex_a35())
53 return "A35";
54 else if (is_cortex_a53())
55 return "A53";
56 else if (is_cortex_a72())
57 return "A72";
58 else
59 return "?";
60 }
61
62 #if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
cpu_imx_get_temp(void)63 static int cpu_imx_get_temp(void)
64 {
65 struct udevice *thermal_dev;
66 int cpu_tmp, ret;
67
68 ret = uclass_get_device_by_name(UCLASS_THERMAL, "cpu-thermal0",
69 &thermal_dev);
70
71 if (!ret) {
72 ret = thermal_get_temp(thermal_dev, &cpu_tmp);
73 if (ret)
74 return 0xdeadbeef;
75 } else {
76 return 0xdeadbeef;
77 }
78
79 return cpu_tmp;
80 }
81 #else
cpu_imx_get_temp(void)82 static int cpu_imx_get_temp(void)
83 {
84 return 0;
85 }
86 #endif
87
cpu_imx_get_desc(struct udevice * dev,char * buf,int size)88 int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
89 {
90 struct cpu_imx_platdata *plat = dev_get_platdata(dev);
91 int ret;
92
93 if (size < 100)
94 return -ENOSPC;
95
96 ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
97 plat->type, plat->rev, plat->name, plat->freq_mhz);
98
99 if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
100 buf = buf + ret;
101 size = size - ret;
102 ret = snprintf(buf, size, " at %dC", cpu_imx_get_temp());
103 }
104
105 snprintf(buf + ret, size - ret, "\n");
106
107 return 0;
108 }
109
cpu_imx_get_info(struct udevice * dev,struct cpu_info * info)110 static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info)
111 {
112 struct cpu_imx_platdata *plat = dev_get_platdata(dev);
113
114 info->cpu_freq = plat->freq_mhz * 1000;
115 info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
116 return 0;
117 }
118
cpu_imx_get_count(struct udevice * dev)119 static int cpu_imx_get_count(struct udevice *dev)
120 {
121 return 4;
122 }
123
cpu_imx_get_vendor(struct udevice * dev,char * buf,int size)124 static int cpu_imx_get_vendor(struct udevice *dev, char *buf, int size)
125 {
126 snprintf(buf, size, "NXP");
127 return 0;
128 }
129
130 static const struct cpu_ops cpu_imx8_ops = {
131 .get_desc = cpu_imx_get_desc,
132 .get_info = cpu_imx_get_info,
133 .get_count = cpu_imx_get_count,
134 .get_vendor = cpu_imx_get_vendor,
135 };
136
137 static const struct udevice_id cpu_imx8_ids[] = {
138 { .compatible = "arm,cortex-a35" },
139 { .compatible = "arm,cortex-a53" },
140 { }
141 };
142
imx8_get_cpu_rate(void)143 static ulong imx8_get_cpu_rate(void)
144 {
145 ulong rate;
146 int ret;
147 int type = is_cortex_a35() ? SC_R_A35 : is_cortex_a53() ?
148 SC_R_A53 : SC_R_A72;
149
150 ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
151 (sc_pm_clock_rate_t *)&rate);
152 if (ret) {
153 printf("Could not read CPU frequency: %d\n", ret);
154 return 0;
155 }
156
157 return rate;
158 }
159
imx8_cpu_probe(struct udevice * dev)160 static int imx8_cpu_probe(struct udevice *dev)
161 {
162 struct cpu_imx_platdata *plat = dev_get_platdata(dev);
163 u32 cpurev;
164
165 cpurev = get_cpu_rev();
166 plat->cpurev = cpurev;
167 plat->name = get_core_name();
168 plat->rev = get_imx8_rev(cpurev & 0xFFF);
169 plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
170 plat->freq_mhz = imx8_get_cpu_rate() / 1000000;
171 return 0;
172 }
173
174 U_BOOT_DRIVER(cpu_imx8_drv) = {
175 .name = "imx8x_cpu",
176 .id = UCLASS_CPU,
177 .of_match = cpu_imx8_ids,
178 .ops = &cpu_imx8_ops,
179 .probe = imx8_cpu_probe,
180 .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata),
181 .flags = DM_FLAG_PRE_RELOC,
182 };
183