1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com>
4 */
5
6 #include <common.h>
7 #include <clk.h>
8 #include <dm.h>
9 #include <dm/pinctrl.h>
10 #include <errno.h>
11 #include <asm/gpio.h>
12 #include <asm/io.h>
13 #include "../pinctrl/renesas/sh_pfc.h"
14
15 #define GPIO_IOINTSEL 0x00 /* General IO/Interrupt Switching Register */
16 #define GPIO_INOUTSEL 0x04 /* General Input/Output Switching Register */
17 #define GPIO_OUTDT 0x08 /* General Output Register */
18 #define GPIO_INDT 0x0c /* General Input Register */
19 #define GPIO_INTDT 0x10 /* Interrupt Display Register */
20 #define GPIO_INTCLR 0x14 /* Interrupt Clear Register */
21 #define GPIO_INTMSK 0x18 /* Interrupt Mask Register */
22 #define GPIO_MSKCLR 0x1c /* Interrupt Mask Clear Register */
23 #define GPIO_POSNEG 0x20 /* Positive/Negative Logic Select Register */
24 #define GPIO_EDGLEVEL 0x24 /* Edge/level Select Register */
25 #define GPIO_FILONOFF 0x28 /* Chattering Prevention On/Off Register */
26 #define GPIO_BOTHEDGE 0x4c /* One Edge/Both Edge Select Register */
27
28 #define RCAR_MAX_GPIO_PER_BANK 32
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 struct rcar_gpio_priv {
33 void __iomem *regs;
34 int pfc_offset;
35 };
36
rcar_gpio_get_value(struct udevice * dev,unsigned offset)37 static int rcar_gpio_get_value(struct udevice *dev, unsigned offset)
38 {
39 struct rcar_gpio_priv *priv = dev_get_priv(dev);
40 const u32 bit = BIT(offset);
41
42 /*
43 * Testing on r8a7790 shows that INDT does not show correct pin state
44 * when configured as output, so use OUTDT in case of output pins.
45 */
46 if (readl(priv->regs + GPIO_INOUTSEL) & bit)
47 return !!(readl(priv->regs + GPIO_OUTDT) & bit);
48 else
49 return !!(readl(priv->regs + GPIO_INDT) & bit);
50 }
51
rcar_gpio_set_value(struct udevice * dev,unsigned offset,int value)52 static int rcar_gpio_set_value(struct udevice *dev, unsigned offset,
53 int value)
54 {
55 struct rcar_gpio_priv *priv = dev_get_priv(dev);
56
57 if (value)
58 setbits_le32(priv->regs + GPIO_OUTDT, BIT(offset));
59 else
60 clrbits_le32(priv->regs + GPIO_OUTDT, BIT(offset));
61
62 return 0;
63 }
64
rcar_gpio_set_direction(void __iomem * regs,unsigned offset,bool output)65 static void rcar_gpio_set_direction(void __iomem *regs, unsigned offset,
66 bool output)
67 {
68 /*
69 * follow steps in the GPIO documentation for
70 * "Setting General Output Mode" and
71 * "Setting General Input Mode"
72 */
73
74 /* Configure postive logic in POSNEG */
75 clrbits_le32(regs + GPIO_POSNEG, BIT(offset));
76
77 /* Select "General Input/Output Mode" in IOINTSEL */
78 clrbits_le32(regs + GPIO_IOINTSEL, BIT(offset));
79
80 /* Select Input Mode or Output Mode in INOUTSEL */
81 if (output)
82 setbits_le32(regs + GPIO_INOUTSEL, BIT(offset));
83 else
84 clrbits_le32(regs + GPIO_INOUTSEL, BIT(offset));
85 }
86
rcar_gpio_direction_input(struct udevice * dev,unsigned offset)87 static int rcar_gpio_direction_input(struct udevice *dev, unsigned offset)
88 {
89 struct rcar_gpio_priv *priv = dev_get_priv(dev);
90
91 rcar_gpio_set_direction(priv->regs, offset, false);
92
93 return 0;
94 }
95
rcar_gpio_direction_output(struct udevice * dev,unsigned offset,int value)96 static int rcar_gpio_direction_output(struct udevice *dev, unsigned offset,
97 int value)
98 {
99 struct rcar_gpio_priv *priv = dev_get_priv(dev);
100
101 /* write GPIO value to output before selecting output mode of pin */
102 rcar_gpio_set_value(dev, offset, value);
103 rcar_gpio_set_direction(priv->regs, offset, true);
104
105 return 0;
106 }
107
rcar_gpio_get_function(struct udevice * dev,unsigned offset)108 static int rcar_gpio_get_function(struct udevice *dev, unsigned offset)
109 {
110 struct rcar_gpio_priv *priv = dev_get_priv(dev);
111
112 if (readl(priv->regs + GPIO_INOUTSEL) & BIT(offset))
113 return GPIOF_OUTPUT;
114 else
115 return GPIOF_INPUT;
116 }
117
rcar_gpio_request(struct udevice * dev,unsigned offset,const char * label)118 static int rcar_gpio_request(struct udevice *dev, unsigned offset,
119 const char *label)
120 {
121 return pinctrl_gpio_request(dev, offset);
122 }
123
rcar_gpio_free(struct udevice * dev,unsigned offset)124 static int rcar_gpio_free(struct udevice *dev, unsigned offset)
125 {
126 return pinctrl_gpio_free(dev, offset);
127 }
128
129 static const struct dm_gpio_ops rcar_gpio_ops = {
130 .request = rcar_gpio_request,
131 .free = rcar_gpio_free,
132 .direction_input = rcar_gpio_direction_input,
133 .direction_output = rcar_gpio_direction_output,
134 .get_value = rcar_gpio_get_value,
135 .set_value = rcar_gpio_set_value,
136 .get_function = rcar_gpio_get_function,
137 };
138
rcar_gpio_probe(struct udevice * dev)139 static int rcar_gpio_probe(struct udevice *dev)
140 {
141 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
142 struct rcar_gpio_priv *priv = dev_get_priv(dev);
143 struct fdtdec_phandle_args args;
144 struct clk clk;
145 int node = dev_of_offset(dev);
146 int ret;
147
148 priv->regs = (void __iomem *)devfdt_get_addr(dev);
149 uc_priv->bank_name = dev->name;
150
151 ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",
152 NULL, 3, 0, &args);
153 priv->pfc_offset = ret == 0 ? args.args[1] : -1;
154 uc_priv->gpio_count = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK;
155
156 ret = clk_get_by_index(dev, 0, &clk);
157 if (ret < 0) {
158 dev_err(dev, "Failed to get GPIO bank clock\n");
159 return ret;
160 }
161
162 ret = clk_enable(&clk);
163 clk_free(&clk);
164 if (ret) {
165 dev_err(dev, "Failed to enable GPIO bank clock\n");
166 return ret;
167 }
168
169 return 0;
170 }
171
172 static const struct udevice_id rcar_gpio_ids[] = {
173 { .compatible = "renesas,gpio-r8a7795" },
174 { .compatible = "renesas,gpio-r8a7796" },
175 { .compatible = "renesas,gpio-r8a77965" },
176 { .compatible = "renesas,gpio-r8a77970" },
177 { .compatible = "renesas,gpio-r8a77990" },
178 { .compatible = "renesas,gpio-r8a77995" },
179 { .compatible = "renesas,rcar-gen2-gpio" },
180 { .compatible = "renesas,rcar-gen3-gpio" },
181 { /* sentinel */ }
182 };
183
184 U_BOOT_DRIVER(rcar_gpio) = {
185 .name = "rcar-gpio",
186 .id = UCLASS_GPIO,
187 .of_match = rcar_gpio_ids,
188 .ops = &rcar_gpio_ops,
189 .priv_auto_alloc_size = sizeof(struct rcar_gpio_priv),
190 .probe = rcar_gpio_probe,
191 };
192