1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2019 Marek Vasut <marek.vasut@gmail.com>
4 */
5
6 #include <common.h>
7 #include <clk.h>
8 #include <dm.h>
9 #include <errno.h>
10 #include <asm/gpio.h>
11 #include <asm/io.h>
12
13 #define P(bank) (0x0000 + (bank) * 4)
14 #define PSR(bank) (0x0100 + (bank) * 4)
15 #define PPR(bank) (0x0200 + (bank) * 4)
16 #define PM(bank) (0x0300 + (bank) * 4)
17 #define PMC(bank) (0x0400 + (bank) * 4)
18 #define PFC(bank) (0x0500 + (bank) * 4)
19 #define PFCE(bank) (0x0600 + (bank) * 4)
20 #define PNOT(bank) (0x0700 + (bank) * 4)
21 #define PMSR(bank) (0x0800 + (bank) * 4)
22 #define PMCSR(bank) (0x0900 + (bank) * 4)
23 #define PFCAE(bank) (0x0A00 + (bank) * 4)
24 #define PIBC(bank) (0x4000 + (bank) * 4)
25 #define PBDC(bank) (0x4100 + (bank) * 4)
26 #define PIPC(bank) (0x4200 + (bank) * 4)
27
28 #define RZA1_MAX_GPIO_PER_BANK 16
29
30 DECLARE_GLOBAL_DATA_PTR;
31
32 struct r7s72100_gpio_priv {
33 void __iomem *regs;
34 int bank;
35 };
36
r7s72100_gpio_get_value(struct udevice * dev,unsigned offset)37 static int r7s72100_gpio_get_value(struct udevice *dev, unsigned offset)
38 {
39 struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
40
41 return !!(readw(priv->regs + PPR(priv->bank)) & BIT(offset));
42 }
43
r7s72100_gpio_set_value(struct udevice * dev,unsigned line,int value)44 static int r7s72100_gpio_set_value(struct udevice *dev, unsigned line,
45 int value)
46 {
47 struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
48
49 writel(BIT(line + 16) | (value ? BIT(line) : 0),
50 priv->regs + PSR(priv->bank));
51
52 return 0;
53 }
54
r7s72100_gpio_set_direction(struct udevice * dev,unsigned line,bool output)55 static void r7s72100_gpio_set_direction(struct udevice *dev, unsigned line,
56 bool output)
57 {
58 struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
59
60 writel(BIT(line + 16), priv->regs + PMCSR(priv->bank));
61 writel(BIT(line + 16) | (output ? 0 : BIT(line)),
62 priv->regs + PMSR(priv->bank));
63
64 clrsetbits_le16(priv->regs + PIBC(priv->bank), BIT(line),
65 output ? 0 : BIT(line));
66 }
67
r7s72100_gpio_direction_input(struct udevice * dev,unsigned offset)68 static int r7s72100_gpio_direction_input(struct udevice *dev, unsigned offset)
69 {
70 r7s72100_gpio_set_direction(dev, offset, false);
71 return 0;
72 }
73
r7s72100_gpio_direction_output(struct udevice * dev,unsigned offset,int value)74 static int r7s72100_gpio_direction_output(struct udevice *dev, unsigned offset,
75 int value)
76 {
77 /* write GPIO value to output before selecting output mode of pin */
78 r7s72100_gpio_set_value(dev, offset, value);
79 r7s72100_gpio_set_direction(dev, offset, true);
80
81 return 0;
82 }
83
r7s72100_gpio_get_function(struct udevice * dev,unsigned offset)84 static int r7s72100_gpio_get_function(struct udevice *dev, unsigned offset)
85 {
86 struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
87
88 if (readw(priv->regs + PM(priv->bank)) & BIT(offset))
89 return GPIOF_INPUT;
90 else
91 return GPIOF_OUTPUT;
92 }
93
94 static const struct dm_gpio_ops r7s72100_gpio_ops = {
95 .direction_input = r7s72100_gpio_direction_input,
96 .direction_output = r7s72100_gpio_direction_output,
97 .get_value = r7s72100_gpio_get_value,
98 .set_value = r7s72100_gpio_set_value,
99 .get_function = r7s72100_gpio_get_function,
100 };
101
r7s72100_gpio_probe(struct udevice * dev)102 static int r7s72100_gpio_probe(struct udevice *dev)
103 {
104 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
105 struct r7s72100_gpio_priv *priv = dev_get_priv(dev);
106 struct fdtdec_phandle_args args;
107 int node = dev_of_offset(dev);
108 int ret;
109
110 fdt_addr_t addr_base;
111
112 uc_priv->bank_name = dev->name;
113 dev = dev_get_parent(dev);
114 addr_base = devfdt_get_addr(dev);
115 if (addr_base == FDT_ADDR_T_NONE)
116 return -EINVAL;
117
118 priv->regs = (void __iomem *)addr_base;
119
120 ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",
121 NULL, 3, 0, &args);
122 priv->bank = ret == 0 ? (args.args[1] / RZA1_MAX_GPIO_PER_BANK) : -1;
123 uc_priv->gpio_count = ret == 0 ? args.args[2] : RZA1_MAX_GPIO_PER_BANK;
124
125 return 0;
126 }
127
128 U_BOOT_DRIVER(r7s72100_gpio) = {
129 .name = "r7s72100-gpio",
130 .id = UCLASS_GPIO,
131 .ops = &r7s72100_gpio_ops,
132 .priv_auto_alloc_size = sizeof(struct r7s72100_gpio_priv),
133 .probe = r7s72100_gpio_probe,
134 };
135